1 /* 2 * Copyright (c) 2023 Qualcomm Innovation Center, Inc. All rights reserved. 3 * 4 * Permission to use, copy, modify, and/or distribute this software for any 5 * purpose with or without fee is hereby granted, provided that the above 6 * copyright notice and this permission notice appear in all copies. 7 * 8 * THE SOFTWARE IS PROVIDED "AS IS" AND THE AUTHOR DISCLAIMS ALL WARRANTIES 9 * WITH REGARD TO THIS SOFTWARE INCLUDING ALL IMPLIED WARRANTIES OF 10 * MERCHANTABILITY AND FITNESS. IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR 11 * ANY SPECIAL, DIRECT, INDIRECT, OR CONSEQUENTIAL DAMAGES OR ANY DAMAGES 12 * WHATSOEVER RESULTING FROM LOSS OF USE, DATA OR PROFITS, WHETHER IN AN 13 * ACTION OF CONTRACT, NEGLIGENCE OR OTHER TORTIOUS ACTION, ARISING OUT OF 14 * OR IN CONNECTION WITH THE USE OR PERFORMANCE OF THIS SOFTWARE. 15 */ 16 17 #ifndef _PCU_PPDU_SETUP_INIT_H_ 18 #define _PCU_PPDU_SETUP_INIT_H_ 19 #if !defined(__ASSEMBLER__) 20 #endif 21 22 #include "pdg_response_rate_setting.h" 23 #define NUM_OF_DWORDS_PCU_PPDU_SETUP_INIT 58 24 25 #define NUM_OF_QWORDS_PCU_PPDU_SETUP_INIT 29 26 27 28 struct pcu_ppdu_setup_init { 29 #ifndef WIFI_BIT_ORDER_BIG_ENDIAN 30 uint32_t medium_prot_type : 3, // [2:0] 31 response_type : 5, // [7:3] 32 response_info_part2_required : 1, // [8:8] 33 response_to_response : 3, // [11:9] 34 mba_user_order : 2, // [13:12] 35 expected_mba_size : 11, // [24:14] 36 required_ul_mu_resp_user_count : 6, // [30:25] 37 transmitted_bssid_check_en : 1; // [31:31] 38 uint32_t mprot_required_bw1 : 1, // [0:0] 39 mprot_required_bw20 : 1, // [1:1] 40 mprot_required_bw40 : 1, // [2:2] 41 mprot_required_bw80 : 1, // [3:3] 42 mprot_required_bw160 : 1, // [4:4] 43 mprot_required_bw240 : 1, // [5:5] 44 mprot_required_bw320 : 1, // [6:6] 45 ppdu_allowed_bw1 : 1, // [7:7] 46 ppdu_allowed_bw20 : 1, // [8:8] 47 ppdu_allowed_bw40 : 1, // [9:9] 48 ppdu_allowed_bw80 : 1, // [10:10] 49 ppdu_allowed_bw160 : 1, // [11:11] 50 ppdu_allowed_bw240 : 1, // [12:12] 51 ppdu_allowed_bw320 : 1, // [13:13] 52 set_fc_pwr_mgt : 1, // [14:14] 53 use_cts_duration_for_data_tx : 1, // [15:15] 54 update_timestamp_64 : 1, // [16:16] 55 update_timestamp_32_lower : 1, // [17:17] 56 update_timestamp_32_upper : 1, // [18:18] 57 reserved_1a : 13; // [31:19] 58 uint32_t insert_timestamp_offset_0 : 16, // [15:0] 59 insert_timestamp_offset_1 : 16; // [31:16] 60 uint32_t max_bw40_try_count : 4, // [3:0] 61 max_bw80_try_count : 4, // [7:4] 62 max_bw160_try_count : 4, // [11:8] 63 max_bw240_try_count : 4, // [15:12] 64 max_bw320_try_count : 4, // [19:16] 65 insert_wur_timestamp_offset : 6, // [25:20] 66 update_wur_timestamp : 1, // [26:26] 67 wur_embedded_bssid_present : 1, // [27:27] 68 insert_wur_fcs : 1, // [28:28] 69 reserved_3b : 3; // [31:29] 70 struct pdg_response_rate_setting response_to_response_rate_info_bw20; 71 struct pdg_response_rate_setting response_to_response_rate_info_bw40; 72 struct pdg_response_rate_setting response_to_response_rate_info_bw80; 73 struct pdg_response_rate_setting response_to_response_rate_info_bw160; 74 struct pdg_response_rate_setting response_to_response_rate_info_bw240; 75 struct pdg_response_rate_setting response_to_response_rate_info_bw320; 76 uint32_t r2r_hw_response_tx_duration : 16, // [15:0] 77 r2r_rx_duration_field : 16; // [31:16] 78 uint32_t r2r_group_id : 6, // [5:0] 79 r2r_response_frame_type : 4, // [9:6] 80 r2r_sta_partial_aid : 11, // [20:10] 81 use_address_fields_for_protection : 1, // [21:21] 82 r2r_set_required_response_time : 1, // [22:22] 83 reserved_29a : 3, // [25:23] 84 r2r_bw20_active_channel : 3, // [28:26] 85 r2r_bw40_active_channel : 3; // [31:29] 86 uint32_t r2r_bw80_active_channel : 3, // [2:0] 87 r2r_bw160_active_channel : 3, // [5:3] 88 r2r_bw240_active_channel : 3, // [8:6] 89 r2r_bw320_active_channel : 3, // [11:9] 90 r2r_bw20 : 3, // [14:12] 91 r2r_bw40 : 3, // [17:15] 92 r2r_bw80 : 3, // [20:18] 93 r2r_bw160 : 3, // [23:21] 94 r2r_bw240 : 3, // [26:24] 95 r2r_bw320 : 3, // [29:27] 96 reserved_30a : 2; // [31:30] 97 uint32_t mu_response_expected_bitmap_31_0 : 32; // [31:0] 98 uint32_t mu_response_expected_bitmap_36_32 : 5, // [4:0] 99 mu_expected_response_cbf_count : 6, // [10:5] 100 mu_expected_response_sta_count : 6, // [16:11] 101 transmit_includes_multidestination : 1, // [17:17] 102 insert_prev_tx_start_timing_info : 1, // [18:18] 103 insert_current_tx_start_timing_info : 1, // [19:19] 104 tx_start_transmit_time_byte_offset : 12; // [31:20] 105 uint32_t protection_frame_ad1_31_0 : 32; // [31:0] 106 uint32_t protection_frame_ad1_47_32 : 16, // [15:0] 107 protection_frame_ad2_15_0 : 16; // [31:16] 108 uint32_t protection_frame_ad2_47_16 : 32; // [31:0] 109 uint32_t dynamic_medium_prot_threshold : 24, // [23:0] 110 dynamic_medium_prot_type : 1, // [24:24] 111 reserved_54a : 7; // [31:25] 112 uint32_t protection_frame_ad3_31_0 : 32; // [31:0] 113 uint32_t protection_frame_ad3_47_32 : 16, // [15:0] 114 protection_frame_ad4_15_0 : 16; // [31:16] 115 uint32_t protection_frame_ad4_47_16 : 32; // [31:0] 116 #else 117 uint32_t transmitted_bssid_check_en : 1, // [31:31] 118 required_ul_mu_resp_user_count : 6, // [30:25] 119 expected_mba_size : 11, // [24:14] 120 mba_user_order : 2, // [13:12] 121 response_to_response : 3, // [11:9] 122 response_info_part2_required : 1, // [8:8] 123 response_type : 5, // [7:3] 124 medium_prot_type : 3; // [2:0] 125 uint32_t reserved_1a : 13, // [31:19] 126 update_timestamp_32_upper : 1, // [18:18] 127 update_timestamp_32_lower : 1, // [17:17] 128 update_timestamp_64 : 1, // [16:16] 129 use_cts_duration_for_data_tx : 1, // [15:15] 130 set_fc_pwr_mgt : 1, // [14:14] 131 ppdu_allowed_bw320 : 1, // [13:13] 132 ppdu_allowed_bw240 : 1, // [12:12] 133 ppdu_allowed_bw160 : 1, // [11:11] 134 ppdu_allowed_bw80 : 1, // [10:10] 135 ppdu_allowed_bw40 : 1, // [9:9] 136 ppdu_allowed_bw20 : 1, // [8:8] 137 ppdu_allowed_bw1 : 1, // [7:7] 138 mprot_required_bw320 : 1, // [6:6] 139 mprot_required_bw240 : 1, // [5:5] 140 mprot_required_bw160 : 1, // [4:4] 141 mprot_required_bw80 : 1, // [3:3] 142 mprot_required_bw40 : 1, // [2:2] 143 mprot_required_bw20 : 1, // [1:1] 144 mprot_required_bw1 : 1; // [0:0] 145 uint32_t insert_timestamp_offset_1 : 16, // [31:16] 146 insert_timestamp_offset_0 : 16; // [15:0] 147 uint32_t reserved_3b : 3, // [31:29] 148 insert_wur_fcs : 1, // [28:28] 149 wur_embedded_bssid_present : 1, // [27:27] 150 update_wur_timestamp : 1, // [26:26] 151 insert_wur_timestamp_offset : 6, // [25:20] 152 max_bw320_try_count : 4, // [19:16] 153 max_bw240_try_count : 4, // [15:12] 154 max_bw160_try_count : 4, // [11:8] 155 max_bw80_try_count : 4, // [7:4] 156 max_bw40_try_count : 4; // [3:0] 157 struct pdg_response_rate_setting response_to_response_rate_info_bw20; 158 struct pdg_response_rate_setting response_to_response_rate_info_bw40; 159 struct pdg_response_rate_setting response_to_response_rate_info_bw80; 160 struct pdg_response_rate_setting response_to_response_rate_info_bw160; 161 struct pdg_response_rate_setting response_to_response_rate_info_bw240; 162 struct pdg_response_rate_setting response_to_response_rate_info_bw320; 163 uint32_t r2r_rx_duration_field : 16, // [31:16] 164 r2r_hw_response_tx_duration : 16; // [15:0] 165 uint32_t r2r_bw40_active_channel : 3, // [31:29] 166 r2r_bw20_active_channel : 3, // [28:26] 167 reserved_29a : 3, // [25:23] 168 r2r_set_required_response_time : 1, // [22:22] 169 use_address_fields_for_protection : 1, // [21:21] 170 r2r_sta_partial_aid : 11, // [20:10] 171 r2r_response_frame_type : 4, // [9:6] 172 r2r_group_id : 6; // [5:0] 173 uint32_t reserved_30a : 2, // [31:30] 174 r2r_bw320 : 3, // [29:27] 175 r2r_bw240 : 3, // [26:24] 176 r2r_bw160 : 3, // [23:21] 177 r2r_bw80 : 3, // [20:18] 178 r2r_bw40 : 3, // [17:15] 179 r2r_bw20 : 3, // [14:12] 180 r2r_bw320_active_channel : 3, // [11:9] 181 r2r_bw240_active_channel : 3, // [8:6] 182 r2r_bw160_active_channel : 3, // [5:3] 183 r2r_bw80_active_channel : 3; // [2:0] 184 uint32_t mu_response_expected_bitmap_31_0 : 32; // [31:0] 185 uint32_t tx_start_transmit_time_byte_offset : 12, // [31:20] 186 insert_current_tx_start_timing_info : 1, // [19:19] 187 insert_prev_tx_start_timing_info : 1, // [18:18] 188 transmit_includes_multidestination : 1, // [17:17] 189 mu_expected_response_sta_count : 6, // [16:11] 190 mu_expected_response_cbf_count : 6, // [10:5] 191 mu_response_expected_bitmap_36_32 : 5; // [4:0] 192 uint32_t protection_frame_ad1_31_0 : 32; // [31:0] 193 uint32_t protection_frame_ad2_15_0 : 16, // [31:16] 194 protection_frame_ad1_47_32 : 16; // [15:0] 195 uint32_t protection_frame_ad2_47_16 : 32; // [31:0] 196 uint32_t reserved_54a : 7, // [31:25] 197 dynamic_medium_prot_type : 1, // [24:24] 198 dynamic_medium_prot_threshold : 24; // [23:0] 199 uint32_t protection_frame_ad3_31_0 : 32; // [31:0] 200 uint32_t protection_frame_ad4_15_0 : 16, // [31:16] 201 protection_frame_ad3_47_32 : 16; // [15:0] 202 uint32_t protection_frame_ad4_47_16 : 32; // [31:0] 203 #endif 204 }; 205 206 207 /* Description MEDIUM_PROT_TYPE 208 209 Self Gen Medium Protection type used 210 <enum 0 No_protection> 211 <enum 1 RTS_legacy> 212 <enum 2 RTS_11ac_static_bw> 213 <enum 3 RTS_11ac_dynamic_bw> 214 <enum 4 CTS2Self> 215 <enum 5 QoS_Null_no_ack_3addr> 216 <enum 6 QoS_Null_no_ack_4addr> 217 218 <legal 0-6> 219 */ 220 221 #define PCU_PPDU_SETUP_INIT_MEDIUM_PROT_TYPE_OFFSET 0x0000000000000000 222 #define PCU_PPDU_SETUP_INIT_MEDIUM_PROT_TYPE_LSB 0 223 #define PCU_PPDU_SETUP_INIT_MEDIUM_PROT_TYPE_MSB 2 224 #define PCU_PPDU_SETUP_INIT_MEDIUM_PROT_TYPE_MASK 0x0000000000000007 225 226 227 /* Description RESPONSE_TYPE 228 229 PPDU transmission Response type expected 230 231 Used by PDG to calculate the anticipated response duration 232 time. 233 234 Used by TXPCU to prepare for expecting to receive a response. 235 236 237 <enum 0 no_response_expected>After transmission of this 238 frame, no response in SIFS time is expected 239 240 When TXPCU sees this setting, it shall not generated the 241 EXPECTED_RESPONSE TLV. 242 243 RXPCU should never see this setting 244 <enum 1 ack_expected>An ACK frame is expected as response 245 246 247 RXPCU is just expecting any response. It is TXPCU who checks 248 that the right response was received. 249 <enum 2 ba_64_bitmap_expected>BA with 64 bitmap is expected. 250 251 252 PDG DOES NOT use the size info to calculated response duration. 253 The length of the response will have to be programmed by 254 SW in the per-BW 'Expected_ppdu_resp_length' field. 255 256 For TXPCU only the fact that it is a BA is important. Actual 257 received BA size is not important 258 259 RXPCU is just expecting any response. It is TXPCU who checks 260 that the right response was received. 261 <enum 3 ba_256_expected>BA with 256 bitmap is expected. 262 263 PDG DOES NOT use the size info to calculated response duration. 264 The length of the response will have to be programmed by 265 SW in the per-BW 'Expected_ppdu_resp_length' field. 266 267 For TXPCU only the fact that it is a BA is important. Actual 268 received BA size is not important 269 270 RXPCU is just expecting any response. It is TXPCU who checks 271 that the right response was received. 272 <enum 4 actionnoack_expected>SW sets this after sending 273 NDP or BR-Poll. 274 275 As PDG has no idea on how long the reception is going to 276 be, the reception time of the response will have to be 277 programmed by SW in the 'Extend_duration_value_bw...' field 278 279 280 RXPCU is just expecting any response. It is TXPCU who checks 281 that the right response was received. 282 <enum 5 ack_ba_expected>PDG uses the size info and assumes 283 single BA format with ACK and 64 bitmap embedded. 284 If SW expects more bitmaps in case of multi-TID, is shall 285 program the 'Extend_duration_value_bw...' field for additional 286 duration time. 287 For TXPCU only the fact that an ACK and/or BA is received 288 is important. Reception of only ACK or BA is also considered 289 a success. 290 SW also typically sets this when sending VHT single MPDU. 291 Some chip vendors might send BA rather than ACK in response 292 to VHT single MPDU but still we want to accept BA as well. 293 294 295 RXPCU is just expecting any response. It is TXPCU who checks 296 that the right response was received. 297 <enum 6 cts_expected>SW sets this after queuing RTS frame 298 as standalone packet and sending it. 299 300 RXPCU is just expecting any response. It is TXPCU who checks 301 that the right response was received. 302 <enum 7 ack_data_expected>SW sets this after sending PS-Poll. 303 304 305 For TXPCU either ACK and/or data reception is considered 306 success. 307 PDG basis it's response duration calculation on an ACK. 308 For the data portion, SW shall program the 'Extend_duration_value_bw...' 309 field 310 <enum 8 ndp_ack_expected>Reserved for 11ah usage. 311 <enum 9 ndp_modified_ack>Reserved for 11ah usage 312 <enum 10 ndp_ba_expected>Reserved for 11ah usage. 313 <enum 11 ndp_cts_expected>Reserved for 11ah usage 314 <enum 12 ndp_ack_or_ndp_modified_ack_expected>Reserved for 315 11ah usage 316 317 TXPCU expects UL MU OFDMA or UL MU MIMO reception. 318 As PDG does not know how RUs are assigned for the uplink 319 portion, PDG can not calculate the uplink duration. Therefor 320 SW shall program the 'Extend_duration_value_bw...' field 321 322 323 RXPCU will report any frame received, irrespective of it 324 having been UL MU or SU It is TXPCUs responsibility to 325 distinguish between the UL MU or SU 326 327 TXPCU can check in TLV RECEIVED_RESPONSE_INFO MU_Response_BA_bitmap 328 if indeed BA was received 329 330 TXPCU expects UL MU OFDMA or UL MU MIMO reception. 331 As PDG does not know how RUs are assigned for the uplink 332 portion, PDG can not calculate the uplink duration. Therefor 333 SW shall program the 'Extend_duration_value_bw...' field 334 335 336 RXPCU will report any frame received, irrespective of it 337 having been UL MU or SU It is TXPCUs responsibility to 338 distinguish between the UL MU or SU 339 340 TXPCU can check in TLV RECEIVED_RESPONSE_INFO, field MU_Response_data_bitmap 341 and MU_Response_BA_bitmap if indeed BA and data was received 342 343 When selected, CBF frames are expected to be received in 344 MU reception (uplink OFDMA or uplink MIMO) 345 346 RXPCU is just expecting any response. It is TXPCU who checks 347 that the right response was received 348 TXPCU can check in TLV RECEIVED_RESPONSE_INFO, field MU_Response_cbf_bitmap 349 if indeed CBF frames were received. 350 <enum 16 ul_mu_frames_expected>When selected, MPDU frames 351 are expected in the MU reception (uplink OFDMA or uplink 352 MIMO) 353 354 RXPCU is just expecting any response. It is TXPCU who checks 355 that the right response was received 356 357 TXPCU can check in TLV RECEIVED_RESPONSE_INFO, field MU_Response_bitmap 358 if indeed frames were received. 359 <enum 17 any_response_to_this_device>Any response expected 360 to be send to this device in SIFS time is acceptable. 361 362 RXPCU is just expecting any response. It is TXPCU who checks 363 that the right response was received 364 365 For TXPCU, UL MU or SU is both acceptable. 366 367 Can be used for complex OFDMA scenarios. PDG can not calculate 368 the uplink duration. Therefor SW shall program the 'Extend_duration_value_bw...' 369 field 370 <enum 18 any_response_accepted>Any frame in the medium to 371 this or any other device, is acceptable as response. 372 RXPCU is just expecting any response. It is TXPCU who checks 373 that the right response was received 374 375 For TXPCU, UL MU or SU is both acceptable. 376 377 Can be used for complex OFDMA scenarios. PDG can not calculate 378 the uplink duration. Therefor SW shall program the 'Extend_duration_value_bw...' 379 field 380 <enum 19 frameless_phyrx_response_accepted>Any MU frameless 381 reception generated by the PHY is acceptable. 382 383 PHY indicates this type of reception explicitly in TLV PHYRX_RSSI_LEGACY, 384 field Reception_type == reception_is_frameless 385 386 RXPCU will report any frame received, irrespective of it 387 having been UL MU or SU. 388 389 This can be used for complex MU-MIMO or OFDMA scenarios, 390 like receiving MU-CTS. 391 392 PDG can not calculate the uplink duration. Therefor SW shall 393 program the 'Extend_duration_value_bw...' field 394 <enum 20 ranging_ndp_and_lmr_expected>SW sets this after 395 sending ranging NDPA followed by NDP as an ISTA and NDP 396 and LMR (Action No Ack) are expected as back-to-back reception 397 in SIFS. 398 399 As PDG has no idea on how long the reception is going to 400 be, the reception time of the response will have to be 401 programmed by SW in the 'Extend_duration_value_bw...' field 402 403 404 RXPCU is just expecting any response. It is TXPCU who checks 405 that the right response was received. 406 <enum 21 ba_512_expected>BA with 512 bitmap is expected. 407 408 409 PDG DOES NOT use the size info to calculated response duration. 410 The length of the response will have to be programmed by 411 SW in the per-BW 'Expected_ppdu_resp_length' field. 412 413 For TXPCU only the fact that it is a BA is important. Actual 414 received BA size is not important 415 416 RXPCU is just expecting any response. It is TXPCU who checks 417 that the right response was received. 418 <enum 22 ba_1024_expected>BA with 1024 bitmap is expected. 419 420 421 PDG DOES NOT use the size info to calculated response duration. 422 The length of the response will have to be programmed by 423 SW in the per-BW 'Expected_ppdu_resp_length' field. 424 425 For TXPCU only the fact that it is a BA is important. Actual 426 received BA size is not important 427 428 RXPCU is just expecting any response. It is TXPCU who checks 429 that the right response was received. 430 <enum 23 ul_mu_ranging_cts2s_expected>When selected, CTS2S 431 frames are expected to be received in MU reception (uplink 432 OFDMA) 433 434 RXPCU shall check each response for CTS2S and report to 435 TXPCU. 436 437 TXPCU can check in the TLV 'RECEIVED_RESPONSE_INFO,' fields 438 'MU_Response_bitmap' and 'TB_Ranging_Resp' if indeed CTS2S 439 frames were received. 440 <enum 24 ul_mu_ranging_ndp_expected>When selected, UL NDP 441 frames are expected to be received in MU reception (uplink 442 spatial multiplexing) 443 444 RXPCU shall check each response for NDP and report to TXPCU. 445 446 447 TXPCU can check in the TLV 'RECEIVED_RESPONSE_INFO,' fields 448 'MU_Response_bitmap' and 'TB_Ranging_Resp' if indeed NDP 449 frames were received. 450 <enum 25 ul_mu_ranging_lmr_expected>When selected, LMR frames 451 are expected to be received in MU reception (uplink OFDMA 452 or uplink MIMO) 453 454 RXPCU shall check each response for LMR and report to TXPCU. 455 456 457 TXPCU can check in the TLV 'RECEIVED_RESPONSE_INFO,' fields 458 'MU_Response_bitmap' and 'TB_Ranging_Resp' if indeed LMR 459 frames were received. 460 */ 461 462 #define PCU_PPDU_SETUP_INIT_RESPONSE_TYPE_OFFSET 0x0000000000000000 463 #define PCU_PPDU_SETUP_INIT_RESPONSE_TYPE_LSB 3 464 #define PCU_PPDU_SETUP_INIT_RESPONSE_TYPE_MSB 7 465 #define PCU_PPDU_SETUP_INIT_RESPONSE_TYPE_MASK 0x00000000000000f8 466 467 468 /* Description RESPONSE_INFO_PART2_REQUIRED 469 470 Field only valid when Response_type is NOT set to No_response_expected 471 472 473 When set to 1, RXPCU shall generate the RECEIVED_RESPONSE_INFO_PART2 474 TLV after having received the response frame. TXPCU shall 475 wait for this TLV before sending the TX_FES_STATUS_END 476 TLV. 477 478 When NOT set, RXPCU shall NOT generate the above mentioned 479 TLV. TXPCU shall not wait for this TLV and after having 480 received RECEIVED_RESPONSE_INFO TLV, it can immediately 481 generate the TX_FES_STATUS_END TLV. 482 483 <legal all> 484 */ 485 486 #define PCU_PPDU_SETUP_INIT_RESPONSE_INFO_PART2_REQUIRED_OFFSET 0x0000000000000000 487 #define PCU_PPDU_SETUP_INIT_RESPONSE_INFO_PART2_REQUIRED_LSB 8 488 #define PCU_PPDU_SETUP_INIT_RESPONSE_INFO_PART2_REQUIRED_MSB 8 489 #define PCU_PPDU_SETUP_INIT_RESPONSE_INFO_PART2_REQUIRED_MASK 0x0000000000000100 490 491 492 /* Description RESPONSE_TO_RESPONSE 493 494 Field indicates if after receiving an expected PPDU response 495 (as indicated by the Response_type), TXPCU is expected 496 to generate a reponse to that response 497 498 Example: OFDMA trigger frame is sent, with expected response 499 being UL OFDMA data, which result in a response to the 500 response of MBA 501 502 <enum 0 None> No response after response allowed. 503 <enum 1 SU_BA> The response after response that TXPCU is 504 allowed to generate is a single BA. Even if RXPCU is indicating 505 that multiple users are received, TXPCU shall only send 506 a BA for 1 STA. Response_to_response rates can be found 507 in fields 'response_to_response_rate_info_bw...' 508 <enum 2 MU_BA> The response after response that TXPCU is 509 allowed to generate is only Multi Destination Multi User 510 BA. Response_to_response rates can be found in fields 'response_to_response_rate_info_bw...' 511 512 513 <enum 3 RESPONSE_TO_RESPONSE_CMD> A response to response 514 is expected to be generated. In other words, RXPCU will 515 likely indicate to TXPCU at the end of upcoming reception 516 that a response is needed. TXPCU is however to ignore this 517 indication from RXPCU, and assume for a moment that no 518 response to response is needed, as all the details on how 519 to handle this is provided in the next scheduling command, 520 which is marked as a 'response_to_response' type. 521 522 <legal 0-3> 523 */ 524 525 #define PCU_PPDU_SETUP_INIT_RESPONSE_TO_RESPONSE_OFFSET 0x0000000000000000 526 #define PCU_PPDU_SETUP_INIT_RESPONSE_TO_RESPONSE_LSB 9 527 #define PCU_PPDU_SETUP_INIT_RESPONSE_TO_RESPONSE_MSB 11 528 #define PCU_PPDU_SETUP_INIT_RESPONSE_TO_RESPONSE_MASK 0x0000000000000e00 529 530 531 /* Description MBA_USER_ORDER 532 533 Field only valid in case of 'response_to_response' set to 534 MU_BA. 535 536 <enum 0 mu_ba_fixed_user_order> TXPCU shall ask RXPCU for 537 BA info for all TX users, in order from user 0 to user 538 N 539 <enum 1 mu_ba_optimized_user_order> TXPCU shall ask RXPCU 540 for BA info for all TX users, but let RXPCU determine in 541 which order the BA bitmaps for each user shall be returned. 542 Note that RXPCU might return some 'invalid' bitmaps in case 543 there was no data received from all the users. 544 <enum 2 mu_ba_fully_optimized> TXPCU shall ask RXPCU for 545 BA info for the number RX users that RXPCU indicated in 546 the 'Max_rx_user_count' in the RX_PPDU_START TLV. TXPCU 547 shall let RXPCU determine in which order the BA bitmaps 548 for each user shall be returned. Note that RXPCU might 549 still return some 'invalid' bitmaps in case there were only 550 frames with FCS errors for some of the users 551 <enum 3 mu_ba_fully_optimized_multi_tid> TXPCU shall ask 552 RXPCU for BA info for the number bitmaps that RXPCU indicated 553 in the (SUM of) response_ack_count, response_ba64_count, 554 response_ba256_count fields in RX_RESPONSE_REQUIRED. TXPCU 555 shall let RXPCU determine in which order the BA bitmaps 556 for each user (and sometimes multiple bitmaps for a the 557 same user in case of multi TID) shall be returned. It is 558 not expected that RXPCU will return invalid bitmaps for 559 this scenario as RXPCU earlier indicates that this number 560 of bitmaps was actually available in RXPCU... 561 562 <legal 0-3> 563 */ 564 565 #define PCU_PPDU_SETUP_INIT_MBA_USER_ORDER_OFFSET 0x0000000000000000 566 #define PCU_PPDU_SETUP_INIT_MBA_USER_ORDER_LSB 12 567 #define PCU_PPDU_SETUP_INIT_MBA_USER_ORDER_MSB 13 568 #define PCU_PPDU_SETUP_INIT_MBA_USER_ORDER_MASK 0x0000000000003000 569 570 571 /* Description EXPECTED_MBA_SIZE 572 573 Field only valid for: 574 Mba_user_order == mu_ba_fixed_user_order, mu_ba_optimized_user_order 575 576 577 The expected number of bytes in response (Multi destination) 578 BA that TXPCU shall request to PDG. 579 NOTE that SW should have pre-calculated and thus looked-up 580 the window sizes for each of the STAs. 581 <legal all> 582 */ 583 584 #define PCU_PPDU_SETUP_INIT_EXPECTED_MBA_SIZE_OFFSET 0x0000000000000000 585 #define PCU_PPDU_SETUP_INIT_EXPECTED_MBA_SIZE_LSB 14 586 #define PCU_PPDU_SETUP_INIT_EXPECTED_MBA_SIZE_MSB 24 587 #define PCU_PPDU_SETUP_INIT_EXPECTED_MBA_SIZE_MASK 0x0000000001ffc000 588 589 590 /* Description REQUIRED_UL_MU_RESP_USER_COUNT 591 592 Field only valid for: Response_to_response 593 == MU_BA 594 or 595 RESPONSE_TO_RESPONSE_CMD 596 597 Field MU_RX_successful_user_count as reported in the RECEIVED_RESPONSE_INFO 598 TLV shall be >= to this field, in order to consider the 599 reception successful. 600 601 Note that the value in this field shall always be equal 602 or smaller to the number of bits set in field MU_Response_expected_bitmap_.... 603 604 <legal all> 605 */ 606 607 #define PCU_PPDU_SETUP_INIT_REQUIRED_UL_MU_RESP_USER_COUNT_OFFSET 0x0000000000000000 608 #define PCU_PPDU_SETUP_INIT_REQUIRED_UL_MU_RESP_USER_COUNT_LSB 25 609 #define PCU_PPDU_SETUP_INIT_REQUIRED_UL_MU_RESP_USER_COUNT_MSB 30 610 #define PCU_PPDU_SETUP_INIT_REQUIRED_UL_MU_RESP_USER_COUNT_MASK 0x000000007e000000 611 612 613 /* Description TRANSMITTED_BSSID_CHECK_EN 614 615 When set to 1, RXPCU shall assume group addressed frame 616 with Tx_AD2 equal to TBSSID was sent. RxPCU should properly 617 handle receive frame(s) from STA(s) which A1 is TBSSID 618 or any VAPs.When NOT set, RXPCU shall compare received frame's 619 A1 with Tx_AD2 only. 620 <legal all> 621 */ 622 623 #define PCU_PPDU_SETUP_INIT_TRANSMITTED_BSSID_CHECK_EN_OFFSET 0x0000000000000000 624 #define PCU_PPDU_SETUP_INIT_TRANSMITTED_BSSID_CHECK_EN_LSB 31 625 #define PCU_PPDU_SETUP_INIT_TRANSMITTED_BSSID_CHECK_EN_MSB 31 626 #define PCU_PPDU_SETUP_INIT_TRANSMITTED_BSSID_CHECK_EN_MASK 0x0000000080000000 627 628 629 /* Description MPROT_REQUIRED_BW1 630 631 Field only valid when ppdu_allowed_bw1 is set. 632 633 When set, Medium protection transmission is required for 634 a 1 MHz bandwidth PPDU transmission. In case of MU transmissions, 635 all the medium protection settings are coming from user0. <legal 636 all> 637 */ 638 639 #define PCU_PPDU_SETUP_INIT_MPROT_REQUIRED_BW1_OFFSET 0x0000000000000000 640 #define PCU_PPDU_SETUP_INIT_MPROT_REQUIRED_BW1_LSB 32 641 #define PCU_PPDU_SETUP_INIT_MPROT_REQUIRED_BW1_MSB 32 642 #define PCU_PPDU_SETUP_INIT_MPROT_REQUIRED_BW1_MASK 0x0000000100000000 643 644 645 /* Description MPROT_REQUIRED_BW20 646 647 Field only valid when ppdu_allowed_bw20_bw2 is set. 648 649 NOTE: This field is also known as Mprot_required_pattern_0 650 in case punctured transmission is enabled. 651 652 When set, Medium protection transmission is required for 653 a 20 MHz or 2Mhz 11ah bandwidth PPDU transmission 654 <legal all> 655 */ 656 657 #define PCU_PPDU_SETUP_INIT_MPROT_REQUIRED_BW20_OFFSET 0x0000000000000000 658 #define PCU_PPDU_SETUP_INIT_MPROT_REQUIRED_BW20_LSB 33 659 #define PCU_PPDU_SETUP_INIT_MPROT_REQUIRED_BW20_MSB 33 660 #define PCU_PPDU_SETUP_INIT_MPROT_REQUIRED_BW20_MASK 0x0000000200000000 661 662 663 /* Description MPROT_REQUIRED_BW40 664 665 Field only valid when ppdu_allowed_bw40_bw4 is set. 666 667 NOTE: This field is also known as Mprot_required_pattern_1 668 in case punctured transmission is enabled. 669 670 When set, Medium protection transmission is required for 671 a 40 MHz or 4Mhz 11ah bandwidth PPDU transmission 672 <legal all> 673 */ 674 675 #define PCU_PPDU_SETUP_INIT_MPROT_REQUIRED_BW40_OFFSET 0x0000000000000000 676 #define PCU_PPDU_SETUP_INIT_MPROT_REQUIRED_BW40_LSB 34 677 #define PCU_PPDU_SETUP_INIT_MPROT_REQUIRED_BW40_MSB 34 678 #define PCU_PPDU_SETUP_INIT_MPROT_REQUIRED_BW40_MASK 0x0000000400000000 679 680 681 /* Description MPROT_REQUIRED_BW80 682 683 Field only valid when ppdu_allowed_bw80_bw8 is set. 684 685 686 NOTE: This field is also known as Mprot_required_pattern_2 687 in case punctured transmission is enabled. 688 689 When set, Medium protection transmission is required for 690 a 80 MHz or 8MHz 11ah bandwidth PPDU transmission 691 <legal all> 692 */ 693 694 #define PCU_PPDU_SETUP_INIT_MPROT_REQUIRED_BW80_OFFSET 0x0000000000000000 695 #define PCU_PPDU_SETUP_INIT_MPROT_REQUIRED_BW80_LSB 35 696 #define PCU_PPDU_SETUP_INIT_MPROT_REQUIRED_BW80_MSB 35 697 #define PCU_PPDU_SETUP_INIT_MPROT_REQUIRED_BW80_MASK 0x0000000800000000 698 699 700 /* Description MPROT_REQUIRED_BW160 701 702 Field only valid when ppdu_allowed_bw160_bw16 is set. 703 704 NOTE: This field is also known as Mprot_required_pattern_3 705 in case punctured transmission is enabled. 706 707 When set, Medium protection transmission is required for 708 a 160 MHz or 16MHz 11ah bandwidth PPDU transmission. 709 <legal all> 710 */ 711 712 #define PCU_PPDU_SETUP_INIT_MPROT_REQUIRED_BW160_OFFSET 0x0000000000000000 713 #define PCU_PPDU_SETUP_INIT_MPROT_REQUIRED_BW160_LSB 36 714 #define PCU_PPDU_SETUP_INIT_MPROT_REQUIRED_BW160_MSB 36 715 #define PCU_PPDU_SETUP_INIT_MPROT_REQUIRED_BW160_MASK 0x0000001000000000 716 717 718 /* Description MPROT_REQUIRED_BW240 719 720 Field only valid when ppdu_allowed_bw240 is set. 721 722 NOTE: This field is also known as Mprot_required_pattern_4 723 in case punctured transmission is enabled. 724 725 When set, Medium protection transmission is required for 726 a 240 MHz bandwidth PPDU transmission. 727 <legal all> 728 */ 729 730 #define PCU_PPDU_SETUP_INIT_MPROT_REQUIRED_BW240_OFFSET 0x0000000000000000 731 #define PCU_PPDU_SETUP_INIT_MPROT_REQUIRED_BW240_LSB 37 732 #define PCU_PPDU_SETUP_INIT_MPROT_REQUIRED_BW240_MSB 37 733 #define PCU_PPDU_SETUP_INIT_MPROT_REQUIRED_BW240_MASK 0x0000002000000000 734 735 736 /* Description MPROT_REQUIRED_BW320 737 738 Field only valid when ppdu_allowed_bw320 is set. 739 740 NOTE: This field is also known as Mprot_required_pattern_5 741 in case punctured transmission is enabled. 742 743 When set, Medium protection transmission is required for 744 a 320 MHz bandwidth PPDU transmission. 745 <legal all> 746 */ 747 748 #define PCU_PPDU_SETUP_INIT_MPROT_REQUIRED_BW320_OFFSET 0x0000000000000000 749 #define PCU_PPDU_SETUP_INIT_MPROT_REQUIRED_BW320_LSB 38 750 #define PCU_PPDU_SETUP_INIT_MPROT_REQUIRED_BW320_MSB 38 751 #define PCU_PPDU_SETUP_INIT_MPROT_REQUIRED_BW320_MASK 0x0000004000000000 752 753 754 /* Description PPDU_ALLOWED_BW1 755 756 When set, allow PPDU transmission with 1 MHz 11ah bandwidth. 757 758 <legal all> 759 */ 760 761 #define PCU_PPDU_SETUP_INIT_PPDU_ALLOWED_BW1_OFFSET 0x0000000000000000 762 #define PCU_PPDU_SETUP_INIT_PPDU_ALLOWED_BW1_LSB 39 763 #define PCU_PPDU_SETUP_INIT_PPDU_ALLOWED_BW1_MSB 39 764 #define PCU_PPDU_SETUP_INIT_PPDU_ALLOWED_BW1_MASK 0x0000008000000000 765 766 767 /* Description PPDU_ALLOWED_BW20 768 769 Field Not valid in case punctured transmission is enabled. 770 This fields meaning is than taken over by field TX_PUNCTURE_SETUP. 771 772 puncture_pattern_count 773 774 When set, allow PPDU transmission with 20 MHz or 2MHz 11ah 775 bandwidth 776 777 <legal all> 778 */ 779 780 #define PCU_PPDU_SETUP_INIT_PPDU_ALLOWED_BW20_OFFSET 0x0000000000000000 781 #define PCU_PPDU_SETUP_INIT_PPDU_ALLOWED_BW20_LSB 40 782 #define PCU_PPDU_SETUP_INIT_PPDU_ALLOWED_BW20_MSB 40 783 #define PCU_PPDU_SETUP_INIT_PPDU_ALLOWED_BW20_MASK 0x0000010000000000 784 785 786 /* Description PPDU_ALLOWED_BW40 787 788 Field Not valid in case punctured transmission is enabled. 789 This fields meaning is than taken over by field TX_PUNCTURE_SETUP. 790 791 puncture_pattern_count 792 793 When set, allow PPDU transmission with 40 MHz or 4MHz 11ah 794 bandwidth 795 <legal all> 796 */ 797 798 #define PCU_PPDU_SETUP_INIT_PPDU_ALLOWED_BW40_OFFSET 0x0000000000000000 799 #define PCU_PPDU_SETUP_INIT_PPDU_ALLOWED_BW40_LSB 41 800 #define PCU_PPDU_SETUP_INIT_PPDU_ALLOWED_BW40_MSB 41 801 #define PCU_PPDU_SETUP_INIT_PPDU_ALLOWED_BW40_MASK 0x0000020000000000 802 803 804 /* Description PPDU_ALLOWED_BW80 805 806 Field Not valid in case punctured transmission is enabled. 807 This fields meaning is than taken over by field TX_PUNCTURE_SETUP. 808 809 puncture_pattern_count 810 811 When set, allow PPDU transmission with 80 MHz or 8MHz 11ah 812 bandwidth 813 <legal all> 814 */ 815 816 #define PCU_PPDU_SETUP_INIT_PPDU_ALLOWED_BW80_OFFSET 0x0000000000000000 817 #define PCU_PPDU_SETUP_INIT_PPDU_ALLOWED_BW80_LSB 42 818 #define PCU_PPDU_SETUP_INIT_PPDU_ALLOWED_BW80_MSB 42 819 #define PCU_PPDU_SETUP_INIT_PPDU_ALLOWED_BW80_MASK 0x0000040000000000 820 821 822 /* Description PPDU_ALLOWED_BW160 823 824 Field Not valid in case punctured transmission is enabled. 825 This fields meaning is than taken over by field TX_PUNCTURE_SETUP. 826 827 puncture_pattern_count 828 829 When set, allow PPDU transmission with 160 MHz or 16MHz 830 11ah bandwidth 831 <legal all> 832 */ 833 834 #define PCU_PPDU_SETUP_INIT_PPDU_ALLOWED_BW160_OFFSET 0x0000000000000000 835 #define PCU_PPDU_SETUP_INIT_PPDU_ALLOWED_BW160_LSB 43 836 #define PCU_PPDU_SETUP_INIT_PPDU_ALLOWED_BW160_MSB 43 837 #define PCU_PPDU_SETUP_INIT_PPDU_ALLOWED_BW160_MASK 0x0000080000000000 838 839 840 /* Description PPDU_ALLOWED_BW240 841 842 Field Not valid in case punctured transmission is enabled. 843 This fields meaning is than taken over by field TX_PUNCTURE_SETUP. 844 845 puncture_pattern_count 846 847 When set, allow PPDU transmission with 240 MHz bandwidth 848 849 <legal all> 850 */ 851 852 #define PCU_PPDU_SETUP_INIT_PPDU_ALLOWED_BW240_OFFSET 0x0000000000000000 853 #define PCU_PPDU_SETUP_INIT_PPDU_ALLOWED_BW240_LSB 44 854 #define PCU_PPDU_SETUP_INIT_PPDU_ALLOWED_BW240_MSB 44 855 #define PCU_PPDU_SETUP_INIT_PPDU_ALLOWED_BW240_MASK 0x0000100000000000 856 857 858 /* Description PPDU_ALLOWED_BW320 859 860 Field Not valid in case punctured transmission is enabled. 861 This fields meaning is than taken over by field TX_PUNCTURE_SETUP. 862 863 puncture_pattern_count 864 865 When set, allow PPDU transmission with 320 MHz bandwidth 866 867 <legal all> 868 */ 869 870 #define PCU_PPDU_SETUP_INIT_PPDU_ALLOWED_BW320_OFFSET 0x0000000000000000 871 #define PCU_PPDU_SETUP_INIT_PPDU_ALLOWED_BW320_LSB 45 872 #define PCU_PPDU_SETUP_INIT_PPDU_ALLOWED_BW320_MSB 45 873 #define PCU_PPDU_SETUP_INIT_PPDU_ALLOWED_BW320_MASK 0x0000200000000000 874 875 876 /* Description SET_FC_PWR_MGT 877 878 Field valid for SU transmissions only 879 880 When set, the TXPCU will set the power management bit in 881 the Frame Control field for the transmitted frames. 882 883 Note: this is there for backup purposes only. TXOLE is the 884 module now that should be setting the pm bit to the proper 885 value. 886 887 <legal all> 888 */ 889 890 #define PCU_PPDU_SETUP_INIT_SET_FC_PWR_MGT_OFFSET 0x0000000000000000 891 #define PCU_PPDU_SETUP_INIT_SET_FC_PWR_MGT_LSB 46 892 #define PCU_PPDU_SETUP_INIT_SET_FC_PWR_MGT_MSB 46 893 #define PCU_PPDU_SETUP_INIT_SET_FC_PWR_MGT_MASK 0x0000400000000000 894 895 896 /* Description USE_CTS_DURATION_FOR_DATA_TX 897 898 When set, take the value of the duration field from the 899 CTS frame, and use this as the reference point for how long 900 the 'data' ppdu transmission can be. 901 This is an E2E feature. 902 <legal all> 903 */ 904 905 #define PCU_PPDU_SETUP_INIT_USE_CTS_DURATION_FOR_DATA_TX_OFFSET 0x0000000000000000 906 #define PCU_PPDU_SETUP_INIT_USE_CTS_DURATION_FOR_DATA_TX_LSB 47 907 #define PCU_PPDU_SETUP_INIT_USE_CTS_DURATION_FOR_DATA_TX_MSB 47 908 #define PCU_PPDU_SETUP_INIT_USE_CTS_DURATION_FOR_DATA_TX_MASK 0x0000800000000000 909 910 911 /* Description UPDATE_TIMESTAMP_64 912 913 When set, TXPCU shall update the timestamp value at the 914 indicated location. 915 <legal all> 916 */ 917 918 #define PCU_PPDU_SETUP_INIT_UPDATE_TIMESTAMP_64_OFFSET 0x0000000000000000 919 #define PCU_PPDU_SETUP_INIT_UPDATE_TIMESTAMP_64_LSB 48 920 #define PCU_PPDU_SETUP_INIT_UPDATE_TIMESTAMP_64_MSB 48 921 #define PCU_PPDU_SETUP_INIT_UPDATE_TIMESTAMP_64_MASK 0x0001000000000000 922 923 924 /* Description UPDATE_TIMESTAMP_32_LOWER 925 926 Update the 32 bit timestamp at the offset specified by the 927 insert_timestamp_offset_32. This will be used for AWDL 928 action frames. The value of the TSF will be added to the 929 timestamp field in the packet buffer in memory. The tx_delay 930 should also be included in the timestamp field<legal all> 931 932 */ 933 934 #define PCU_PPDU_SETUP_INIT_UPDATE_TIMESTAMP_32_LOWER_OFFSET 0x0000000000000000 935 #define PCU_PPDU_SETUP_INIT_UPDATE_TIMESTAMP_32_LOWER_LSB 49 936 #define PCU_PPDU_SETUP_INIT_UPDATE_TIMESTAMP_32_LOWER_MSB 49 937 #define PCU_PPDU_SETUP_INIT_UPDATE_TIMESTAMP_32_LOWER_MASK 0x0002000000000000 938 939 940 /* Description UPDATE_TIMESTAMP_32_UPPER 941 942 Update the 64 bit TSF at the offset specified by the insert_timestamp_offset_64. 943 This will be used for beacons and probe response frames. 944 The value of the TSF will be added to the TSF field in 945 the packet buffer in memory. The tx_delay should also be 946 included in the TSF field 947 <legal all> 948 */ 949 950 #define PCU_PPDU_SETUP_INIT_UPDATE_TIMESTAMP_32_UPPER_OFFSET 0x0000000000000000 951 #define PCU_PPDU_SETUP_INIT_UPDATE_TIMESTAMP_32_UPPER_LSB 50 952 #define PCU_PPDU_SETUP_INIT_UPDATE_TIMESTAMP_32_UPPER_MSB 50 953 #define PCU_PPDU_SETUP_INIT_UPDATE_TIMESTAMP_32_UPPER_MASK 0x0004000000000000 954 955 956 /* Description RESERVED_1A 957 958 <legal 0> 959 */ 960 961 #define PCU_PPDU_SETUP_INIT_RESERVED_1A_OFFSET 0x0000000000000000 962 #define PCU_PPDU_SETUP_INIT_RESERVED_1A_LSB 51 963 #define PCU_PPDU_SETUP_INIT_RESERVED_1A_MSB 63 964 #define PCU_PPDU_SETUP_INIT_RESERVED_1A_MASK 0xfff8000000000000 965 966 967 /* Description INSERT_TIMESTAMP_OFFSET_0 968 969 Byte offset to the first byte of the lower 32 bit timestamp 970 to be inserted. This is applicable to both beacon and 971 probe response TSF and the AWDL timestamp<legal all> 972 */ 973 974 #define PCU_PPDU_SETUP_INIT_INSERT_TIMESTAMP_OFFSET_0_OFFSET 0x0000000000000008 975 #define PCU_PPDU_SETUP_INIT_INSERT_TIMESTAMP_OFFSET_0_LSB 0 976 #define PCU_PPDU_SETUP_INIT_INSERT_TIMESTAMP_OFFSET_0_MSB 15 977 #define PCU_PPDU_SETUP_INIT_INSERT_TIMESTAMP_OFFSET_0_MASK 0x000000000000ffff 978 979 980 /* Description INSERT_TIMESTAMP_OFFSET_1 981 982 Byte offset to the first byte of the upper 32 bit timestamp 983 to be inserted. This is applicable to both beacon and 984 probe response TSF and the AWDL timestamp<legal all> 985 */ 986 987 #define PCU_PPDU_SETUP_INIT_INSERT_TIMESTAMP_OFFSET_1_OFFSET 0x0000000000000008 988 #define PCU_PPDU_SETUP_INIT_INSERT_TIMESTAMP_OFFSET_1_LSB 16 989 #define PCU_PPDU_SETUP_INIT_INSERT_TIMESTAMP_OFFSET_1_MSB 31 990 #define PCU_PPDU_SETUP_INIT_INSERT_TIMESTAMP_OFFSET_1_MASK 0x00000000ffff0000 991 992 993 /* Description MAX_BW40_TRY_COUNT 994 995 Field only valid when ppdu_allowed_bw40_bw4 or Mprot_required_bw40_bw4 996 is set. 997 998 NOTE: This field is also known as Max_try_count_pattern_1 999 in case punctured transmission is enabled. 1000 1001 The maximum number of times that TXPCU will try to do a 1002 transmission at this or a higher BW, before deciding to 1003 go to a lower BW. 1004 If this count (as indicated by field Optimal_bw_retry_count 1005 in TX_FES_SETUP) has not been reached yet, and this BW 1006 is not available, TXPCU will generate a flush with flush 1007 reason set to 'TXPCU_FLREQ_RETRY_FOR_OPTIMAL_BW.' 1008 1009 When value is 0, it means that if this BW is not available, 1010 TXPCU should immediately try a lower BW. 1011 1012 Note that this value shall always be equal or greater then: 1013 Max_bw80_try_count 1014 1015 <legal all> 1016 */ 1017 1018 #define PCU_PPDU_SETUP_INIT_MAX_BW40_TRY_COUNT_OFFSET 0x0000000000000008 1019 #define PCU_PPDU_SETUP_INIT_MAX_BW40_TRY_COUNT_LSB 32 1020 #define PCU_PPDU_SETUP_INIT_MAX_BW40_TRY_COUNT_MSB 35 1021 #define PCU_PPDU_SETUP_INIT_MAX_BW40_TRY_COUNT_MASK 0x0000000f00000000 1022 1023 1024 /* Description MAX_BW80_TRY_COUNT 1025 1026 Field only valid when ppdu_allowed_bw80_bw4 or Mprot_required_bw80_bw4 1027 is set. 1028 1029 NOTE: This field is also known as Max_try_count_pattern_2 1030 in case punctured transmission is enabled. 1031 1032 The maximum number of times that TXPCU will try to do a 1033 transmission at this or a higher BW, before deciding to 1034 go to a lower BW. 1035 If this count (as indicated by field Optimal_bw_retry_count 1036 in TX_FES_SETUP) has not been reached yet, and this BW 1037 is not available, TXPCU will generate a flush with flush 1038 reason set to 'TXPCU_FLREQ_RETRY_FOR_OPTIMAL_BW.' 1039 1040 When value is 0, it means that if this BW is not available, 1041 TXPCU should immediately try a lower BW. 1042 1043 Note that this value shall always be equal or greater then: 1044 Max_bw160_try_count 1045 1046 <legal all> 1047 */ 1048 1049 #define PCU_PPDU_SETUP_INIT_MAX_BW80_TRY_COUNT_OFFSET 0x0000000000000008 1050 #define PCU_PPDU_SETUP_INIT_MAX_BW80_TRY_COUNT_LSB 36 1051 #define PCU_PPDU_SETUP_INIT_MAX_BW80_TRY_COUNT_MSB 39 1052 #define PCU_PPDU_SETUP_INIT_MAX_BW80_TRY_COUNT_MASK 0x000000f000000000 1053 1054 1055 /* Description MAX_BW160_TRY_COUNT 1056 1057 Field only valid when ppdu_allowed_bw160_bw16 or Mprot_required_bw160_bw16 1058 is set. 1059 1060 NOTE: This field is also known as Max_try_count_pattern_3 1061 in case punctured transmission is enabled. 1062 1063 The maximum number of times that TXPCU will try to do a 1064 transmission at this, before deciding to go to a lower BW. 1065 1066 If this count (as indicated by field Optimal_bw_retry_count 1067 in TX_FES_SETUP) has not been reached yet, and this BW 1068 is not available, TXPCU will generate a flush with flush 1069 reason set to 'TXPCU_FLREQ_RETRY_FOR_OPTIMAL_BW.' 1070 1071 When value is 0, it means that if this BW is not available, 1072 TXPCU should immediately try a lower BW. 1073 1074 <legal all> 1075 */ 1076 1077 #define PCU_PPDU_SETUP_INIT_MAX_BW160_TRY_COUNT_OFFSET 0x0000000000000008 1078 #define PCU_PPDU_SETUP_INIT_MAX_BW160_TRY_COUNT_LSB 40 1079 #define PCU_PPDU_SETUP_INIT_MAX_BW160_TRY_COUNT_MSB 43 1080 #define PCU_PPDU_SETUP_INIT_MAX_BW160_TRY_COUNT_MASK 0x00000f0000000000 1081 1082 1083 /* Description MAX_BW240_TRY_COUNT 1084 1085 Field only valid when ppdu_allowed_bw240 or Mprot_required_bw240 1086 is set. 1087 1088 NOTE: This field is also known as Max_try_count_pattern_4 1089 in case punctured transmission is enabled. 1090 1091 The maximum number of times that TXPCU will try to do a 1092 transmission at this, before deciding to go to a lower BW. 1093 1094 If this count (as indicated by field Optimal_bw_retry_count 1095 in TX_FES_SETUP) has not been reached yet, and this BW 1096 is not available, TXPCU will generate a flush with flush 1097 reason set to 'TXPCU_FLREQ_RETRY_FOR_OPTIMAL_BW.' 1098 1099 When value is 0, it means that if this BW is not available, 1100 TXPCU should immediately try a lower BW. 1101 1102 <legal all> 1103 */ 1104 1105 #define PCU_PPDU_SETUP_INIT_MAX_BW240_TRY_COUNT_OFFSET 0x0000000000000008 1106 #define PCU_PPDU_SETUP_INIT_MAX_BW240_TRY_COUNT_LSB 44 1107 #define PCU_PPDU_SETUP_INIT_MAX_BW240_TRY_COUNT_MSB 47 1108 #define PCU_PPDU_SETUP_INIT_MAX_BW240_TRY_COUNT_MASK 0x0000f00000000000 1109 1110 1111 /* Description MAX_BW320_TRY_COUNT 1112 1113 Field only valid when ppdu_allowed_bw320 or Mprot_required_bw320 1114 is set. 1115 1116 NOTE: This field is also known as Max_try_count_pattern_5 1117 in case punctured transmission is enabled. 1118 1119 The maximum number of times that TXPCU will try to do a 1120 transmission at this, before deciding to go to a lower BW. 1121 1122 If this count (as indicated by field Optimal_bw_retry_count 1123 in TX_FES_SETUP) has not been reached yet, and this BW 1124 is not available, TXPCU will generate a flush with flush 1125 reason set to 'TXPCU_FLREQ_RETRY_FOR_OPTIMAL_BW.' 1126 1127 When value is 0, it means that if this BW is not available, 1128 TXPCU should immediately try a lower BW. 1129 1130 <legal all> 1131 */ 1132 1133 #define PCU_PPDU_SETUP_INIT_MAX_BW320_TRY_COUNT_OFFSET 0x0000000000000008 1134 #define PCU_PPDU_SETUP_INIT_MAX_BW320_TRY_COUNT_LSB 48 1135 #define PCU_PPDU_SETUP_INIT_MAX_BW320_TRY_COUNT_MSB 51 1136 #define PCU_PPDU_SETUP_INIT_MAX_BW320_TRY_COUNT_MASK 0x000f000000000000 1137 1138 1139 /* Description INSERT_WUR_TIMESTAMP_OFFSET 1140 1141 Field only to be used in case PCU_PPDU_SETUP_START.pkt_type 1142 indicates a .11ba packet 1143 1144 Used by TXPCU to determine the offset within a WUR packet, 1145 e.g. a WUR beacon into which to insert the timestamp. 1146 1147 <legal all> 1148 */ 1149 1150 #define PCU_PPDU_SETUP_INIT_INSERT_WUR_TIMESTAMP_OFFSET_OFFSET 0x0000000000000008 1151 #define PCU_PPDU_SETUP_INIT_INSERT_WUR_TIMESTAMP_OFFSET_LSB 52 1152 #define PCU_PPDU_SETUP_INIT_INSERT_WUR_TIMESTAMP_OFFSET_MSB 57 1153 #define PCU_PPDU_SETUP_INIT_INSERT_WUR_TIMESTAMP_OFFSET_MASK 0x03f0000000000000 1154 1155 1156 /* Description UPDATE_WUR_TIMESTAMP 1157 1158 Field only to be used in case PCU_PPDU_SETUP_START.pkt_type 1159 indicates a .11ba packet 1160 1161 TXPCU will insert the timestamp into a WUR packet if this 1162 bit is set. 1163 1164 <legal all> 1165 */ 1166 1167 #define PCU_PPDU_SETUP_INIT_UPDATE_WUR_TIMESTAMP_OFFSET 0x0000000000000008 1168 #define PCU_PPDU_SETUP_INIT_UPDATE_WUR_TIMESTAMP_LSB 58 1169 #define PCU_PPDU_SETUP_INIT_UPDATE_WUR_TIMESTAMP_MSB 58 1170 #define PCU_PPDU_SETUP_INIT_UPDATE_WUR_TIMESTAMP_MASK 0x0400000000000000 1171 1172 1173 /* Description WUR_EMBEDDED_BSSID_PRESENT 1174 1175 Field only to be used in case PCU_PPDU_SETUP_START.pkt_type 1176 indicates a .11ba packet 1177 1178 If this bit is set, TXPCU will assume the packet includes 1179 an extra 16 bits which contain the embedded BSSID to be 1180 used in the WUR FCS calculation. TXPCU will replace the 1181 16 bits with the 16-bit FCS field. 1182 If this bit is clear, TXPCU will append the 16-bit FCS calculated 1183 without any embedded BSSID. 1184 1185 <legal all> 1186 */ 1187 1188 #define PCU_PPDU_SETUP_INIT_WUR_EMBEDDED_BSSID_PRESENT_OFFSET 0x0000000000000008 1189 #define PCU_PPDU_SETUP_INIT_WUR_EMBEDDED_BSSID_PRESENT_LSB 59 1190 #define PCU_PPDU_SETUP_INIT_WUR_EMBEDDED_BSSID_PRESENT_MSB 59 1191 #define PCU_PPDU_SETUP_INIT_WUR_EMBEDDED_BSSID_PRESENT_MASK 0x0800000000000000 1192 1193 1194 /* Description INSERT_WUR_FCS 1195 1196 Field only to be used in case PCU_PPDU_SETUP_START.pkt_type 1197 indicates a .11ba packet 1198 1199 TXPCU will replace/append the FCS bytes for a WUR packet 1200 if this bit is set. The replace/append choice is based 1201 on WUR_embedded_BSSID_present. 1202 1203 <legal all> 1204 */ 1205 1206 #define PCU_PPDU_SETUP_INIT_INSERT_WUR_FCS_OFFSET 0x0000000000000008 1207 #define PCU_PPDU_SETUP_INIT_INSERT_WUR_FCS_LSB 60 1208 #define PCU_PPDU_SETUP_INIT_INSERT_WUR_FCS_MSB 60 1209 #define PCU_PPDU_SETUP_INIT_INSERT_WUR_FCS_MASK 0x1000000000000000 1210 1211 1212 /* Description RESERVED_3B 1213 1214 <legal 0> 1215 */ 1216 1217 #define PCU_PPDU_SETUP_INIT_RESERVED_3B_OFFSET 0x0000000000000008 1218 #define PCU_PPDU_SETUP_INIT_RESERVED_3B_LSB 61 1219 #define PCU_PPDU_SETUP_INIT_RESERVED_3B_MSB 63 1220 #define PCU_PPDU_SETUP_INIT_RESERVED_3B_MASK 0xe000000000000000 1221 1222 1223 /* Description RESPONSE_TO_RESPONSE_RATE_INFO_BW20 1224 1225 Field only valid in case of Response_to_response set to 1226 SU_BA or MU_BA 1227 1228 NOTE: This field is also known as response_to_response_rate_info_pattern_0 1229 in case punctured transmission is enabled. 1230 1231 Used by TXPCU to determine what the transmit rates are for 1232 the response to response transmission in case original 1233 transmission was 20 MHz. 1234 1235 Note: 1236 see field R2R_bw20_active_channel for the BW of this transmission 1237 1238 */ 1239 1240 1241 /* Description RESERVED_0A 1242 1243 1244 <legal 0> 1245 */ 1246 1247 #define PCU_PPDU_SETUP_INIT_RESPONSE_TO_RESPONSE_RATE_INFO_BW20_RESERVED_0A_OFFSET 0x0000000000000010 1248 #define PCU_PPDU_SETUP_INIT_RESPONSE_TO_RESPONSE_RATE_INFO_BW20_RESERVED_0A_LSB 0 1249 #define PCU_PPDU_SETUP_INIT_RESPONSE_TO_RESPONSE_RATE_INFO_BW20_RESERVED_0A_MSB 0 1250 #define PCU_PPDU_SETUP_INIT_RESPONSE_TO_RESPONSE_RATE_INFO_BW20_RESERVED_0A_MASK 0x0000000000000001 1251 1252 1253 /* Description TX_ANTENNA_SECTOR_CTRL 1254 1255 Sectored transmit antenna 1256 <legal all> 1257 */ 1258 1259 #define PCU_PPDU_SETUP_INIT_RESPONSE_TO_RESPONSE_RATE_INFO_BW20_TX_ANTENNA_SECTOR_CTRL_OFFSET 0x0000000000000010 1260 #define PCU_PPDU_SETUP_INIT_RESPONSE_TO_RESPONSE_RATE_INFO_BW20_TX_ANTENNA_SECTOR_CTRL_LSB 1 1261 #define PCU_PPDU_SETUP_INIT_RESPONSE_TO_RESPONSE_RATE_INFO_BW20_TX_ANTENNA_SECTOR_CTRL_MSB 24 1262 #define PCU_PPDU_SETUP_INIT_RESPONSE_TO_RESPONSE_RATE_INFO_BW20_TX_ANTENNA_SECTOR_CTRL_MASK 0x0000000001fffffe 1263 1264 1265 /* Description PKT_TYPE 1266 1267 Packet type: 1268 <enum 0 dot11a>802.11a PPDU type 1269 <enum 1 dot11b>802.11b PPDU type 1270 <enum 2 dot11n_mm>802.11n Mixed Mode PPDU type 1271 <enum 3 dot11ac>802.11ac PPDU type 1272 <enum 4 dot11ax>802.11ax PPDU type 1273 <enum 5 dot11ba>802.11ba (WUR) PPDU type 1274 <enum 6 dot11be>802.11be PPDU type 1275 <enum 7 dot11az>802.11az (ranging) PPDU type 1276 <enum 8 dot11n_gf>802.11n Green Field PPDU type (unsupported 1277 & aborted) 1278 */ 1279 1280 #define PCU_PPDU_SETUP_INIT_RESPONSE_TO_RESPONSE_RATE_INFO_BW20_PKT_TYPE_OFFSET 0x0000000000000010 1281 #define PCU_PPDU_SETUP_INIT_RESPONSE_TO_RESPONSE_RATE_INFO_BW20_PKT_TYPE_LSB 25 1282 #define PCU_PPDU_SETUP_INIT_RESPONSE_TO_RESPONSE_RATE_INFO_BW20_PKT_TYPE_MSB 28 1283 #define PCU_PPDU_SETUP_INIT_RESPONSE_TO_RESPONSE_RATE_INFO_BW20_PKT_TYPE_MASK 0x000000001e000000 1284 1285 1286 /* Description SMOOTHING 1287 1288 This field is used by PDG to populate the SMOOTHING filed 1289 in the SIG Preamble of the PPDU 1290 <legal 0-1> 1291 */ 1292 1293 #define PCU_PPDU_SETUP_INIT_RESPONSE_TO_RESPONSE_RATE_INFO_BW20_SMOOTHING_OFFSET 0x0000000000000010 1294 #define PCU_PPDU_SETUP_INIT_RESPONSE_TO_RESPONSE_RATE_INFO_BW20_SMOOTHING_LSB 29 1295 #define PCU_PPDU_SETUP_INIT_RESPONSE_TO_RESPONSE_RATE_INFO_BW20_SMOOTHING_MSB 29 1296 #define PCU_PPDU_SETUP_INIT_RESPONSE_TO_RESPONSE_RATE_INFO_BW20_SMOOTHING_MASK 0x0000000020000000 1297 1298 1299 /* Description LDPC 1300 1301 When set, use LDPC transmission rates 1302 */ 1303 1304 #define PCU_PPDU_SETUP_INIT_RESPONSE_TO_RESPONSE_RATE_INFO_BW20_LDPC_OFFSET 0x0000000000000010 1305 #define PCU_PPDU_SETUP_INIT_RESPONSE_TO_RESPONSE_RATE_INFO_BW20_LDPC_LSB 30 1306 #define PCU_PPDU_SETUP_INIT_RESPONSE_TO_RESPONSE_RATE_INFO_BW20_LDPC_MSB 30 1307 #define PCU_PPDU_SETUP_INIT_RESPONSE_TO_RESPONSE_RATE_INFO_BW20_LDPC_MASK 0x0000000040000000 1308 1309 1310 /* Description STBC 1311 1312 When set, use STBC transmission rates 1313 */ 1314 1315 #define PCU_PPDU_SETUP_INIT_RESPONSE_TO_RESPONSE_RATE_INFO_BW20_STBC_OFFSET 0x0000000000000010 1316 #define PCU_PPDU_SETUP_INIT_RESPONSE_TO_RESPONSE_RATE_INFO_BW20_STBC_LSB 31 1317 #define PCU_PPDU_SETUP_INIT_RESPONSE_TO_RESPONSE_RATE_INFO_BW20_STBC_MSB 31 1318 #define PCU_PPDU_SETUP_INIT_RESPONSE_TO_RESPONSE_RATE_INFO_BW20_STBC_MASK 0x0000000080000000 1319 1320 1321 /* Description ALT_TX_PWR 1322 1323 Coex related AlternativeTransmit parameter 1324 1325 Transmit Power in s6.2 format. 1326 In units of 0.25 dBm 1327 <legal all> 1328 */ 1329 1330 #define PCU_PPDU_SETUP_INIT_RESPONSE_TO_RESPONSE_RATE_INFO_BW20_ALT_TX_PWR_OFFSET 0x0000000000000010 1331 #define PCU_PPDU_SETUP_INIT_RESPONSE_TO_RESPONSE_RATE_INFO_BW20_ALT_TX_PWR_LSB 32 1332 #define PCU_PPDU_SETUP_INIT_RESPONSE_TO_RESPONSE_RATE_INFO_BW20_ALT_TX_PWR_MSB 39 1333 #define PCU_PPDU_SETUP_INIT_RESPONSE_TO_RESPONSE_RATE_INFO_BW20_ALT_TX_PWR_MASK 0x000000ff00000000 1334 1335 1336 /* Description ALT_MIN_TX_PWR 1337 1338 Coex related Alternative Transmit parameter 1339 1340 Minimum allowed Transmit Power in s6.2 format. 1341 In units of 0.25 dBm 1342 <legal all> 1343 */ 1344 1345 #define PCU_PPDU_SETUP_INIT_RESPONSE_TO_RESPONSE_RATE_INFO_BW20_ALT_MIN_TX_PWR_OFFSET 0x0000000000000010 1346 #define PCU_PPDU_SETUP_INIT_RESPONSE_TO_RESPONSE_RATE_INFO_BW20_ALT_MIN_TX_PWR_LSB 40 1347 #define PCU_PPDU_SETUP_INIT_RESPONSE_TO_RESPONSE_RATE_INFO_BW20_ALT_MIN_TX_PWR_MSB 47 1348 #define PCU_PPDU_SETUP_INIT_RESPONSE_TO_RESPONSE_RATE_INFO_BW20_ALT_MIN_TX_PWR_MASK 0x0000ff0000000000 1349 1350 1351 /* Description ALT_NSS 1352 1353 Coex related Alternative Transmit parameter 1354 1355 Number of spatial streams. 1356 1357 <enum 0 1_spatial_stream>Single spatial stream 1358 <enum 1 2_spatial_streams>2 spatial streams 1359 <enum 2 3_spatial_streams>3 spatial streams 1360 <enum 3 4_spatial_streams>4 spatial streams 1361 <enum 4 5_spatial_streams>5 spatial streams 1362 <enum 5 6_spatial_streams>6 spatial streams 1363 <enum 6 7_spatial_streams>7 spatial streams 1364 <enum 7 8_spatial_streams>8 spatial streams 1365 */ 1366 1367 #define PCU_PPDU_SETUP_INIT_RESPONSE_TO_RESPONSE_RATE_INFO_BW20_ALT_NSS_OFFSET 0x0000000000000010 1368 #define PCU_PPDU_SETUP_INIT_RESPONSE_TO_RESPONSE_RATE_INFO_BW20_ALT_NSS_LSB 48 1369 #define PCU_PPDU_SETUP_INIT_RESPONSE_TO_RESPONSE_RATE_INFO_BW20_ALT_NSS_MSB 50 1370 #define PCU_PPDU_SETUP_INIT_RESPONSE_TO_RESPONSE_RATE_INFO_BW20_ALT_NSS_MASK 0x0007000000000000 1371 1372 1373 /* Description ALT_TX_CHAIN_MASK 1374 1375 Coex related Alternative Transmit parameter 1376 1377 Chain mask to support up to 8 antennas. 1378 <legal 1-255> 1379 */ 1380 1381 #define PCU_PPDU_SETUP_INIT_RESPONSE_TO_RESPONSE_RATE_INFO_BW20_ALT_TX_CHAIN_MASK_OFFSET 0x0000000000000010 1382 #define PCU_PPDU_SETUP_INIT_RESPONSE_TO_RESPONSE_RATE_INFO_BW20_ALT_TX_CHAIN_MASK_LSB 51 1383 #define PCU_PPDU_SETUP_INIT_RESPONSE_TO_RESPONSE_RATE_INFO_BW20_ALT_TX_CHAIN_MASK_MSB 58 1384 #define PCU_PPDU_SETUP_INIT_RESPONSE_TO_RESPONSE_RATE_INFO_BW20_ALT_TX_CHAIN_MASK_MASK 0x07f8000000000000 1385 1386 1387 /* Description ALT_BW 1388 1389 Coex related Alternative Transmit parameter 1390 1391 The BW of the upcoming transmission. 1392 1393 <enum 0 20_mhz>20 Mhz BW 1394 <enum 1 40_mhz>40 Mhz BW 1395 <enum 2 80_mhz>80 Mhz BW 1396 <enum 3 160_mhz>160 Mhz BW 1397 <enum 4 320_mhz>320 Mhz BW 1398 <enum 5 240_mhz>240 Mhz BW 1399 */ 1400 1401 #define PCU_PPDU_SETUP_INIT_RESPONSE_TO_RESPONSE_RATE_INFO_BW20_ALT_BW_OFFSET 0x0000000000000010 1402 #define PCU_PPDU_SETUP_INIT_RESPONSE_TO_RESPONSE_RATE_INFO_BW20_ALT_BW_LSB 59 1403 #define PCU_PPDU_SETUP_INIT_RESPONSE_TO_RESPONSE_RATE_INFO_BW20_ALT_BW_MSB 61 1404 #define PCU_PPDU_SETUP_INIT_RESPONSE_TO_RESPONSE_RATE_INFO_BW20_ALT_BW_MASK 0x3800000000000000 1405 1406 1407 /* Description STF_LTF_3DB_BOOST 1408 1409 Boost the STF and LTF power by 3dB in 11a/n/ac packets. 1410 This includes both the legacy preambles and the HT/VHT preambles.0: 1411 disable power boost1: enable power boost 1412 <legal all> 1413 */ 1414 1415 #define PCU_PPDU_SETUP_INIT_RESPONSE_TO_RESPONSE_RATE_INFO_BW20_STF_LTF_3DB_BOOST_OFFSET 0x0000000000000010 1416 #define PCU_PPDU_SETUP_INIT_RESPONSE_TO_RESPONSE_RATE_INFO_BW20_STF_LTF_3DB_BOOST_LSB 62 1417 #define PCU_PPDU_SETUP_INIT_RESPONSE_TO_RESPONSE_RATE_INFO_BW20_STF_LTF_3DB_BOOST_MSB 62 1418 #define PCU_PPDU_SETUP_INIT_RESPONSE_TO_RESPONSE_RATE_INFO_BW20_STF_LTF_3DB_BOOST_MASK 0x4000000000000000 1419 1420 1421 /* Description FORCE_EXTRA_SYMBOL 1422 1423 Set to 1 to force an extra OFDM symbol (or symbols) even 1424 if the PPDU encoding process does not result in an extra 1425 OFDM symbol (or symbols) 1426 */ 1427 1428 #define PCU_PPDU_SETUP_INIT_RESPONSE_TO_RESPONSE_RATE_INFO_BW20_FORCE_EXTRA_SYMBOL_OFFSET 0x0000000000000010 1429 #define PCU_PPDU_SETUP_INIT_RESPONSE_TO_RESPONSE_RATE_INFO_BW20_FORCE_EXTRA_SYMBOL_LSB 63 1430 #define PCU_PPDU_SETUP_INIT_RESPONSE_TO_RESPONSE_RATE_INFO_BW20_FORCE_EXTRA_SYMBOL_MSB 63 1431 #define PCU_PPDU_SETUP_INIT_RESPONSE_TO_RESPONSE_RATE_INFO_BW20_FORCE_EXTRA_SYMBOL_MASK 0x8000000000000000 1432 1433 1434 /* Description ALT_RATE_MCS 1435 1436 Coex related Alternative Transmit parameter 1437 1438 For details, refer to MCS_TYPE 1439 Note: This is "rate" in case of 11a/11b 1440 description 1441 <legal all> 1442 */ 1443 1444 #define PCU_PPDU_SETUP_INIT_RESPONSE_TO_RESPONSE_RATE_INFO_BW20_ALT_RATE_MCS_OFFSET 0x0000000000000018 1445 #define PCU_PPDU_SETUP_INIT_RESPONSE_TO_RESPONSE_RATE_INFO_BW20_ALT_RATE_MCS_LSB 0 1446 #define PCU_PPDU_SETUP_INIT_RESPONSE_TO_RESPONSE_RATE_INFO_BW20_ALT_RATE_MCS_MSB 3 1447 #define PCU_PPDU_SETUP_INIT_RESPONSE_TO_RESPONSE_RATE_INFO_BW20_ALT_RATE_MCS_MASK 0x000000000000000f 1448 1449 1450 /* Description NSS 1451 1452 Number of spatial streams. 1453 1454 <enum 0 1_spatial_stream>Single spatial stream 1455 <enum 1 2_spatial_streams>2 spatial streams 1456 <enum 2 3_spatial_streams>3 spatial streams 1457 <enum 3 4_spatial_streams>4 spatial streams 1458 <enum 4 5_spatial_streams>5 spatial streams 1459 <enum 5 6_spatial_streams>6 spatial streams 1460 <enum 6 7_spatial_streams>7 spatial streams 1461 <enum 7 8_spatial_streams>8 spatial streams 1462 */ 1463 1464 #define PCU_PPDU_SETUP_INIT_RESPONSE_TO_RESPONSE_RATE_INFO_BW20_NSS_OFFSET 0x0000000000000018 1465 #define PCU_PPDU_SETUP_INIT_RESPONSE_TO_RESPONSE_RATE_INFO_BW20_NSS_LSB 4 1466 #define PCU_PPDU_SETUP_INIT_RESPONSE_TO_RESPONSE_RATE_INFO_BW20_NSS_MSB 6 1467 #define PCU_PPDU_SETUP_INIT_RESPONSE_TO_RESPONSE_RATE_INFO_BW20_NSS_MASK 0x0000000000000070 1468 1469 1470 /* Description DPD_ENABLE 1471 1472 DPD enable control 1473 1474 This is needed on a per packet basis 1475 <enum 0 dpd_off> DPD profile not applied to current 1476 packet 1477 <enum 1 dpd_on> DPD profile applied to current packet 1478 if available 1479 <legal 0-1> 1480 1481 This field is not applicable in11ah mode of operation and 1482 is ignored by the HW 1483 */ 1484 1485 #define PCU_PPDU_SETUP_INIT_RESPONSE_TO_RESPONSE_RATE_INFO_BW20_DPD_ENABLE_OFFSET 0x0000000000000018 1486 #define PCU_PPDU_SETUP_INIT_RESPONSE_TO_RESPONSE_RATE_INFO_BW20_DPD_ENABLE_LSB 7 1487 #define PCU_PPDU_SETUP_INIT_RESPONSE_TO_RESPONSE_RATE_INFO_BW20_DPD_ENABLE_MSB 7 1488 #define PCU_PPDU_SETUP_INIT_RESPONSE_TO_RESPONSE_RATE_INFO_BW20_DPD_ENABLE_MASK 0x0000000000000080 1489 1490 1491 /* Description TX_PWR 1492 1493 Transmit Power in s6.2 format. 1494 In units of 0.25 dBm 1495 <legal all> 1496 */ 1497 1498 #define PCU_PPDU_SETUP_INIT_RESPONSE_TO_RESPONSE_RATE_INFO_BW20_TX_PWR_OFFSET 0x0000000000000018 1499 #define PCU_PPDU_SETUP_INIT_RESPONSE_TO_RESPONSE_RATE_INFO_BW20_TX_PWR_LSB 8 1500 #define PCU_PPDU_SETUP_INIT_RESPONSE_TO_RESPONSE_RATE_INFO_BW20_TX_PWR_MSB 15 1501 #define PCU_PPDU_SETUP_INIT_RESPONSE_TO_RESPONSE_RATE_INFO_BW20_TX_PWR_MASK 0x000000000000ff00 1502 1503 1504 /* Description MIN_TX_PWR 1505 1506 Coex related field: 1507 1508 Minimum allowed Transmit Power in s6.2 format. 1509 In units of 0.25 dBm 1510 <legal all> 1511 */ 1512 1513 #define PCU_PPDU_SETUP_INIT_RESPONSE_TO_RESPONSE_RATE_INFO_BW20_MIN_TX_PWR_OFFSET 0x0000000000000018 1514 #define PCU_PPDU_SETUP_INIT_RESPONSE_TO_RESPONSE_RATE_INFO_BW20_MIN_TX_PWR_LSB 16 1515 #define PCU_PPDU_SETUP_INIT_RESPONSE_TO_RESPONSE_RATE_INFO_BW20_MIN_TX_PWR_MSB 23 1516 #define PCU_PPDU_SETUP_INIT_RESPONSE_TO_RESPONSE_RATE_INFO_BW20_MIN_TX_PWR_MASK 0x0000000000ff0000 1517 1518 1519 /* Description TX_CHAIN_MASK 1520 1521 Chain mask to support up to 8 antennas. 1522 <legal 1-255> 1523 */ 1524 1525 #define PCU_PPDU_SETUP_INIT_RESPONSE_TO_RESPONSE_RATE_INFO_BW20_TX_CHAIN_MASK_OFFSET 0x0000000000000018 1526 #define PCU_PPDU_SETUP_INIT_RESPONSE_TO_RESPONSE_RATE_INFO_BW20_TX_CHAIN_MASK_LSB 24 1527 #define PCU_PPDU_SETUP_INIT_RESPONSE_TO_RESPONSE_RATE_INFO_BW20_TX_CHAIN_MASK_MSB 31 1528 #define PCU_PPDU_SETUP_INIT_RESPONSE_TO_RESPONSE_RATE_INFO_BW20_TX_CHAIN_MASK_MASK 0x00000000ff000000 1529 1530 1531 /* Description RESERVED_3A 1532 1533 <legal 0> 1534 */ 1535 1536 #define PCU_PPDU_SETUP_INIT_RESPONSE_TO_RESPONSE_RATE_INFO_BW20_RESERVED_3A_OFFSET 0x0000000000000018 1537 #define PCU_PPDU_SETUP_INIT_RESPONSE_TO_RESPONSE_RATE_INFO_BW20_RESERVED_3A_LSB 32 1538 #define PCU_PPDU_SETUP_INIT_RESPONSE_TO_RESPONSE_RATE_INFO_BW20_RESERVED_3A_MSB 39 1539 #define PCU_PPDU_SETUP_INIT_RESPONSE_TO_RESPONSE_RATE_INFO_BW20_RESERVED_3A_MASK 0x000000ff00000000 1540 1541 1542 /* Description SGI 1543 1544 Field only valid when pkt type is HT or VHT.For 11ax see 1545 field Dot11ax_CP_LTF_size 1546 1547 <enum 0 0_8_us_sgi > Legacy normal GI. Can also be used 1548 for HE 1549 <enum 1 0_4_us_sgi > Legacy short GI. Can also be used 1550 for HE 1551 <enum 2 1_6_us_sgi > Not used for pre 11ax pkt_types. 1552 1553 <enum 3 3_2_us_sgi > Not used for pre 11ax pkt_types 1554 1555 1556 <legal 0 - 3> 1557 */ 1558 1559 #define PCU_PPDU_SETUP_INIT_RESPONSE_TO_RESPONSE_RATE_INFO_BW20_SGI_OFFSET 0x0000000000000018 1560 #define PCU_PPDU_SETUP_INIT_RESPONSE_TO_RESPONSE_RATE_INFO_BW20_SGI_LSB 40 1561 #define PCU_PPDU_SETUP_INIT_RESPONSE_TO_RESPONSE_RATE_INFO_BW20_SGI_MSB 41 1562 #define PCU_PPDU_SETUP_INIT_RESPONSE_TO_RESPONSE_RATE_INFO_BW20_SGI_MASK 0x0000030000000000 1563 1564 1565 /* Description RATE_MCS 1566 1567 For details, refer to MCS_TYPE description 1568 Note: This is "rate" in case of 11a/11b 1569 1570 <legal all> 1571 */ 1572 1573 #define PCU_PPDU_SETUP_INIT_RESPONSE_TO_RESPONSE_RATE_INFO_BW20_RATE_MCS_OFFSET 0x0000000000000018 1574 #define PCU_PPDU_SETUP_INIT_RESPONSE_TO_RESPONSE_RATE_INFO_BW20_RATE_MCS_LSB 42 1575 #define PCU_PPDU_SETUP_INIT_RESPONSE_TO_RESPONSE_RATE_INFO_BW20_RATE_MCS_MSB 45 1576 #define PCU_PPDU_SETUP_INIT_RESPONSE_TO_RESPONSE_RATE_INFO_BW20_RATE_MCS_MASK 0x00003c0000000000 1577 1578 1579 /* Description RESERVED_3B 1580 1581 <legal 0> 1582 */ 1583 1584 #define PCU_PPDU_SETUP_INIT_RESPONSE_TO_RESPONSE_RATE_INFO_BW20_RESERVED_3B_OFFSET 0x0000000000000018 1585 #define PCU_PPDU_SETUP_INIT_RESPONSE_TO_RESPONSE_RATE_INFO_BW20_RESERVED_3B_LSB 46 1586 #define PCU_PPDU_SETUP_INIT_RESPONSE_TO_RESPONSE_RATE_INFO_BW20_RESERVED_3B_MSB 47 1587 #define PCU_PPDU_SETUP_INIT_RESPONSE_TO_RESPONSE_RATE_INFO_BW20_RESERVED_3B_MASK 0x0000c00000000000 1588 1589 1590 /* Description TX_PWR_1 1591 1592 Default (desired) transmit parameter for the second chain 1593 1594 1595 Transmit Power in s6.2 format. 1596 In units of 0.25 dBm 1597 1598 Note that there is no Min value for this 1599 <legal all> 1600 */ 1601 1602 #define PCU_PPDU_SETUP_INIT_RESPONSE_TO_RESPONSE_RATE_INFO_BW20_TX_PWR_1_OFFSET 0x0000000000000018 1603 #define PCU_PPDU_SETUP_INIT_RESPONSE_TO_RESPONSE_RATE_INFO_BW20_TX_PWR_1_LSB 48 1604 #define PCU_PPDU_SETUP_INIT_RESPONSE_TO_RESPONSE_RATE_INFO_BW20_TX_PWR_1_MSB 55 1605 #define PCU_PPDU_SETUP_INIT_RESPONSE_TO_RESPONSE_RATE_INFO_BW20_TX_PWR_1_MASK 0x00ff000000000000 1606 1607 1608 /* Description ALT_TX_PWR_1 1609 1610 Alternate (desired) transmit parameter for the second chain 1611 1612 1613 Transmit Power in s6.2 format. 1614 In units of 0.25 dBm 1615 1616 Note that there is no Min value for this 1617 <legal all> 1618 */ 1619 1620 #define PCU_PPDU_SETUP_INIT_RESPONSE_TO_RESPONSE_RATE_INFO_BW20_ALT_TX_PWR_1_OFFSET 0x0000000000000018 1621 #define PCU_PPDU_SETUP_INIT_RESPONSE_TO_RESPONSE_RATE_INFO_BW20_ALT_TX_PWR_1_LSB 56 1622 #define PCU_PPDU_SETUP_INIT_RESPONSE_TO_RESPONSE_RATE_INFO_BW20_ALT_TX_PWR_1_MSB 63 1623 #define PCU_PPDU_SETUP_INIT_RESPONSE_TO_RESPONSE_RATE_INFO_BW20_ALT_TX_PWR_1_MASK 0xff00000000000000 1624 1625 1626 /* Description AGGREGATION 1627 1628 Field only valid in case of pkt_type == 11n 1629 1630 <enum 0 mpdu> Indicates MPDU format. TXPCU will select 1631 this setting if the CBF response only contains a single 1632 segment 1633 <enum 1 a_mpdu> Indicates A-MPDU format. TXPCU will 1634 select this setting if the CBF response will contain two 1635 or more segments 1636 <legal 0-1> 1637 */ 1638 1639 #define PCU_PPDU_SETUP_INIT_RESPONSE_TO_RESPONSE_RATE_INFO_BW20_AGGREGATION_OFFSET 0x0000000000000020 1640 #define PCU_PPDU_SETUP_INIT_RESPONSE_TO_RESPONSE_RATE_INFO_BW20_AGGREGATION_LSB 0 1641 #define PCU_PPDU_SETUP_INIT_RESPONSE_TO_RESPONSE_RATE_INFO_BW20_AGGREGATION_MSB 0 1642 #define PCU_PPDU_SETUP_INIT_RESPONSE_TO_RESPONSE_RATE_INFO_BW20_AGGREGATION_MASK 0x0000000000000001 1643 1644 1645 /* Description DOT11AX_BSS_COLOR_ID 1646 1647 BSS color of the nextwork to which this STA belongs. 1648 When generated by TXPCU, this field is set equal to: Dot11ax_received_Bss_color_id 1649 1650 1651 <legal all> 1652 */ 1653 1654 #define PCU_PPDU_SETUP_INIT_RESPONSE_TO_RESPONSE_RATE_INFO_BW20_DOT11AX_BSS_COLOR_ID_OFFSET 0x0000000000000020 1655 #define PCU_PPDU_SETUP_INIT_RESPONSE_TO_RESPONSE_RATE_INFO_BW20_DOT11AX_BSS_COLOR_ID_LSB 1 1656 #define PCU_PPDU_SETUP_INIT_RESPONSE_TO_RESPONSE_RATE_INFO_BW20_DOT11AX_BSS_COLOR_ID_MSB 6 1657 #define PCU_PPDU_SETUP_INIT_RESPONSE_TO_RESPONSE_RATE_INFO_BW20_DOT11AX_BSS_COLOR_ID_MASK 0x000000000000007e 1658 1659 1660 /* Description DOT11AX_SPATIAL_REUSE 1661 1662 This field is only valid for pkt_type == 11ax 1663 1664 Spatial re-use 1665 <legal all> 1666 */ 1667 1668 #define PCU_PPDU_SETUP_INIT_RESPONSE_TO_RESPONSE_RATE_INFO_BW20_DOT11AX_SPATIAL_REUSE_OFFSET 0x0000000000000020 1669 #define PCU_PPDU_SETUP_INIT_RESPONSE_TO_RESPONSE_RATE_INFO_BW20_DOT11AX_SPATIAL_REUSE_LSB 7 1670 #define PCU_PPDU_SETUP_INIT_RESPONSE_TO_RESPONSE_RATE_INFO_BW20_DOT11AX_SPATIAL_REUSE_MSB 10 1671 #define PCU_PPDU_SETUP_INIT_RESPONSE_TO_RESPONSE_RATE_INFO_BW20_DOT11AX_SPATIAL_REUSE_MASK 0x0000000000000780 1672 1673 1674 /* Description DOT11AX_CP_LTF_SIZE 1675 1676 field is only valid for pkt_type == 11ax 1677 1678 Indicates the CP and HE-LTF type 1679 1680 <enum 0 OneX_LTF_0_8CP> 1xLTF + 0.8 us CP 1681 <enum 1 TwoX_LTF_0_8CP> 2x LTF + 0.8 µs CP 1682 <enum 2 TwoX_LTF_1_6CP> 2x LTF + 1.6 µs CP 1683 <enum 3 FourX_LTF_0_8CP_3_2CP> 1684 When DCM == 0 OR STBC == 0: 4x LTF + 3.2 µs CP 1685 When DCM == 1 AND STBC == 1: 4x LTF + 0.8 µs CP. Note: 1686 In this scenario, Neither DCM nor STBC is applied to HE 1687 data field. 1688 1689 If ( DCM == 1 ) and ( MCS > 0 ) and (STBC == 0) 1690 0 = 1xLTF + 0.4 usec 1691 1 = 2xLTF + 0.4 usec 1692 2~3 = Reserved 1693 1694 <legal all> 1695 */ 1696 1697 #define PCU_PPDU_SETUP_INIT_RESPONSE_TO_RESPONSE_RATE_INFO_BW20_DOT11AX_CP_LTF_SIZE_OFFSET 0x0000000000000020 1698 #define PCU_PPDU_SETUP_INIT_RESPONSE_TO_RESPONSE_RATE_INFO_BW20_DOT11AX_CP_LTF_SIZE_LSB 11 1699 #define PCU_PPDU_SETUP_INIT_RESPONSE_TO_RESPONSE_RATE_INFO_BW20_DOT11AX_CP_LTF_SIZE_MSB 12 1700 #define PCU_PPDU_SETUP_INIT_RESPONSE_TO_RESPONSE_RATE_INFO_BW20_DOT11AX_CP_LTF_SIZE_MASK 0x0000000000001800 1701 1702 1703 /* Description DOT11AX_DCM 1704 1705 field is only valid for pkt_type == 11ax 1706 1707 Indicates whether dual sub-carrier modulation is applied 1708 1709 0: No DCM 1710 1:DCM 1711 <legal all> 1712 */ 1713 1714 #define PCU_PPDU_SETUP_INIT_RESPONSE_TO_RESPONSE_RATE_INFO_BW20_DOT11AX_DCM_OFFSET 0x0000000000000020 1715 #define PCU_PPDU_SETUP_INIT_RESPONSE_TO_RESPONSE_RATE_INFO_BW20_DOT11AX_DCM_LSB 13 1716 #define PCU_PPDU_SETUP_INIT_RESPONSE_TO_RESPONSE_RATE_INFO_BW20_DOT11AX_DCM_MSB 13 1717 #define PCU_PPDU_SETUP_INIT_RESPONSE_TO_RESPONSE_RATE_INFO_BW20_DOT11AX_DCM_MASK 0x0000000000002000 1718 1719 1720 /* Description DOT11AX_DOPPLER_INDICATION 1721 1722 field is only valid for pkt_type == 11ax 1723 1724 0: No Doppler support 1725 1: Doppler support 1726 <legal all> 1727 */ 1728 1729 #define PCU_PPDU_SETUP_INIT_RESPONSE_TO_RESPONSE_RATE_INFO_BW20_DOT11AX_DOPPLER_INDICATION_OFFSET 0x0000000000000020 1730 #define PCU_PPDU_SETUP_INIT_RESPONSE_TO_RESPONSE_RATE_INFO_BW20_DOT11AX_DOPPLER_INDICATION_LSB 14 1731 #define PCU_PPDU_SETUP_INIT_RESPONSE_TO_RESPONSE_RATE_INFO_BW20_DOT11AX_DOPPLER_INDICATION_MSB 14 1732 #define PCU_PPDU_SETUP_INIT_RESPONSE_TO_RESPONSE_RATE_INFO_BW20_DOT11AX_DOPPLER_INDICATION_MASK 0x0000000000004000 1733 1734 1735 /* Description DOT11AX_SU_EXTENDED 1736 1737 field is only valid for pkt_type == 11ax OR pkt_type == 1738 11be 1739 1740 When set, the 11ax or 11be frame is of the extended range 1741 format 1742 <legal all> 1743 */ 1744 1745 #define PCU_PPDU_SETUP_INIT_RESPONSE_TO_RESPONSE_RATE_INFO_BW20_DOT11AX_SU_EXTENDED_OFFSET 0x0000000000000020 1746 #define PCU_PPDU_SETUP_INIT_RESPONSE_TO_RESPONSE_RATE_INFO_BW20_DOT11AX_SU_EXTENDED_LSB 15 1747 #define PCU_PPDU_SETUP_INIT_RESPONSE_TO_RESPONSE_RATE_INFO_BW20_DOT11AX_SU_EXTENDED_MSB 15 1748 #define PCU_PPDU_SETUP_INIT_RESPONSE_TO_RESPONSE_RATE_INFO_BW20_DOT11AX_SU_EXTENDED_MASK 0x0000000000008000 1749 1750 1751 /* Description DOT11AX_MIN_PACKET_EXTENSION 1752 1753 field is only valid for pkt_type == 11ax OR pkt_type == 1754 11be 1755 1756 The min packet extension duration for this user. 1757 0: no extension 1758 1: 8us 1759 2: 16 us 1760 3: 20 us (only for .11be) 1761 <legal 0-3> 1762 */ 1763 1764 #define PCU_PPDU_SETUP_INIT_RESPONSE_TO_RESPONSE_RATE_INFO_BW20_DOT11AX_MIN_PACKET_EXTENSION_OFFSET 0x0000000000000020 1765 #define PCU_PPDU_SETUP_INIT_RESPONSE_TO_RESPONSE_RATE_INFO_BW20_DOT11AX_MIN_PACKET_EXTENSION_LSB 16 1766 #define PCU_PPDU_SETUP_INIT_RESPONSE_TO_RESPONSE_RATE_INFO_BW20_DOT11AX_MIN_PACKET_EXTENSION_MSB 17 1767 #define PCU_PPDU_SETUP_INIT_RESPONSE_TO_RESPONSE_RATE_INFO_BW20_DOT11AX_MIN_PACKET_EXTENSION_MASK 0x0000000000030000 1768 1769 1770 /* Description DOT11AX_PE_NSS 1771 1772 Number of active spatial streams during packet extension. 1773 1774 1775 <enum 0 1_spatial_stream>Single spatial stream 1776 <enum 1 2_spatial_streams>2 spatial streams 1777 <enum 2 3_spatial_streams>3 spatial streams 1778 <enum 3 4_spatial_streams>4 spatial streams 1779 <enum 4 5_spatial_streams>5 spatial streams 1780 <enum 5 6_spatial_streams>6 spatial streams 1781 <enum 6 7_spatial_streams>7 spatial streams 1782 <enum 7 8_spatial_streams>8 spatial streams 1783 */ 1784 1785 #define PCU_PPDU_SETUP_INIT_RESPONSE_TO_RESPONSE_RATE_INFO_BW20_DOT11AX_PE_NSS_OFFSET 0x0000000000000020 1786 #define PCU_PPDU_SETUP_INIT_RESPONSE_TO_RESPONSE_RATE_INFO_BW20_DOT11AX_PE_NSS_LSB 18 1787 #define PCU_PPDU_SETUP_INIT_RESPONSE_TO_RESPONSE_RATE_INFO_BW20_DOT11AX_PE_NSS_MSB 20 1788 #define PCU_PPDU_SETUP_INIT_RESPONSE_TO_RESPONSE_RATE_INFO_BW20_DOT11AX_PE_NSS_MASK 0x00000000001c0000 1789 1790 1791 /* Description DOT11AX_PE_CONTENT 1792 1793 Content of packet extension. Valid for all 11ax packets 1794 having packet extension 1795 1796 0-he_ltf, 1-last_data_symbol 1797 <legal all> 1798 */ 1799 1800 #define PCU_PPDU_SETUP_INIT_RESPONSE_TO_RESPONSE_RATE_INFO_BW20_DOT11AX_PE_CONTENT_OFFSET 0x0000000000000020 1801 #define PCU_PPDU_SETUP_INIT_RESPONSE_TO_RESPONSE_RATE_INFO_BW20_DOT11AX_PE_CONTENT_LSB 21 1802 #define PCU_PPDU_SETUP_INIT_RESPONSE_TO_RESPONSE_RATE_INFO_BW20_DOT11AX_PE_CONTENT_MSB 21 1803 #define PCU_PPDU_SETUP_INIT_RESPONSE_TO_RESPONSE_RATE_INFO_BW20_DOT11AX_PE_CONTENT_MASK 0x0000000000200000 1804 1805 1806 /* Description DOT11AX_PE_LTF_SIZE 1807 1808 LTF size to be used during packet extention. . This field 1809 is valid for both FTM and non-FTM packets. 1810 0-1x 1811 1-2x (unsupported un HWK-1) 1812 2-4x (unsupported un HWK-1) 1813 <legal all> 1814 */ 1815 1816 #define PCU_PPDU_SETUP_INIT_RESPONSE_TO_RESPONSE_RATE_INFO_BW20_DOT11AX_PE_LTF_SIZE_OFFSET 0x0000000000000020 1817 #define PCU_PPDU_SETUP_INIT_RESPONSE_TO_RESPONSE_RATE_INFO_BW20_DOT11AX_PE_LTF_SIZE_LSB 22 1818 #define PCU_PPDU_SETUP_INIT_RESPONSE_TO_RESPONSE_RATE_INFO_BW20_DOT11AX_PE_LTF_SIZE_MSB 23 1819 #define PCU_PPDU_SETUP_INIT_RESPONSE_TO_RESPONSE_RATE_INFO_BW20_DOT11AX_PE_LTF_SIZE_MASK 0x0000000000c00000 1820 1821 1822 /* Description DOT11AX_CHAIN_CSD_EN 1823 1824 This field denotes whether to apply CSD on the preamble 1825 and data portion of the packet. This field is valid for 1826 all transmit packets 1827 0: disable per-chain csd 1828 1: enable per-chain csd 1829 <legal all> 1830 */ 1831 1832 #define PCU_PPDU_SETUP_INIT_RESPONSE_TO_RESPONSE_RATE_INFO_BW20_DOT11AX_CHAIN_CSD_EN_OFFSET 0x0000000000000020 1833 #define PCU_PPDU_SETUP_INIT_RESPONSE_TO_RESPONSE_RATE_INFO_BW20_DOT11AX_CHAIN_CSD_EN_LSB 24 1834 #define PCU_PPDU_SETUP_INIT_RESPONSE_TO_RESPONSE_RATE_INFO_BW20_DOT11AX_CHAIN_CSD_EN_MSB 24 1835 #define PCU_PPDU_SETUP_INIT_RESPONSE_TO_RESPONSE_RATE_INFO_BW20_DOT11AX_CHAIN_CSD_EN_MASK 0x0000000001000000 1836 1837 1838 /* Description DOT11AX_PE_CHAIN_CSD_EN 1839 1840 This field denotes whether to apply CSD on the packet extension 1841 portion of the packet. This field is valid for all 11ax 1842 packets. 1843 0: disable per-chain csd 1844 1: enable per-chain csd 1845 <legal all> 1846 */ 1847 1848 #define PCU_PPDU_SETUP_INIT_RESPONSE_TO_RESPONSE_RATE_INFO_BW20_DOT11AX_PE_CHAIN_CSD_EN_OFFSET 0x0000000000000020 1849 #define PCU_PPDU_SETUP_INIT_RESPONSE_TO_RESPONSE_RATE_INFO_BW20_DOT11AX_PE_CHAIN_CSD_EN_LSB 25 1850 #define PCU_PPDU_SETUP_INIT_RESPONSE_TO_RESPONSE_RATE_INFO_BW20_DOT11AX_PE_CHAIN_CSD_EN_MSB 25 1851 #define PCU_PPDU_SETUP_INIT_RESPONSE_TO_RESPONSE_RATE_INFO_BW20_DOT11AX_PE_CHAIN_CSD_EN_MASK 0x0000000002000000 1852 1853 1854 /* Description DOT11AX_DL_UL_FLAG 1855 1856 field is only valid for pkt_type == 11ax 1857 1858 <enum 0 DL_UL_FLAG_IS_DL_OR_TDLS> 1859 <enum 1 DL_UL_FLAG_IS_UL> 1860 1861 <legal all> 1862 */ 1863 1864 #define PCU_PPDU_SETUP_INIT_RESPONSE_TO_RESPONSE_RATE_INFO_BW20_DOT11AX_DL_UL_FLAG_OFFSET 0x0000000000000020 1865 #define PCU_PPDU_SETUP_INIT_RESPONSE_TO_RESPONSE_RATE_INFO_BW20_DOT11AX_DL_UL_FLAG_LSB 26 1866 #define PCU_PPDU_SETUP_INIT_RESPONSE_TO_RESPONSE_RATE_INFO_BW20_DOT11AX_DL_UL_FLAG_MSB 26 1867 #define PCU_PPDU_SETUP_INIT_RESPONSE_TO_RESPONSE_RATE_INFO_BW20_DOT11AX_DL_UL_FLAG_MASK 0x0000000004000000 1868 1869 1870 /* Description RESERVED_4A 1871 1872 <legal 0> 1873 */ 1874 1875 #define PCU_PPDU_SETUP_INIT_RESPONSE_TO_RESPONSE_RATE_INFO_BW20_RESERVED_4A_OFFSET 0x0000000000000020 1876 #define PCU_PPDU_SETUP_INIT_RESPONSE_TO_RESPONSE_RATE_INFO_BW20_RESERVED_4A_LSB 27 1877 #define PCU_PPDU_SETUP_INIT_RESPONSE_TO_RESPONSE_RATE_INFO_BW20_RESERVED_4A_MSB 31 1878 #define PCU_PPDU_SETUP_INIT_RESPONSE_TO_RESPONSE_RATE_INFO_BW20_RESERVED_4A_MASK 0x00000000f8000000 1879 1880 1881 /* Description DOT11AX_EXT_RU_START_INDEX 1882 1883 field is only valid for pkt_type == 11ax and Dot11ax_su_extended 1884 == 1 1885 1886 RU Number to which User is assigned 1887 1888 The RU numbering bitwidth is only enough to cover the 20MHz 1889 BW that extended range allows 1890 <legal 0-8> 1891 */ 1892 1893 #define PCU_PPDU_SETUP_INIT_RESPONSE_TO_RESPONSE_RATE_INFO_BW20_DOT11AX_EXT_RU_START_INDEX_OFFSET 0x0000000000000020 1894 #define PCU_PPDU_SETUP_INIT_RESPONSE_TO_RESPONSE_RATE_INFO_BW20_DOT11AX_EXT_RU_START_INDEX_LSB 32 1895 #define PCU_PPDU_SETUP_INIT_RESPONSE_TO_RESPONSE_RATE_INFO_BW20_DOT11AX_EXT_RU_START_INDEX_MSB 35 1896 #define PCU_PPDU_SETUP_INIT_RESPONSE_TO_RESPONSE_RATE_INFO_BW20_DOT11AX_EXT_RU_START_INDEX_MASK 0x0000000f00000000 1897 1898 1899 /* Description DOT11AX_EXT_RU_SIZE 1900 1901 field is only valid for pkt_type == 11ax and Dot11ax_su_extended 1902 == 1 or pkt_type == 11be and EHT_duplicate_mode == 1 1903 1904 The size of the RU for this user. 1905 1906 In case of EHT duplicate transmissions, this field indicates 1907 the width of the actual content before duplication, e.g. 1908 a 40 MHz PPDU duplicated to 160 MHz will have the bandwidth 1909 fields indicating 160 MHz and this field set to e-num 4 1910 (RU_484). 1911 1912 <enum 0 RU_26> 1913 <enum 1 RU_52> 1914 <enum 2 RU_106> 1915 <enum 3 RU_242> 1916 <enum 4 RU_484> 1917 <enum 5 RU_996> 1918 <enum 6 RU_1992> 1919 <enum 7 RU_FULLBW> Set when the RU occupies the full packet 1920 bandwidth 1921 <enum 8 RU_FULLBW_240> Set when the RU occupies the full 1922 packet bandwidth 1923 <enum 9 RU_FULLBW_320> Set when the RU occupies the full 1924 packet bandwidth 1925 <enum 10 RU_MULTI_LARGE> DO NOT USE 1926 <enum 11 RU_78> DO NOT USE 1927 <enum 12 RU_132> DO NOT USE 1928 <legal 0-12> 1929 */ 1930 1931 #define PCU_PPDU_SETUP_INIT_RESPONSE_TO_RESPONSE_RATE_INFO_BW20_DOT11AX_EXT_RU_SIZE_OFFSET 0x0000000000000020 1932 #define PCU_PPDU_SETUP_INIT_RESPONSE_TO_RESPONSE_RATE_INFO_BW20_DOT11AX_EXT_RU_SIZE_LSB 36 1933 #define PCU_PPDU_SETUP_INIT_RESPONSE_TO_RESPONSE_RATE_INFO_BW20_DOT11AX_EXT_RU_SIZE_MSB 39 1934 #define PCU_PPDU_SETUP_INIT_RESPONSE_TO_RESPONSE_RATE_INFO_BW20_DOT11AX_EXT_RU_SIZE_MASK 0x000000f000000000 1935 1936 1937 /* Description EHT_DUPLICATE_MODE 1938 1939 Field only valid for pkt_type == 11be 1940 1941 Indicates EHT duplicate modulation 1942 1943 <enum 0 eht_no_duplicate> 1944 <enum 1 eht_2x_duplicate> 1945 <enum 2 eht_4x_duplicate> 1946 1947 <legal 0-2> 1948 */ 1949 1950 #define PCU_PPDU_SETUP_INIT_RESPONSE_TO_RESPONSE_RATE_INFO_BW20_EHT_DUPLICATE_MODE_OFFSET 0x0000000000000020 1951 #define PCU_PPDU_SETUP_INIT_RESPONSE_TO_RESPONSE_RATE_INFO_BW20_EHT_DUPLICATE_MODE_LSB 40 1952 #define PCU_PPDU_SETUP_INIT_RESPONSE_TO_RESPONSE_RATE_INFO_BW20_EHT_DUPLICATE_MODE_MSB 41 1953 #define PCU_PPDU_SETUP_INIT_RESPONSE_TO_RESPONSE_RATE_INFO_BW20_EHT_DUPLICATE_MODE_MASK 0x0000030000000000 1954 1955 1956 /* Description HE_SIGB_DCM 1957 1958 Indicates whether dual sub-carrier modulation is applied 1959 to EHT-SIG 1960 <legal all> 1961 */ 1962 1963 #define PCU_PPDU_SETUP_INIT_RESPONSE_TO_RESPONSE_RATE_INFO_BW20_HE_SIGB_DCM_OFFSET 0x0000000000000020 1964 #define PCU_PPDU_SETUP_INIT_RESPONSE_TO_RESPONSE_RATE_INFO_BW20_HE_SIGB_DCM_LSB 42 1965 #define PCU_PPDU_SETUP_INIT_RESPONSE_TO_RESPONSE_RATE_INFO_BW20_HE_SIGB_DCM_MSB 42 1966 #define PCU_PPDU_SETUP_INIT_RESPONSE_TO_RESPONSE_RATE_INFO_BW20_HE_SIGB_DCM_MASK 0x0000040000000000 1967 1968 1969 /* Description HE_SIGB_0_MCS 1970 1971 Indicates the MCS of EHT-SIG 1972 1973 For details, refer to MCS_TYPE description 1974 <legal all> 1975 */ 1976 1977 #define PCU_PPDU_SETUP_INIT_RESPONSE_TO_RESPONSE_RATE_INFO_BW20_HE_SIGB_0_MCS_OFFSET 0x0000000000000020 1978 #define PCU_PPDU_SETUP_INIT_RESPONSE_TO_RESPONSE_RATE_INFO_BW20_HE_SIGB_0_MCS_LSB 43 1979 #define PCU_PPDU_SETUP_INIT_RESPONSE_TO_RESPONSE_RATE_INFO_BW20_HE_SIGB_0_MCS_MSB 45 1980 #define PCU_PPDU_SETUP_INIT_RESPONSE_TO_RESPONSE_RATE_INFO_BW20_HE_SIGB_0_MCS_MASK 0x0000380000000000 1981 1982 1983 /* Description NUM_HE_SIGB_SYM 1984 1985 Indicates the number of EHT-SIG symbols 1986 1987 This field is 0-based with 0 indicating that 1 eht_sig symbol 1988 needs to be transmitted. 1989 <legal all> 1990 */ 1991 1992 #define PCU_PPDU_SETUP_INIT_RESPONSE_TO_RESPONSE_RATE_INFO_BW20_NUM_HE_SIGB_SYM_OFFSET 0x0000000000000020 1993 #define PCU_PPDU_SETUP_INIT_RESPONSE_TO_RESPONSE_RATE_INFO_BW20_NUM_HE_SIGB_SYM_LSB 46 1994 #define PCU_PPDU_SETUP_INIT_RESPONSE_TO_RESPONSE_RATE_INFO_BW20_NUM_HE_SIGB_SYM_MSB 50 1995 #define PCU_PPDU_SETUP_INIT_RESPONSE_TO_RESPONSE_RATE_INFO_BW20_NUM_HE_SIGB_SYM_MASK 0x0007c00000000000 1996 1997 1998 /* Description REQUIRED_RESPONSE_TIME_SOURCE 1999 2000 <enum 0 reqd_resp_time_src_is_RXPCU> Typically from received 2001 HT Control for sync MLO response 2002 <enum 1 reqd_resp_time_src_is_FW> 2003 Typically from 'PCU_PPDU_SETUP_INIT' for sync MLO response 2004 to response 2005 <legal all> 2006 */ 2007 2008 #define PCU_PPDU_SETUP_INIT_RESPONSE_TO_RESPONSE_RATE_INFO_BW20_REQUIRED_RESPONSE_TIME_SOURCE_OFFSET 0x0000000000000020 2009 #define PCU_PPDU_SETUP_INIT_RESPONSE_TO_RESPONSE_RATE_INFO_BW20_REQUIRED_RESPONSE_TIME_SOURCE_LSB 51 2010 #define PCU_PPDU_SETUP_INIT_RESPONSE_TO_RESPONSE_RATE_INFO_BW20_REQUIRED_RESPONSE_TIME_SOURCE_MSB 51 2011 #define PCU_PPDU_SETUP_INIT_RESPONSE_TO_RESPONSE_RATE_INFO_BW20_REQUIRED_RESPONSE_TIME_SOURCE_MASK 0x0008000000000000 2012 2013 2014 /* Description RESERVED_5A 2015 2016 <legal 0> 2017 */ 2018 2019 #define PCU_PPDU_SETUP_INIT_RESPONSE_TO_RESPONSE_RATE_INFO_BW20_RESERVED_5A_OFFSET 0x0000000000000020 2020 #define PCU_PPDU_SETUP_INIT_RESPONSE_TO_RESPONSE_RATE_INFO_BW20_RESERVED_5A_LSB 52 2021 #define PCU_PPDU_SETUP_INIT_RESPONSE_TO_RESPONSE_RATE_INFO_BW20_RESERVED_5A_MSB 57 2022 #define PCU_PPDU_SETUP_INIT_RESPONSE_TO_RESPONSE_RATE_INFO_BW20_RESERVED_5A_MASK 0x03f0000000000000 2023 2024 2025 /* Description U_SIG_PUNCTURE_PATTERN_ENCODING 2026 2027 6-bit value copied from 'RX_RESPONSE_REQUIRED_INFO' and 'TX_CBF_INFO' 2028 to pass on to PDG 2029 <legal 0-29> 2030 */ 2031 2032 #define PCU_PPDU_SETUP_INIT_RESPONSE_TO_RESPONSE_RATE_INFO_BW20_U_SIG_PUNCTURE_PATTERN_ENCODING_OFFSET 0x0000000000000020 2033 #define PCU_PPDU_SETUP_INIT_RESPONSE_TO_RESPONSE_RATE_INFO_BW20_U_SIG_PUNCTURE_PATTERN_ENCODING_LSB 58 2034 #define PCU_PPDU_SETUP_INIT_RESPONSE_TO_RESPONSE_RATE_INFO_BW20_U_SIG_PUNCTURE_PATTERN_ENCODING_MSB 63 2035 #define PCU_PPDU_SETUP_INIT_RESPONSE_TO_RESPONSE_RATE_INFO_BW20_U_SIG_PUNCTURE_PATTERN_ENCODING_MASK 0xfc00000000000000 2036 2037 2038 /* Description MLO_STA_ID_DETAILS_RX 2039 2040 16-bi value copied from 'RX_RESPONSE_REQUIRED_INFO' to pass 2041 on to PDG 2042 2043 Bits 10 and 11 are not valid, bits [9:0] reflect 'NSTR_MLO_STA_ID' 2044 from address search. 2045 2046 See definition of mlo_sta_id_details. 2047 */ 2048 2049 2050 /* Description NSTR_MLO_STA_ID 2051 2052 ID of peer participating in non-STR MLO 2053 */ 2054 2055 #define PCU_PPDU_SETUP_INIT_RESPONSE_TO_RESPONSE_RATE_INFO_BW20_MLO_STA_ID_DETAILS_RX_NSTR_MLO_STA_ID_OFFSET 0x0000000000000028 2056 #define PCU_PPDU_SETUP_INIT_RESPONSE_TO_RESPONSE_RATE_INFO_BW20_MLO_STA_ID_DETAILS_RX_NSTR_MLO_STA_ID_LSB 0 2057 #define PCU_PPDU_SETUP_INIT_RESPONSE_TO_RESPONSE_RATE_INFO_BW20_MLO_STA_ID_DETAILS_RX_NSTR_MLO_STA_ID_MSB 9 2058 #define PCU_PPDU_SETUP_INIT_RESPONSE_TO_RESPONSE_RATE_INFO_BW20_MLO_STA_ID_DETAILS_RX_NSTR_MLO_STA_ID_MASK 0x00000000000003ff 2059 2060 2061 /* Description BLOCK_SELF_ML_SYNC 2062 2063 Only valid for TX 2064 2065 When set, this provides an indication to block the peer 2066 for self-link. 2067 */ 2068 2069 #define PCU_PPDU_SETUP_INIT_RESPONSE_TO_RESPONSE_RATE_INFO_BW20_MLO_STA_ID_DETAILS_RX_BLOCK_SELF_ML_SYNC_OFFSET 0x0000000000000028 2070 #define PCU_PPDU_SETUP_INIT_RESPONSE_TO_RESPONSE_RATE_INFO_BW20_MLO_STA_ID_DETAILS_RX_BLOCK_SELF_ML_SYNC_LSB 10 2071 #define PCU_PPDU_SETUP_INIT_RESPONSE_TO_RESPONSE_RATE_INFO_BW20_MLO_STA_ID_DETAILS_RX_BLOCK_SELF_ML_SYNC_MSB 10 2072 #define PCU_PPDU_SETUP_INIT_RESPONSE_TO_RESPONSE_RATE_INFO_BW20_MLO_STA_ID_DETAILS_RX_BLOCK_SELF_ML_SYNC_MASK 0x0000000000000400 2073 2074 2075 /* Description BLOCK_PARTNER_ML_SYNC 2076 2077 Only valid for TX 2078 2079 When set, this provides an indication to block the peer 2080 for partner links. 2081 */ 2082 2083 #define PCU_PPDU_SETUP_INIT_RESPONSE_TO_RESPONSE_RATE_INFO_BW20_MLO_STA_ID_DETAILS_RX_BLOCK_PARTNER_ML_SYNC_OFFSET 0x0000000000000028 2084 #define PCU_PPDU_SETUP_INIT_RESPONSE_TO_RESPONSE_RATE_INFO_BW20_MLO_STA_ID_DETAILS_RX_BLOCK_PARTNER_ML_SYNC_LSB 11 2085 #define PCU_PPDU_SETUP_INIT_RESPONSE_TO_RESPONSE_RATE_INFO_BW20_MLO_STA_ID_DETAILS_RX_BLOCK_PARTNER_ML_SYNC_MSB 11 2086 #define PCU_PPDU_SETUP_INIT_RESPONSE_TO_RESPONSE_RATE_INFO_BW20_MLO_STA_ID_DETAILS_RX_BLOCK_PARTNER_ML_SYNC_MASK 0x0000000000000800 2087 2088 2089 /* Description NSTR_MLO_STA_ID_VALID 2090 2091 All the fields in this TLV are valid only if this bit is 2092 set. 2093 */ 2094 2095 #define PCU_PPDU_SETUP_INIT_RESPONSE_TO_RESPONSE_RATE_INFO_BW20_MLO_STA_ID_DETAILS_RX_NSTR_MLO_STA_ID_VALID_OFFSET 0x0000000000000028 2096 #define PCU_PPDU_SETUP_INIT_RESPONSE_TO_RESPONSE_RATE_INFO_BW20_MLO_STA_ID_DETAILS_RX_NSTR_MLO_STA_ID_VALID_LSB 12 2097 #define PCU_PPDU_SETUP_INIT_RESPONSE_TO_RESPONSE_RATE_INFO_BW20_MLO_STA_ID_DETAILS_RX_NSTR_MLO_STA_ID_VALID_MSB 12 2098 #define PCU_PPDU_SETUP_INIT_RESPONSE_TO_RESPONSE_RATE_INFO_BW20_MLO_STA_ID_DETAILS_RX_NSTR_MLO_STA_ID_VALID_MASK 0x0000000000001000 2099 2100 2101 /* Description RESERVED_0A 2102 2103 <legal 0> 2104 */ 2105 2106 #define PCU_PPDU_SETUP_INIT_RESPONSE_TO_RESPONSE_RATE_INFO_BW20_MLO_STA_ID_DETAILS_RX_RESERVED_0A_OFFSET 0x0000000000000028 2107 #define PCU_PPDU_SETUP_INIT_RESPONSE_TO_RESPONSE_RATE_INFO_BW20_MLO_STA_ID_DETAILS_RX_RESERVED_0A_LSB 13 2108 #define PCU_PPDU_SETUP_INIT_RESPONSE_TO_RESPONSE_RATE_INFO_BW20_MLO_STA_ID_DETAILS_RX_RESERVED_0A_MSB 15 2109 #define PCU_PPDU_SETUP_INIT_RESPONSE_TO_RESPONSE_RATE_INFO_BW20_MLO_STA_ID_DETAILS_RX_RESERVED_0A_MASK 0x000000000000e000 2110 2111 2112 /* Description REQUIRED_RESPONSE_TIME 2113 2114 When non-zero, indicates that PDG shall pad the response 2115 transmission to the indicated duration (in us) 2116 */ 2117 2118 #define PCU_PPDU_SETUP_INIT_RESPONSE_TO_RESPONSE_RATE_INFO_BW20_REQUIRED_RESPONSE_TIME_OFFSET 0x0000000000000028 2119 #define PCU_PPDU_SETUP_INIT_RESPONSE_TO_RESPONSE_RATE_INFO_BW20_REQUIRED_RESPONSE_TIME_LSB 16 2120 #define PCU_PPDU_SETUP_INIT_RESPONSE_TO_RESPONSE_RATE_INFO_BW20_REQUIRED_RESPONSE_TIME_MSB 27 2121 #define PCU_PPDU_SETUP_INIT_RESPONSE_TO_RESPONSE_RATE_INFO_BW20_REQUIRED_RESPONSE_TIME_MASK 0x000000000fff0000 2122 2123 2124 /* Description DOT11BE_PARAMS_PLACEHOLDER 2125 2126 4 bytes for use as placeholders for 'Dot11be_*' parameters 2127 2128 */ 2129 2130 #define PCU_PPDU_SETUP_INIT_RESPONSE_TO_RESPONSE_RATE_INFO_BW20_DOT11BE_PARAMS_PLACEHOLDER_OFFSET 0x0000000000000028 2131 #define PCU_PPDU_SETUP_INIT_RESPONSE_TO_RESPONSE_RATE_INFO_BW20_DOT11BE_PARAMS_PLACEHOLDER_LSB 28 2132 #define PCU_PPDU_SETUP_INIT_RESPONSE_TO_RESPONSE_RATE_INFO_BW20_DOT11BE_PARAMS_PLACEHOLDER_MSB 31 2133 #define PCU_PPDU_SETUP_INIT_RESPONSE_TO_RESPONSE_RATE_INFO_BW20_DOT11BE_PARAMS_PLACEHOLDER_MASK 0x00000000f0000000 2134 2135 2136 /* Description RESPONSE_TO_RESPONSE_RATE_INFO_BW40 2137 2138 Field only valid in case of Response_to_response set to 2139 SU_BA or MU_BA 2140 2141 NOTE: This field is also known as response_to_response_rate_info_pattern_1 2142 in case punctured transmission is enabled. 2143 2144 Used by TXPCU to determine what the transmit rates are for 2145 the response to response transmission in case original 2146 transmission was 40 MHz. 2147 2148 Note: 2149 see field R2R_bw40_active_channel for the BW of this transmission 2150 2151 */ 2152 2153 2154 /* Description RESERVED_0A 2155 2156 2157 <legal 0> 2158 */ 2159 2160 #define PCU_PPDU_SETUP_INIT_RESPONSE_TO_RESPONSE_RATE_INFO_BW40_RESERVED_0A_OFFSET 0x0000000000000028 2161 #define PCU_PPDU_SETUP_INIT_RESPONSE_TO_RESPONSE_RATE_INFO_BW40_RESERVED_0A_LSB 32 2162 #define PCU_PPDU_SETUP_INIT_RESPONSE_TO_RESPONSE_RATE_INFO_BW40_RESERVED_0A_MSB 32 2163 #define PCU_PPDU_SETUP_INIT_RESPONSE_TO_RESPONSE_RATE_INFO_BW40_RESERVED_0A_MASK 0x0000000100000000 2164 2165 2166 /* Description TX_ANTENNA_SECTOR_CTRL 2167 2168 Sectored transmit antenna 2169 <legal all> 2170 */ 2171 2172 #define PCU_PPDU_SETUP_INIT_RESPONSE_TO_RESPONSE_RATE_INFO_BW40_TX_ANTENNA_SECTOR_CTRL_OFFSET 0x0000000000000028 2173 #define PCU_PPDU_SETUP_INIT_RESPONSE_TO_RESPONSE_RATE_INFO_BW40_TX_ANTENNA_SECTOR_CTRL_LSB 33 2174 #define PCU_PPDU_SETUP_INIT_RESPONSE_TO_RESPONSE_RATE_INFO_BW40_TX_ANTENNA_SECTOR_CTRL_MSB 56 2175 #define PCU_PPDU_SETUP_INIT_RESPONSE_TO_RESPONSE_RATE_INFO_BW40_TX_ANTENNA_SECTOR_CTRL_MASK 0x01fffffe00000000 2176 2177 2178 /* Description PKT_TYPE 2179 2180 Packet type: 2181 <enum 0 dot11a>802.11a PPDU type 2182 <enum 1 dot11b>802.11b PPDU type 2183 <enum 2 dot11n_mm>802.11n Mixed Mode PPDU type 2184 <enum 3 dot11ac>802.11ac PPDU type 2185 <enum 4 dot11ax>802.11ax PPDU type 2186 <enum 5 dot11ba>802.11ba (WUR) PPDU type 2187 <enum 6 dot11be>802.11be PPDU type 2188 <enum 7 dot11az>802.11az (ranging) PPDU type 2189 <enum 8 dot11n_gf>802.11n Green Field PPDU type (unsupported 2190 & aborted) 2191 */ 2192 2193 #define PCU_PPDU_SETUP_INIT_RESPONSE_TO_RESPONSE_RATE_INFO_BW40_PKT_TYPE_OFFSET 0x0000000000000028 2194 #define PCU_PPDU_SETUP_INIT_RESPONSE_TO_RESPONSE_RATE_INFO_BW40_PKT_TYPE_LSB 57 2195 #define PCU_PPDU_SETUP_INIT_RESPONSE_TO_RESPONSE_RATE_INFO_BW40_PKT_TYPE_MSB 60 2196 #define PCU_PPDU_SETUP_INIT_RESPONSE_TO_RESPONSE_RATE_INFO_BW40_PKT_TYPE_MASK 0x1e00000000000000 2197 2198 2199 /* Description SMOOTHING 2200 2201 This field is used by PDG to populate the SMOOTHING filed 2202 in the SIG Preamble of the PPDU 2203 <legal 0-1> 2204 */ 2205 2206 #define PCU_PPDU_SETUP_INIT_RESPONSE_TO_RESPONSE_RATE_INFO_BW40_SMOOTHING_OFFSET 0x0000000000000028 2207 #define PCU_PPDU_SETUP_INIT_RESPONSE_TO_RESPONSE_RATE_INFO_BW40_SMOOTHING_LSB 61 2208 #define PCU_PPDU_SETUP_INIT_RESPONSE_TO_RESPONSE_RATE_INFO_BW40_SMOOTHING_MSB 61 2209 #define PCU_PPDU_SETUP_INIT_RESPONSE_TO_RESPONSE_RATE_INFO_BW40_SMOOTHING_MASK 0x2000000000000000 2210 2211 2212 /* Description LDPC 2213 2214 When set, use LDPC transmission rates 2215 */ 2216 2217 #define PCU_PPDU_SETUP_INIT_RESPONSE_TO_RESPONSE_RATE_INFO_BW40_LDPC_OFFSET 0x0000000000000028 2218 #define PCU_PPDU_SETUP_INIT_RESPONSE_TO_RESPONSE_RATE_INFO_BW40_LDPC_LSB 62 2219 #define PCU_PPDU_SETUP_INIT_RESPONSE_TO_RESPONSE_RATE_INFO_BW40_LDPC_MSB 62 2220 #define PCU_PPDU_SETUP_INIT_RESPONSE_TO_RESPONSE_RATE_INFO_BW40_LDPC_MASK 0x4000000000000000 2221 2222 2223 /* Description STBC 2224 2225 When set, use STBC transmission rates 2226 */ 2227 2228 #define PCU_PPDU_SETUP_INIT_RESPONSE_TO_RESPONSE_RATE_INFO_BW40_STBC_OFFSET 0x0000000000000028 2229 #define PCU_PPDU_SETUP_INIT_RESPONSE_TO_RESPONSE_RATE_INFO_BW40_STBC_LSB 63 2230 #define PCU_PPDU_SETUP_INIT_RESPONSE_TO_RESPONSE_RATE_INFO_BW40_STBC_MSB 63 2231 #define PCU_PPDU_SETUP_INIT_RESPONSE_TO_RESPONSE_RATE_INFO_BW40_STBC_MASK 0x8000000000000000 2232 2233 2234 /* Description ALT_TX_PWR 2235 2236 Coex related AlternativeTransmit parameter 2237 2238 Transmit Power in s6.2 format. 2239 In units of 0.25 dBm 2240 <legal all> 2241 */ 2242 2243 #define PCU_PPDU_SETUP_INIT_RESPONSE_TO_RESPONSE_RATE_INFO_BW40_ALT_TX_PWR_OFFSET 0x0000000000000030 2244 #define PCU_PPDU_SETUP_INIT_RESPONSE_TO_RESPONSE_RATE_INFO_BW40_ALT_TX_PWR_LSB 0 2245 #define PCU_PPDU_SETUP_INIT_RESPONSE_TO_RESPONSE_RATE_INFO_BW40_ALT_TX_PWR_MSB 7 2246 #define PCU_PPDU_SETUP_INIT_RESPONSE_TO_RESPONSE_RATE_INFO_BW40_ALT_TX_PWR_MASK 0x00000000000000ff 2247 2248 2249 /* Description ALT_MIN_TX_PWR 2250 2251 Coex related Alternative Transmit parameter 2252 2253 Minimum allowed Transmit Power in s6.2 format. 2254 In units of 0.25 dBm 2255 <legal all> 2256 */ 2257 2258 #define PCU_PPDU_SETUP_INIT_RESPONSE_TO_RESPONSE_RATE_INFO_BW40_ALT_MIN_TX_PWR_OFFSET 0x0000000000000030 2259 #define PCU_PPDU_SETUP_INIT_RESPONSE_TO_RESPONSE_RATE_INFO_BW40_ALT_MIN_TX_PWR_LSB 8 2260 #define PCU_PPDU_SETUP_INIT_RESPONSE_TO_RESPONSE_RATE_INFO_BW40_ALT_MIN_TX_PWR_MSB 15 2261 #define PCU_PPDU_SETUP_INIT_RESPONSE_TO_RESPONSE_RATE_INFO_BW40_ALT_MIN_TX_PWR_MASK 0x000000000000ff00 2262 2263 2264 /* Description ALT_NSS 2265 2266 Coex related Alternative Transmit parameter 2267 2268 Number of spatial streams. 2269 2270 <enum 0 1_spatial_stream>Single spatial stream 2271 <enum 1 2_spatial_streams>2 spatial streams 2272 <enum 2 3_spatial_streams>3 spatial streams 2273 <enum 3 4_spatial_streams>4 spatial streams 2274 <enum 4 5_spatial_streams>5 spatial streams 2275 <enum 5 6_spatial_streams>6 spatial streams 2276 <enum 6 7_spatial_streams>7 spatial streams 2277 <enum 7 8_spatial_streams>8 spatial streams 2278 */ 2279 2280 #define PCU_PPDU_SETUP_INIT_RESPONSE_TO_RESPONSE_RATE_INFO_BW40_ALT_NSS_OFFSET 0x0000000000000030 2281 #define PCU_PPDU_SETUP_INIT_RESPONSE_TO_RESPONSE_RATE_INFO_BW40_ALT_NSS_LSB 16 2282 #define PCU_PPDU_SETUP_INIT_RESPONSE_TO_RESPONSE_RATE_INFO_BW40_ALT_NSS_MSB 18 2283 #define PCU_PPDU_SETUP_INIT_RESPONSE_TO_RESPONSE_RATE_INFO_BW40_ALT_NSS_MASK 0x0000000000070000 2284 2285 2286 /* Description ALT_TX_CHAIN_MASK 2287 2288 Coex related Alternative Transmit parameter 2289 2290 Chain mask to support up to 8 antennas. 2291 <legal 1-255> 2292 */ 2293 2294 #define PCU_PPDU_SETUP_INIT_RESPONSE_TO_RESPONSE_RATE_INFO_BW40_ALT_TX_CHAIN_MASK_OFFSET 0x0000000000000030 2295 #define PCU_PPDU_SETUP_INIT_RESPONSE_TO_RESPONSE_RATE_INFO_BW40_ALT_TX_CHAIN_MASK_LSB 19 2296 #define PCU_PPDU_SETUP_INIT_RESPONSE_TO_RESPONSE_RATE_INFO_BW40_ALT_TX_CHAIN_MASK_MSB 26 2297 #define PCU_PPDU_SETUP_INIT_RESPONSE_TO_RESPONSE_RATE_INFO_BW40_ALT_TX_CHAIN_MASK_MASK 0x0000000007f80000 2298 2299 2300 /* Description ALT_BW 2301 2302 Coex related Alternative Transmit parameter 2303 2304 The BW of the upcoming transmission. 2305 2306 <enum 0 20_mhz>20 Mhz BW 2307 <enum 1 40_mhz>40 Mhz BW 2308 <enum 2 80_mhz>80 Mhz BW 2309 <enum 3 160_mhz>160 Mhz BW 2310 <enum 4 320_mhz>320 Mhz BW 2311 <enum 5 240_mhz>240 Mhz BW 2312 */ 2313 2314 #define PCU_PPDU_SETUP_INIT_RESPONSE_TO_RESPONSE_RATE_INFO_BW40_ALT_BW_OFFSET 0x0000000000000030 2315 #define PCU_PPDU_SETUP_INIT_RESPONSE_TO_RESPONSE_RATE_INFO_BW40_ALT_BW_LSB 27 2316 #define PCU_PPDU_SETUP_INIT_RESPONSE_TO_RESPONSE_RATE_INFO_BW40_ALT_BW_MSB 29 2317 #define PCU_PPDU_SETUP_INIT_RESPONSE_TO_RESPONSE_RATE_INFO_BW40_ALT_BW_MASK 0x0000000038000000 2318 2319 2320 /* Description STF_LTF_3DB_BOOST 2321 2322 Boost the STF and LTF power by 3dB in 11a/n/ac packets. 2323 This includes both the legacy preambles and the HT/VHT preambles.0: 2324 disable power boost1: enable power boost 2325 <legal all> 2326 */ 2327 2328 #define PCU_PPDU_SETUP_INIT_RESPONSE_TO_RESPONSE_RATE_INFO_BW40_STF_LTF_3DB_BOOST_OFFSET 0x0000000000000030 2329 #define PCU_PPDU_SETUP_INIT_RESPONSE_TO_RESPONSE_RATE_INFO_BW40_STF_LTF_3DB_BOOST_LSB 30 2330 #define PCU_PPDU_SETUP_INIT_RESPONSE_TO_RESPONSE_RATE_INFO_BW40_STF_LTF_3DB_BOOST_MSB 30 2331 #define PCU_PPDU_SETUP_INIT_RESPONSE_TO_RESPONSE_RATE_INFO_BW40_STF_LTF_3DB_BOOST_MASK 0x0000000040000000 2332 2333 2334 /* Description FORCE_EXTRA_SYMBOL 2335 2336 Set to 1 to force an extra OFDM symbol (or symbols) even 2337 if the PPDU encoding process does not result in an extra 2338 OFDM symbol (or symbols) 2339 */ 2340 2341 #define PCU_PPDU_SETUP_INIT_RESPONSE_TO_RESPONSE_RATE_INFO_BW40_FORCE_EXTRA_SYMBOL_OFFSET 0x0000000000000030 2342 #define PCU_PPDU_SETUP_INIT_RESPONSE_TO_RESPONSE_RATE_INFO_BW40_FORCE_EXTRA_SYMBOL_LSB 31 2343 #define PCU_PPDU_SETUP_INIT_RESPONSE_TO_RESPONSE_RATE_INFO_BW40_FORCE_EXTRA_SYMBOL_MSB 31 2344 #define PCU_PPDU_SETUP_INIT_RESPONSE_TO_RESPONSE_RATE_INFO_BW40_FORCE_EXTRA_SYMBOL_MASK 0x0000000080000000 2345 2346 2347 /* Description ALT_RATE_MCS 2348 2349 Coex related Alternative Transmit parameter 2350 2351 For details, refer to MCS_TYPE 2352 Note: This is "rate" in case of 11a/11b 2353 description 2354 <legal all> 2355 */ 2356 2357 #define PCU_PPDU_SETUP_INIT_RESPONSE_TO_RESPONSE_RATE_INFO_BW40_ALT_RATE_MCS_OFFSET 0x0000000000000030 2358 #define PCU_PPDU_SETUP_INIT_RESPONSE_TO_RESPONSE_RATE_INFO_BW40_ALT_RATE_MCS_LSB 32 2359 #define PCU_PPDU_SETUP_INIT_RESPONSE_TO_RESPONSE_RATE_INFO_BW40_ALT_RATE_MCS_MSB 35 2360 #define PCU_PPDU_SETUP_INIT_RESPONSE_TO_RESPONSE_RATE_INFO_BW40_ALT_RATE_MCS_MASK 0x0000000f00000000 2361 2362 2363 /* Description NSS 2364 2365 Number of spatial streams. 2366 2367 <enum 0 1_spatial_stream>Single spatial stream 2368 <enum 1 2_spatial_streams>2 spatial streams 2369 <enum 2 3_spatial_streams>3 spatial streams 2370 <enum 3 4_spatial_streams>4 spatial streams 2371 <enum 4 5_spatial_streams>5 spatial streams 2372 <enum 5 6_spatial_streams>6 spatial streams 2373 <enum 6 7_spatial_streams>7 spatial streams 2374 <enum 7 8_spatial_streams>8 spatial streams 2375 */ 2376 2377 #define PCU_PPDU_SETUP_INIT_RESPONSE_TO_RESPONSE_RATE_INFO_BW40_NSS_OFFSET 0x0000000000000030 2378 #define PCU_PPDU_SETUP_INIT_RESPONSE_TO_RESPONSE_RATE_INFO_BW40_NSS_LSB 36 2379 #define PCU_PPDU_SETUP_INIT_RESPONSE_TO_RESPONSE_RATE_INFO_BW40_NSS_MSB 38 2380 #define PCU_PPDU_SETUP_INIT_RESPONSE_TO_RESPONSE_RATE_INFO_BW40_NSS_MASK 0x0000007000000000 2381 2382 2383 /* Description DPD_ENABLE 2384 2385 DPD enable control 2386 2387 This is needed on a per packet basis 2388 <enum 0 dpd_off> DPD profile not applied to current 2389 packet 2390 <enum 1 dpd_on> DPD profile applied to current packet 2391 if available 2392 <legal 0-1> 2393 2394 This field is not applicable in11ah mode of operation and 2395 is ignored by the HW 2396 */ 2397 2398 #define PCU_PPDU_SETUP_INIT_RESPONSE_TO_RESPONSE_RATE_INFO_BW40_DPD_ENABLE_OFFSET 0x0000000000000030 2399 #define PCU_PPDU_SETUP_INIT_RESPONSE_TO_RESPONSE_RATE_INFO_BW40_DPD_ENABLE_LSB 39 2400 #define PCU_PPDU_SETUP_INIT_RESPONSE_TO_RESPONSE_RATE_INFO_BW40_DPD_ENABLE_MSB 39 2401 #define PCU_PPDU_SETUP_INIT_RESPONSE_TO_RESPONSE_RATE_INFO_BW40_DPD_ENABLE_MASK 0x0000008000000000 2402 2403 2404 /* Description TX_PWR 2405 2406 Transmit Power in s6.2 format. 2407 In units of 0.25 dBm 2408 <legal all> 2409 */ 2410 2411 #define PCU_PPDU_SETUP_INIT_RESPONSE_TO_RESPONSE_RATE_INFO_BW40_TX_PWR_OFFSET 0x0000000000000030 2412 #define PCU_PPDU_SETUP_INIT_RESPONSE_TO_RESPONSE_RATE_INFO_BW40_TX_PWR_LSB 40 2413 #define PCU_PPDU_SETUP_INIT_RESPONSE_TO_RESPONSE_RATE_INFO_BW40_TX_PWR_MSB 47 2414 #define PCU_PPDU_SETUP_INIT_RESPONSE_TO_RESPONSE_RATE_INFO_BW40_TX_PWR_MASK 0x0000ff0000000000 2415 2416 2417 /* Description MIN_TX_PWR 2418 2419 Coex related field: 2420 2421 Minimum allowed Transmit Power in s6.2 format. 2422 In units of 0.25 dBm 2423 <legal all> 2424 */ 2425 2426 #define PCU_PPDU_SETUP_INIT_RESPONSE_TO_RESPONSE_RATE_INFO_BW40_MIN_TX_PWR_OFFSET 0x0000000000000030 2427 #define PCU_PPDU_SETUP_INIT_RESPONSE_TO_RESPONSE_RATE_INFO_BW40_MIN_TX_PWR_LSB 48 2428 #define PCU_PPDU_SETUP_INIT_RESPONSE_TO_RESPONSE_RATE_INFO_BW40_MIN_TX_PWR_MSB 55 2429 #define PCU_PPDU_SETUP_INIT_RESPONSE_TO_RESPONSE_RATE_INFO_BW40_MIN_TX_PWR_MASK 0x00ff000000000000 2430 2431 2432 /* Description TX_CHAIN_MASK 2433 2434 Chain mask to support up to 8 antennas. 2435 <legal 1-255> 2436 */ 2437 2438 #define PCU_PPDU_SETUP_INIT_RESPONSE_TO_RESPONSE_RATE_INFO_BW40_TX_CHAIN_MASK_OFFSET 0x0000000000000030 2439 #define PCU_PPDU_SETUP_INIT_RESPONSE_TO_RESPONSE_RATE_INFO_BW40_TX_CHAIN_MASK_LSB 56 2440 #define PCU_PPDU_SETUP_INIT_RESPONSE_TO_RESPONSE_RATE_INFO_BW40_TX_CHAIN_MASK_MSB 63 2441 #define PCU_PPDU_SETUP_INIT_RESPONSE_TO_RESPONSE_RATE_INFO_BW40_TX_CHAIN_MASK_MASK 0xff00000000000000 2442 2443 2444 /* Description RESERVED_3A 2445 2446 <legal 0> 2447 */ 2448 2449 #define PCU_PPDU_SETUP_INIT_RESPONSE_TO_RESPONSE_RATE_INFO_BW40_RESERVED_3A_OFFSET 0x0000000000000038 2450 #define PCU_PPDU_SETUP_INIT_RESPONSE_TO_RESPONSE_RATE_INFO_BW40_RESERVED_3A_LSB 0 2451 #define PCU_PPDU_SETUP_INIT_RESPONSE_TO_RESPONSE_RATE_INFO_BW40_RESERVED_3A_MSB 7 2452 #define PCU_PPDU_SETUP_INIT_RESPONSE_TO_RESPONSE_RATE_INFO_BW40_RESERVED_3A_MASK 0x00000000000000ff 2453 2454 2455 /* Description SGI 2456 2457 Field only valid when pkt type is HT or VHT.For 11ax see 2458 field Dot11ax_CP_LTF_size 2459 2460 <enum 0 0_8_us_sgi > Legacy normal GI. Can also be used 2461 for HE 2462 <enum 1 0_4_us_sgi > Legacy short GI. Can also be used 2463 for HE 2464 <enum 2 1_6_us_sgi > Not used for pre 11ax pkt_types. 2465 2466 <enum 3 3_2_us_sgi > Not used for pre 11ax pkt_types 2467 2468 2469 <legal 0 - 3> 2470 */ 2471 2472 #define PCU_PPDU_SETUP_INIT_RESPONSE_TO_RESPONSE_RATE_INFO_BW40_SGI_OFFSET 0x0000000000000038 2473 #define PCU_PPDU_SETUP_INIT_RESPONSE_TO_RESPONSE_RATE_INFO_BW40_SGI_LSB 8 2474 #define PCU_PPDU_SETUP_INIT_RESPONSE_TO_RESPONSE_RATE_INFO_BW40_SGI_MSB 9 2475 #define PCU_PPDU_SETUP_INIT_RESPONSE_TO_RESPONSE_RATE_INFO_BW40_SGI_MASK 0x0000000000000300 2476 2477 2478 /* Description RATE_MCS 2479 2480 For details, refer to MCS_TYPE description 2481 Note: This is "rate" in case of 11a/11b 2482 2483 <legal all> 2484 */ 2485 2486 #define PCU_PPDU_SETUP_INIT_RESPONSE_TO_RESPONSE_RATE_INFO_BW40_RATE_MCS_OFFSET 0x0000000000000038 2487 #define PCU_PPDU_SETUP_INIT_RESPONSE_TO_RESPONSE_RATE_INFO_BW40_RATE_MCS_LSB 10 2488 #define PCU_PPDU_SETUP_INIT_RESPONSE_TO_RESPONSE_RATE_INFO_BW40_RATE_MCS_MSB 13 2489 #define PCU_PPDU_SETUP_INIT_RESPONSE_TO_RESPONSE_RATE_INFO_BW40_RATE_MCS_MASK 0x0000000000003c00 2490 2491 2492 /* Description RESERVED_3B 2493 2494 <legal 0> 2495 */ 2496 2497 #define PCU_PPDU_SETUP_INIT_RESPONSE_TO_RESPONSE_RATE_INFO_BW40_RESERVED_3B_OFFSET 0x0000000000000038 2498 #define PCU_PPDU_SETUP_INIT_RESPONSE_TO_RESPONSE_RATE_INFO_BW40_RESERVED_3B_LSB 14 2499 #define PCU_PPDU_SETUP_INIT_RESPONSE_TO_RESPONSE_RATE_INFO_BW40_RESERVED_3B_MSB 15 2500 #define PCU_PPDU_SETUP_INIT_RESPONSE_TO_RESPONSE_RATE_INFO_BW40_RESERVED_3B_MASK 0x000000000000c000 2501 2502 2503 /* Description TX_PWR_1 2504 2505 Default (desired) transmit parameter for the second chain 2506 2507 2508 Transmit Power in s6.2 format. 2509 In units of 0.25 dBm 2510 2511 Note that there is no Min value for this 2512 <legal all> 2513 */ 2514 2515 #define PCU_PPDU_SETUP_INIT_RESPONSE_TO_RESPONSE_RATE_INFO_BW40_TX_PWR_1_OFFSET 0x0000000000000038 2516 #define PCU_PPDU_SETUP_INIT_RESPONSE_TO_RESPONSE_RATE_INFO_BW40_TX_PWR_1_LSB 16 2517 #define PCU_PPDU_SETUP_INIT_RESPONSE_TO_RESPONSE_RATE_INFO_BW40_TX_PWR_1_MSB 23 2518 #define PCU_PPDU_SETUP_INIT_RESPONSE_TO_RESPONSE_RATE_INFO_BW40_TX_PWR_1_MASK 0x0000000000ff0000 2519 2520 2521 /* Description ALT_TX_PWR_1 2522 2523 Alternate (desired) transmit parameter for the second chain 2524 2525 2526 Transmit Power in s6.2 format. 2527 In units of 0.25 dBm 2528 2529 Note that there is no Min value for this 2530 <legal all> 2531 */ 2532 2533 #define PCU_PPDU_SETUP_INIT_RESPONSE_TO_RESPONSE_RATE_INFO_BW40_ALT_TX_PWR_1_OFFSET 0x0000000000000038 2534 #define PCU_PPDU_SETUP_INIT_RESPONSE_TO_RESPONSE_RATE_INFO_BW40_ALT_TX_PWR_1_LSB 24 2535 #define PCU_PPDU_SETUP_INIT_RESPONSE_TO_RESPONSE_RATE_INFO_BW40_ALT_TX_PWR_1_MSB 31 2536 #define PCU_PPDU_SETUP_INIT_RESPONSE_TO_RESPONSE_RATE_INFO_BW40_ALT_TX_PWR_1_MASK 0x00000000ff000000 2537 2538 2539 /* Description AGGREGATION 2540 2541 Field only valid in case of pkt_type == 11n 2542 2543 <enum 0 mpdu> Indicates MPDU format. TXPCU will select 2544 this setting if the CBF response only contains a single 2545 segment 2546 <enum 1 a_mpdu> Indicates A-MPDU format. TXPCU will 2547 select this setting if the CBF response will contain two 2548 or more segments 2549 <legal 0-1> 2550 */ 2551 2552 #define PCU_PPDU_SETUP_INIT_RESPONSE_TO_RESPONSE_RATE_INFO_BW40_AGGREGATION_OFFSET 0x0000000000000038 2553 #define PCU_PPDU_SETUP_INIT_RESPONSE_TO_RESPONSE_RATE_INFO_BW40_AGGREGATION_LSB 32 2554 #define PCU_PPDU_SETUP_INIT_RESPONSE_TO_RESPONSE_RATE_INFO_BW40_AGGREGATION_MSB 32 2555 #define PCU_PPDU_SETUP_INIT_RESPONSE_TO_RESPONSE_RATE_INFO_BW40_AGGREGATION_MASK 0x0000000100000000 2556 2557 2558 /* Description DOT11AX_BSS_COLOR_ID 2559 2560 BSS color of the nextwork to which this STA belongs. 2561 When generated by TXPCU, this field is set equal to: Dot11ax_received_Bss_color_id 2562 2563 2564 <legal all> 2565 */ 2566 2567 #define PCU_PPDU_SETUP_INIT_RESPONSE_TO_RESPONSE_RATE_INFO_BW40_DOT11AX_BSS_COLOR_ID_OFFSET 0x0000000000000038 2568 #define PCU_PPDU_SETUP_INIT_RESPONSE_TO_RESPONSE_RATE_INFO_BW40_DOT11AX_BSS_COLOR_ID_LSB 33 2569 #define PCU_PPDU_SETUP_INIT_RESPONSE_TO_RESPONSE_RATE_INFO_BW40_DOT11AX_BSS_COLOR_ID_MSB 38 2570 #define PCU_PPDU_SETUP_INIT_RESPONSE_TO_RESPONSE_RATE_INFO_BW40_DOT11AX_BSS_COLOR_ID_MASK 0x0000007e00000000 2571 2572 2573 /* Description DOT11AX_SPATIAL_REUSE 2574 2575 This field is only valid for pkt_type == 11ax 2576 2577 Spatial re-use 2578 <legal all> 2579 */ 2580 2581 #define PCU_PPDU_SETUP_INIT_RESPONSE_TO_RESPONSE_RATE_INFO_BW40_DOT11AX_SPATIAL_REUSE_OFFSET 0x0000000000000038 2582 #define PCU_PPDU_SETUP_INIT_RESPONSE_TO_RESPONSE_RATE_INFO_BW40_DOT11AX_SPATIAL_REUSE_LSB 39 2583 #define PCU_PPDU_SETUP_INIT_RESPONSE_TO_RESPONSE_RATE_INFO_BW40_DOT11AX_SPATIAL_REUSE_MSB 42 2584 #define PCU_PPDU_SETUP_INIT_RESPONSE_TO_RESPONSE_RATE_INFO_BW40_DOT11AX_SPATIAL_REUSE_MASK 0x0000078000000000 2585 2586 2587 /* Description DOT11AX_CP_LTF_SIZE 2588 2589 field is only valid for pkt_type == 11ax 2590 2591 Indicates the CP and HE-LTF type 2592 2593 <enum 0 OneX_LTF_0_8CP> 1xLTF + 0.8 us CP 2594 <enum 1 TwoX_LTF_0_8CP> 2x LTF + 0.8 µs CP 2595 <enum 2 TwoX_LTF_1_6CP> 2x LTF + 1.6 µs CP 2596 <enum 3 FourX_LTF_0_8CP_3_2CP> 2597 When DCM == 0 OR STBC == 0: 4x LTF + 3.2 µs CP 2598 When DCM == 1 AND STBC == 1: 4x LTF + 0.8 µs CP. Note: 2599 In this scenario, Neither DCM nor STBC is applied to HE 2600 data field. 2601 2602 If ( DCM == 1 ) and ( MCS > 0 ) and (STBC == 0) 2603 0 = 1xLTF + 0.4 usec 2604 1 = 2xLTF + 0.4 usec 2605 2~3 = Reserved 2606 2607 <legal all> 2608 */ 2609 2610 #define PCU_PPDU_SETUP_INIT_RESPONSE_TO_RESPONSE_RATE_INFO_BW40_DOT11AX_CP_LTF_SIZE_OFFSET 0x0000000000000038 2611 #define PCU_PPDU_SETUP_INIT_RESPONSE_TO_RESPONSE_RATE_INFO_BW40_DOT11AX_CP_LTF_SIZE_LSB 43 2612 #define PCU_PPDU_SETUP_INIT_RESPONSE_TO_RESPONSE_RATE_INFO_BW40_DOT11AX_CP_LTF_SIZE_MSB 44 2613 #define PCU_PPDU_SETUP_INIT_RESPONSE_TO_RESPONSE_RATE_INFO_BW40_DOT11AX_CP_LTF_SIZE_MASK 0x0000180000000000 2614 2615 2616 /* Description DOT11AX_DCM 2617 2618 field is only valid for pkt_type == 11ax 2619 2620 Indicates whether dual sub-carrier modulation is applied 2621 2622 0: No DCM 2623 1:DCM 2624 <legal all> 2625 */ 2626 2627 #define PCU_PPDU_SETUP_INIT_RESPONSE_TO_RESPONSE_RATE_INFO_BW40_DOT11AX_DCM_OFFSET 0x0000000000000038 2628 #define PCU_PPDU_SETUP_INIT_RESPONSE_TO_RESPONSE_RATE_INFO_BW40_DOT11AX_DCM_LSB 45 2629 #define PCU_PPDU_SETUP_INIT_RESPONSE_TO_RESPONSE_RATE_INFO_BW40_DOT11AX_DCM_MSB 45 2630 #define PCU_PPDU_SETUP_INIT_RESPONSE_TO_RESPONSE_RATE_INFO_BW40_DOT11AX_DCM_MASK 0x0000200000000000 2631 2632 2633 /* Description DOT11AX_DOPPLER_INDICATION 2634 2635 field is only valid for pkt_type == 11ax 2636 2637 0: No Doppler support 2638 1: Doppler support 2639 <legal all> 2640 */ 2641 2642 #define PCU_PPDU_SETUP_INIT_RESPONSE_TO_RESPONSE_RATE_INFO_BW40_DOT11AX_DOPPLER_INDICATION_OFFSET 0x0000000000000038 2643 #define PCU_PPDU_SETUP_INIT_RESPONSE_TO_RESPONSE_RATE_INFO_BW40_DOT11AX_DOPPLER_INDICATION_LSB 46 2644 #define PCU_PPDU_SETUP_INIT_RESPONSE_TO_RESPONSE_RATE_INFO_BW40_DOT11AX_DOPPLER_INDICATION_MSB 46 2645 #define PCU_PPDU_SETUP_INIT_RESPONSE_TO_RESPONSE_RATE_INFO_BW40_DOT11AX_DOPPLER_INDICATION_MASK 0x0000400000000000 2646 2647 2648 /* Description DOT11AX_SU_EXTENDED 2649 2650 field is only valid for pkt_type == 11ax OR pkt_type == 2651 11be 2652 2653 When set, the 11ax or 11be frame is of the extended range 2654 format 2655 <legal all> 2656 */ 2657 2658 #define PCU_PPDU_SETUP_INIT_RESPONSE_TO_RESPONSE_RATE_INFO_BW40_DOT11AX_SU_EXTENDED_OFFSET 0x0000000000000038 2659 #define PCU_PPDU_SETUP_INIT_RESPONSE_TO_RESPONSE_RATE_INFO_BW40_DOT11AX_SU_EXTENDED_LSB 47 2660 #define PCU_PPDU_SETUP_INIT_RESPONSE_TO_RESPONSE_RATE_INFO_BW40_DOT11AX_SU_EXTENDED_MSB 47 2661 #define PCU_PPDU_SETUP_INIT_RESPONSE_TO_RESPONSE_RATE_INFO_BW40_DOT11AX_SU_EXTENDED_MASK 0x0000800000000000 2662 2663 2664 /* Description DOT11AX_MIN_PACKET_EXTENSION 2665 2666 field is only valid for pkt_type == 11ax OR pkt_type == 2667 11be 2668 2669 The min packet extension duration for this user. 2670 0: no extension 2671 1: 8us 2672 2: 16 us 2673 3: 20 us (only for .11be) 2674 <legal 0-3> 2675 */ 2676 2677 #define PCU_PPDU_SETUP_INIT_RESPONSE_TO_RESPONSE_RATE_INFO_BW40_DOT11AX_MIN_PACKET_EXTENSION_OFFSET 0x0000000000000038 2678 #define PCU_PPDU_SETUP_INIT_RESPONSE_TO_RESPONSE_RATE_INFO_BW40_DOT11AX_MIN_PACKET_EXTENSION_LSB 48 2679 #define PCU_PPDU_SETUP_INIT_RESPONSE_TO_RESPONSE_RATE_INFO_BW40_DOT11AX_MIN_PACKET_EXTENSION_MSB 49 2680 #define PCU_PPDU_SETUP_INIT_RESPONSE_TO_RESPONSE_RATE_INFO_BW40_DOT11AX_MIN_PACKET_EXTENSION_MASK 0x0003000000000000 2681 2682 2683 /* Description DOT11AX_PE_NSS 2684 2685 Number of active spatial streams during packet extension. 2686 2687 2688 <enum 0 1_spatial_stream>Single spatial stream 2689 <enum 1 2_spatial_streams>2 spatial streams 2690 <enum 2 3_spatial_streams>3 spatial streams 2691 <enum 3 4_spatial_streams>4 spatial streams 2692 <enum 4 5_spatial_streams>5 spatial streams 2693 <enum 5 6_spatial_streams>6 spatial streams 2694 <enum 6 7_spatial_streams>7 spatial streams 2695 <enum 7 8_spatial_streams>8 spatial streams 2696 */ 2697 2698 #define PCU_PPDU_SETUP_INIT_RESPONSE_TO_RESPONSE_RATE_INFO_BW40_DOT11AX_PE_NSS_OFFSET 0x0000000000000038 2699 #define PCU_PPDU_SETUP_INIT_RESPONSE_TO_RESPONSE_RATE_INFO_BW40_DOT11AX_PE_NSS_LSB 50 2700 #define PCU_PPDU_SETUP_INIT_RESPONSE_TO_RESPONSE_RATE_INFO_BW40_DOT11AX_PE_NSS_MSB 52 2701 #define PCU_PPDU_SETUP_INIT_RESPONSE_TO_RESPONSE_RATE_INFO_BW40_DOT11AX_PE_NSS_MASK 0x001c000000000000 2702 2703 2704 /* Description DOT11AX_PE_CONTENT 2705 2706 Content of packet extension. Valid for all 11ax packets 2707 having packet extension 2708 2709 0-he_ltf, 1-last_data_symbol 2710 <legal all> 2711 */ 2712 2713 #define PCU_PPDU_SETUP_INIT_RESPONSE_TO_RESPONSE_RATE_INFO_BW40_DOT11AX_PE_CONTENT_OFFSET 0x0000000000000038 2714 #define PCU_PPDU_SETUP_INIT_RESPONSE_TO_RESPONSE_RATE_INFO_BW40_DOT11AX_PE_CONTENT_LSB 53 2715 #define PCU_PPDU_SETUP_INIT_RESPONSE_TO_RESPONSE_RATE_INFO_BW40_DOT11AX_PE_CONTENT_MSB 53 2716 #define PCU_PPDU_SETUP_INIT_RESPONSE_TO_RESPONSE_RATE_INFO_BW40_DOT11AX_PE_CONTENT_MASK 0x0020000000000000 2717 2718 2719 /* Description DOT11AX_PE_LTF_SIZE 2720 2721 LTF size to be used during packet extention. . This field 2722 is valid for both FTM and non-FTM packets. 2723 0-1x 2724 1-2x (unsupported un HWK-1) 2725 2-4x (unsupported un HWK-1) 2726 <legal all> 2727 */ 2728 2729 #define PCU_PPDU_SETUP_INIT_RESPONSE_TO_RESPONSE_RATE_INFO_BW40_DOT11AX_PE_LTF_SIZE_OFFSET 0x0000000000000038 2730 #define PCU_PPDU_SETUP_INIT_RESPONSE_TO_RESPONSE_RATE_INFO_BW40_DOT11AX_PE_LTF_SIZE_LSB 54 2731 #define PCU_PPDU_SETUP_INIT_RESPONSE_TO_RESPONSE_RATE_INFO_BW40_DOT11AX_PE_LTF_SIZE_MSB 55 2732 #define PCU_PPDU_SETUP_INIT_RESPONSE_TO_RESPONSE_RATE_INFO_BW40_DOT11AX_PE_LTF_SIZE_MASK 0x00c0000000000000 2733 2734 2735 /* Description DOT11AX_CHAIN_CSD_EN 2736 2737 This field denotes whether to apply CSD on the preamble 2738 and data portion of the packet. This field is valid for 2739 all transmit packets 2740 0: disable per-chain csd 2741 1: enable per-chain csd 2742 <legal all> 2743 */ 2744 2745 #define PCU_PPDU_SETUP_INIT_RESPONSE_TO_RESPONSE_RATE_INFO_BW40_DOT11AX_CHAIN_CSD_EN_OFFSET 0x0000000000000038 2746 #define PCU_PPDU_SETUP_INIT_RESPONSE_TO_RESPONSE_RATE_INFO_BW40_DOT11AX_CHAIN_CSD_EN_LSB 56 2747 #define PCU_PPDU_SETUP_INIT_RESPONSE_TO_RESPONSE_RATE_INFO_BW40_DOT11AX_CHAIN_CSD_EN_MSB 56 2748 #define PCU_PPDU_SETUP_INIT_RESPONSE_TO_RESPONSE_RATE_INFO_BW40_DOT11AX_CHAIN_CSD_EN_MASK 0x0100000000000000 2749 2750 2751 /* Description DOT11AX_PE_CHAIN_CSD_EN 2752 2753 This field denotes whether to apply CSD on the packet extension 2754 portion of the packet. This field is valid for all 11ax 2755 packets. 2756 0: disable per-chain csd 2757 1: enable per-chain csd 2758 <legal all> 2759 */ 2760 2761 #define PCU_PPDU_SETUP_INIT_RESPONSE_TO_RESPONSE_RATE_INFO_BW40_DOT11AX_PE_CHAIN_CSD_EN_OFFSET 0x0000000000000038 2762 #define PCU_PPDU_SETUP_INIT_RESPONSE_TO_RESPONSE_RATE_INFO_BW40_DOT11AX_PE_CHAIN_CSD_EN_LSB 57 2763 #define PCU_PPDU_SETUP_INIT_RESPONSE_TO_RESPONSE_RATE_INFO_BW40_DOT11AX_PE_CHAIN_CSD_EN_MSB 57 2764 #define PCU_PPDU_SETUP_INIT_RESPONSE_TO_RESPONSE_RATE_INFO_BW40_DOT11AX_PE_CHAIN_CSD_EN_MASK 0x0200000000000000 2765 2766 2767 /* Description DOT11AX_DL_UL_FLAG 2768 2769 field is only valid for pkt_type == 11ax 2770 2771 <enum 0 DL_UL_FLAG_IS_DL_OR_TDLS> 2772 <enum 1 DL_UL_FLAG_IS_UL> 2773 2774 <legal all> 2775 */ 2776 2777 #define PCU_PPDU_SETUP_INIT_RESPONSE_TO_RESPONSE_RATE_INFO_BW40_DOT11AX_DL_UL_FLAG_OFFSET 0x0000000000000038 2778 #define PCU_PPDU_SETUP_INIT_RESPONSE_TO_RESPONSE_RATE_INFO_BW40_DOT11AX_DL_UL_FLAG_LSB 58 2779 #define PCU_PPDU_SETUP_INIT_RESPONSE_TO_RESPONSE_RATE_INFO_BW40_DOT11AX_DL_UL_FLAG_MSB 58 2780 #define PCU_PPDU_SETUP_INIT_RESPONSE_TO_RESPONSE_RATE_INFO_BW40_DOT11AX_DL_UL_FLAG_MASK 0x0400000000000000 2781 2782 2783 /* Description RESERVED_4A 2784 2785 <legal 0> 2786 */ 2787 2788 #define PCU_PPDU_SETUP_INIT_RESPONSE_TO_RESPONSE_RATE_INFO_BW40_RESERVED_4A_OFFSET 0x0000000000000038 2789 #define PCU_PPDU_SETUP_INIT_RESPONSE_TO_RESPONSE_RATE_INFO_BW40_RESERVED_4A_LSB 59 2790 #define PCU_PPDU_SETUP_INIT_RESPONSE_TO_RESPONSE_RATE_INFO_BW40_RESERVED_4A_MSB 63 2791 #define PCU_PPDU_SETUP_INIT_RESPONSE_TO_RESPONSE_RATE_INFO_BW40_RESERVED_4A_MASK 0xf800000000000000 2792 2793 2794 /* Description DOT11AX_EXT_RU_START_INDEX 2795 2796 field is only valid for pkt_type == 11ax and Dot11ax_su_extended 2797 == 1 2798 2799 RU Number to which User is assigned 2800 2801 The RU numbering bitwidth is only enough to cover the 20MHz 2802 BW that extended range allows 2803 <legal 0-8> 2804 */ 2805 2806 #define PCU_PPDU_SETUP_INIT_RESPONSE_TO_RESPONSE_RATE_INFO_BW40_DOT11AX_EXT_RU_START_INDEX_OFFSET 0x0000000000000040 2807 #define PCU_PPDU_SETUP_INIT_RESPONSE_TO_RESPONSE_RATE_INFO_BW40_DOT11AX_EXT_RU_START_INDEX_LSB 0 2808 #define PCU_PPDU_SETUP_INIT_RESPONSE_TO_RESPONSE_RATE_INFO_BW40_DOT11AX_EXT_RU_START_INDEX_MSB 3 2809 #define PCU_PPDU_SETUP_INIT_RESPONSE_TO_RESPONSE_RATE_INFO_BW40_DOT11AX_EXT_RU_START_INDEX_MASK 0x000000000000000f 2810 2811 2812 /* Description DOT11AX_EXT_RU_SIZE 2813 2814 field is only valid for pkt_type == 11ax and Dot11ax_su_extended 2815 == 1 or pkt_type == 11be and EHT_duplicate_mode == 1 2816 2817 The size of the RU for this user. 2818 2819 In case of EHT duplicate transmissions, this field indicates 2820 the width of the actual content before duplication, e.g. 2821 a 40 MHz PPDU duplicated to 160 MHz will have the bandwidth 2822 fields indicating 160 MHz and this field set to e-num 4 2823 (RU_484). 2824 2825 <enum 0 RU_26> 2826 <enum 1 RU_52> 2827 <enum 2 RU_106> 2828 <enum 3 RU_242> 2829 <enum 4 RU_484> 2830 <enum 5 RU_996> 2831 <enum 6 RU_1992> 2832 <enum 7 RU_FULLBW> Set when the RU occupies the full packet 2833 bandwidth 2834 <enum 8 RU_FULLBW_240> Set when the RU occupies the full 2835 packet bandwidth 2836 <enum 9 RU_FULLBW_320> Set when the RU occupies the full 2837 packet bandwidth 2838 <enum 10 RU_MULTI_LARGE> DO NOT USE 2839 <enum 11 RU_78> DO NOT USE 2840 <enum 12 RU_132> DO NOT USE 2841 <legal 0-12> 2842 */ 2843 2844 #define PCU_PPDU_SETUP_INIT_RESPONSE_TO_RESPONSE_RATE_INFO_BW40_DOT11AX_EXT_RU_SIZE_OFFSET 0x0000000000000040 2845 #define PCU_PPDU_SETUP_INIT_RESPONSE_TO_RESPONSE_RATE_INFO_BW40_DOT11AX_EXT_RU_SIZE_LSB 4 2846 #define PCU_PPDU_SETUP_INIT_RESPONSE_TO_RESPONSE_RATE_INFO_BW40_DOT11AX_EXT_RU_SIZE_MSB 7 2847 #define PCU_PPDU_SETUP_INIT_RESPONSE_TO_RESPONSE_RATE_INFO_BW40_DOT11AX_EXT_RU_SIZE_MASK 0x00000000000000f0 2848 2849 2850 /* Description EHT_DUPLICATE_MODE 2851 2852 Field only valid for pkt_type == 11be 2853 2854 Indicates EHT duplicate modulation 2855 2856 <enum 0 eht_no_duplicate> 2857 <enum 1 eht_2x_duplicate> 2858 <enum 2 eht_4x_duplicate> 2859 2860 <legal 0-2> 2861 */ 2862 2863 #define PCU_PPDU_SETUP_INIT_RESPONSE_TO_RESPONSE_RATE_INFO_BW40_EHT_DUPLICATE_MODE_OFFSET 0x0000000000000040 2864 #define PCU_PPDU_SETUP_INIT_RESPONSE_TO_RESPONSE_RATE_INFO_BW40_EHT_DUPLICATE_MODE_LSB 8 2865 #define PCU_PPDU_SETUP_INIT_RESPONSE_TO_RESPONSE_RATE_INFO_BW40_EHT_DUPLICATE_MODE_MSB 9 2866 #define PCU_PPDU_SETUP_INIT_RESPONSE_TO_RESPONSE_RATE_INFO_BW40_EHT_DUPLICATE_MODE_MASK 0x0000000000000300 2867 2868 2869 /* Description HE_SIGB_DCM 2870 2871 Indicates whether dual sub-carrier modulation is applied 2872 to EHT-SIG 2873 <legal all> 2874 */ 2875 2876 #define PCU_PPDU_SETUP_INIT_RESPONSE_TO_RESPONSE_RATE_INFO_BW40_HE_SIGB_DCM_OFFSET 0x0000000000000040 2877 #define PCU_PPDU_SETUP_INIT_RESPONSE_TO_RESPONSE_RATE_INFO_BW40_HE_SIGB_DCM_LSB 10 2878 #define PCU_PPDU_SETUP_INIT_RESPONSE_TO_RESPONSE_RATE_INFO_BW40_HE_SIGB_DCM_MSB 10 2879 #define PCU_PPDU_SETUP_INIT_RESPONSE_TO_RESPONSE_RATE_INFO_BW40_HE_SIGB_DCM_MASK 0x0000000000000400 2880 2881 2882 /* Description HE_SIGB_0_MCS 2883 2884 Indicates the MCS of EHT-SIG 2885 2886 For details, refer to MCS_TYPE description 2887 <legal all> 2888 */ 2889 2890 #define PCU_PPDU_SETUP_INIT_RESPONSE_TO_RESPONSE_RATE_INFO_BW40_HE_SIGB_0_MCS_OFFSET 0x0000000000000040 2891 #define PCU_PPDU_SETUP_INIT_RESPONSE_TO_RESPONSE_RATE_INFO_BW40_HE_SIGB_0_MCS_LSB 11 2892 #define PCU_PPDU_SETUP_INIT_RESPONSE_TO_RESPONSE_RATE_INFO_BW40_HE_SIGB_0_MCS_MSB 13 2893 #define PCU_PPDU_SETUP_INIT_RESPONSE_TO_RESPONSE_RATE_INFO_BW40_HE_SIGB_0_MCS_MASK 0x0000000000003800 2894 2895 2896 /* Description NUM_HE_SIGB_SYM 2897 2898 Indicates the number of EHT-SIG symbols 2899 2900 This field is 0-based with 0 indicating that 1 eht_sig symbol 2901 needs to be transmitted. 2902 <legal all> 2903 */ 2904 2905 #define PCU_PPDU_SETUP_INIT_RESPONSE_TO_RESPONSE_RATE_INFO_BW40_NUM_HE_SIGB_SYM_OFFSET 0x0000000000000040 2906 #define PCU_PPDU_SETUP_INIT_RESPONSE_TO_RESPONSE_RATE_INFO_BW40_NUM_HE_SIGB_SYM_LSB 14 2907 #define PCU_PPDU_SETUP_INIT_RESPONSE_TO_RESPONSE_RATE_INFO_BW40_NUM_HE_SIGB_SYM_MSB 18 2908 #define PCU_PPDU_SETUP_INIT_RESPONSE_TO_RESPONSE_RATE_INFO_BW40_NUM_HE_SIGB_SYM_MASK 0x000000000007c000 2909 2910 2911 /* Description REQUIRED_RESPONSE_TIME_SOURCE 2912 2913 <enum 0 reqd_resp_time_src_is_RXPCU> Typically from received 2914 HT Control for sync MLO response 2915 <enum 1 reqd_resp_time_src_is_FW> 2916 Typically from 'PCU_PPDU_SETUP_INIT' for sync MLO response 2917 to response 2918 <legal all> 2919 */ 2920 2921 #define PCU_PPDU_SETUP_INIT_RESPONSE_TO_RESPONSE_RATE_INFO_BW40_REQUIRED_RESPONSE_TIME_SOURCE_OFFSET 0x0000000000000040 2922 #define PCU_PPDU_SETUP_INIT_RESPONSE_TO_RESPONSE_RATE_INFO_BW40_REQUIRED_RESPONSE_TIME_SOURCE_LSB 19 2923 #define PCU_PPDU_SETUP_INIT_RESPONSE_TO_RESPONSE_RATE_INFO_BW40_REQUIRED_RESPONSE_TIME_SOURCE_MSB 19 2924 #define PCU_PPDU_SETUP_INIT_RESPONSE_TO_RESPONSE_RATE_INFO_BW40_REQUIRED_RESPONSE_TIME_SOURCE_MASK 0x0000000000080000 2925 2926 2927 /* Description RESERVED_5A 2928 2929 <legal 0> 2930 */ 2931 2932 #define PCU_PPDU_SETUP_INIT_RESPONSE_TO_RESPONSE_RATE_INFO_BW40_RESERVED_5A_OFFSET 0x0000000000000040 2933 #define PCU_PPDU_SETUP_INIT_RESPONSE_TO_RESPONSE_RATE_INFO_BW40_RESERVED_5A_LSB 20 2934 #define PCU_PPDU_SETUP_INIT_RESPONSE_TO_RESPONSE_RATE_INFO_BW40_RESERVED_5A_MSB 25 2935 #define PCU_PPDU_SETUP_INIT_RESPONSE_TO_RESPONSE_RATE_INFO_BW40_RESERVED_5A_MASK 0x0000000003f00000 2936 2937 2938 /* Description U_SIG_PUNCTURE_PATTERN_ENCODING 2939 2940 6-bit value copied from 'RX_RESPONSE_REQUIRED_INFO' and 'TX_CBF_INFO' 2941 to pass on to PDG 2942 <legal 0-29> 2943 */ 2944 2945 #define PCU_PPDU_SETUP_INIT_RESPONSE_TO_RESPONSE_RATE_INFO_BW40_U_SIG_PUNCTURE_PATTERN_ENCODING_OFFSET 0x0000000000000040 2946 #define PCU_PPDU_SETUP_INIT_RESPONSE_TO_RESPONSE_RATE_INFO_BW40_U_SIG_PUNCTURE_PATTERN_ENCODING_LSB 26 2947 #define PCU_PPDU_SETUP_INIT_RESPONSE_TO_RESPONSE_RATE_INFO_BW40_U_SIG_PUNCTURE_PATTERN_ENCODING_MSB 31 2948 #define PCU_PPDU_SETUP_INIT_RESPONSE_TO_RESPONSE_RATE_INFO_BW40_U_SIG_PUNCTURE_PATTERN_ENCODING_MASK 0x00000000fc000000 2949 2950 2951 /* Description MLO_STA_ID_DETAILS_RX 2952 2953 16-bi value copied from 'RX_RESPONSE_REQUIRED_INFO' to pass 2954 on to PDG 2955 2956 Bits 10 and 11 are not valid, bits [9:0] reflect 'NSTR_MLO_STA_ID' 2957 from address search. 2958 2959 See definition of mlo_sta_id_details. 2960 */ 2961 2962 2963 /* Description NSTR_MLO_STA_ID 2964 2965 ID of peer participating in non-STR MLO 2966 */ 2967 2968 #define PCU_PPDU_SETUP_INIT_RESPONSE_TO_RESPONSE_RATE_INFO_BW40_MLO_STA_ID_DETAILS_RX_NSTR_MLO_STA_ID_OFFSET 0x0000000000000040 2969 #define PCU_PPDU_SETUP_INIT_RESPONSE_TO_RESPONSE_RATE_INFO_BW40_MLO_STA_ID_DETAILS_RX_NSTR_MLO_STA_ID_LSB 32 2970 #define PCU_PPDU_SETUP_INIT_RESPONSE_TO_RESPONSE_RATE_INFO_BW40_MLO_STA_ID_DETAILS_RX_NSTR_MLO_STA_ID_MSB 41 2971 #define PCU_PPDU_SETUP_INIT_RESPONSE_TO_RESPONSE_RATE_INFO_BW40_MLO_STA_ID_DETAILS_RX_NSTR_MLO_STA_ID_MASK 0x000003ff00000000 2972 2973 2974 /* Description BLOCK_SELF_ML_SYNC 2975 2976 Only valid for TX 2977 2978 When set, this provides an indication to block the peer 2979 for self-link. 2980 */ 2981 2982 #define PCU_PPDU_SETUP_INIT_RESPONSE_TO_RESPONSE_RATE_INFO_BW40_MLO_STA_ID_DETAILS_RX_BLOCK_SELF_ML_SYNC_OFFSET 0x0000000000000040 2983 #define PCU_PPDU_SETUP_INIT_RESPONSE_TO_RESPONSE_RATE_INFO_BW40_MLO_STA_ID_DETAILS_RX_BLOCK_SELF_ML_SYNC_LSB 42 2984 #define PCU_PPDU_SETUP_INIT_RESPONSE_TO_RESPONSE_RATE_INFO_BW40_MLO_STA_ID_DETAILS_RX_BLOCK_SELF_ML_SYNC_MSB 42 2985 #define PCU_PPDU_SETUP_INIT_RESPONSE_TO_RESPONSE_RATE_INFO_BW40_MLO_STA_ID_DETAILS_RX_BLOCK_SELF_ML_SYNC_MASK 0x0000040000000000 2986 2987 2988 /* Description BLOCK_PARTNER_ML_SYNC 2989 2990 Only valid for TX 2991 2992 When set, this provides an indication to block the peer 2993 for partner links. 2994 */ 2995 2996 #define PCU_PPDU_SETUP_INIT_RESPONSE_TO_RESPONSE_RATE_INFO_BW40_MLO_STA_ID_DETAILS_RX_BLOCK_PARTNER_ML_SYNC_OFFSET 0x0000000000000040 2997 #define PCU_PPDU_SETUP_INIT_RESPONSE_TO_RESPONSE_RATE_INFO_BW40_MLO_STA_ID_DETAILS_RX_BLOCK_PARTNER_ML_SYNC_LSB 43 2998 #define PCU_PPDU_SETUP_INIT_RESPONSE_TO_RESPONSE_RATE_INFO_BW40_MLO_STA_ID_DETAILS_RX_BLOCK_PARTNER_ML_SYNC_MSB 43 2999 #define PCU_PPDU_SETUP_INIT_RESPONSE_TO_RESPONSE_RATE_INFO_BW40_MLO_STA_ID_DETAILS_RX_BLOCK_PARTNER_ML_SYNC_MASK 0x0000080000000000 3000 3001 3002 /* Description NSTR_MLO_STA_ID_VALID 3003 3004 All the fields in this TLV are valid only if this bit is 3005 set. 3006 */ 3007 3008 #define PCU_PPDU_SETUP_INIT_RESPONSE_TO_RESPONSE_RATE_INFO_BW40_MLO_STA_ID_DETAILS_RX_NSTR_MLO_STA_ID_VALID_OFFSET 0x0000000000000040 3009 #define PCU_PPDU_SETUP_INIT_RESPONSE_TO_RESPONSE_RATE_INFO_BW40_MLO_STA_ID_DETAILS_RX_NSTR_MLO_STA_ID_VALID_LSB 44 3010 #define PCU_PPDU_SETUP_INIT_RESPONSE_TO_RESPONSE_RATE_INFO_BW40_MLO_STA_ID_DETAILS_RX_NSTR_MLO_STA_ID_VALID_MSB 44 3011 #define PCU_PPDU_SETUP_INIT_RESPONSE_TO_RESPONSE_RATE_INFO_BW40_MLO_STA_ID_DETAILS_RX_NSTR_MLO_STA_ID_VALID_MASK 0x0000100000000000 3012 3013 3014 /* Description RESERVED_0A 3015 3016 <legal 0> 3017 */ 3018 3019 #define PCU_PPDU_SETUP_INIT_RESPONSE_TO_RESPONSE_RATE_INFO_BW40_MLO_STA_ID_DETAILS_RX_RESERVED_0A_OFFSET 0x0000000000000040 3020 #define PCU_PPDU_SETUP_INIT_RESPONSE_TO_RESPONSE_RATE_INFO_BW40_MLO_STA_ID_DETAILS_RX_RESERVED_0A_LSB 45 3021 #define PCU_PPDU_SETUP_INIT_RESPONSE_TO_RESPONSE_RATE_INFO_BW40_MLO_STA_ID_DETAILS_RX_RESERVED_0A_MSB 47 3022 #define PCU_PPDU_SETUP_INIT_RESPONSE_TO_RESPONSE_RATE_INFO_BW40_MLO_STA_ID_DETAILS_RX_RESERVED_0A_MASK 0x0000e00000000000 3023 3024 3025 /* Description REQUIRED_RESPONSE_TIME 3026 3027 When non-zero, indicates that PDG shall pad the response 3028 transmission to the indicated duration (in us) 3029 */ 3030 3031 #define PCU_PPDU_SETUP_INIT_RESPONSE_TO_RESPONSE_RATE_INFO_BW40_REQUIRED_RESPONSE_TIME_OFFSET 0x0000000000000040 3032 #define PCU_PPDU_SETUP_INIT_RESPONSE_TO_RESPONSE_RATE_INFO_BW40_REQUIRED_RESPONSE_TIME_LSB 48 3033 #define PCU_PPDU_SETUP_INIT_RESPONSE_TO_RESPONSE_RATE_INFO_BW40_REQUIRED_RESPONSE_TIME_MSB 59 3034 #define PCU_PPDU_SETUP_INIT_RESPONSE_TO_RESPONSE_RATE_INFO_BW40_REQUIRED_RESPONSE_TIME_MASK 0x0fff000000000000 3035 3036 3037 /* Description DOT11BE_PARAMS_PLACEHOLDER 3038 3039 4 bytes for use as placeholders for 'Dot11be_*' parameters 3040 3041 */ 3042 3043 #define PCU_PPDU_SETUP_INIT_RESPONSE_TO_RESPONSE_RATE_INFO_BW40_DOT11BE_PARAMS_PLACEHOLDER_OFFSET 0x0000000000000040 3044 #define PCU_PPDU_SETUP_INIT_RESPONSE_TO_RESPONSE_RATE_INFO_BW40_DOT11BE_PARAMS_PLACEHOLDER_LSB 60 3045 #define PCU_PPDU_SETUP_INIT_RESPONSE_TO_RESPONSE_RATE_INFO_BW40_DOT11BE_PARAMS_PLACEHOLDER_MSB 63 3046 #define PCU_PPDU_SETUP_INIT_RESPONSE_TO_RESPONSE_RATE_INFO_BW40_DOT11BE_PARAMS_PLACEHOLDER_MASK 0xf000000000000000 3047 3048 3049 /* Description RESPONSE_TO_RESPONSE_RATE_INFO_BW80 3050 3051 Field only valid in case of Response_to_response set to 3052 SU_BA or MU_BA 3053 3054 NOTE: This field is also known as response_to_response_rate_info_pattern_2 3055 in case punctured transmission is enabled. 3056 3057 Used by TXPCU to determine what the transmit rates are for 3058 the response to response transmission in case original 3059 transmission was 80 MHz. 3060 3061 Note: 3062 see field R2R_bw80_active_channel for the BW of this transmission 3063 3064 */ 3065 3066 3067 /* Description RESERVED_0A 3068 3069 3070 <legal 0> 3071 */ 3072 3073 #define PCU_PPDU_SETUP_INIT_RESPONSE_TO_RESPONSE_RATE_INFO_BW80_RESERVED_0A_OFFSET 0x0000000000000048 3074 #define PCU_PPDU_SETUP_INIT_RESPONSE_TO_RESPONSE_RATE_INFO_BW80_RESERVED_0A_LSB 0 3075 #define PCU_PPDU_SETUP_INIT_RESPONSE_TO_RESPONSE_RATE_INFO_BW80_RESERVED_0A_MSB 0 3076 #define PCU_PPDU_SETUP_INIT_RESPONSE_TO_RESPONSE_RATE_INFO_BW80_RESERVED_0A_MASK 0x0000000000000001 3077 3078 3079 /* Description TX_ANTENNA_SECTOR_CTRL 3080 3081 Sectored transmit antenna 3082 <legal all> 3083 */ 3084 3085 #define PCU_PPDU_SETUP_INIT_RESPONSE_TO_RESPONSE_RATE_INFO_BW80_TX_ANTENNA_SECTOR_CTRL_OFFSET 0x0000000000000048 3086 #define PCU_PPDU_SETUP_INIT_RESPONSE_TO_RESPONSE_RATE_INFO_BW80_TX_ANTENNA_SECTOR_CTRL_LSB 1 3087 #define PCU_PPDU_SETUP_INIT_RESPONSE_TO_RESPONSE_RATE_INFO_BW80_TX_ANTENNA_SECTOR_CTRL_MSB 24 3088 #define PCU_PPDU_SETUP_INIT_RESPONSE_TO_RESPONSE_RATE_INFO_BW80_TX_ANTENNA_SECTOR_CTRL_MASK 0x0000000001fffffe 3089 3090 3091 /* Description PKT_TYPE 3092 3093 Packet type: 3094 <enum 0 dot11a>802.11a PPDU type 3095 <enum 1 dot11b>802.11b PPDU type 3096 <enum 2 dot11n_mm>802.11n Mixed Mode PPDU type 3097 <enum 3 dot11ac>802.11ac PPDU type 3098 <enum 4 dot11ax>802.11ax PPDU type 3099 <enum 5 dot11ba>802.11ba (WUR) PPDU type 3100 <enum 6 dot11be>802.11be PPDU type 3101 <enum 7 dot11az>802.11az (ranging) PPDU type 3102 <enum 8 dot11n_gf>802.11n Green Field PPDU type (unsupported 3103 & aborted) 3104 */ 3105 3106 #define PCU_PPDU_SETUP_INIT_RESPONSE_TO_RESPONSE_RATE_INFO_BW80_PKT_TYPE_OFFSET 0x0000000000000048 3107 #define PCU_PPDU_SETUP_INIT_RESPONSE_TO_RESPONSE_RATE_INFO_BW80_PKT_TYPE_LSB 25 3108 #define PCU_PPDU_SETUP_INIT_RESPONSE_TO_RESPONSE_RATE_INFO_BW80_PKT_TYPE_MSB 28 3109 #define PCU_PPDU_SETUP_INIT_RESPONSE_TO_RESPONSE_RATE_INFO_BW80_PKT_TYPE_MASK 0x000000001e000000 3110 3111 3112 /* Description SMOOTHING 3113 3114 This field is used by PDG to populate the SMOOTHING filed 3115 in the SIG Preamble of the PPDU 3116 <legal 0-1> 3117 */ 3118 3119 #define PCU_PPDU_SETUP_INIT_RESPONSE_TO_RESPONSE_RATE_INFO_BW80_SMOOTHING_OFFSET 0x0000000000000048 3120 #define PCU_PPDU_SETUP_INIT_RESPONSE_TO_RESPONSE_RATE_INFO_BW80_SMOOTHING_LSB 29 3121 #define PCU_PPDU_SETUP_INIT_RESPONSE_TO_RESPONSE_RATE_INFO_BW80_SMOOTHING_MSB 29 3122 #define PCU_PPDU_SETUP_INIT_RESPONSE_TO_RESPONSE_RATE_INFO_BW80_SMOOTHING_MASK 0x0000000020000000 3123 3124 3125 /* Description LDPC 3126 3127 When set, use LDPC transmission rates 3128 */ 3129 3130 #define PCU_PPDU_SETUP_INIT_RESPONSE_TO_RESPONSE_RATE_INFO_BW80_LDPC_OFFSET 0x0000000000000048 3131 #define PCU_PPDU_SETUP_INIT_RESPONSE_TO_RESPONSE_RATE_INFO_BW80_LDPC_LSB 30 3132 #define PCU_PPDU_SETUP_INIT_RESPONSE_TO_RESPONSE_RATE_INFO_BW80_LDPC_MSB 30 3133 #define PCU_PPDU_SETUP_INIT_RESPONSE_TO_RESPONSE_RATE_INFO_BW80_LDPC_MASK 0x0000000040000000 3134 3135 3136 /* Description STBC 3137 3138 When set, use STBC transmission rates 3139 */ 3140 3141 #define PCU_PPDU_SETUP_INIT_RESPONSE_TO_RESPONSE_RATE_INFO_BW80_STBC_OFFSET 0x0000000000000048 3142 #define PCU_PPDU_SETUP_INIT_RESPONSE_TO_RESPONSE_RATE_INFO_BW80_STBC_LSB 31 3143 #define PCU_PPDU_SETUP_INIT_RESPONSE_TO_RESPONSE_RATE_INFO_BW80_STBC_MSB 31 3144 #define PCU_PPDU_SETUP_INIT_RESPONSE_TO_RESPONSE_RATE_INFO_BW80_STBC_MASK 0x0000000080000000 3145 3146 3147 /* Description ALT_TX_PWR 3148 3149 Coex related AlternativeTransmit parameter 3150 3151 Transmit Power in s6.2 format. 3152 In units of 0.25 dBm 3153 <legal all> 3154 */ 3155 3156 #define PCU_PPDU_SETUP_INIT_RESPONSE_TO_RESPONSE_RATE_INFO_BW80_ALT_TX_PWR_OFFSET 0x0000000000000048 3157 #define PCU_PPDU_SETUP_INIT_RESPONSE_TO_RESPONSE_RATE_INFO_BW80_ALT_TX_PWR_LSB 32 3158 #define PCU_PPDU_SETUP_INIT_RESPONSE_TO_RESPONSE_RATE_INFO_BW80_ALT_TX_PWR_MSB 39 3159 #define PCU_PPDU_SETUP_INIT_RESPONSE_TO_RESPONSE_RATE_INFO_BW80_ALT_TX_PWR_MASK 0x000000ff00000000 3160 3161 3162 /* Description ALT_MIN_TX_PWR 3163 3164 Coex related Alternative Transmit parameter 3165 3166 Minimum allowed Transmit Power in s6.2 format. 3167 In units of 0.25 dBm 3168 <legal all> 3169 */ 3170 3171 #define PCU_PPDU_SETUP_INIT_RESPONSE_TO_RESPONSE_RATE_INFO_BW80_ALT_MIN_TX_PWR_OFFSET 0x0000000000000048 3172 #define PCU_PPDU_SETUP_INIT_RESPONSE_TO_RESPONSE_RATE_INFO_BW80_ALT_MIN_TX_PWR_LSB 40 3173 #define PCU_PPDU_SETUP_INIT_RESPONSE_TO_RESPONSE_RATE_INFO_BW80_ALT_MIN_TX_PWR_MSB 47 3174 #define PCU_PPDU_SETUP_INIT_RESPONSE_TO_RESPONSE_RATE_INFO_BW80_ALT_MIN_TX_PWR_MASK 0x0000ff0000000000 3175 3176 3177 /* Description ALT_NSS 3178 3179 Coex related Alternative Transmit parameter 3180 3181 Number of spatial streams. 3182 3183 <enum 0 1_spatial_stream>Single spatial stream 3184 <enum 1 2_spatial_streams>2 spatial streams 3185 <enum 2 3_spatial_streams>3 spatial streams 3186 <enum 3 4_spatial_streams>4 spatial streams 3187 <enum 4 5_spatial_streams>5 spatial streams 3188 <enum 5 6_spatial_streams>6 spatial streams 3189 <enum 6 7_spatial_streams>7 spatial streams 3190 <enum 7 8_spatial_streams>8 spatial streams 3191 */ 3192 3193 #define PCU_PPDU_SETUP_INIT_RESPONSE_TO_RESPONSE_RATE_INFO_BW80_ALT_NSS_OFFSET 0x0000000000000048 3194 #define PCU_PPDU_SETUP_INIT_RESPONSE_TO_RESPONSE_RATE_INFO_BW80_ALT_NSS_LSB 48 3195 #define PCU_PPDU_SETUP_INIT_RESPONSE_TO_RESPONSE_RATE_INFO_BW80_ALT_NSS_MSB 50 3196 #define PCU_PPDU_SETUP_INIT_RESPONSE_TO_RESPONSE_RATE_INFO_BW80_ALT_NSS_MASK 0x0007000000000000 3197 3198 3199 /* Description ALT_TX_CHAIN_MASK 3200 3201 Coex related Alternative Transmit parameter 3202 3203 Chain mask to support up to 8 antennas. 3204 <legal 1-255> 3205 */ 3206 3207 #define PCU_PPDU_SETUP_INIT_RESPONSE_TO_RESPONSE_RATE_INFO_BW80_ALT_TX_CHAIN_MASK_OFFSET 0x0000000000000048 3208 #define PCU_PPDU_SETUP_INIT_RESPONSE_TO_RESPONSE_RATE_INFO_BW80_ALT_TX_CHAIN_MASK_LSB 51 3209 #define PCU_PPDU_SETUP_INIT_RESPONSE_TO_RESPONSE_RATE_INFO_BW80_ALT_TX_CHAIN_MASK_MSB 58 3210 #define PCU_PPDU_SETUP_INIT_RESPONSE_TO_RESPONSE_RATE_INFO_BW80_ALT_TX_CHAIN_MASK_MASK 0x07f8000000000000 3211 3212 3213 /* Description ALT_BW 3214 3215 Coex related Alternative Transmit parameter 3216 3217 The BW of the upcoming transmission. 3218 3219 <enum 0 20_mhz>20 Mhz BW 3220 <enum 1 40_mhz>40 Mhz BW 3221 <enum 2 80_mhz>80 Mhz BW 3222 <enum 3 160_mhz>160 Mhz BW 3223 <enum 4 320_mhz>320 Mhz BW 3224 <enum 5 240_mhz>240 Mhz BW 3225 */ 3226 3227 #define PCU_PPDU_SETUP_INIT_RESPONSE_TO_RESPONSE_RATE_INFO_BW80_ALT_BW_OFFSET 0x0000000000000048 3228 #define PCU_PPDU_SETUP_INIT_RESPONSE_TO_RESPONSE_RATE_INFO_BW80_ALT_BW_LSB 59 3229 #define PCU_PPDU_SETUP_INIT_RESPONSE_TO_RESPONSE_RATE_INFO_BW80_ALT_BW_MSB 61 3230 #define PCU_PPDU_SETUP_INIT_RESPONSE_TO_RESPONSE_RATE_INFO_BW80_ALT_BW_MASK 0x3800000000000000 3231 3232 3233 /* Description STF_LTF_3DB_BOOST 3234 3235 Boost the STF and LTF power by 3dB in 11a/n/ac packets. 3236 This includes both the legacy preambles and the HT/VHT preambles.0: 3237 disable power boost1: enable power boost 3238 <legal all> 3239 */ 3240 3241 #define PCU_PPDU_SETUP_INIT_RESPONSE_TO_RESPONSE_RATE_INFO_BW80_STF_LTF_3DB_BOOST_OFFSET 0x0000000000000048 3242 #define PCU_PPDU_SETUP_INIT_RESPONSE_TO_RESPONSE_RATE_INFO_BW80_STF_LTF_3DB_BOOST_LSB 62 3243 #define PCU_PPDU_SETUP_INIT_RESPONSE_TO_RESPONSE_RATE_INFO_BW80_STF_LTF_3DB_BOOST_MSB 62 3244 #define PCU_PPDU_SETUP_INIT_RESPONSE_TO_RESPONSE_RATE_INFO_BW80_STF_LTF_3DB_BOOST_MASK 0x4000000000000000 3245 3246 3247 /* Description FORCE_EXTRA_SYMBOL 3248 3249 Set to 1 to force an extra OFDM symbol (or symbols) even 3250 if the PPDU encoding process does not result in an extra 3251 OFDM symbol (or symbols) 3252 */ 3253 3254 #define PCU_PPDU_SETUP_INIT_RESPONSE_TO_RESPONSE_RATE_INFO_BW80_FORCE_EXTRA_SYMBOL_OFFSET 0x0000000000000048 3255 #define PCU_PPDU_SETUP_INIT_RESPONSE_TO_RESPONSE_RATE_INFO_BW80_FORCE_EXTRA_SYMBOL_LSB 63 3256 #define PCU_PPDU_SETUP_INIT_RESPONSE_TO_RESPONSE_RATE_INFO_BW80_FORCE_EXTRA_SYMBOL_MSB 63 3257 #define PCU_PPDU_SETUP_INIT_RESPONSE_TO_RESPONSE_RATE_INFO_BW80_FORCE_EXTRA_SYMBOL_MASK 0x8000000000000000 3258 3259 3260 /* Description ALT_RATE_MCS 3261 3262 Coex related Alternative Transmit parameter 3263 3264 For details, refer to MCS_TYPE 3265 Note: This is "rate" in case of 11a/11b 3266 description 3267 <legal all> 3268 */ 3269 3270 #define PCU_PPDU_SETUP_INIT_RESPONSE_TO_RESPONSE_RATE_INFO_BW80_ALT_RATE_MCS_OFFSET 0x0000000000000050 3271 #define PCU_PPDU_SETUP_INIT_RESPONSE_TO_RESPONSE_RATE_INFO_BW80_ALT_RATE_MCS_LSB 0 3272 #define PCU_PPDU_SETUP_INIT_RESPONSE_TO_RESPONSE_RATE_INFO_BW80_ALT_RATE_MCS_MSB 3 3273 #define PCU_PPDU_SETUP_INIT_RESPONSE_TO_RESPONSE_RATE_INFO_BW80_ALT_RATE_MCS_MASK 0x000000000000000f 3274 3275 3276 /* Description NSS 3277 3278 Number of spatial streams. 3279 3280 <enum 0 1_spatial_stream>Single spatial stream 3281 <enum 1 2_spatial_streams>2 spatial streams 3282 <enum 2 3_spatial_streams>3 spatial streams 3283 <enum 3 4_spatial_streams>4 spatial streams 3284 <enum 4 5_spatial_streams>5 spatial streams 3285 <enum 5 6_spatial_streams>6 spatial streams 3286 <enum 6 7_spatial_streams>7 spatial streams 3287 <enum 7 8_spatial_streams>8 spatial streams 3288 */ 3289 3290 #define PCU_PPDU_SETUP_INIT_RESPONSE_TO_RESPONSE_RATE_INFO_BW80_NSS_OFFSET 0x0000000000000050 3291 #define PCU_PPDU_SETUP_INIT_RESPONSE_TO_RESPONSE_RATE_INFO_BW80_NSS_LSB 4 3292 #define PCU_PPDU_SETUP_INIT_RESPONSE_TO_RESPONSE_RATE_INFO_BW80_NSS_MSB 6 3293 #define PCU_PPDU_SETUP_INIT_RESPONSE_TO_RESPONSE_RATE_INFO_BW80_NSS_MASK 0x0000000000000070 3294 3295 3296 /* Description DPD_ENABLE 3297 3298 DPD enable control 3299 3300 This is needed on a per packet basis 3301 <enum 0 dpd_off> DPD profile not applied to current 3302 packet 3303 <enum 1 dpd_on> DPD profile applied to current packet 3304 if available 3305 <legal 0-1> 3306 3307 This field is not applicable in11ah mode of operation and 3308 is ignored by the HW 3309 */ 3310 3311 #define PCU_PPDU_SETUP_INIT_RESPONSE_TO_RESPONSE_RATE_INFO_BW80_DPD_ENABLE_OFFSET 0x0000000000000050 3312 #define PCU_PPDU_SETUP_INIT_RESPONSE_TO_RESPONSE_RATE_INFO_BW80_DPD_ENABLE_LSB 7 3313 #define PCU_PPDU_SETUP_INIT_RESPONSE_TO_RESPONSE_RATE_INFO_BW80_DPD_ENABLE_MSB 7 3314 #define PCU_PPDU_SETUP_INIT_RESPONSE_TO_RESPONSE_RATE_INFO_BW80_DPD_ENABLE_MASK 0x0000000000000080 3315 3316 3317 /* Description TX_PWR 3318 3319 Transmit Power in s6.2 format. 3320 In units of 0.25 dBm 3321 <legal all> 3322 */ 3323 3324 #define PCU_PPDU_SETUP_INIT_RESPONSE_TO_RESPONSE_RATE_INFO_BW80_TX_PWR_OFFSET 0x0000000000000050 3325 #define PCU_PPDU_SETUP_INIT_RESPONSE_TO_RESPONSE_RATE_INFO_BW80_TX_PWR_LSB 8 3326 #define PCU_PPDU_SETUP_INIT_RESPONSE_TO_RESPONSE_RATE_INFO_BW80_TX_PWR_MSB 15 3327 #define PCU_PPDU_SETUP_INIT_RESPONSE_TO_RESPONSE_RATE_INFO_BW80_TX_PWR_MASK 0x000000000000ff00 3328 3329 3330 /* Description MIN_TX_PWR 3331 3332 Coex related field: 3333 3334 Minimum allowed Transmit Power in s6.2 format. 3335 In units of 0.25 dBm 3336 <legal all> 3337 */ 3338 3339 #define PCU_PPDU_SETUP_INIT_RESPONSE_TO_RESPONSE_RATE_INFO_BW80_MIN_TX_PWR_OFFSET 0x0000000000000050 3340 #define PCU_PPDU_SETUP_INIT_RESPONSE_TO_RESPONSE_RATE_INFO_BW80_MIN_TX_PWR_LSB 16 3341 #define PCU_PPDU_SETUP_INIT_RESPONSE_TO_RESPONSE_RATE_INFO_BW80_MIN_TX_PWR_MSB 23 3342 #define PCU_PPDU_SETUP_INIT_RESPONSE_TO_RESPONSE_RATE_INFO_BW80_MIN_TX_PWR_MASK 0x0000000000ff0000 3343 3344 3345 /* Description TX_CHAIN_MASK 3346 3347 Chain mask to support up to 8 antennas. 3348 <legal 1-255> 3349 */ 3350 3351 #define PCU_PPDU_SETUP_INIT_RESPONSE_TO_RESPONSE_RATE_INFO_BW80_TX_CHAIN_MASK_OFFSET 0x0000000000000050 3352 #define PCU_PPDU_SETUP_INIT_RESPONSE_TO_RESPONSE_RATE_INFO_BW80_TX_CHAIN_MASK_LSB 24 3353 #define PCU_PPDU_SETUP_INIT_RESPONSE_TO_RESPONSE_RATE_INFO_BW80_TX_CHAIN_MASK_MSB 31 3354 #define PCU_PPDU_SETUP_INIT_RESPONSE_TO_RESPONSE_RATE_INFO_BW80_TX_CHAIN_MASK_MASK 0x00000000ff000000 3355 3356 3357 /* Description RESERVED_3A 3358 3359 <legal 0> 3360 */ 3361 3362 #define PCU_PPDU_SETUP_INIT_RESPONSE_TO_RESPONSE_RATE_INFO_BW80_RESERVED_3A_OFFSET 0x0000000000000050 3363 #define PCU_PPDU_SETUP_INIT_RESPONSE_TO_RESPONSE_RATE_INFO_BW80_RESERVED_3A_LSB 32 3364 #define PCU_PPDU_SETUP_INIT_RESPONSE_TO_RESPONSE_RATE_INFO_BW80_RESERVED_3A_MSB 39 3365 #define PCU_PPDU_SETUP_INIT_RESPONSE_TO_RESPONSE_RATE_INFO_BW80_RESERVED_3A_MASK 0x000000ff00000000 3366 3367 3368 /* Description SGI 3369 3370 Field only valid when pkt type is HT or VHT.For 11ax see 3371 field Dot11ax_CP_LTF_size 3372 3373 <enum 0 0_8_us_sgi > Legacy normal GI. Can also be used 3374 for HE 3375 <enum 1 0_4_us_sgi > Legacy short GI. Can also be used 3376 for HE 3377 <enum 2 1_6_us_sgi > Not used for pre 11ax pkt_types. 3378 3379 <enum 3 3_2_us_sgi > Not used for pre 11ax pkt_types 3380 3381 3382 <legal 0 - 3> 3383 */ 3384 3385 #define PCU_PPDU_SETUP_INIT_RESPONSE_TO_RESPONSE_RATE_INFO_BW80_SGI_OFFSET 0x0000000000000050 3386 #define PCU_PPDU_SETUP_INIT_RESPONSE_TO_RESPONSE_RATE_INFO_BW80_SGI_LSB 40 3387 #define PCU_PPDU_SETUP_INIT_RESPONSE_TO_RESPONSE_RATE_INFO_BW80_SGI_MSB 41 3388 #define PCU_PPDU_SETUP_INIT_RESPONSE_TO_RESPONSE_RATE_INFO_BW80_SGI_MASK 0x0000030000000000 3389 3390 3391 /* Description RATE_MCS 3392 3393 For details, refer to MCS_TYPE description 3394 Note: This is "rate" in case of 11a/11b 3395 3396 <legal all> 3397 */ 3398 3399 #define PCU_PPDU_SETUP_INIT_RESPONSE_TO_RESPONSE_RATE_INFO_BW80_RATE_MCS_OFFSET 0x0000000000000050 3400 #define PCU_PPDU_SETUP_INIT_RESPONSE_TO_RESPONSE_RATE_INFO_BW80_RATE_MCS_LSB 42 3401 #define PCU_PPDU_SETUP_INIT_RESPONSE_TO_RESPONSE_RATE_INFO_BW80_RATE_MCS_MSB 45 3402 #define PCU_PPDU_SETUP_INIT_RESPONSE_TO_RESPONSE_RATE_INFO_BW80_RATE_MCS_MASK 0x00003c0000000000 3403 3404 3405 /* Description RESERVED_3B 3406 3407 <legal 0> 3408 */ 3409 3410 #define PCU_PPDU_SETUP_INIT_RESPONSE_TO_RESPONSE_RATE_INFO_BW80_RESERVED_3B_OFFSET 0x0000000000000050 3411 #define PCU_PPDU_SETUP_INIT_RESPONSE_TO_RESPONSE_RATE_INFO_BW80_RESERVED_3B_LSB 46 3412 #define PCU_PPDU_SETUP_INIT_RESPONSE_TO_RESPONSE_RATE_INFO_BW80_RESERVED_3B_MSB 47 3413 #define PCU_PPDU_SETUP_INIT_RESPONSE_TO_RESPONSE_RATE_INFO_BW80_RESERVED_3B_MASK 0x0000c00000000000 3414 3415 3416 /* Description TX_PWR_1 3417 3418 Default (desired) transmit parameter for the second chain 3419 3420 3421 Transmit Power in s6.2 format. 3422 In units of 0.25 dBm 3423 3424 Note that there is no Min value for this 3425 <legal all> 3426 */ 3427 3428 #define PCU_PPDU_SETUP_INIT_RESPONSE_TO_RESPONSE_RATE_INFO_BW80_TX_PWR_1_OFFSET 0x0000000000000050 3429 #define PCU_PPDU_SETUP_INIT_RESPONSE_TO_RESPONSE_RATE_INFO_BW80_TX_PWR_1_LSB 48 3430 #define PCU_PPDU_SETUP_INIT_RESPONSE_TO_RESPONSE_RATE_INFO_BW80_TX_PWR_1_MSB 55 3431 #define PCU_PPDU_SETUP_INIT_RESPONSE_TO_RESPONSE_RATE_INFO_BW80_TX_PWR_1_MASK 0x00ff000000000000 3432 3433 3434 /* Description ALT_TX_PWR_1 3435 3436 Alternate (desired) transmit parameter for the second chain 3437 3438 3439 Transmit Power in s6.2 format. 3440 In units of 0.25 dBm 3441 3442 Note that there is no Min value for this 3443 <legal all> 3444 */ 3445 3446 #define PCU_PPDU_SETUP_INIT_RESPONSE_TO_RESPONSE_RATE_INFO_BW80_ALT_TX_PWR_1_OFFSET 0x0000000000000050 3447 #define PCU_PPDU_SETUP_INIT_RESPONSE_TO_RESPONSE_RATE_INFO_BW80_ALT_TX_PWR_1_LSB 56 3448 #define PCU_PPDU_SETUP_INIT_RESPONSE_TO_RESPONSE_RATE_INFO_BW80_ALT_TX_PWR_1_MSB 63 3449 #define PCU_PPDU_SETUP_INIT_RESPONSE_TO_RESPONSE_RATE_INFO_BW80_ALT_TX_PWR_1_MASK 0xff00000000000000 3450 3451 3452 /* Description AGGREGATION 3453 3454 Field only valid in case of pkt_type == 11n 3455 3456 <enum 0 mpdu> Indicates MPDU format. TXPCU will select 3457 this setting if the CBF response only contains a single 3458 segment 3459 <enum 1 a_mpdu> Indicates A-MPDU format. TXPCU will 3460 select this setting if the CBF response will contain two 3461 or more segments 3462 <legal 0-1> 3463 */ 3464 3465 #define PCU_PPDU_SETUP_INIT_RESPONSE_TO_RESPONSE_RATE_INFO_BW80_AGGREGATION_OFFSET 0x0000000000000058 3466 #define PCU_PPDU_SETUP_INIT_RESPONSE_TO_RESPONSE_RATE_INFO_BW80_AGGREGATION_LSB 0 3467 #define PCU_PPDU_SETUP_INIT_RESPONSE_TO_RESPONSE_RATE_INFO_BW80_AGGREGATION_MSB 0 3468 #define PCU_PPDU_SETUP_INIT_RESPONSE_TO_RESPONSE_RATE_INFO_BW80_AGGREGATION_MASK 0x0000000000000001 3469 3470 3471 /* Description DOT11AX_BSS_COLOR_ID 3472 3473 BSS color of the nextwork to which this STA belongs. 3474 When generated by TXPCU, this field is set equal to: Dot11ax_received_Bss_color_id 3475 3476 3477 <legal all> 3478 */ 3479 3480 #define PCU_PPDU_SETUP_INIT_RESPONSE_TO_RESPONSE_RATE_INFO_BW80_DOT11AX_BSS_COLOR_ID_OFFSET 0x0000000000000058 3481 #define PCU_PPDU_SETUP_INIT_RESPONSE_TO_RESPONSE_RATE_INFO_BW80_DOT11AX_BSS_COLOR_ID_LSB 1 3482 #define PCU_PPDU_SETUP_INIT_RESPONSE_TO_RESPONSE_RATE_INFO_BW80_DOT11AX_BSS_COLOR_ID_MSB 6 3483 #define PCU_PPDU_SETUP_INIT_RESPONSE_TO_RESPONSE_RATE_INFO_BW80_DOT11AX_BSS_COLOR_ID_MASK 0x000000000000007e 3484 3485 3486 /* Description DOT11AX_SPATIAL_REUSE 3487 3488 This field is only valid for pkt_type == 11ax 3489 3490 Spatial re-use 3491 <legal all> 3492 */ 3493 3494 #define PCU_PPDU_SETUP_INIT_RESPONSE_TO_RESPONSE_RATE_INFO_BW80_DOT11AX_SPATIAL_REUSE_OFFSET 0x0000000000000058 3495 #define PCU_PPDU_SETUP_INIT_RESPONSE_TO_RESPONSE_RATE_INFO_BW80_DOT11AX_SPATIAL_REUSE_LSB 7 3496 #define PCU_PPDU_SETUP_INIT_RESPONSE_TO_RESPONSE_RATE_INFO_BW80_DOT11AX_SPATIAL_REUSE_MSB 10 3497 #define PCU_PPDU_SETUP_INIT_RESPONSE_TO_RESPONSE_RATE_INFO_BW80_DOT11AX_SPATIAL_REUSE_MASK 0x0000000000000780 3498 3499 3500 /* Description DOT11AX_CP_LTF_SIZE 3501 3502 field is only valid for pkt_type == 11ax 3503 3504 Indicates the CP and HE-LTF type 3505 3506 <enum 0 OneX_LTF_0_8CP> 1xLTF + 0.8 us CP 3507 <enum 1 TwoX_LTF_0_8CP> 2x LTF + 0.8 µs CP 3508 <enum 2 TwoX_LTF_1_6CP> 2x LTF + 1.6 µs CP 3509 <enum 3 FourX_LTF_0_8CP_3_2CP> 3510 When DCM == 0 OR STBC == 0: 4x LTF + 3.2 µs CP 3511 When DCM == 1 AND STBC == 1: 4x LTF + 0.8 µs CP. Note: 3512 In this scenario, Neither DCM nor STBC is applied to HE 3513 data field. 3514 3515 If ( DCM == 1 ) and ( MCS > 0 ) and (STBC == 0) 3516 0 = 1xLTF + 0.4 usec 3517 1 = 2xLTF + 0.4 usec 3518 2~3 = Reserved 3519 3520 <legal all> 3521 */ 3522 3523 #define PCU_PPDU_SETUP_INIT_RESPONSE_TO_RESPONSE_RATE_INFO_BW80_DOT11AX_CP_LTF_SIZE_OFFSET 0x0000000000000058 3524 #define PCU_PPDU_SETUP_INIT_RESPONSE_TO_RESPONSE_RATE_INFO_BW80_DOT11AX_CP_LTF_SIZE_LSB 11 3525 #define PCU_PPDU_SETUP_INIT_RESPONSE_TO_RESPONSE_RATE_INFO_BW80_DOT11AX_CP_LTF_SIZE_MSB 12 3526 #define PCU_PPDU_SETUP_INIT_RESPONSE_TO_RESPONSE_RATE_INFO_BW80_DOT11AX_CP_LTF_SIZE_MASK 0x0000000000001800 3527 3528 3529 /* Description DOT11AX_DCM 3530 3531 field is only valid for pkt_type == 11ax 3532 3533 Indicates whether dual sub-carrier modulation is applied 3534 3535 0: No DCM 3536 1:DCM 3537 <legal all> 3538 */ 3539 3540 #define PCU_PPDU_SETUP_INIT_RESPONSE_TO_RESPONSE_RATE_INFO_BW80_DOT11AX_DCM_OFFSET 0x0000000000000058 3541 #define PCU_PPDU_SETUP_INIT_RESPONSE_TO_RESPONSE_RATE_INFO_BW80_DOT11AX_DCM_LSB 13 3542 #define PCU_PPDU_SETUP_INIT_RESPONSE_TO_RESPONSE_RATE_INFO_BW80_DOT11AX_DCM_MSB 13 3543 #define PCU_PPDU_SETUP_INIT_RESPONSE_TO_RESPONSE_RATE_INFO_BW80_DOT11AX_DCM_MASK 0x0000000000002000 3544 3545 3546 /* Description DOT11AX_DOPPLER_INDICATION 3547 3548 field is only valid for pkt_type == 11ax 3549 3550 0: No Doppler support 3551 1: Doppler support 3552 <legal all> 3553 */ 3554 3555 #define PCU_PPDU_SETUP_INIT_RESPONSE_TO_RESPONSE_RATE_INFO_BW80_DOT11AX_DOPPLER_INDICATION_OFFSET 0x0000000000000058 3556 #define PCU_PPDU_SETUP_INIT_RESPONSE_TO_RESPONSE_RATE_INFO_BW80_DOT11AX_DOPPLER_INDICATION_LSB 14 3557 #define PCU_PPDU_SETUP_INIT_RESPONSE_TO_RESPONSE_RATE_INFO_BW80_DOT11AX_DOPPLER_INDICATION_MSB 14 3558 #define PCU_PPDU_SETUP_INIT_RESPONSE_TO_RESPONSE_RATE_INFO_BW80_DOT11AX_DOPPLER_INDICATION_MASK 0x0000000000004000 3559 3560 3561 /* Description DOT11AX_SU_EXTENDED 3562 3563 field is only valid for pkt_type == 11ax OR pkt_type == 3564 11be 3565 3566 When set, the 11ax or 11be frame is of the extended range 3567 format 3568 <legal all> 3569 */ 3570 3571 #define PCU_PPDU_SETUP_INIT_RESPONSE_TO_RESPONSE_RATE_INFO_BW80_DOT11AX_SU_EXTENDED_OFFSET 0x0000000000000058 3572 #define PCU_PPDU_SETUP_INIT_RESPONSE_TO_RESPONSE_RATE_INFO_BW80_DOT11AX_SU_EXTENDED_LSB 15 3573 #define PCU_PPDU_SETUP_INIT_RESPONSE_TO_RESPONSE_RATE_INFO_BW80_DOT11AX_SU_EXTENDED_MSB 15 3574 #define PCU_PPDU_SETUP_INIT_RESPONSE_TO_RESPONSE_RATE_INFO_BW80_DOT11AX_SU_EXTENDED_MASK 0x0000000000008000 3575 3576 3577 /* Description DOT11AX_MIN_PACKET_EXTENSION 3578 3579 field is only valid for pkt_type == 11ax OR pkt_type == 3580 11be 3581 3582 The min packet extension duration for this user. 3583 0: no extension 3584 1: 8us 3585 2: 16 us 3586 3: 20 us (only for .11be) 3587 <legal 0-3> 3588 */ 3589 3590 #define PCU_PPDU_SETUP_INIT_RESPONSE_TO_RESPONSE_RATE_INFO_BW80_DOT11AX_MIN_PACKET_EXTENSION_OFFSET 0x0000000000000058 3591 #define PCU_PPDU_SETUP_INIT_RESPONSE_TO_RESPONSE_RATE_INFO_BW80_DOT11AX_MIN_PACKET_EXTENSION_LSB 16 3592 #define PCU_PPDU_SETUP_INIT_RESPONSE_TO_RESPONSE_RATE_INFO_BW80_DOT11AX_MIN_PACKET_EXTENSION_MSB 17 3593 #define PCU_PPDU_SETUP_INIT_RESPONSE_TO_RESPONSE_RATE_INFO_BW80_DOT11AX_MIN_PACKET_EXTENSION_MASK 0x0000000000030000 3594 3595 3596 /* Description DOT11AX_PE_NSS 3597 3598 Number of active spatial streams during packet extension. 3599 3600 3601 <enum 0 1_spatial_stream>Single spatial stream 3602 <enum 1 2_spatial_streams>2 spatial streams 3603 <enum 2 3_spatial_streams>3 spatial streams 3604 <enum 3 4_spatial_streams>4 spatial streams 3605 <enum 4 5_spatial_streams>5 spatial streams 3606 <enum 5 6_spatial_streams>6 spatial streams 3607 <enum 6 7_spatial_streams>7 spatial streams 3608 <enum 7 8_spatial_streams>8 spatial streams 3609 */ 3610 3611 #define PCU_PPDU_SETUP_INIT_RESPONSE_TO_RESPONSE_RATE_INFO_BW80_DOT11AX_PE_NSS_OFFSET 0x0000000000000058 3612 #define PCU_PPDU_SETUP_INIT_RESPONSE_TO_RESPONSE_RATE_INFO_BW80_DOT11AX_PE_NSS_LSB 18 3613 #define PCU_PPDU_SETUP_INIT_RESPONSE_TO_RESPONSE_RATE_INFO_BW80_DOT11AX_PE_NSS_MSB 20 3614 #define PCU_PPDU_SETUP_INIT_RESPONSE_TO_RESPONSE_RATE_INFO_BW80_DOT11AX_PE_NSS_MASK 0x00000000001c0000 3615 3616 3617 /* Description DOT11AX_PE_CONTENT 3618 3619 Content of packet extension. Valid for all 11ax packets 3620 having packet extension 3621 3622 0-he_ltf, 1-last_data_symbol 3623 <legal all> 3624 */ 3625 3626 #define PCU_PPDU_SETUP_INIT_RESPONSE_TO_RESPONSE_RATE_INFO_BW80_DOT11AX_PE_CONTENT_OFFSET 0x0000000000000058 3627 #define PCU_PPDU_SETUP_INIT_RESPONSE_TO_RESPONSE_RATE_INFO_BW80_DOT11AX_PE_CONTENT_LSB 21 3628 #define PCU_PPDU_SETUP_INIT_RESPONSE_TO_RESPONSE_RATE_INFO_BW80_DOT11AX_PE_CONTENT_MSB 21 3629 #define PCU_PPDU_SETUP_INIT_RESPONSE_TO_RESPONSE_RATE_INFO_BW80_DOT11AX_PE_CONTENT_MASK 0x0000000000200000 3630 3631 3632 /* Description DOT11AX_PE_LTF_SIZE 3633 3634 LTF size to be used during packet extention. . This field 3635 is valid for both FTM and non-FTM packets. 3636 0-1x 3637 1-2x (unsupported un HWK-1) 3638 2-4x (unsupported un HWK-1) 3639 <legal all> 3640 */ 3641 3642 #define PCU_PPDU_SETUP_INIT_RESPONSE_TO_RESPONSE_RATE_INFO_BW80_DOT11AX_PE_LTF_SIZE_OFFSET 0x0000000000000058 3643 #define PCU_PPDU_SETUP_INIT_RESPONSE_TO_RESPONSE_RATE_INFO_BW80_DOT11AX_PE_LTF_SIZE_LSB 22 3644 #define PCU_PPDU_SETUP_INIT_RESPONSE_TO_RESPONSE_RATE_INFO_BW80_DOT11AX_PE_LTF_SIZE_MSB 23 3645 #define PCU_PPDU_SETUP_INIT_RESPONSE_TO_RESPONSE_RATE_INFO_BW80_DOT11AX_PE_LTF_SIZE_MASK 0x0000000000c00000 3646 3647 3648 /* Description DOT11AX_CHAIN_CSD_EN 3649 3650 This field denotes whether to apply CSD on the preamble 3651 and data portion of the packet. This field is valid for 3652 all transmit packets 3653 0: disable per-chain csd 3654 1: enable per-chain csd 3655 <legal all> 3656 */ 3657 3658 #define PCU_PPDU_SETUP_INIT_RESPONSE_TO_RESPONSE_RATE_INFO_BW80_DOT11AX_CHAIN_CSD_EN_OFFSET 0x0000000000000058 3659 #define PCU_PPDU_SETUP_INIT_RESPONSE_TO_RESPONSE_RATE_INFO_BW80_DOT11AX_CHAIN_CSD_EN_LSB 24 3660 #define PCU_PPDU_SETUP_INIT_RESPONSE_TO_RESPONSE_RATE_INFO_BW80_DOT11AX_CHAIN_CSD_EN_MSB 24 3661 #define PCU_PPDU_SETUP_INIT_RESPONSE_TO_RESPONSE_RATE_INFO_BW80_DOT11AX_CHAIN_CSD_EN_MASK 0x0000000001000000 3662 3663 3664 /* Description DOT11AX_PE_CHAIN_CSD_EN 3665 3666 This field denotes whether to apply CSD on the packet extension 3667 portion of the packet. This field is valid for all 11ax 3668 packets. 3669 0: disable per-chain csd 3670 1: enable per-chain csd 3671 <legal all> 3672 */ 3673 3674 #define PCU_PPDU_SETUP_INIT_RESPONSE_TO_RESPONSE_RATE_INFO_BW80_DOT11AX_PE_CHAIN_CSD_EN_OFFSET 0x0000000000000058 3675 #define PCU_PPDU_SETUP_INIT_RESPONSE_TO_RESPONSE_RATE_INFO_BW80_DOT11AX_PE_CHAIN_CSD_EN_LSB 25 3676 #define PCU_PPDU_SETUP_INIT_RESPONSE_TO_RESPONSE_RATE_INFO_BW80_DOT11AX_PE_CHAIN_CSD_EN_MSB 25 3677 #define PCU_PPDU_SETUP_INIT_RESPONSE_TO_RESPONSE_RATE_INFO_BW80_DOT11AX_PE_CHAIN_CSD_EN_MASK 0x0000000002000000 3678 3679 3680 /* Description DOT11AX_DL_UL_FLAG 3681 3682 field is only valid for pkt_type == 11ax 3683 3684 <enum 0 DL_UL_FLAG_IS_DL_OR_TDLS> 3685 <enum 1 DL_UL_FLAG_IS_UL> 3686 3687 <legal all> 3688 */ 3689 3690 #define PCU_PPDU_SETUP_INIT_RESPONSE_TO_RESPONSE_RATE_INFO_BW80_DOT11AX_DL_UL_FLAG_OFFSET 0x0000000000000058 3691 #define PCU_PPDU_SETUP_INIT_RESPONSE_TO_RESPONSE_RATE_INFO_BW80_DOT11AX_DL_UL_FLAG_LSB 26 3692 #define PCU_PPDU_SETUP_INIT_RESPONSE_TO_RESPONSE_RATE_INFO_BW80_DOT11AX_DL_UL_FLAG_MSB 26 3693 #define PCU_PPDU_SETUP_INIT_RESPONSE_TO_RESPONSE_RATE_INFO_BW80_DOT11AX_DL_UL_FLAG_MASK 0x0000000004000000 3694 3695 3696 /* Description RESERVED_4A 3697 3698 <legal 0> 3699 */ 3700 3701 #define PCU_PPDU_SETUP_INIT_RESPONSE_TO_RESPONSE_RATE_INFO_BW80_RESERVED_4A_OFFSET 0x0000000000000058 3702 #define PCU_PPDU_SETUP_INIT_RESPONSE_TO_RESPONSE_RATE_INFO_BW80_RESERVED_4A_LSB 27 3703 #define PCU_PPDU_SETUP_INIT_RESPONSE_TO_RESPONSE_RATE_INFO_BW80_RESERVED_4A_MSB 31 3704 #define PCU_PPDU_SETUP_INIT_RESPONSE_TO_RESPONSE_RATE_INFO_BW80_RESERVED_4A_MASK 0x00000000f8000000 3705 3706 3707 /* Description DOT11AX_EXT_RU_START_INDEX 3708 3709 field is only valid for pkt_type == 11ax and Dot11ax_su_extended 3710 == 1 3711 3712 RU Number to which User is assigned 3713 3714 The RU numbering bitwidth is only enough to cover the 20MHz 3715 BW that extended range allows 3716 <legal 0-8> 3717 */ 3718 3719 #define PCU_PPDU_SETUP_INIT_RESPONSE_TO_RESPONSE_RATE_INFO_BW80_DOT11AX_EXT_RU_START_INDEX_OFFSET 0x0000000000000058 3720 #define PCU_PPDU_SETUP_INIT_RESPONSE_TO_RESPONSE_RATE_INFO_BW80_DOT11AX_EXT_RU_START_INDEX_LSB 32 3721 #define PCU_PPDU_SETUP_INIT_RESPONSE_TO_RESPONSE_RATE_INFO_BW80_DOT11AX_EXT_RU_START_INDEX_MSB 35 3722 #define PCU_PPDU_SETUP_INIT_RESPONSE_TO_RESPONSE_RATE_INFO_BW80_DOT11AX_EXT_RU_START_INDEX_MASK 0x0000000f00000000 3723 3724 3725 /* Description DOT11AX_EXT_RU_SIZE 3726 3727 field is only valid for pkt_type == 11ax and Dot11ax_su_extended 3728 == 1 or pkt_type == 11be and EHT_duplicate_mode == 1 3729 3730 The size of the RU for this user. 3731 3732 In case of EHT duplicate transmissions, this field indicates 3733 the width of the actual content before duplication, e.g. 3734 a 40 MHz PPDU duplicated to 160 MHz will have the bandwidth 3735 fields indicating 160 MHz and this field set to e-num 4 3736 (RU_484). 3737 3738 <enum 0 RU_26> 3739 <enum 1 RU_52> 3740 <enum 2 RU_106> 3741 <enum 3 RU_242> 3742 <enum 4 RU_484> 3743 <enum 5 RU_996> 3744 <enum 6 RU_1992> 3745 <enum 7 RU_FULLBW> Set when the RU occupies the full packet 3746 bandwidth 3747 <enum 8 RU_FULLBW_240> Set when the RU occupies the full 3748 packet bandwidth 3749 <enum 9 RU_FULLBW_320> Set when the RU occupies the full 3750 packet bandwidth 3751 <enum 10 RU_MULTI_LARGE> DO NOT USE 3752 <enum 11 RU_78> DO NOT USE 3753 <enum 12 RU_132> DO NOT USE 3754 <legal 0-12> 3755 */ 3756 3757 #define PCU_PPDU_SETUP_INIT_RESPONSE_TO_RESPONSE_RATE_INFO_BW80_DOT11AX_EXT_RU_SIZE_OFFSET 0x0000000000000058 3758 #define PCU_PPDU_SETUP_INIT_RESPONSE_TO_RESPONSE_RATE_INFO_BW80_DOT11AX_EXT_RU_SIZE_LSB 36 3759 #define PCU_PPDU_SETUP_INIT_RESPONSE_TO_RESPONSE_RATE_INFO_BW80_DOT11AX_EXT_RU_SIZE_MSB 39 3760 #define PCU_PPDU_SETUP_INIT_RESPONSE_TO_RESPONSE_RATE_INFO_BW80_DOT11AX_EXT_RU_SIZE_MASK 0x000000f000000000 3761 3762 3763 /* Description EHT_DUPLICATE_MODE 3764 3765 Field only valid for pkt_type == 11be 3766 3767 Indicates EHT duplicate modulation 3768 3769 <enum 0 eht_no_duplicate> 3770 <enum 1 eht_2x_duplicate> 3771 <enum 2 eht_4x_duplicate> 3772 3773 <legal 0-2> 3774 */ 3775 3776 #define PCU_PPDU_SETUP_INIT_RESPONSE_TO_RESPONSE_RATE_INFO_BW80_EHT_DUPLICATE_MODE_OFFSET 0x0000000000000058 3777 #define PCU_PPDU_SETUP_INIT_RESPONSE_TO_RESPONSE_RATE_INFO_BW80_EHT_DUPLICATE_MODE_LSB 40 3778 #define PCU_PPDU_SETUP_INIT_RESPONSE_TO_RESPONSE_RATE_INFO_BW80_EHT_DUPLICATE_MODE_MSB 41 3779 #define PCU_PPDU_SETUP_INIT_RESPONSE_TO_RESPONSE_RATE_INFO_BW80_EHT_DUPLICATE_MODE_MASK 0x0000030000000000 3780 3781 3782 /* Description HE_SIGB_DCM 3783 3784 Indicates whether dual sub-carrier modulation is applied 3785 to EHT-SIG 3786 <legal all> 3787 */ 3788 3789 #define PCU_PPDU_SETUP_INIT_RESPONSE_TO_RESPONSE_RATE_INFO_BW80_HE_SIGB_DCM_OFFSET 0x0000000000000058 3790 #define PCU_PPDU_SETUP_INIT_RESPONSE_TO_RESPONSE_RATE_INFO_BW80_HE_SIGB_DCM_LSB 42 3791 #define PCU_PPDU_SETUP_INIT_RESPONSE_TO_RESPONSE_RATE_INFO_BW80_HE_SIGB_DCM_MSB 42 3792 #define PCU_PPDU_SETUP_INIT_RESPONSE_TO_RESPONSE_RATE_INFO_BW80_HE_SIGB_DCM_MASK 0x0000040000000000 3793 3794 3795 /* Description HE_SIGB_0_MCS 3796 3797 Indicates the MCS of EHT-SIG 3798 3799 For details, refer to MCS_TYPE description 3800 <legal all> 3801 */ 3802 3803 #define PCU_PPDU_SETUP_INIT_RESPONSE_TO_RESPONSE_RATE_INFO_BW80_HE_SIGB_0_MCS_OFFSET 0x0000000000000058 3804 #define PCU_PPDU_SETUP_INIT_RESPONSE_TO_RESPONSE_RATE_INFO_BW80_HE_SIGB_0_MCS_LSB 43 3805 #define PCU_PPDU_SETUP_INIT_RESPONSE_TO_RESPONSE_RATE_INFO_BW80_HE_SIGB_0_MCS_MSB 45 3806 #define PCU_PPDU_SETUP_INIT_RESPONSE_TO_RESPONSE_RATE_INFO_BW80_HE_SIGB_0_MCS_MASK 0x0000380000000000 3807 3808 3809 /* Description NUM_HE_SIGB_SYM 3810 3811 Indicates the number of EHT-SIG symbols 3812 3813 This field is 0-based with 0 indicating that 1 eht_sig symbol 3814 needs to be transmitted. 3815 <legal all> 3816 */ 3817 3818 #define PCU_PPDU_SETUP_INIT_RESPONSE_TO_RESPONSE_RATE_INFO_BW80_NUM_HE_SIGB_SYM_OFFSET 0x0000000000000058 3819 #define PCU_PPDU_SETUP_INIT_RESPONSE_TO_RESPONSE_RATE_INFO_BW80_NUM_HE_SIGB_SYM_LSB 46 3820 #define PCU_PPDU_SETUP_INIT_RESPONSE_TO_RESPONSE_RATE_INFO_BW80_NUM_HE_SIGB_SYM_MSB 50 3821 #define PCU_PPDU_SETUP_INIT_RESPONSE_TO_RESPONSE_RATE_INFO_BW80_NUM_HE_SIGB_SYM_MASK 0x0007c00000000000 3822 3823 3824 /* Description REQUIRED_RESPONSE_TIME_SOURCE 3825 3826 <enum 0 reqd_resp_time_src_is_RXPCU> Typically from received 3827 HT Control for sync MLO response 3828 <enum 1 reqd_resp_time_src_is_FW> 3829 Typically from 'PCU_PPDU_SETUP_INIT' for sync MLO response 3830 to response 3831 <legal all> 3832 */ 3833 3834 #define PCU_PPDU_SETUP_INIT_RESPONSE_TO_RESPONSE_RATE_INFO_BW80_REQUIRED_RESPONSE_TIME_SOURCE_OFFSET 0x0000000000000058 3835 #define PCU_PPDU_SETUP_INIT_RESPONSE_TO_RESPONSE_RATE_INFO_BW80_REQUIRED_RESPONSE_TIME_SOURCE_LSB 51 3836 #define PCU_PPDU_SETUP_INIT_RESPONSE_TO_RESPONSE_RATE_INFO_BW80_REQUIRED_RESPONSE_TIME_SOURCE_MSB 51 3837 #define PCU_PPDU_SETUP_INIT_RESPONSE_TO_RESPONSE_RATE_INFO_BW80_REQUIRED_RESPONSE_TIME_SOURCE_MASK 0x0008000000000000 3838 3839 3840 /* Description RESERVED_5A 3841 3842 <legal 0> 3843 */ 3844 3845 #define PCU_PPDU_SETUP_INIT_RESPONSE_TO_RESPONSE_RATE_INFO_BW80_RESERVED_5A_OFFSET 0x0000000000000058 3846 #define PCU_PPDU_SETUP_INIT_RESPONSE_TO_RESPONSE_RATE_INFO_BW80_RESERVED_5A_LSB 52 3847 #define PCU_PPDU_SETUP_INIT_RESPONSE_TO_RESPONSE_RATE_INFO_BW80_RESERVED_5A_MSB 57 3848 #define PCU_PPDU_SETUP_INIT_RESPONSE_TO_RESPONSE_RATE_INFO_BW80_RESERVED_5A_MASK 0x03f0000000000000 3849 3850 3851 /* Description U_SIG_PUNCTURE_PATTERN_ENCODING 3852 3853 6-bit value copied from 'RX_RESPONSE_REQUIRED_INFO' and 'TX_CBF_INFO' 3854 to pass on to PDG 3855 <legal 0-29> 3856 */ 3857 3858 #define PCU_PPDU_SETUP_INIT_RESPONSE_TO_RESPONSE_RATE_INFO_BW80_U_SIG_PUNCTURE_PATTERN_ENCODING_OFFSET 0x0000000000000058 3859 #define PCU_PPDU_SETUP_INIT_RESPONSE_TO_RESPONSE_RATE_INFO_BW80_U_SIG_PUNCTURE_PATTERN_ENCODING_LSB 58 3860 #define PCU_PPDU_SETUP_INIT_RESPONSE_TO_RESPONSE_RATE_INFO_BW80_U_SIG_PUNCTURE_PATTERN_ENCODING_MSB 63 3861 #define PCU_PPDU_SETUP_INIT_RESPONSE_TO_RESPONSE_RATE_INFO_BW80_U_SIG_PUNCTURE_PATTERN_ENCODING_MASK 0xfc00000000000000 3862 3863 3864 /* Description MLO_STA_ID_DETAILS_RX 3865 3866 16-bi value copied from 'RX_RESPONSE_REQUIRED_INFO' to pass 3867 on to PDG 3868 3869 Bits 10 and 11 are not valid, bits [9:0] reflect 'NSTR_MLO_STA_ID' 3870 from address search. 3871 3872 See definition of mlo_sta_id_details. 3873 */ 3874 3875 3876 /* Description NSTR_MLO_STA_ID 3877 3878 ID of peer participating in non-STR MLO 3879 */ 3880 3881 #define PCU_PPDU_SETUP_INIT_RESPONSE_TO_RESPONSE_RATE_INFO_BW80_MLO_STA_ID_DETAILS_RX_NSTR_MLO_STA_ID_OFFSET 0x0000000000000060 3882 #define PCU_PPDU_SETUP_INIT_RESPONSE_TO_RESPONSE_RATE_INFO_BW80_MLO_STA_ID_DETAILS_RX_NSTR_MLO_STA_ID_LSB 0 3883 #define PCU_PPDU_SETUP_INIT_RESPONSE_TO_RESPONSE_RATE_INFO_BW80_MLO_STA_ID_DETAILS_RX_NSTR_MLO_STA_ID_MSB 9 3884 #define PCU_PPDU_SETUP_INIT_RESPONSE_TO_RESPONSE_RATE_INFO_BW80_MLO_STA_ID_DETAILS_RX_NSTR_MLO_STA_ID_MASK 0x00000000000003ff 3885 3886 3887 /* Description BLOCK_SELF_ML_SYNC 3888 3889 Only valid for TX 3890 3891 When set, this provides an indication to block the peer 3892 for self-link. 3893 */ 3894 3895 #define PCU_PPDU_SETUP_INIT_RESPONSE_TO_RESPONSE_RATE_INFO_BW80_MLO_STA_ID_DETAILS_RX_BLOCK_SELF_ML_SYNC_OFFSET 0x0000000000000060 3896 #define PCU_PPDU_SETUP_INIT_RESPONSE_TO_RESPONSE_RATE_INFO_BW80_MLO_STA_ID_DETAILS_RX_BLOCK_SELF_ML_SYNC_LSB 10 3897 #define PCU_PPDU_SETUP_INIT_RESPONSE_TO_RESPONSE_RATE_INFO_BW80_MLO_STA_ID_DETAILS_RX_BLOCK_SELF_ML_SYNC_MSB 10 3898 #define PCU_PPDU_SETUP_INIT_RESPONSE_TO_RESPONSE_RATE_INFO_BW80_MLO_STA_ID_DETAILS_RX_BLOCK_SELF_ML_SYNC_MASK 0x0000000000000400 3899 3900 3901 /* Description BLOCK_PARTNER_ML_SYNC 3902 3903 Only valid for TX 3904 3905 When set, this provides an indication to block the peer 3906 for partner links. 3907 */ 3908 3909 #define PCU_PPDU_SETUP_INIT_RESPONSE_TO_RESPONSE_RATE_INFO_BW80_MLO_STA_ID_DETAILS_RX_BLOCK_PARTNER_ML_SYNC_OFFSET 0x0000000000000060 3910 #define PCU_PPDU_SETUP_INIT_RESPONSE_TO_RESPONSE_RATE_INFO_BW80_MLO_STA_ID_DETAILS_RX_BLOCK_PARTNER_ML_SYNC_LSB 11 3911 #define PCU_PPDU_SETUP_INIT_RESPONSE_TO_RESPONSE_RATE_INFO_BW80_MLO_STA_ID_DETAILS_RX_BLOCK_PARTNER_ML_SYNC_MSB 11 3912 #define PCU_PPDU_SETUP_INIT_RESPONSE_TO_RESPONSE_RATE_INFO_BW80_MLO_STA_ID_DETAILS_RX_BLOCK_PARTNER_ML_SYNC_MASK 0x0000000000000800 3913 3914 3915 /* Description NSTR_MLO_STA_ID_VALID 3916 3917 All the fields in this TLV are valid only if this bit is 3918 set. 3919 */ 3920 3921 #define PCU_PPDU_SETUP_INIT_RESPONSE_TO_RESPONSE_RATE_INFO_BW80_MLO_STA_ID_DETAILS_RX_NSTR_MLO_STA_ID_VALID_OFFSET 0x0000000000000060 3922 #define PCU_PPDU_SETUP_INIT_RESPONSE_TO_RESPONSE_RATE_INFO_BW80_MLO_STA_ID_DETAILS_RX_NSTR_MLO_STA_ID_VALID_LSB 12 3923 #define PCU_PPDU_SETUP_INIT_RESPONSE_TO_RESPONSE_RATE_INFO_BW80_MLO_STA_ID_DETAILS_RX_NSTR_MLO_STA_ID_VALID_MSB 12 3924 #define PCU_PPDU_SETUP_INIT_RESPONSE_TO_RESPONSE_RATE_INFO_BW80_MLO_STA_ID_DETAILS_RX_NSTR_MLO_STA_ID_VALID_MASK 0x0000000000001000 3925 3926 3927 /* Description RESERVED_0A 3928 3929 <legal 0> 3930 */ 3931 3932 #define PCU_PPDU_SETUP_INIT_RESPONSE_TO_RESPONSE_RATE_INFO_BW80_MLO_STA_ID_DETAILS_RX_RESERVED_0A_OFFSET 0x0000000000000060 3933 #define PCU_PPDU_SETUP_INIT_RESPONSE_TO_RESPONSE_RATE_INFO_BW80_MLO_STA_ID_DETAILS_RX_RESERVED_0A_LSB 13 3934 #define PCU_PPDU_SETUP_INIT_RESPONSE_TO_RESPONSE_RATE_INFO_BW80_MLO_STA_ID_DETAILS_RX_RESERVED_0A_MSB 15 3935 #define PCU_PPDU_SETUP_INIT_RESPONSE_TO_RESPONSE_RATE_INFO_BW80_MLO_STA_ID_DETAILS_RX_RESERVED_0A_MASK 0x000000000000e000 3936 3937 3938 /* Description REQUIRED_RESPONSE_TIME 3939 3940 When non-zero, indicates that PDG shall pad the response 3941 transmission to the indicated duration (in us) 3942 */ 3943 3944 #define PCU_PPDU_SETUP_INIT_RESPONSE_TO_RESPONSE_RATE_INFO_BW80_REQUIRED_RESPONSE_TIME_OFFSET 0x0000000000000060 3945 #define PCU_PPDU_SETUP_INIT_RESPONSE_TO_RESPONSE_RATE_INFO_BW80_REQUIRED_RESPONSE_TIME_LSB 16 3946 #define PCU_PPDU_SETUP_INIT_RESPONSE_TO_RESPONSE_RATE_INFO_BW80_REQUIRED_RESPONSE_TIME_MSB 27 3947 #define PCU_PPDU_SETUP_INIT_RESPONSE_TO_RESPONSE_RATE_INFO_BW80_REQUIRED_RESPONSE_TIME_MASK 0x000000000fff0000 3948 3949 3950 /* Description DOT11BE_PARAMS_PLACEHOLDER 3951 3952 4 bytes for use as placeholders for 'Dot11be_*' parameters 3953 3954 */ 3955 3956 #define PCU_PPDU_SETUP_INIT_RESPONSE_TO_RESPONSE_RATE_INFO_BW80_DOT11BE_PARAMS_PLACEHOLDER_OFFSET 0x0000000000000060 3957 #define PCU_PPDU_SETUP_INIT_RESPONSE_TO_RESPONSE_RATE_INFO_BW80_DOT11BE_PARAMS_PLACEHOLDER_LSB 28 3958 #define PCU_PPDU_SETUP_INIT_RESPONSE_TO_RESPONSE_RATE_INFO_BW80_DOT11BE_PARAMS_PLACEHOLDER_MSB 31 3959 #define PCU_PPDU_SETUP_INIT_RESPONSE_TO_RESPONSE_RATE_INFO_BW80_DOT11BE_PARAMS_PLACEHOLDER_MASK 0x00000000f0000000 3960 3961 3962 /* Description RESPONSE_TO_RESPONSE_RATE_INFO_BW160 3963 3964 Field only valid in case of Response_to_response set to 3965 SU_BA or MU_BA 3966 3967 NOTE: This field is also known as response_to_response_rate_info_pattern_3 3968 in case punctured transmission is enabled. 3969 3970 Used by TXPCU to determine what the transmit rates are for 3971 the response to response transmission in case original 3972 transmission was 160 MHz. 3973 3974 Note: 3975 see field R2R_bw160_active_channel for the BW of this transmission 3976 3977 */ 3978 3979 3980 /* Description RESERVED_0A 3981 3982 3983 <legal 0> 3984 */ 3985 3986 #define PCU_PPDU_SETUP_INIT_RESPONSE_TO_RESPONSE_RATE_INFO_BW160_RESERVED_0A_OFFSET 0x0000000000000060 3987 #define PCU_PPDU_SETUP_INIT_RESPONSE_TO_RESPONSE_RATE_INFO_BW160_RESERVED_0A_LSB 32 3988 #define PCU_PPDU_SETUP_INIT_RESPONSE_TO_RESPONSE_RATE_INFO_BW160_RESERVED_0A_MSB 32 3989 #define PCU_PPDU_SETUP_INIT_RESPONSE_TO_RESPONSE_RATE_INFO_BW160_RESERVED_0A_MASK 0x0000000100000000 3990 3991 3992 /* Description TX_ANTENNA_SECTOR_CTRL 3993 3994 Sectored transmit antenna 3995 <legal all> 3996 */ 3997 3998 #define PCU_PPDU_SETUP_INIT_RESPONSE_TO_RESPONSE_RATE_INFO_BW160_TX_ANTENNA_SECTOR_CTRL_OFFSET 0x0000000000000060 3999 #define PCU_PPDU_SETUP_INIT_RESPONSE_TO_RESPONSE_RATE_INFO_BW160_TX_ANTENNA_SECTOR_CTRL_LSB 33 4000 #define PCU_PPDU_SETUP_INIT_RESPONSE_TO_RESPONSE_RATE_INFO_BW160_TX_ANTENNA_SECTOR_CTRL_MSB 56 4001 #define PCU_PPDU_SETUP_INIT_RESPONSE_TO_RESPONSE_RATE_INFO_BW160_TX_ANTENNA_SECTOR_CTRL_MASK 0x01fffffe00000000 4002 4003 4004 /* Description PKT_TYPE 4005 4006 Packet type: 4007 <enum 0 dot11a>802.11a PPDU type 4008 <enum 1 dot11b>802.11b PPDU type 4009 <enum 2 dot11n_mm>802.11n Mixed Mode PPDU type 4010 <enum 3 dot11ac>802.11ac PPDU type 4011 <enum 4 dot11ax>802.11ax PPDU type 4012 <enum 5 dot11ba>802.11ba (WUR) PPDU type 4013 <enum 6 dot11be>802.11be PPDU type 4014 <enum 7 dot11az>802.11az (ranging) PPDU type 4015 <enum 8 dot11n_gf>802.11n Green Field PPDU type (unsupported 4016 & aborted) 4017 */ 4018 4019 #define PCU_PPDU_SETUP_INIT_RESPONSE_TO_RESPONSE_RATE_INFO_BW160_PKT_TYPE_OFFSET 0x0000000000000060 4020 #define PCU_PPDU_SETUP_INIT_RESPONSE_TO_RESPONSE_RATE_INFO_BW160_PKT_TYPE_LSB 57 4021 #define PCU_PPDU_SETUP_INIT_RESPONSE_TO_RESPONSE_RATE_INFO_BW160_PKT_TYPE_MSB 60 4022 #define PCU_PPDU_SETUP_INIT_RESPONSE_TO_RESPONSE_RATE_INFO_BW160_PKT_TYPE_MASK 0x1e00000000000000 4023 4024 4025 /* Description SMOOTHING 4026 4027 This field is used by PDG to populate the SMOOTHING filed 4028 in the SIG Preamble of the PPDU 4029 <legal 0-1> 4030 */ 4031 4032 #define PCU_PPDU_SETUP_INIT_RESPONSE_TO_RESPONSE_RATE_INFO_BW160_SMOOTHING_OFFSET 0x0000000000000060 4033 #define PCU_PPDU_SETUP_INIT_RESPONSE_TO_RESPONSE_RATE_INFO_BW160_SMOOTHING_LSB 61 4034 #define PCU_PPDU_SETUP_INIT_RESPONSE_TO_RESPONSE_RATE_INFO_BW160_SMOOTHING_MSB 61 4035 #define PCU_PPDU_SETUP_INIT_RESPONSE_TO_RESPONSE_RATE_INFO_BW160_SMOOTHING_MASK 0x2000000000000000 4036 4037 4038 /* Description LDPC 4039 4040 When set, use LDPC transmission rates 4041 */ 4042 4043 #define PCU_PPDU_SETUP_INIT_RESPONSE_TO_RESPONSE_RATE_INFO_BW160_LDPC_OFFSET 0x0000000000000060 4044 #define PCU_PPDU_SETUP_INIT_RESPONSE_TO_RESPONSE_RATE_INFO_BW160_LDPC_LSB 62 4045 #define PCU_PPDU_SETUP_INIT_RESPONSE_TO_RESPONSE_RATE_INFO_BW160_LDPC_MSB 62 4046 #define PCU_PPDU_SETUP_INIT_RESPONSE_TO_RESPONSE_RATE_INFO_BW160_LDPC_MASK 0x4000000000000000 4047 4048 4049 /* Description STBC 4050 4051 When set, use STBC transmission rates 4052 */ 4053 4054 #define PCU_PPDU_SETUP_INIT_RESPONSE_TO_RESPONSE_RATE_INFO_BW160_STBC_OFFSET 0x0000000000000060 4055 #define PCU_PPDU_SETUP_INIT_RESPONSE_TO_RESPONSE_RATE_INFO_BW160_STBC_LSB 63 4056 #define PCU_PPDU_SETUP_INIT_RESPONSE_TO_RESPONSE_RATE_INFO_BW160_STBC_MSB 63 4057 #define PCU_PPDU_SETUP_INIT_RESPONSE_TO_RESPONSE_RATE_INFO_BW160_STBC_MASK 0x8000000000000000 4058 4059 4060 /* Description ALT_TX_PWR 4061 4062 Coex related AlternativeTransmit parameter 4063 4064 Transmit Power in s6.2 format. 4065 In units of 0.25 dBm 4066 <legal all> 4067 */ 4068 4069 #define PCU_PPDU_SETUP_INIT_RESPONSE_TO_RESPONSE_RATE_INFO_BW160_ALT_TX_PWR_OFFSET 0x0000000000000068 4070 #define PCU_PPDU_SETUP_INIT_RESPONSE_TO_RESPONSE_RATE_INFO_BW160_ALT_TX_PWR_LSB 0 4071 #define PCU_PPDU_SETUP_INIT_RESPONSE_TO_RESPONSE_RATE_INFO_BW160_ALT_TX_PWR_MSB 7 4072 #define PCU_PPDU_SETUP_INIT_RESPONSE_TO_RESPONSE_RATE_INFO_BW160_ALT_TX_PWR_MASK 0x00000000000000ff 4073 4074 4075 /* Description ALT_MIN_TX_PWR 4076 4077 Coex related Alternative Transmit parameter 4078 4079 Minimum allowed Transmit Power in s6.2 format. 4080 In units of 0.25 dBm 4081 <legal all> 4082 */ 4083 4084 #define PCU_PPDU_SETUP_INIT_RESPONSE_TO_RESPONSE_RATE_INFO_BW160_ALT_MIN_TX_PWR_OFFSET 0x0000000000000068 4085 #define PCU_PPDU_SETUP_INIT_RESPONSE_TO_RESPONSE_RATE_INFO_BW160_ALT_MIN_TX_PWR_LSB 8 4086 #define PCU_PPDU_SETUP_INIT_RESPONSE_TO_RESPONSE_RATE_INFO_BW160_ALT_MIN_TX_PWR_MSB 15 4087 #define PCU_PPDU_SETUP_INIT_RESPONSE_TO_RESPONSE_RATE_INFO_BW160_ALT_MIN_TX_PWR_MASK 0x000000000000ff00 4088 4089 4090 /* Description ALT_NSS 4091 4092 Coex related Alternative Transmit parameter 4093 4094 Number of spatial streams. 4095 4096 <enum 0 1_spatial_stream>Single spatial stream 4097 <enum 1 2_spatial_streams>2 spatial streams 4098 <enum 2 3_spatial_streams>3 spatial streams 4099 <enum 3 4_spatial_streams>4 spatial streams 4100 <enum 4 5_spatial_streams>5 spatial streams 4101 <enum 5 6_spatial_streams>6 spatial streams 4102 <enum 6 7_spatial_streams>7 spatial streams 4103 <enum 7 8_spatial_streams>8 spatial streams 4104 */ 4105 4106 #define PCU_PPDU_SETUP_INIT_RESPONSE_TO_RESPONSE_RATE_INFO_BW160_ALT_NSS_OFFSET 0x0000000000000068 4107 #define PCU_PPDU_SETUP_INIT_RESPONSE_TO_RESPONSE_RATE_INFO_BW160_ALT_NSS_LSB 16 4108 #define PCU_PPDU_SETUP_INIT_RESPONSE_TO_RESPONSE_RATE_INFO_BW160_ALT_NSS_MSB 18 4109 #define PCU_PPDU_SETUP_INIT_RESPONSE_TO_RESPONSE_RATE_INFO_BW160_ALT_NSS_MASK 0x0000000000070000 4110 4111 4112 /* Description ALT_TX_CHAIN_MASK 4113 4114 Coex related Alternative Transmit parameter 4115 4116 Chain mask to support up to 8 antennas. 4117 <legal 1-255> 4118 */ 4119 4120 #define PCU_PPDU_SETUP_INIT_RESPONSE_TO_RESPONSE_RATE_INFO_BW160_ALT_TX_CHAIN_MASK_OFFSET 0x0000000000000068 4121 #define PCU_PPDU_SETUP_INIT_RESPONSE_TO_RESPONSE_RATE_INFO_BW160_ALT_TX_CHAIN_MASK_LSB 19 4122 #define PCU_PPDU_SETUP_INIT_RESPONSE_TO_RESPONSE_RATE_INFO_BW160_ALT_TX_CHAIN_MASK_MSB 26 4123 #define PCU_PPDU_SETUP_INIT_RESPONSE_TO_RESPONSE_RATE_INFO_BW160_ALT_TX_CHAIN_MASK_MASK 0x0000000007f80000 4124 4125 4126 /* Description ALT_BW 4127 4128 Coex related Alternative Transmit parameter 4129 4130 The BW of the upcoming transmission. 4131 4132 <enum 0 20_mhz>20 Mhz BW 4133 <enum 1 40_mhz>40 Mhz BW 4134 <enum 2 80_mhz>80 Mhz BW 4135 <enum 3 160_mhz>160 Mhz BW 4136 <enum 4 320_mhz>320 Mhz BW 4137 <enum 5 240_mhz>240 Mhz BW 4138 */ 4139 4140 #define PCU_PPDU_SETUP_INIT_RESPONSE_TO_RESPONSE_RATE_INFO_BW160_ALT_BW_OFFSET 0x0000000000000068 4141 #define PCU_PPDU_SETUP_INIT_RESPONSE_TO_RESPONSE_RATE_INFO_BW160_ALT_BW_LSB 27 4142 #define PCU_PPDU_SETUP_INIT_RESPONSE_TO_RESPONSE_RATE_INFO_BW160_ALT_BW_MSB 29 4143 #define PCU_PPDU_SETUP_INIT_RESPONSE_TO_RESPONSE_RATE_INFO_BW160_ALT_BW_MASK 0x0000000038000000 4144 4145 4146 /* Description STF_LTF_3DB_BOOST 4147 4148 Boost the STF and LTF power by 3dB in 11a/n/ac packets. 4149 This includes both the legacy preambles and the HT/VHT preambles.0: 4150 disable power boost1: enable power boost 4151 <legal all> 4152 */ 4153 4154 #define PCU_PPDU_SETUP_INIT_RESPONSE_TO_RESPONSE_RATE_INFO_BW160_STF_LTF_3DB_BOOST_OFFSET 0x0000000000000068 4155 #define PCU_PPDU_SETUP_INIT_RESPONSE_TO_RESPONSE_RATE_INFO_BW160_STF_LTF_3DB_BOOST_LSB 30 4156 #define PCU_PPDU_SETUP_INIT_RESPONSE_TO_RESPONSE_RATE_INFO_BW160_STF_LTF_3DB_BOOST_MSB 30 4157 #define PCU_PPDU_SETUP_INIT_RESPONSE_TO_RESPONSE_RATE_INFO_BW160_STF_LTF_3DB_BOOST_MASK 0x0000000040000000 4158 4159 4160 /* Description FORCE_EXTRA_SYMBOL 4161 4162 Set to 1 to force an extra OFDM symbol (or symbols) even 4163 if the PPDU encoding process does not result in an extra 4164 OFDM symbol (or symbols) 4165 */ 4166 4167 #define PCU_PPDU_SETUP_INIT_RESPONSE_TO_RESPONSE_RATE_INFO_BW160_FORCE_EXTRA_SYMBOL_OFFSET 0x0000000000000068 4168 #define PCU_PPDU_SETUP_INIT_RESPONSE_TO_RESPONSE_RATE_INFO_BW160_FORCE_EXTRA_SYMBOL_LSB 31 4169 #define PCU_PPDU_SETUP_INIT_RESPONSE_TO_RESPONSE_RATE_INFO_BW160_FORCE_EXTRA_SYMBOL_MSB 31 4170 #define PCU_PPDU_SETUP_INIT_RESPONSE_TO_RESPONSE_RATE_INFO_BW160_FORCE_EXTRA_SYMBOL_MASK 0x0000000080000000 4171 4172 4173 /* Description ALT_RATE_MCS 4174 4175 Coex related Alternative Transmit parameter 4176 4177 For details, refer to MCS_TYPE 4178 Note: This is "rate" in case of 11a/11b 4179 description 4180 <legal all> 4181 */ 4182 4183 #define PCU_PPDU_SETUP_INIT_RESPONSE_TO_RESPONSE_RATE_INFO_BW160_ALT_RATE_MCS_OFFSET 0x0000000000000068 4184 #define PCU_PPDU_SETUP_INIT_RESPONSE_TO_RESPONSE_RATE_INFO_BW160_ALT_RATE_MCS_LSB 32 4185 #define PCU_PPDU_SETUP_INIT_RESPONSE_TO_RESPONSE_RATE_INFO_BW160_ALT_RATE_MCS_MSB 35 4186 #define PCU_PPDU_SETUP_INIT_RESPONSE_TO_RESPONSE_RATE_INFO_BW160_ALT_RATE_MCS_MASK 0x0000000f00000000 4187 4188 4189 /* Description NSS 4190 4191 Number of spatial streams. 4192 4193 <enum 0 1_spatial_stream>Single spatial stream 4194 <enum 1 2_spatial_streams>2 spatial streams 4195 <enum 2 3_spatial_streams>3 spatial streams 4196 <enum 3 4_spatial_streams>4 spatial streams 4197 <enum 4 5_spatial_streams>5 spatial streams 4198 <enum 5 6_spatial_streams>6 spatial streams 4199 <enum 6 7_spatial_streams>7 spatial streams 4200 <enum 7 8_spatial_streams>8 spatial streams 4201 */ 4202 4203 #define PCU_PPDU_SETUP_INIT_RESPONSE_TO_RESPONSE_RATE_INFO_BW160_NSS_OFFSET 0x0000000000000068 4204 #define PCU_PPDU_SETUP_INIT_RESPONSE_TO_RESPONSE_RATE_INFO_BW160_NSS_LSB 36 4205 #define PCU_PPDU_SETUP_INIT_RESPONSE_TO_RESPONSE_RATE_INFO_BW160_NSS_MSB 38 4206 #define PCU_PPDU_SETUP_INIT_RESPONSE_TO_RESPONSE_RATE_INFO_BW160_NSS_MASK 0x0000007000000000 4207 4208 4209 /* Description DPD_ENABLE 4210 4211 DPD enable control 4212 4213 This is needed on a per packet basis 4214 <enum 0 dpd_off> DPD profile not applied to current 4215 packet 4216 <enum 1 dpd_on> DPD profile applied to current packet 4217 if available 4218 <legal 0-1> 4219 4220 This field is not applicable in11ah mode of operation and 4221 is ignored by the HW 4222 */ 4223 4224 #define PCU_PPDU_SETUP_INIT_RESPONSE_TO_RESPONSE_RATE_INFO_BW160_DPD_ENABLE_OFFSET 0x0000000000000068 4225 #define PCU_PPDU_SETUP_INIT_RESPONSE_TO_RESPONSE_RATE_INFO_BW160_DPD_ENABLE_LSB 39 4226 #define PCU_PPDU_SETUP_INIT_RESPONSE_TO_RESPONSE_RATE_INFO_BW160_DPD_ENABLE_MSB 39 4227 #define PCU_PPDU_SETUP_INIT_RESPONSE_TO_RESPONSE_RATE_INFO_BW160_DPD_ENABLE_MASK 0x0000008000000000 4228 4229 4230 /* Description TX_PWR 4231 4232 Transmit Power in s6.2 format. 4233 In units of 0.25 dBm 4234 <legal all> 4235 */ 4236 4237 #define PCU_PPDU_SETUP_INIT_RESPONSE_TO_RESPONSE_RATE_INFO_BW160_TX_PWR_OFFSET 0x0000000000000068 4238 #define PCU_PPDU_SETUP_INIT_RESPONSE_TO_RESPONSE_RATE_INFO_BW160_TX_PWR_LSB 40 4239 #define PCU_PPDU_SETUP_INIT_RESPONSE_TO_RESPONSE_RATE_INFO_BW160_TX_PWR_MSB 47 4240 #define PCU_PPDU_SETUP_INIT_RESPONSE_TO_RESPONSE_RATE_INFO_BW160_TX_PWR_MASK 0x0000ff0000000000 4241 4242 4243 /* Description MIN_TX_PWR 4244 4245 Coex related field: 4246 4247 Minimum allowed Transmit Power in s6.2 format. 4248 In units of 0.25 dBm 4249 <legal all> 4250 */ 4251 4252 #define PCU_PPDU_SETUP_INIT_RESPONSE_TO_RESPONSE_RATE_INFO_BW160_MIN_TX_PWR_OFFSET 0x0000000000000068 4253 #define PCU_PPDU_SETUP_INIT_RESPONSE_TO_RESPONSE_RATE_INFO_BW160_MIN_TX_PWR_LSB 48 4254 #define PCU_PPDU_SETUP_INIT_RESPONSE_TO_RESPONSE_RATE_INFO_BW160_MIN_TX_PWR_MSB 55 4255 #define PCU_PPDU_SETUP_INIT_RESPONSE_TO_RESPONSE_RATE_INFO_BW160_MIN_TX_PWR_MASK 0x00ff000000000000 4256 4257 4258 /* Description TX_CHAIN_MASK 4259 4260 Chain mask to support up to 8 antennas. 4261 <legal 1-255> 4262 */ 4263 4264 #define PCU_PPDU_SETUP_INIT_RESPONSE_TO_RESPONSE_RATE_INFO_BW160_TX_CHAIN_MASK_OFFSET 0x0000000000000068 4265 #define PCU_PPDU_SETUP_INIT_RESPONSE_TO_RESPONSE_RATE_INFO_BW160_TX_CHAIN_MASK_LSB 56 4266 #define PCU_PPDU_SETUP_INIT_RESPONSE_TO_RESPONSE_RATE_INFO_BW160_TX_CHAIN_MASK_MSB 63 4267 #define PCU_PPDU_SETUP_INIT_RESPONSE_TO_RESPONSE_RATE_INFO_BW160_TX_CHAIN_MASK_MASK 0xff00000000000000 4268 4269 4270 /* Description RESERVED_3A 4271 4272 <legal 0> 4273 */ 4274 4275 #define PCU_PPDU_SETUP_INIT_RESPONSE_TO_RESPONSE_RATE_INFO_BW160_RESERVED_3A_OFFSET 0x0000000000000070 4276 #define PCU_PPDU_SETUP_INIT_RESPONSE_TO_RESPONSE_RATE_INFO_BW160_RESERVED_3A_LSB 0 4277 #define PCU_PPDU_SETUP_INIT_RESPONSE_TO_RESPONSE_RATE_INFO_BW160_RESERVED_3A_MSB 7 4278 #define PCU_PPDU_SETUP_INIT_RESPONSE_TO_RESPONSE_RATE_INFO_BW160_RESERVED_3A_MASK 0x00000000000000ff 4279 4280 4281 /* Description SGI 4282 4283 Field only valid when pkt type is HT or VHT.For 11ax see 4284 field Dot11ax_CP_LTF_size 4285 4286 <enum 0 0_8_us_sgi > Legacy normal GI. Can also be used 4287 for HE 4288 <enum 1 0_4_us_sgi > Legacy short GI. Can also be used 4289 for HE 4290 <enum 2 1_6_us_sgi > Not used for pre 11ax pkt_types. 4291 4292 <enum 3 3_2_us_sgi > Not used for pre 11ax pkt_types 4293 4294 4295 <legal 0 - 3> 4296 */ 4297 4298 #define PCU_PPDU_SETUP_INIT_RESPONSE_TO_RESPONSE_RATE_INFO_BW160_SGI_OFFSET 0x0000000000000070 4299 #define PCU_PPDU_SETUP_INIT_RESPONSE_TO_RESPONSE_RATE_INFO_BW160_SGI_LSB 8 4300 #define PCU_PPDU_SETUP_INIT_RESPONSE_TO_RESPONSE_RATE_INFO_BW160_SGI_MSB 9 4301 #define PCU_PPDU_SETUP_INIT_RESPONSE_TO_RESPONSE_RATE_INFO_BW160_SGI_MASK 0x0000000000000300 4302 4303 4304 /* Description RATE_MCS 4305 4306 For details, refer to MCS_TYPE description 4307 Note: This is "rate" in case of 11a/11b 4308 4309 <legal all> 4310 */ 4311 4312 #define PCU_PPDU_SETUP_INIT_RESPONSE_TO_RESPONSE_RATE_INFO_BW160_RATE_MCS_OFFSET 0x0000000000000070 4313 #define PCU_PPDU_SETUP_INIT_RESPONSE_TO_RESPONSE_RATE_INFO_BW160_RATE_MCS_LSB 10 4314 #define PCU_PPDU_SETUP_INIT_RESPONSE_TO_RESPONSE_RATE_INFO_BW160_RATE_MCS_MSB 13 4315 #define PCU_PPDU_SETUP_INIT_RESPONSE_TO_RESPONSE_RATE_INFO_BW160_RATE_MCS_MASK 0x0000000000003c00 4316 4317 4318 /* Description RESERVED_3B 4319 4320 <legal 0> 4321 */ 4322 4323 #define PCU_PPDU_SETUP_INIT_RESPONSE_TO_RESPONSE_RATE_INFO_BW160_RESERVED_3B_OFFSET 0x0000000000000070 4324 #define PCU_PPDU_SETUP_INIT_RESPONSE_TO_RESPONSE_RATE_INFO_BW160_RESERVED_3B_LSB 14 4325 #define PCU_PPDU_SETUP_INIT_RESPONSE_TO_RESPONSE_RATE_INFO_BW160_RESERVED_3B_MSB 15 4326 #define PCU_PPDU_SETUP_INIT_RESPONSE_TO_RESPONSE_RATE_INFO_BW160_RESERVED_3B_MASK 0x000000000000c000 4327 4328 4329 /* Description TX_PWR_1 4330 4331 Default (desired) transmit parameter for the second chain 4332 4333 4334 Transmit Power in s6.2 format. 4335 In units of 0.25 dBm 4336 4337 Note that there is no Min value for this 4338 <legal all> 4339 */ 4340 4341 #define PCU_PPDU_SETUP_INIT_RESPONSE_TO_RESPONSE_RATE_INFO_BW160_TX_PWR_1_OFFSET 0x0000000000000070 4342 #define PCU_PPDU_SETUP_INIT_RESPONSE_TO_RESPONSE_RATE_INFO_BW160_TX_PWR_1_LSB 16 4343 #define PCU_PPDU_SETUP_INIT_RESPONSE_TO_RESPONSE_RATE_INFO_BW160_TX_PWR_1_MSB 23 4344 #define PCU_PPDU_SETUP_INIT_RESPONSE_TO_RESPONSE_RATE_INFO_BW160_TX_PWR_1_MASK 0x0000000000ff0000 4345 4346 4347 /* Description ALT_TX_PWR_1 4348 4349 Alternate (desired) transmit parameter for the second chain 4350 4351 4352 Transmit Power in s6.2 format. 4353 In units of 0.25 dBm 4354 4355 Note that there is no Min value for this 4356 <legal all> 4357 */ 4358 4359 #define PCU_PPDU_SETUP_INIT_RESPONSE_TO_RESPONSE_RATE_INFO_BW160_ALT_TX_PWR_1_OFFSET 0x0000000000000070 4360 #define PCU_PPDU_SETUP_INIT_RESPONSE_TO_RESPONSE_RATE_INFO_BW160_ALT_TX_PWR_1_LSB 24 4361 #define PCU_PPDU_SETUP_INIT_RESPONSE_TO_RESPONSE_RATE_INFO_BW160_ALT_TX_PWR_1_MSB 31 4362 #define PCU_PPDU_SETUP_INIT_RESPONSE_TO_RESPONSE_RATE_INFO_BW160_ALT_TX_PWR_1_MASK 0x00000000ff000000 4363 4364 4365 /* Description AGGREGATION 4366 4367 Field only valid in case of pkt_type == 11n 4368 4369 <enum 0 mpdu> Indicates MPDU format. TXPCU will select 4370 this setting if the CBF response only contains a single 4371 segment 4372 <enum 1 a_mpdu> Indicates A-MPDU format. TXPCU will 4373 select this setting if the CBF response will contain two 4374 or more segments 4375 <legal 0-1> 4376 */ 4377 4378 #define PCU_PPDU_SETUP_INIT_RESPONSE_TO_RESPONSE_RATE_INFO_BW160_AGGREGATION_OFFSET 0x0000000000000070 4379 #define PCU_PPDU_SETUP_INIT_RESPONSE_TO_RESPONSE_RATE_INFO_BW160_AGGREGATION_LSB 32 4380 #define PCU_PPDU_SETUP_INIT_RESPONSE_TO_RESPONSE_RATE_INFO_BW160_AGGREGATION_MSB 32 4381 #define PCU_PPDU_SETUP_INIT_RESPONSE_TO_RESPONSE_RATE_INFO_BW160_AGGREGATION_MASK 0x0000000100000000 4382 4383 4384 /* Description DOT11AX_BSS_COLOR_ID 4385 4386 BSS color of the nextwork to which this STA belongs. 4387 When generated by TXPCU, this field is set equal to: Dot11ax_received_Bss_color_id 4388 4389 4390 <legal all> 4391 */ 4392 4393 #define PCU_PPDU_SETUP_INIT_RESPONSE_TO_RESPONSE_RATE_INFO_BW160_DOT11AX_BSS_COLOR_ID_OFFSET 0x0000000000000070 4394 #define PCU_PPDU_SETUP_INIT_RESPONSE_TO_RESPONSE_RATE_INFO_BW160_DOT11AX_BSS_COLOR_ID_LSB 33 4395 #define PCU_PPDU_SETUP_INIT_RESPONSE_TO_RESPONSE_RATE_INFO_BW160_DOT11AX_BSS_COLOR_ID_MSB 38 4396 #define PCU_PPDU_SETUP_INIT_RESPONSE_TO_RESPONSE_RATE_INFO_BW160_DOT11AX_BSS_COLOR_ID_MASK 0x0000007e00000000 4397 4398 4399 /* Description DOT11AX_SPATIAL_REUSE 4400 4401 This field is only valid for pkt_type == 11ax 4402 4403 Spatial re-use 4404 <legal all> 4405 */ 4406 4407 #define PCU_PPDU_SETUP_INIT_RESPONSE_TO_RESPONSE_RATE_INFO_BW160_DOT11AX_SPATIAL_REUSE_OFFSET 0x0000000000000070 4408 #define PCU_PPDU_SETUP_INIT_RESPONSE_TO_RESPONSE_RATE_INFO_BW160_DOT11AX_SPATIAL_REUSE_LSB 39 4409 #define PCU_PPDU_SETUP_INIT_RESPONSE_TO_RESPONSE_RATE_INFO_BW160_DOT11AX_SPATIAL_REUSE_MSB 42 4410 #define PCU_PPDU_SETUP_INIT_RESPONSE_TO_RESPONSE_RATE_INFO_BW160_DOT11AX_SPATIAL_REUSE_MASK 0x0000078000000000 4411 4412 4413 /* Description DOT11AX_CP_LTF_SIZE 4414 4415 field is only valid for pkt_type == 11ax 4416 4417 Indicates the CP and HE-LTF type 4418 4419 <enum 0 OneX_LTF_0_8CP> 1xLTF + 0.8 us CP 4420 <enum 1 TwoX_LTF_0_8CP> 2x LTF + 0.8 µs CP 4421 <enum 2 TwoX_LTF_1_6CP> 2x LTF + 1.6 µs CP 4422 <enum 3 FourX_LTF_0_8CP_3_2CP> 4423 When DCM == 0 OR STBC == 0: 4x LTF + 3.2 µs CP 4424 When DCM == 1 AND STBC == 1: 4x LTF + 0.8 µs CP. Note: 4425 In this scenario, Neither DCM nor STBC is applied to HE 4426 data field. 4427 4428 If ( DCM == 1 ) and ( MCS > 0 ) and (STBC == 0) 4429 0 = 1xLTF + 0.4 usec 4430 1 = 2xLTF + 0.4 usec 4431 2~3 = Reserved 4432 4433 <legal all> 4434 */ 4435 4436 #define PCU_PPDU_SETUP_INIT_RESPONSE_TO_RESPONSE_RATE_INFO_BW160_DOT11AX_CP_LTF_SIZE_OFFSET 0x0000000000000070 4437 #define PCU_PPDU_SETUP_INIT_RESPONSE_TO_RESPONSE_RATE_INFO_BW160_DOT11AX_CP_LTF_SIZE_LSB 43 4438 #define PCU_PPDU_SETUP_INIT_RESPONSE_TO_RESPONSE_RATE_INFO_BW160_DOT11AX_CP_LTF_SIZE_MSB 44 4439 #define PCU_PPDU_SETUP_INIT_RESPONSE_TO_RESPONSE_RATE_INFO_BW160_DOT11AX_CP_LTF_SIZE_MASK 0x0000180000000000 4440 4441 4442 /* Description DOT11AX_DCM 4443 4444 field is only valid for pkt_type == 11ax 4445 4446 Indicates whether dual sub-carrier modulation is applied 4447 4448 0: No DCM 4449 1:DCM 4450 <legal all> 4451 */ 4452 4453 #define PCU_PPDU_SETUP_INIT_RESPONSE_TO_RESPONSE_RATE_INFO_BW160_DOT11AX_DCM_OFFSET 0x0000000000000070 4454 #define PCU_PPDU_SETUP_INIT_RESPONSE_TO_RESPONSE_RATE_INFO_BW160_DOT11AX_DCM_LSB 45 4455 #define PCU_PPDU_SETUP_INIT_RESPONSE_TO_RESPONSE_RATE_INFO_BW160_DOT11AX_DCM_MSB 45 4456 #define PCU_PPDU_SETUP_INIT_RESPONSE_TO_RESPONSE_RATE_INFO_BW160_DOT11AX_DCM_MASK 0x0000200000000000 4457 4458 4459 /* Description DOT11AX_DOPPLER_INDICATION 4460 4461 field is only valid for pkt_type == 11ax 4462 4463 0: No Doppler support 4464 1: Doppler support 4465 <legal all> 4466 */ 4467 4468 #define PCU_PPDU_SETUP_INIT_RESPONSE_TO_RESPONSE_RATE_INFO_BW160_DOT11AX_DOPPLER_INDICATION_OFFSET 0x0000000000000070 4469 #define PCU_PPDU_SETUP_INIT_RESPONSE_TO_RESPONSE_RATE_INFO_BW160_DOT11AX_DOPPLER_INDICATION_LSB 46 4470 #define PCU_PPDU_SETUP_INIT_RESPONSE_TO_RESPONSE_RATE_INFO_BW160_DOT11AX_DOPPLER_INDICATION_MSB 46 4471 #define PCU_PPDU_SETUP_INIT_RESPONSE_TO_RESPONSE_RATE_INFO_BW160_DOT11AX_DOPPLER_INDICATION_MASK 0x0000400000000000 4472 4473 4474 /* Description DOT11AX_SU_EXTENDED 4475 4476 field is only valid for pkt_type == 11ax OR pkt_type == 4477 11be 4478 4479 When set, the 11ax or 11be frame is of the extended range 4480 format 4481 <legal all> 4482 */ 4483 4484 #define PCU_PPDU_SETUP_INIT_RESPONSE_TO_RESPONSE_RATE_INFO_BW160_DOT11AX_SU_EXTENDED_OFFSET 0x0000000000000070 4485 #define PCU_PPDU_SETUP_INIT_RESPONSE_TO_RESPONSE_RATE_INFO_BW160_DOT11AX_SU_EXTENDED_LSB 47 4486 #define PCU_PPDU_SETUP_INIT_RESPONSE_TO_RESPONSE_RATE_INFO_BW160_DOT11AX_SU_EXTENDED_MSB 47 4487 #define PCU_PPDU_SETUP_INIT_RESPONSE_TO_RESPONSE_RATE_INFO_BW160_DOT11AX_SU_EXTENDED_MASK 0x0000800000000000 4488 4489 4490 /* Description DOT11AX_MIN_PACKET_EXTENSION 4491 4492 field is only valid for pkt_type == 11ax OR pkt_type == 4493 11be 4494 4495 The min packet extension duration for this user. 4496 0: no extension 4497 1: 8us 4498 2: 16 us 4499 3: 20 us (only for .11be) 4500 <legal 0-3> 4501 */ 4502 4503 #define PCU_PPDU_SETUP_INIT_RESPONSE_TO_RESPONSE_RATE_INFO_BW160_DOT11AX_MIN_PACKET_EXTENSION_OFFSET 0x0000000000000070 4504 #define PCU_PPDU_SETUP_INIT_RESPONSE_TO_RESPONSE_RATE_INFO_BW160_DOT11AX_MIN_PACKET_EXTENSION_LSB 48 4505 #define PCU_PPDU_SETUP_INIT_RESPONSE_TO_RESPONSE_RATE_INFO_BW160_DOT11AX_MIN_PACKET_EXTENSION_MSB 49 4506 #define PCU_PPDU_SETUP_INIT_RESPONSE_TO_RESPONSE_RATE_INFO_BW160_DOT11AX_MIN_PACKET_EXTENSION_MASK 0x0003000000000000 4507 4508 4509 /* Description DOT11AX_PE_NSS 4510 4511 Number of active spatial streams during packet extension. 4512 4513 4514 <enum 0 1_spatial_stream>Single spatial stream 4515 <enum 1 2_spatial_streams>2 spatial streams 4516 <enum 2 3_spatial_streams>3 spatial streams 4517 <enum 3 4_spatial_streams>4 spatial streams 4518 <enum 4 5_spatial_streams>5 spatial streams 4519 <enum 5 6_spatial_streams>6 spatial streams 4520 <enum 6 7_spatial_streams>7 spatial streams 4521 <enum 7 8_spatial_streams>8 spatial streams 4522 */ 4523 4524 #define PCU_PPDU_SETUP_INIT_RESPONSE_TO_RESPONSE_RATE_INFO_BW160_DOT11AX_PE_NSS_OFFSET 0x0000000000000070 4525 #define PCU_PPDU_SETUP_INIT_RESPONSE_TO_RESPONSE_RATE_INFO_BW160_DOT11AX_PE_NSS_LSB 50 4526 #define PCU_PPDU_SETUP_INIT_RESPONSE_TO_RESPONSE_RATE_INFO_BW160_DOT11AX_PE_NSS_MSB 52 4527 #define PCU_PPDU_SETUP_INIT_RESPONSE_TO_RESPONSE_RATE_INFO_BW160_DOT11AX_PE_NSS_MASK 0x001c000000000000 4528 4529 4530 /* Description DOT11AX_PE_CONTENT 4531 4532 Content of packet extension. Valid for all 11ax packets 4533 having packet extension 4534 4535 0-he_ltf, 1-last_data_symbol 4536 <legal all> 4537 */ 4538 4539 #define PCU_PPDU_SETUP_INIT_RESPONSE_TO_RESPONSE_RATE_INFO_BW160_DOT11AX_PE_CONTENT_OFFSET 0x0000000000000070 4540 #define PCU_PPDU_SETUP_INIT_RESPONSE_TO_RESPONSE_RATE_INFO_BW160_DOT11AX_PE_CONTENT_LSB 53 4541 #define PCU_PPDU_SETUP_INIT_RESPONSE_TO_RESPONSE_RATE_INFO_BW160_DOT11AX_PE_CONTENT_MSB 53 4542 #define PCU_PPDU_SETUP_INIT_RESPONSE_TO_RESPONSE_RATE_INFO_BW160_DOT11AX_PE_CONTENT_MASK 0x0020000000000000 4543 4544 4545 /* Description DOT11AX_PE_LTF_SIZE 4546 4547 LTF size to be used during packet extention. . This field 4548 is valid for both FTM and non-FTM packets. 4549 0-1x 4550 1-2x (unsupported un HWK-1) 4551 2-4x (unsupported un HWK-1) 4552 <legal all> 4553 */ 4554 4555 #define PCU_PPDU_SETUP_INIT_RESPONSE_TO_RESPONSE_RATE_INFO_BW160_DOT11AX_PE_LTF_SIZE_OFFSET 0x0000000000000070 4556 #define PCU_PPDU_SETUP_INIT_RESPONSE_TO_RESPONSE_RATE_INFO_BW160_DOT11AX_PE_LTF_SIZE_LSB 54 4557 #define PCU_PPDU_SETUP_INIT_RESPONSE_TO_RESPONSE_RATE_INFO_BW160_DOT11AX_PE_LTF_SIZE_MSB 55 4558 #define PCU_PPDU_SETUP_INIT_RESPONSE_TO_RESPONSE_RATE_INFO_BW160_DOT11AX_PE_LTF_SIZE_MASK 0x00c0000000000000 4559 4560 4561 /* Description DOT11AX_CHAIN_CSD_EN 4562 4563 This field denotes whether to apply CSD on the preamble 4564 and data portion of the packet. This field is valid for 4565 all transmit packets 4566 0: disable per-chain csd 4567 1: enable per-chain csd 4568 <legal all> 4569 */ 4570 4571 #define PCU_PPDU_SETUP_INIT_RESPONSE_TO_RESPONSE_RATE_INFO_BW160_DOT11AX_CHAIN_CSD_EN_OFFSET 0x0000000000000070 4572 #define PCU_PPDU_SETUP_INIT_RESPONSE_TO_RESPONSE_RATE_INFO_BW160_DOT11AX_CHAIN_CSD_EN_LSB 56 4573 #define PCU_PPDU_SETUP_INIT_RESPONSE_TO_RESPONSE_RATE_INFO_BW160_DOT11AX_CHAIN_CSD_EN_MSB 56 4574 #define PCU_PPDU_SETUP_INIT_RESPONSE_TO_RESPONSE_RATE_INFO_BW160_DOT11AX_CHAIN_CSD_EN_MASK 0x0100000000000000 4575 4576 4577 /* Description DOT11AX_PE_CHAIN_CSD_EN 4578 4579 This field denotes whether to apply CSD on the packet extension 4580 portion of the packet. This field is valid for all 11ax 4581 packets. 4582 0: disable per-chain csd 4583 1: enable per-chain csd 4584 <legal all> 4585 */ 4586 4587 #define PCU_PPDU_SETUP_INIT_RESPONSE_TO_RESPONSE_RATE_INFO_BW160_DOT11AX_PE_CHAIN_CSD_EN_OFFSET 0x0000000000000070 4588 #define PCU_PPDU_SETUP_INIT_RESPONSE_TO_RESPONSE_RATE_INFO_BW160_DOT11AX_PE_CHAIN_CSD_EN_LSB 57 4589 #define PCU_PPDU_SETUP_INIT_RESPONSE_TO_RESPONSE_RATE_INFO_BW160_DOT11AX_PE_CHAIN_CSD_EN_MSB 57 4590 #define PCU_PPDU_SETUP_INIT_RESPONSE_TO_RESPONSE_RATE_INFO_BW160_DOT11AX_PE_CHAIN_CSD_EN_MASK 0x0200000000000000 4591 4592 4593 /* Description DOT11AX_DL_UL_FLAG 4594 4595 field is only valid for pkt_type == 11ax 4596 4597 <enum 0 DL_UL_FLAG_IS_DL_OR_TDLS> 4598 <enum 1 DL_UL_FLAG_IS_UL> 4599 4600 <legal all> 4601 */ 4602 4603 #define PCU_PPDU_SETUP_INIT_RESPONSE_TO_RESPONSE_RATE_INFO_BW160_DOT11AX_DL_UL_FLAG_OFFSET 0x0000000000000070 4604 #define PCU_PPDU_SETUP_INIT_RESPONSE_TO_RESPONSE_RATE_INFO_BW160_DOT11AX_DL_UL_FLAG_LSB 58 4605 #define PCU_PPDU_SETUP_INIT_RESPONSE_TO_RESPONSE_RATE_INFO_BW160_DOT11AX_DL_UL_FLAG_MSB 58 4606 #define PCU_PPDU_SETUP_INIT_RESPONSE_TO_RESPONSE_RATE_INFO_BW160_DOT11AX_DL_UL_FLAG_MASK 0x0400000000000000 4607 4608 4609 /* Description RESERVED_4A 4610 4611 <legal 0> 4612 */ 4613 4614 #define PCU_PPDU_SETUP_INIT_RESPONSE_TO_RESPONSE_RATE_INFO_BW160_RESERVED_4A_OFFSET 0x0000000000000070 4615 #define PCU_PPDU_SETUP_INIT_RESPONSE_TO_RESPONSE_RATE_INFO_BW160_RESERVED_4A_LSB 59 4616 #define PCU_PPDU_SETUP_INIT_RESPONSE_TO_RESPONSE_RATE_INFO_BW160_RESERVED_4A_MSB 63 4617 #define PCU_PPDU_SETUP_INIT_RESPONSE_TO_RESPONSE_RATE_INFO_BW160_RESERVED_4A_MASK 0xf800000000000000 4618 4619 4620 /* Description DOT11AX_EXT_RU_START_INDEX 4621 4622 field is only valid for pkt_type == 11ax and Dot11ax_su_extended 4623 == 1 4624 4625 RU Number to which User is assigned 4626 4627 The RU numbering bitwidth is only enough to cover the 20MHz 4628 BW that extended range allows 4629 <legal 0-8> 4630 */ 4631 4632 #define PCU_PPDU_SETUP_INIT_RESPONSE_TO_RESPONSE_RATE_INFO_BW160_DOT11AX_EXT_RU_START_INDEX_OFFSET 0x0000000000000078 4633 #define PCU_PPDU_SETUP_INIT_RESPONSE_TO_RESPONSE_RATE_INFO_BW160_DOT11AX_EXT_RU_START_INDEX_LSB 0 4634 #define PCU_PPDU_SETUP_INIT_RESPONSE_TO_RESPONSE_RATE_INFO_BW160_DOT11AX_EXT_RU_START_INDEX_MSB 3 4635 #define PCU_PPDU_SETUP_INIT_RESPONSE_TO_RESPONSE_RATE_INFO_BW160_DOT11AX_EXT_RU_START_INDEX_MASK 0x000000000000000f 4636 4637 4638 /* Description DOT11AX_EXT_RU_SIZE 4639 4640 field is only valid for pkt_type == 11ax and Dot11ax_su_extended 4641 == 1 or pkt_type == 11be and EHT_duplicate_mode == 1 4642 4643 The size of the RU for this user. 4644 4645 In case of EHT duplicate transmissions, this field indicates 4646 the width of the actual content before duplication, e.g. 4647 a 40 MHz PPDU duplicated to 160 MHz will have the bandwidth 4648 fields indicating 160 MHz and this field set to e-num 4 4649 (RU_484). 4650 4651 <enum 0 RU_26> 4652 <enum 1 RU_52> 4653 <enum 2 RU_106> 4654 <enum 3 RU_242> 4655 <enum 4 RU_484> 4656 <enum 5 RU_996> 4657 <enum 6 RU_1992> 4658 <enum 7 RU_FULLBW> Set when the RU occupies the full packet 4659 bandwidth 4660 <enum 8 RU_FULLBW_240> Set when the RU occupies the full 4661 packet bandwidth 4662 <enum 9 RU_FULLBW_320> Set when the RU occupies the full 4663 packet bandwidth 4664 <enum 10 RU_MULTI_LARGE> DO NOT USE 4665 <enum 11 RU_78> DO NOT USE 4666 <enum 12 RU_132> DO NOT USE 4667 <legal 0-12> 4668 */ 4669 4670 #define PCU_PPDU_SETUP_INIT_RESPONSE_TO_RESPONSE_RATE_INFO_BW160_DOT11AX_EXT_RU_SIZE_OFFSET 0x0000000000000078 4671 #define PCU_PPDU_SETUP_INIT_RESPONSE_TO_RESPONSE_RATE_INFO_BW160_DOT11AX_EXT_RU_SIZE_LSB 4 4672 #define PCU_PPDU_SETUP_INIT_RESPONSE_TO_RESPONSE_RATE_INFO_BW160_DOT11AX_EXT_RU_SIZE_MSB 7 4673 #define PCU_PPDU_SETUP_INIT_RESPONSE_TO_RESPONSE_RATE_INFO_BW160_DOT11AX_EXT_RU_SIZE_MASK 0x00000000000000f0 4674 4675 4676 /* Description EHT_DUPLICATE_MODE 4677 4678 Field only valid for pkt_type == 11be 4679 4680 Indicates EHT duplicate modulation 4681 4682 <enum 0 eht_no_duplicate> 4683 <enum 1 eht_2x_duplicate> 4684 <enum 2 eht_4x_duplicate> 4685 4686 <legal 0-2> 4687 */ 4688 4689 #define PCU_PPDU_SETUP_INIT_RESPONSE_TO_RESPONSE_RATE_INFO_BW160_EHT_DUPLICATE_MODE_OFFSET 0x0000000000000078 4690 #define PCU_PPDU_SETUP_INIT_RESPONSE_TO_RESPONSE_RATE_INFO_BW160_EHT_DUPLICATE_MODE_LSB 8 4691 #define PCU_PPDU_SETUP_INIT_RESPONSE_TO_RESPONSE_RATE_INFO_BW160_EHT_DUPLICATE_MODE_MSB 9 4692 #define PCU_PPDU_SETUP_INIT_RESPONSE_TO_RESPONSE_RATE_INFO_BW160_EHT_DUPLICATE_MODE_MASK 0x0000000000000300 4693 4694 4695 /* Description HE_SIGB_DCM 4696 4697 Indicates whether dual sub-carrier modulation is applied 4698 to EHT-SIG 4699 <legal all> 4700 */ 4701 4702 #define PCU_PPDU_SETUP_INIT_RESPONSE_TO_RESPONSE_RATE_INFO_BW160_HE_SIGB_DCM_OFFSET 0x0000000000000078 4703 #define PCU_PPDU_SETUP_INIT_RESPONSE_TO_RESPONSE_RATE_INFO_BW160_HE_SIGB_DCM_LSB 10 4704 #define PCU_PPDU_SETUP_INIT_RESPONSE_TO_RESPONSE_RATE_INFO_BW160_HE_SIGB_DCM_MSB 10 4705 #define PCU_PPDU_SETUP_INIT_RESPONSE_TO_RESPONSE_RATE_INFO_BW160_HE_SIGB_DCM_MASK 0x0000000000000400 4706 4707 4708 /* Description HE_SIGB_0_MCS 4709 4710 Indicates the MCS of EHT-SIG 4711 4712 For details, refer to MCS_TYPE description 4713 <legal all> 4714 */ 4715 4716 #define PCU_PPDU_SETUP_INIT_RESPONSE_TO_RESPONSE_RATE_INFO_BW160_HE_SIGB_0_MCS_OFFSET 0x0000000000000078 4717 #define PCU_PPDU_SETUP_INIT_RESPONSE_TO_RESPONSE_RATE_INFO_BW160_HE_SIGB_0_MCS_LSB 11 4718 #define PCU_PPDU_SETUP_INIT_RESPONSE_TO_RESPONSE_RATE_INFO_BW160_HE_SIGB_0_MCS_MSB 13 4719 #define PCU_PPDU_SETUP_INIT_RESPONSE_TO_RESPONSE_RATE_INFO_BW160_HE_SIGB_0_MCS_MASK 0x0000000000003800 4720 4721 4722 /* Description NUM_HE_SIGB_SYM 4723 4724 Indicates the number of EHT-SIG symbols 4725 4726 This field is 0-based with 0 indicating that 1 eht_sig symbol 4727 needs to be transmitted. 4728 <legal all> 4729 */ 4730 4731 #define PCU_PPDU_SETUP_INIT_RESPONSE_TO_RESPONSE_RATE_INFO_BW160_NUM_HE_SIGB_SYM_OFFSET 0x0000000000000078 4732 #define PCU_PPDU_SETUP_INIT_RESPONSE_TO_RESPONSE_RATE_INFO_BW160_NUM_HE_SIGB_SYM_LSB 14 4733 #define PCU_PPDU_SETUP_INIT_RESPONSE_TO_RESPONSE_RATE_INFO_BW160_NUM_HE_SIGB_SYM_MSB 18 4734 #define PCU_PPDU_SETUP_INIT_RESPONSE_TO_RESPONSE_RATE_INFO_BW160_NUM_HE_SIGB_SYM_MASK 0x000000000007c000 4735 4736 4737 /* Description REQUIRED_RESPONSE_TIME_SOURCE 4738 4739 <enum 0 reqd_resp_time_src_is_RXPCU> Typically from received 4740 HT Control for sync MLO response 4741 <enum 1 reqd_resp_time_src_is_FW> 4742 Typically from 'PCU_PPDU_SETUP_INIT' for sync MLO response 4743 to response 4744 <legal all> 4745 */ 4746 4747 #define PCU_PPDU_SETUP_INIT_RESPONSE_TO_RESPONSE_RATE_INFO_BW160_REQUIRED_RESPONSE_TIME_SOURCE_OFFSET 0x0000000000000078 4748 #define PCU_PPDU_SETUP_INIT_RESPONSE_TO_RESPONSE_RATE_INFO_BW160_REQUIRED_RESPONSE_TIME_SOURCE_LSB 19 4749 #define PCU_PPDU_SETUP_INIT_RESPONSE_TO_RESPONSE_RATE_INFO_BW160_REQUIRED_RESPONSE_TIME_SOURCE_MSB 19 4750 #define PCU_PPDU_SETUP_INIT_RESPONSE_TO_RESPONSE_RATE_INFO_BW160_REQUIRED_RESPONSE_TIME_SOURCE_MASK 0x0000000000080000 4751 4752 4753 /* Description RESERVED_5A 4754 4755 <legal 0> 4756 */ 4757 4758 #define PCU_PPDU_SETUP_INIT_RESPONSE_TO_RESPONSE_RATE_INFO_BW160_RESERVED_5A_OFFSET 0x0000000000000078 4759 #define PCU_PPDU_SETUP_INIT_RESPONSE_TO_RESPONSE_RATE_INFO_BW160_RESERVED_5A_LSB 20 4760 #define PCU_PPDU_SETUP_INIT_RESPONSE_TO_RESPONSE_RATE_INFO_BW160_RESERVED_5A_MSB 25 4761 #define PCU_PPDU_SETUP_INIT_RESPONSE_TO_RESPONSE_RATE_INFO_BW160_RESERVED_5A_MASK 0x0000000003f00000 4762 4763 4764 /* Description U_SIG_PUNCTURE_PATTERN_ENCODING 4765 4766 6-bit value copied from 'RX_RESPONSE_REQUIRED_INFO' and 'TX_CBF_INFO' 4767 to pass on to PDG 4768 <legal 0-29> 4769 */ 4770 4771 #define PCU_PPDU_SETUP_INIT_RESPONSE_TO_RESPONSE_RATE_INFO_BW160_U_SIG_PUNCTURE_PATTERN_ENCODING_OFFSET 0x0000000000000078 4772 #define PCU_PPDU_SETUP_INIT_RESPONSE_TO_RESPONSE_RATE_INFO_BW160_U_SIG_PUNCTURE_PATTERN_ENCODING_LSB 26 4773 #define PCU_PPDU_SETUP_INIT_RESPONSE_TO_RESPONSE_RATE_INFO_BW160_U_SIG_PUNCTURE_PATTERN_ENCODING_MSB 31 4774 #define PCU_PPDU_SETUP_INIT_RESPONSE_TO_RESPONSE_RATE_INFO_BW160_U_SIG_PUNCTURE_PATTERN_ENCODING_MASK 0x00000000fc000000 4775 4776 4777 /* Description MLO_STA_ID_DETAILS_RX 4778 4779 16-bi value copied from 'RX_RESPONSE_REQUIRED_INFO' to pass 4780 on to PDG 4781 4782 Bits 10 and 11 are not valid, bits [9:0] reflect 'NSTR_MLO_STA_ID' 4783 from address search. 4784 4785 See definition of mlo_sta_id_details. 4786 */ 4787 4788 4789 /* Description NSTR_MLO_STA_ID 4790 4791 ID of peer participating in non-STR MLO 4792 */ 4793 4794 #define PCU_PPDU_SETUP_INIT_RESPONSE_TO_RESPONSE_RATE_INFO_BW160_MLO_STA_ID_DETAILS_RX_NSTR_MLO_STA_ID_OFFSET 0x0000000000000078 4795 #define PCU_PPDU_SETUP_INIT_RESPONSE_TO_RESPONSE_RATE_INFO_BW160_MLO_STA_ID_DETAILS_RX_NSTR_MLO_STA_ID_LSB 32 4796 #define PCU_PPDU_SETUP_INIT_RESPONSE_TO_RESPONSE_RATE_INFO_BW160_MLO_STA_ID_DETAILS_RX_NSTR_MLO_STA_ID_MSB 41 4797 #define PCU_PPDU_SETUP_INIT_RESPONSE_TO_RESPONSE_RATE_INFO_BW160_MLO_STA_ID_DETAILS_RX_NSTR_MLO_STA_ID_MASK 0x000003ff00000000 4798 4799 4800 /* Description BLOCK_SELF_ML_SYNC 4801 4802 Only valid for TX 4803 4804 When set, this provides an indication to block the peer 4805 for self-link. 4806 */ 4807 4808 #define PCU_PPDU_SETUP_INIT_RESPONSE_TO_RESPONSE_RATE_INFO_BW160_MLO_STA_ID_DETAILS_RX_BLOCK_SELF_ML_SYNC_OFFSET 0x0000000000000078 4809 #define PCU_PPDU_SETUP_INIT_RESPONSE_TO_RESPONSE_RATE_INFO_BW160_MLO_STA_ID_DETAILS_RX_BLOCK_SELF_ML_SYNC_LSB 42 4810 #define PCU_PPDU_SETUP_INIT_RESPONSE_TO_RESPONSE_RATE_INFO_BW160_MLO_STA_ID_DETAILS_RX_BLOCK_SELF_ML_SYNC_MSB 42 4811 #define PCU_PPDU_SETUP_INIT_RESPONSE_TO_RESPONSE_RATE_INFO_BW160_MLO_STA_ID_DETAILS_RX_BLOCK_SELF_ML_SYNC_MASK 0x0000040000000000 4812 4813 4814 /* Description BLOCK_PARTNER_ML_SYNC 4815 4816 Only valid for TX 4817 4818 When set, this provides an indication to block the peer 4819 for partner links. 4820 */ 4821 4822 #define PCU_PPDU_SETUP_INIT_RESPONSE_TO_RESPONSE_RATE_INFO_BW160_MLO_STA_ID_DETAILS_RX_BLOCK_PARTNER_ML_SYNC_OFFSET 0x0000000000000078 4823 #define PCU_PPDU_SETUP_INIT_RESPONSE_TO_RESPONSE_RATE_INFO_BW160_MLO_STA_ID_DETAILS_RX_BLOCK_PARTNER_ML_SYNC_LSB 43 4824 #define PCU_PPDU_SETUP_INIT_RESPONSE_TO_RESPONSE_RATE_INFO_BW160_MLO_STA_ID_DETAILS_RX_BLOCK_PARTNER_ML_SYNC_MSB 43 4825 #define PCU_PPDU_SETUP_INIT_RESPONSE_TO_RESPONSE_RATE_INFO_BW160_MLO_STA_ID_DETAILS_RX_BLOCK_PARTNER_ML_SYNC_MASK 0x0000080000000000 4826 4827 4828 /* Description NSTR_MLO_STA_ID_VALID 4829 4830 All the fields in this TLV are valid only if this bit is 4831 set. 4832 */ 4833 4834 #define PCU_PPDU_SETUP_INIT_RESPONSE_TO_RESPONSE_RATE_INFO_BW160_MLO_STA_ID_DETAILS_RX_NSTR_MLO_STA_ID_VALID_OFFSET 0x0000000000000078 4835 #define PCU_PPDU_SETUP_INIT_RESPONSE_TO_RESPONSE_RATE_INFO_BW160_MLO_STA_ID_DETAILS_RX_NSTR_MLO_STA_ID_VALID_LSB 44 4836 #define PCU_PPDU_SETUP_INIT_RESPONSE_TO_RESPONSE_RATE_INFO_BW160_MLO_STA_ID_DETAILS_RX_NSTR_MLO_STA_ID_VALID_MSB 44 4837 #define PCU_PPDU_SETUP_INIT_RESPONSE_TO_RESPONSE_RATE_INFO_BW160_MLO_STA_ID_DETAILS_RX_NSTR_MLO_STA_ID_VALID_MASK 0x0000100000000000 4838 4839 4840 /* Description RESERVED_0A 4841 4842 <legal 0> 4843 */ 4844 4845 #define PCU_PPDU_SETUP_INIT_RESPONSE_TO_RESPONSE_RATE_INFO_BW160_MLO_STA_ID_DETAILS_RX_RESERVED_0A_OFFSET 0x0000000000000078 4846 #define PCU_PPDU_SETUP_INIT_RESPONSE_TO_RESPONSE_RATE_INFO_BW160_MLO_STA_ID_DETAILS_RX_RESERVED_0A_LSB 45 4847 #define PCU_PPDU_SETUP_INIT_RESPONSE_TO_RESPONSE_RATE_INFO_BW160_MLO_STA_ID_DETAILS_RX_RESERVED_0A_MSB 47 4848 #define PCU_PPDU_SETUP_INIT_RESPONSE_TO_RESPONSE_RATE_INFO_BW160_MLO_STA_ID_DETAILS_RX_RESERVED_0A_MASK 0x0000e00000000000 4849 4850 4851 /* Description REQUIRED_RESPONSE_TIME 4852 4853 When non-zero, indicates that PDG shall pad the response 4854 transmission to the indicated duration (in us) 4855 */ 4856 4857 #define PCU_PPDU_SETUP_INIT_RESPONSE_TO_RESPONSE_RATE_INFO_BW160_REQUIRED_RESPONSE_TIME_OFFSET 0x0000000000000078 4858 #define PCU_PPDU_SETUP_INIT_RESPONSE_TO_RESPONSE_RATE_INFO_BW160_REQUIRED_RESPONSE_TIME_LSB 48 4859 #define PCU_PPDU_SETUP_INIT_RESPONSE_TO_RESPONSE_RATE_INFO_BW160_REQUIRED_RESPONSE_TIME_MSB 59 4860 #define PCU_PPDU_SETUP_INIT_RESPONSE_TO_RESPONSE_RATE_INFO_BW160_REQUIRED_RESPONSE_TIME_MASK 0x0fff000000000000 4861 4862 4863 /* Description DOT11BE_PARAMS_PLACEHOLDER 4864 4865 4 bytes for use as placeholders for 'Dot11be_*' parameters 4866 4867 */ 4868 4869 #define PCU_PPDU_SETUP_INIT_RESPONSE_TO_RESPONSE_RATE_INFO_BW160_DOT11BE_PARAMS_PLACEHOLDER_OFFSET 0x0000000000000078 4870 #define PCU_PPDU_SETUP_INIT_RESPONSE_TO_RESPONSE_RATE_INFO_BW160_DOT11BE_PARAMS_PLACEHOLDER_LSB 60 4871 #define PCU_PPDU_SETUP_INIT_RESPONSE_TO_RESPONSE_RATE_INFO_BW160_DOT11BE_PARAMS_PLACEHOLDER_MSB 63 4872 #define PCU_PPDU_SETUP_INIT_RESPONSE_TO_RESPONSE_RATE_INFO_BW160_DOT11BE_PARAMS_PLACEHOLDER_MASK 0xf000000000000000 4873 4874 4875 /* Description RESPONSE_TO_RESPONSE_RATE_INFO_BW240 4876 4877 Field only valid in case of Response_to_response set to 4878 SU_BA or MU_BA 4879 4880 NOTE: This field is also known as response_to_response_rate_info_pattern_4 4881 in case punctured transmission is enabled. 4882 4883 Used by TXPCU to determine what the transmit rates are for 4884 the response to response transmission in case original 4885 transmission was 240 MHz. 4886 4887 Note: 4888 see field R2R_bw240_active_channel for the BW of this transmission 4889 4890 */ 4891 4892 4893 /* Description RESERVED_0A 4894 4895 4896 <legal 0> 4897 */ 4898 4899 #define PCU_PPDU_SETUP_INIT_RESPONSE_TO_RESPONSE_RATE_INFO_BW240_RESERVED_0A_OFFSET 0x0000000000000080 4900 #define PCU_PPDU_SETUP_INIT_RESPONSE_TO_RESPONSE_RATE_INFO_BW240_RESERVED_0A_LSB 0 4901 #define PCU_PPDU_SETUP_INIT_RESPONSE_TO_RESPONSE_RATE_INFO_BW240_RESERVED_0A_MSB 0 4902 #define PCU_PPDU_SETUP_INIT_RESPONSE_TO_RESPONSE_RATE_INFO_BW240_RESERVED_0A_MASK 0x0000000000000001 4903 4904 4905 /* Description TX_ANTENNA_SECTOR_CTRL 4906 4907 Sectored transmit antenna 4908 <legal all> 4909 */ 4910 4911 #define PCU_PPDU_SETUP_INIT_RESPONSE_TO_RESPONSE_RATE_INFO_BW240_TX_ANTENNA_SECTOR_CTRL_OFFSET 0x0000000000000080 4912 #define PCU_PPDU_SETUP_INIT_RESPONSE_TO_RESPONSE_RATE_INFO_BW240_TX_ANTENNA_SECTOR_CTRL_LSB 1 4913 #define PCU_PPDU_SETUP_INIT_RESPONSE_TO_RESPONSE_RATE_INFO_BW240_TX_ANTENNA_SECTOR_CTRL_MSB 24 4914 #define PCU_PPDU_SETUP_INIT_RESPONSE_TO_RESPONSE_RATE_INFO_BW240_TX_ANTENNA_SECTOR_CTRL_MASK 0x0000000001fffffe 4915 4916 4917 /* Description PKT_TYPE 4918 4919 Packet type: 4920 <enum 0 dot11a>802.11a PPDU type 4921 <enum 1 dot11b>802.11b PPDU type 4922 <enum 2 dot11n_mm>802.11n Mixed Mode PPDU type 4923 <enum 3 dot11ac>802.11ac PPDU type 4924 <enum 4 dot11ax>802.11ax PPDU type 4925 <enum 5 dot11ba>802.11ba (WUR) PPDU type 4926 <enum 6 dot11be>802.11be PPDU type 4927 <enum 7 dot11az>802.11az (ranging) PPDU type 4928 <enum 8 dot11n_gf>802.11n Green Field PPDU type (unsupported 4929 & aborted) 4930 */ 4931 4932 #define PCU_PPDU_SETUP_INIT_RESPONSE_TO_RESPONSE_RATE_INFO_BW240_PKT_TYPE_OFFSET 0x0000000000000080 4933 #define PCU_PPDU_SETUP_INIT_RESPONSE_TO_RESPONSE_RATE_INFO_BW240_PKT_TYPE_LSB 25 4934 #define PCU_PPDU_SETUP_INIT_RESPONSE_TO_RESPONSE_RATE_INFO_BW240_PKT_TYPE_MSB 28 4935 #define PCU_PPDU_SETUP_INIT_RESPONSE_TO_RESPONSE_RATE_INFO_BW240_PKT_TYPE_MASK 0x000000001e000000 4936 4937 4938 /* Description SMOOTHING 4939 4940 This field is used by PDG to populate the SMOOTHING filed 4941 in the SIG Preamble of the PPDU 4942 <legal 0-1> 4943 */ 4944 4945 #define PCU_PPDU_SETUP_INIT_RESPONSE_TO_RESPONSE_RATE_INFO_BW240_SMOOTHING_OFFSET 0x0000000000000080 4946 #define PCU_PPDU_SETUP_INIT_RESPONSE_TO_RESPONSE_RATE_INFO_BW240_SMOOTHING_LSB 29 4947 #define PCU_PPDU_SETUP_INIT_RESPONSE_TO_RESPONSE_RATE_INFO_BW240_SMOOTHING_MSB 29 4948 #define PCU_PPDU_SETUP_INIT_RESPONSE_TO_RESPONSE_RATE_INFO_BW240_SMOOTHING_MASK 0x0000000020000000 4949 4950 4951 /* Description LDPC 4952 4953 When set, use LDPC transmission rates 4954 */ 4955 4956 #define PCU_PPDU_SETUP_INIT_RESPONSE_TO_RESPONSE_RATE_INFO_BW240_LDPC_OFFSET 0x0000000000000080 4957 #define PCU_PPDU_SETUP_INIT_RESPONSE_TO_RESPONSE_RATE_INFO_BW240_LDPC_LSB 30 4958 #define PCU_PPDU_SETUP_INIT_RESPONSE_TO_RESPONSE_RATE_INFO_BW240_LDPC_MSB 30 4959 #define PCU_PPDU_SETUP_INIT_RESPONSE_TO_RESPONSE_RATE_INFO_BW240_LDPC_MASK 0x0000000040000000 4960 4961 4962 /* Description STBC 4963 4964 When set, use STBC transmission rates 4965 */ 4966 4967 #define PCU_PPDU_SETUP_INIT_RESPONSE_TO_RESPONSE_RATE_INFO_BW240_STBC_OFFSET 0x0000000000000080 4968 #define PCU_PPDU_SETUP_INIT_RESPONSE_TO_RESPONSE_RATE_INFO_BW240_STBC_LSB 31 4969 #define PCU_PPDU_SETUP_INIT_RESPONSE_TO_RESPONSE_RATE_INFO_BW240_STBC_MSB 31 4970 #define PCU_PPDU_SETUP_INIT_RESPONSE_TO_RESPONSE_RATE_INFO_BW240_STBC_MASK 0x0000000080000000 4971 4972 4973 /* Description ALT_TX_PWR 4974 4975 Coex related AlternativeTransmit parameter 4976 4977 Transmit Power in s6.2 format. 4978 In units of 0.25 dBm 4979 <legal all> 4980 */ 4981 4982 #define PCU_PPDU_SETUP_INIT_RESPONSE_TO_RESPONSE_RATE_INFO_BW240_ALT_TX_PWR_OFFSET 0x0000000000000080 4983 #define PCU_PPDU_SETUP_INIT_RESPONSE_TO_RESPONSE_RATE_INFO_BW240_ALT_TX_PWR_LSB 32 4984 #define PCU_PPDU_SETUP_INIT_RESPONSE_TO_RESPONSE_RATE_INFO_BW240_ALT_TX_PWR_MSB 39 4985 #define PCU_PPDU_SETUP_INIT_RESPONSE_TO_RESPONSE_RATE_INFO_BW240_ALT_TX_PWR_MASK 0x000000ff00000000 4986 4987 4988 /* Description ALT_MIN_TX_PWR 4989 4990 Coex related Alternative Transmit parameter 4991 4992 Minimum allowed Transmit Power in s6.2 format. 4993 In units of 0.25 dBm 4994 <legal all> 4995 */ 4996 4997 #define PCU_PPDU_SETUP_INIT_RESPONSE_TO_RESPONSE_RATE_INFO_BW240_ALT_MIN_TX_PWR_OFFSET 0x0000000000000080 4998 #define PCU_PPDU_SETUP_INIT_RESPONSE_TO_RESPONSE_RATE_INFO_BW240_ALT_MIN_TX_PWR_LSB 40 4999 #define PCU_PPDU_SETUP_INIT_RESPONSE_TO_RESPONSE_RATE_INFO_BW240_ALT_MIN_TX_PWR_MSB 47 5000 #define PCU_PPDU_SETUP_INIT_RESPONSE_TO_RESPONSE_RATE_INFO_BW240_ALT_MIN_TX_PWR_MASK 0x0000ff0000000000 5001 5002 5003 /* Description ALT_NSS 5004 5005 Coex related Alternative Transmit parameter 5006 5007 Number of spatial streams. 5008 5009 <enum 0 1_spatial_stream>Single spatial stream 5010 <enum 1 2_spatial_streams>2 spatial streams 5011 <enum 2 3_spatial_streams>3 spatial streams 5012 <enum 3 4_spatial_streams>4 spatial streams 5013 <enum 4 5_spatial_streams>5 spatial streams 5014 <enum 5 6_spatial_streams>6 spatial streams 5015 <enum 6 7_spatial_streams>7 spatial streams 5016 <enum 7 8_spatial_streams>8 spatial streams 5017 */ 5018 5019 #define PCU_PPDU_SETUP_INIT_RESPONSE_TO_RESPONSE_RATE_INFO_BW240_ALT_NSS_OFFSET 0x0000000000000080 5020 #define PCU_PPDU_SETUP_INIT_RESPONSE_TO_RESPONSE_RATE_INFO_BW240_ALT_NSS_LSB 48 5021 #define PCU_PPDU_SETUP_INIT_RESPONSE_TO_RESPONSE_RATE_INFO_BW240_ALT_NSS_MSB 50 5022 #define PCU_PPDU_SETUP_INIT_RESPONSE_TO_RESPONSE_RATE_INFO_BW240_ALT_NSS_MASK 0x0007000000000000 5023 5024 5025 /* Description ALT_TX_CHAIN_MASK 5026 5027 Coex related Alternative Transmit parameter 5028 5029 Chain mask to support up to 8 antennas. 5030 <legal 1-255> 5031 */ 5032 5033 #define PCU_PPDU_SETUP_INIT_RESPONSE_TO_RESPONSE_RATE_INFO_BW240_ALT_TX_CHAIN_MASK_OFFSET 0x0000000000000080 5034 #define PCU_PPDU_SETUP_INIT_RESPONSE_TO_RESPONSE_RATE_INFO_BW240_ALT_TX_CHAIN_MASK_LSB 51 5035 #define PCU_PPDU_SETUP_INIT_RESPONSE_TO_RESPONSE_RATE_INFO_BW240_ALT_TX_CHAIN_MASK_MSB 58 5036 #define PCU_PPDU_SETUP_INIT_RESPONSE_TO_RESPONSE_RATE_INFO_BW240_ALT_TX_CHAIN_MASK_MASK 0x07f8000000000000 5037 5038 5039 /* Description ALT_BW 5040 5041 Coex related Alternative Transmit parameter 5042 5043 The BW of the upcoming transmission. 5044 5045 <enum 0 20_mhz>20 Mhz BW 5046 <enum 1 40_mhz>40 Mhz BW 5047 <enum 2 80_mhz>80 Mhz BW 5048 <enum 3 160_mhz>160 Mhz BW 5049 <enum 4 320_mhz>320 Mhz BW 5050 <enum 5 240_mhz>240 Mhz BW 5051 */ 5052 5053 #define PCU_PPDU_SETUP_INIT_RESPONSE_TO_RESPONSE_RATE_INFO_BW240_ALT_BW_OFFSET 0x0000000000000080 5054 #define PCU_PPDU_SETUP_INIT_RESPONSE_TO_RESPONSE_RATE_INFO_BW240_ALT_BW_LSB 59 5055 #define PCU_PPDU_SETUP_INIT_RESPONSE_TO_RESPONSE_RATE_INFO_BW240_ALT_BW_MSB 61 5056 #define PCU_PPDU_SETUP_INIT_RESPONSE_TO_RESPONSE_RATE_INFO_BW240_ALT_BW_MASK 0x3800000000000000 5057 5058 5059 /* Description STF_LTF_3DB_BOOST 5060 5061 Boost the STF and LTF power by 3dB in 11a/n/ac packets. 5062 This includes both the legacy preambles and the HT/VHT preambles.0: 5063 disable power boost1: enable power boost 5064 <legal all> 5065 */ 5066 5067 #define PCU_PPDU_SETUP_INIT_RESPONSE_TO_RESPONSE_RATE_INFO_BW240_STF_LTF_3DB_BOOST_OFFSET 0x0000000000000080 5068 #define PCU_PPDU_SETUP_INIT_RESPONSE_TO_RESPONSE_RATE_INFO_BW240_STF_LTF_3DB_BOOST_LSB 62 5069 #define PCU_PPDU_SETUP_INIT_RESPONSE_TO_RESPONSE_RATE_INFO_BW240_STF_LTF_3DB_BOOST_MSB 62 5070 #define PCU_PPDU_SETUP_INIT_RESPONSE_TO_RESPONSE_RATE_INFO_BW240_STF_LTF_3DB_BOOST_MASK 0x4000000000000000 5071 5072 5073 /* Description FORCE_EXTRA_SYMBOL 5074 5075 Set to 1 to force an extra OFDM symbol (or symbols) even 5076 if the PPDU encoding process does not result in an extra 5077 OFDM symbol (or symbols) 5078 */ 5079 5080 #define PCU_PPDU_SETUP_INIT_RESPONSE_TO_RESPONSE_RATE_INFO_BW240_FORCE_EXTRA_SYMBOL_OFFSET 0x0000000000000080 5081 #define PCU_PPDU_SETUP_INIT_RESPONSE_TO_RESPONSE_RATE_INFO_BW240_FORCE_EXTRA_SYMBOL_LSB 63 5082 #define PCU_PPDU_SETUP_INIT_RESPONSE_TO_RESPONSE_RATE_INFO_BW240_FORCE_EXTRA_SYMBOL_MSB 63 5083 #define PCU_PPDU_SETUP_INIT_RESPONSE_TO_RESPONSE_RATE_INFO_BW240_FORCE_EXTRA_SYMBOL_MASK 0x8000000000000000 5084 5085 5086 /* Description ALT_RATE_MCS 5087 5088 Coex related Alternative Transmit parameter 5089 5090 For details, refer to MCS_TYPE 5091 Note: This is "rate" in case of 11a/11b 5092 description 5093 <legal all> 5094 */ 5095 5096 #define PCU_PPDU_SETUP_INIT_RESPONSE_TO_RESPONSE_RATE_INFO_BW240_ALT_RATE_MCS_OFFSET 0x0000000000000088 5097 #define PCU_PPDU_SETUP_INIT_RESPONSE_TO_RESPONSE_RATE_INFO_BW240_ALT_RATE_MCS_LSB 0 5098 #define PCU_PPDU_SETUP_INIT_RESPONSE_TO_RESPONSE_RATE_INFO_BW240_ALT_RATE_MCS_MSB 3 5099 #define PCU_PPDU_SETUP_INIT_RESPONSE_TO_RESPONSE_RATE_INFO_BW240_ALT_RATE_MCS_MASK 0x000000000000000f 5100 5101 5102 /* Description NSS 5103 5104 Number of spatial streams. 5105 5106 <enum 0 1_spatial_stream>Single spatial stream 5107 <enum 1 2_spatial_streams>2 spatial streams 5108 <enum 2 3_spatial_streams>3 spatial streams 5109 <enum 3 4_spatial_streams>4 spatial streams 5110 <enum 4 5_spatial_streams>5 spatial streams 5111 <enum 5 6_spatial_streams>6 spatial streams 5112 <enum 6 7_spatial_streams>7 spatial streams 5113 <enum 7 8_spatial_streams>8 spatial streams 5114 */ 5115 5116 #define PCU_PPDU_SETUP_INIT_RESPONSE_TO_RESPONSE_RATE_INFO_BW240_NSS_OFFSET 0x0000000000000088 5117 #define PCU_PPDU_SETUP_INIT_RESPONSE_TO_RESPONSE_RATE_INFO_BW240_NSS_LSB 4 5118 #define PCU_PPDU_SETUP_INIT_RESPONSE_TO_RESPONSE_RATE_INFO_BW240_NSS_MSB 6 5119 #define PCU_PPDU_SETUP_INIT_RESPONSE_TO_RESPONSE_RATE_INFO_BW240_NSS_MASK 0x0000000000000070 5120 5121 5122 /* Description DPD_ENABLE 5123 5124 DPD enable control 5125 5126 This is needed on a per packet basis 5127 <enum 0 dpd_off> DPD profile not applied to current 5128 packet 5129 <enum 1 dpd_on> DPD profile applied to current packet 5130 if available 5131 <legal 0-1> 5132 5133 This field is not applicable in11ah mode of operation and 5134 is ignored by the HW 5135 */ 5136 5137 #define PCU_PPDU_SETUP_INIT_RESPONSE_TO_RESPONSE_RATE_INFO_BW240_DPD_ENABLE_OFFSET 0x0000000000000088 5138 #define PCU_PPDU_SETUP_INIT_RESPONSE_TO_RESPONSE_RATE_INFO_BW240_DPD_ENABLE_LSB 7 5139 #define PCU_PPDU_SETUP_INIT_RESPONSE_TO_RESPONSE_RATE_INFO_BW240_DPD_ENABLE_MSB 7 5140 #define PCU_PPDU_SETUP_INIT_RESPONSE_TO_RESPONSE_RATE_INFO_BW240_DPD_ENABLE_MASK 0x0000000000000080 5141 5142 5143 /* Description TX_PWR 5144 5145 Transmit Power in s6.2 format. 5146 In units of 0.25 dBm 5147 <legal all> 5148 */ 5149 5150 #define PCU_PPDU_SETUP_INIT_RESPONSE_TO_RESPONSE_RATE_INFO_BW240_TX_PWR_OFFSET 0x0000000000000088 5151 #define PCU_PPDU_SETUP_INIT_RESPONSE_TO_RESPONSE_RATE_INFO_BW240_TX_PWR_LSB 8 5152 #define PCU_PPDU_SETUP_INIT_RESPONSE_TO_RESPONSE_RATE_INFO_BW240_TX_PWR_MSB 15 5153 #define PCU_PPDU_SETUP_INIT_RESPONSE_TO_RESPONSE_RATE_INFO_BW240_TX_PWR_MASK 0x000000000000ff00 5154 5155 5156 /* Description MIN_TX_PWR 5157 5158 Coex related field: 5159 5160 Minimum allowed Transmit Power in s6.2 format. 5161 In units of 0.25 dBm 5162 <legal all> 5163 */ 5164 5165 #define PCU_PPDU_SETUP_INIT_RESPONSE_TO_RESPONSE_RATE_INFO_BW240_MIN_TX_PWR_OFFSET 0x0000000000000088 5166 #define PCU_PPDU_SETUP_INIT_RESPONSE_TO_RESPONSE_RATE_INFO_BW240_MIN_TX_PWR_LSB 16 5167 #define PCU_PPDU_SETUP_INIT_RESPONSE_TO_RESPONSE_RATE_INFO_BW240_MIN_TX_PWR_MSB 23 5168 #define PCU_PPDU_SETUP_INIT_RESPONSE_TO_RESPONSE_RATE_INFO_BW240_MIN_TX_PWR_MASK 0x0000000000ff0000 5169 5170 5171 /* Description TX_CHAIN_MASK 5172 5173 Chain mask to support up to 8 antennas. 5174 <legal 1-255> 5175 */ 5176 5177 #define PCU_PPDU_SETUP_INIT_RESPONSE_TO_RESPONSE_RATE_INFO_BW240_TX_CHAIN_MASK_OFFSET 0x0000000000000088 5178 #define PCU_PPDU_SETUP_INIT_RESPONSE_TO_RESPONSE_RATE_INFO_BW240_TX_CHAIN_MASK_LSB 24 5179 #define PCU_PPDU_SETUP_INIT_RESPONSE_TO_RESPONSE_RATE_INFO_BW240_TX_CHAIN_MASK_MSB 31 5180 #define PCU_PPDU_SETUP_INIT_RESPONSE_TO_RESPONSE_RATE_INFO_BW240_TX_CHAIN_MASK_MASK 0x00000000ff000000 5181 5182 5183 /* Description RESERVED_3A 5184 5185 <legal 0> 5186 */ 5187 5188 #define PCU_PPDU_SETUP_INIT_RESPONSE_TO_RESPONSE_RATE_INFO_BW240_RESERVED_3A_OFFSET 0x0000000000000088 5189 #define PCU_PPDU_SETUP_INIT_RESPONSE_TO_RESPONSE_RATE_INFO_BW240_RESERVED_3A_LSB 32 5190 #define PCU_PPDU_SETUP_INIT_RESPONSE_TO_RESPONSE_RATE_INFO_BW240_RESERVED_3A_MSB 39 5191 #define PCU_PPDU_SETUP_INIT_RESPONSE_TO_RESPONSE_RATE_INFO_BW240_RESERVED_3A_MASK 0x000000ff00000000 5192 5193 5194 /* Description SGI 5195 5196 Field only valid when pkt type is HT or VHT.For 11ax see 5197 field Dot11ax_CP_LTF_size 5198 5199 <enum 0 0_8_us_sgi > Legacy normal GI. Can also be used 5200 for HE 5201 <enum 1 0_4_us_sgi > Legacy short GI. Can also be used 5202 for HE 5203 <enum 2 1_6_us_sgi > Not used for pre 11ax pkt_types. 5204 5205 <enum 3 3_2_us_sgi > Not used for pre 11ax pkt_types 5206 5207 5208 <legal 0 - 3> 5209 */ 5210 5211 #define PCU_PPDU_SETUP_INIT_RESPONSE_TO_RESPONSE_RATE_INFO_BW240_SGI_OFFSET 0x0000000000000088 5212 #define PCU_PPDU_SETUP_INIT_RESPONSE_TO_RESPONSE_RATE_INFO_BW240_SGI_LSB 40 5213 #define PCU_PPDU_SETUP_INIT_RESPONSE_TO_RESPONSE_RATE_INFO_BW240_SGI_MSB 41 5214 #define PCU_PPDU_SETUP_INIT_RESPONSE_TO_RESPONSE_RATE_INFO_BW240_SGI_MASK 0x0000030000000000 5215 5216 5217 /* Description RATE_MCS 5218 5219 For details, refer to MCS_TYPE description 5220 Note: This is "rate" in case of 11a/11b 5221 5222 <legal all> 5223 */ 5224 5225 #define PCU_PPDU_SETUP_INIT_RESPONSE_TO_RESPONSE_RATE_INFO_BW240_RATE_MCS_OFFSET 0x0000000000000088 5226 #define PCU_PPDU_SETUP_INIT_RESPONSE_TO_RESPONSE_RATE_INFO_BW240_RATE_MCS_LSB 42 5227 #define PCU_PPDU_SETUP_INIT_RESPONSE_TO_RESPONSE_RATE_INFO_BW240_RATE_MCS_MSB 45 5228 #define PCU_PPDU_SETUP_INIT_RESPONSE_TO_RESPONSE_RATE_INFO_BW240_RATE_MCS_MASK 0x00003c0000000000 5229 5230 5231 /* Description RESERVED_3B 5232 5233 <legal 0> 5234 */ 5235 5236 #define PCU_PPDU_SETUP_INIT_RESPONSE_TO_RESPONSE_RATE_INFO_BW240_RESERVED_3B_OFFSET 0x0000000000000088 5237 #define PCU_PPDU_SETUP_INIT_RESPONSE_TO_RESPONSE_RATE_INFO_BW240_RESERVED_3B_LSB 46 5238 #define PCU_PPDU_SETUP_INIT_RESPONSE_TO_RESPONSE_RATE_INFO_BW240_RESERVED_3B_MSB 47 5239 #define PCU_PPDU_SETUP_INIT_RESPONSE_TO_RESPONSE_RATE_INFO_BW240_RESERVED_3B_MASK 0x0000c00000000000 5240 5241 5242 /* Description TX_PWR_1 5243 5244 Default (desired) transmit parameter for the second chain 5245 5246 5247 Transmit Power in s6.2 format. 5248 In units of 0.25 dBm 5249 5250 Note that there is no Min value for this 5251 <legal all> 5252 */ 5253 5254 #define PCU_PPDU_SETUP_INIT_RESPONSE_TO_RESPONSE_RATE_INFO_BW240_TX_PWR_1_OFFSET 0x0000000000000088 5255 #define PCU_PPDU_SETUP_INIT_RESPONSE_TO_RESPONSE_RATE_INFO_BW240_TX_PWR_1_LSB 48 5256 #define PCU_PPDU_SETUP_INIT_RESPONSE_TO_RESPONSE_RATE_INFO_BW240_TX_PWR_1_MSB 55 5257 #define PCU_PPDU_SETUP_INIT_RESPONSE_TO_RESPONSE_RATE_INFO_BW240_TX_PWR_1_MASK 0x00ff000000000000 5258 5259 5260 /* Description ALT_TX_PWR_1 5261 5262 Alternate (desired) transmit parameter for the second chain 5263 5264 5265 Transmit Power in s6.2 format. 5266 In units of 0.25 dBm 5267 5268 Note that there is no Min value for this 5269 <legal all> 5270 */ 5271 5272 #define PCU_PPDU_SETUP_INIT_RESPONSE_TO_RESPONSE_RATE_INFO_BW240_ALT_TX_PWR_1_OFFSET 0x0000000000000088 5273 #define PCU_PPDU_SETUP_INIT_RESPONSE_TO_RESPONSE_RATE_INFO_BW240_ALT_TX_PWR_1_LSB 56 5274 #define PCU_PPDU_SETUP_INIT_RESPONSE_TO_RESPONSE_RATE_INFO_BW240_ALT_TX_PWR_1_MSB 63 5275 #define PCU_PPDU_SETUP_INIT_RESPONSE_TO_RESPONSE_RATE_INFO_BW240_ALT_TX_PWR_1_MASK 0xff00000000000000 5276 5277 5278 /* Description AGGREGATION 5279 5280 Field only valid in case of pkt_type == 11n 5281 5282 <enum 0 mpdu> Indicates MPDU format. TXPCU will select 5283 this setting if the CBF response only contains a single 5284 segment 5285 <enum 1 a_mpdu> Indicates A-MPDU format. TXPCU will 5286 select this setting if the CBF response will contain two 5287 or more segments 5288 <legal 0-1> 5289 */ 5290 5291 #define PCU_PPDU_SETUP_INIT_RESPONSE_TO_RESPONSE_RATE_INFO_BW240_AGGREGATION_OFFSET 0x0000000000000090 5292 #define PCU_PPDU_SETUP_INIT_RESPONSE_TO_RESPONSE_RATE_INFO_BW240_AGGREGATION_LSB 0 5293 #define PCU_PPDU_SETUP_INIT_RESPONSE_TO_RESPONSE_RATE_INFO_BW240_AGGREGATION_MSB 0 5294 #define PCU_PPDU_SETUP_INIT_RESPONSE_TO_RESPONSE_RATE_INFO_BW240_AGGREGATION_MASK 0x0000000000000001 5295 5296 5297 /* Description DOT11AX_BSS_COLOR_ID 5298 5299 BSS color of the nextwork to which this STA belongs. 5300 When generated by TXPCU, this field is set equal to: Dot11ax_received_Bss_color_id 5301 5302 5303 <legal all> 5304 */ 5305 5306 #define PCU_PPDU_SETUP_INIT_RESPONSE_TO_RESPONSE_RATE_INFO_BW240_DOT11AX_BSS_COLOR_ID_OFFSET 0x0000000000000090 5307 #define PCU_PPDU_SETUP_INIT_RESPONSE_TO_RESPONSE_RATE_INFO_BW240_DOT11AX_BSS_COLOR_ID_LSB 1 5308 #define PCU_PPDU_SETUP_INIT_RESPONSE_TO_RESPONSE_RATE_INFO_BW240_DOT11AX_BSS_COLOR_ID_MSB 6 5309 #define PCU_PPDU_SETUP_INIT_RESPONSE_TO_RESPONSE_RATE_INFO_BW240_DOT11AX_BSS_COLOR_ID_MASK 0x000000000000007e 5310 5311 5312 /* Description DOT11AX_SPATIAL_REUSE 5313 5314 This field is only valid for pkt_type == 11ax 5315 5316 Spatial re-use 5317 <legal all> 5318 */ 5319 5320 #define PCU_PPDU_SETUP_INIT_RESPONSE_TO_RESPONSE_RATE_INFO_BW240_DOT11AX_SPATIAL_REUSE_OFFSET 0x0000000000000090 5321 #define PCU_PPDU_SETUP_INIT_RESPONSE_TO_RESPONSE_RATE_INFO_BW240_DOT11AX_SPATIAL_REUSE_LSB 7 5322 #define PCU_PPDU_SETUP_INIT_RESPONSE_TO_RESPONSE_RATE_INFO_BW240_DOT11AX_SPATIAL_REUSE_MSB 10 5323 #define PCU_PPDU_SETUP_INIT_RESPONSE_TO_RESPONSE_RATE_INFO_BW240_DOT11AX_SPATIAL_REUSE_MASK 0x0000000000000780 5324 5325 5326 /* Description DOT11AX_CP_LTF_SIZE 5327 5328 field is only valid for pkt_type == 11ax 5329 5330 Indicates the CP and HE-LTF type 5331 5332 <enum 0 OneX_LTF_0_8CP> 1xLTF + 0.8 us CP 5333 <enum 1 TwoX_LTF_0_8CP> 2x LTF + 0.8 µs CP 5334 <enum 2 TwoX_LTF_1_6CP> 2x LTF + 1.6 µs CP 5335 <enum 3 FourX_LTF_0_8CP_3_2CP> 5336 When DCM == 0 OR STBC == 0: 4x LTF + 3.2 µs CP 5337 When DCM == 1 AND STBC == 1: 4x LTF + 0.8 µs CP. Note: 5338 In this scenario, Neither DCM nor STBC is applied to HE 5339 data field. 5340 5341 If ( DCM == 1 ) and ( MCS > 0 ) and (STBC == 0) 5342 0 = 1xLTF + 0.4 usec 5343 1 = 2xLTF + 0.4 usec 5344 2~3 = Reserved 5345 5346 <legal all> 5347 */ 5348 5349 #define PCU_PPDU_SETUP_INIT_RESPONSE_TO_RESPONSE_RATE_INFO_BW240_DOT11AX_CP_LTF_SIZE_OFFSET 0x0000000000000090 5350 #define PCU_PPDU_SETUP_INIT_RESPONSE_TO_RESPONSE_RATE_INFO_BW240_DOT11AX_CP_LTF_SIZE_LSB 11 5351 #define PCU_PPDU_SETUP_INIT_RESPONSE_TO_RESPONSE_RATE_INFO_BW240_DOT11AX_CP_LTF_SIZE_MSB 12 5352 #define PCU_PPDU_SETUP_INIT_RESPONSE_TO_RESPONSE_RATE_INFO_BW240_DOT11AX_CP_LTF_SIZE_MASK 0x0000000000001800 5353 5354 5355 /* Description DOT11AX_DCM 5356 5357 field is only valid for pkt_type == 11ax 5358 5359 Indicates whether dual sub-carrier modulation is applied 5360 5361 0: No DCM 5362 1:DCM 5363 <legal all> 5364 */ 5365 5366 #define PCU_PPDU_SETUP_INIT_RESPONSE_TO_RESPONSE_RATE_INFO_BW240_DOT11AX_DCM_OFFSET 0x0000000000000090 5367 #define PCU_PPDU_SETUP_INIT_RESPONSE_TO_RESPONSE_RATE_INFO_BW240_DOT11AX_DCM_LSB 13 5368 #define PCU_PPDU_SETUP_INIT_RESPONSE_TO_RESPONSE_RATE_INFO_BW240_DOT11AX_DCM_MSB 13 5369 #define PCU_PPDU_SETUP_INIT_RESPONSE_TO_RESPONSE_RATE_INFO_BW240_DOT11AX_DCM_MASK 0x0000000000002000 5370 5371 5372 /* Description DOT11AX_DOPPLER_INDICATION 5373 5374 field is only valid for pkt_type == 11ax 5375 5376 0: No Doppler support 5377 1: Doppler support 5378 <legal all> 5379 */ 5380 5381 #define PCU_PPDU_SETUP_INIT_RESPONSE_TO_RESPONSE_RATE_INFO_BW240_DOT11AX_DOPPLER_INDICATION_OFFSET 0x0000000000000090 5382 #define PCU_PPDU_SETUP_INIT_RESPONSE_TO_RESPONSE_RATE_INFO_BW240_DOT11AX_DOPPLER_INDICATION_LSB 14 5383 #define PCU_PPDU_SETUP_INIT_RESPONSE_TO_RESPONSE_RATE_INFO_BW240_DOT11AX_DOPPLER_INDICATION_MSB 14 5384 #define PCU_PPDU_SETUP_INIT_RESPONSE_TO_RESPONSE_RATE_INFO_BW240_DOT11AX_DOPPLER_INDICATION_MASK 0x0000000000004000 5385 5386 5387 /* Description DOT11AX_SU_EXTENDED 5388 5389 field is only valid for pkt_type == 11ax OR pkt_type == 5390 11be 5391 5392 When set, the 11ax or 11be frame is of the extended range 5393 format 5394 <legal all> 5395 */ 5396 5397 #define PCU_PPDU_SETUP_INIT_RESPONSE_TO_RESPONSE_RATE_INFO_BW240_DOT11AX_SU_EXTENDED_OFFSET 0x0000000000000090 5398 #define PCU_PPDU_SETUP_INIT_RESPONSE_TO_RESPONSE_RATE_INFO_BW240_DOT11AX_SU_EXTENDED_LSB 15 5399 #define PCU_PPDU_SETUP_INIT_RESPONSE_TO_RESPONSE_RATE_INFO_BW240_DOT11AX_SU_EXTENDED_MSB 15 5400 #define PCU_PPDU_SETUP_INIT_RESPONSE_TO_RESPONSE_RATE_INFO_BW240_DOT11AX_SU_EXTENDED_MASK 0x0000000000008000 5401 5402 5403 /* Description DOT11AX_MIN_PACKET_EXTENSION 5404 5405 field is only valid for pkt_type == 11ax OR pkt_type == 5406 11be 5407 5408 The min packet extension duration for this user. 5409 0: no extension 5410 1: 8us 5411 2: 16 us 5412 3: 20 us (only for .11be) 5413 <legal 0-3> 5414 */ 5415 5416 #define PCU_PPDU_SETUP_INIT_RESPONSE_TO_RESPONSE_RATE_INFO_BW240_DOT11AX_MIN_PACKET_EXTENSION_OFFSET 0x0000000000000090 5417 #define PCU_PPDU_SETUP_INIT_RESPONSE_TO_RESPONSE_RATE_INFO_BW240_DOT11AX_MIN_PACKET_EXTENSION_LSB 16 5418 #define PCU_PPDU_SETUP_INIT_RESPONSE_TO_RESPONSE_RATE_INFO_BW240_DOT11AX_MIN_PACKET_EXTENSION_MSB 17 5419 #define PCU_PPDU_SETUP_INIT_RESPONSE_TO_RESPONSE_RATE_INFO_BW240_DOT11AX_MIN_PACKET_EXTENSION_MASK 0x0000000000030000 5420 5421 5422 /* Description DOT11AX_PE_NSS 5423 5424 Number of active spatial streams during packet extension. 5425 5426 5427 <enum 0 1_spatial_stream>Single spatial stream 5428 <enum 1 2_spatial_streams>2 spatial streams 5429 <enum 2 3_spatial_streams>3 spatial streams 5430 <enum 3 4_spatial_streams>4 spatial streams 5431 <enum 4 5_spatial_streams>5 spatial streams 5432 <enum 5 6_spatial_streams>6 spatial streams 5433 <enum 6 7_spatial_streams>7 spatial streams 5434 <enum 7 8_spatial_streams>8 spatial streams 5435 */ 5436 5437 #define PCU_PPDU_SETUP_INIT_RESPONSE_TO_RESPONSE_RATE_INFO_BW240_DOT11AX_PE_NSS_OFFSET 0x0000000000000090 5438 #define PCU_PPDU_SETUP_INIT_RESPONSE_TO_RESPONSE_RATE_INFO_BW240_DOT11AX_PE_NSS_LSB 18 5439 #define PCU_PPDU_SETUP_INIT_RESPONSE_TO_RESPONSE_RATE_INFO_BW240_DOT11AX_PE_NSS_MSB 20 5440 #define PCU_PPDU_SETUP_INIT_RESPONSE_TO_RESPONSE_RATE_INFO_BW240_DOT11AX_PE_NSS_MASK 0x00000000001c0000 5441 5442 5443 /* Description DOT11AX_PE_CONTENT 5444 5445 Content of packet extension. Valid for all 11ax packets 5446 having packet extension 5447 5448 0-he_ltf, 1-last_data_symbol 5449 <legal all> 5450 */ 5451 5452 #define PCU_PPDU_SETUP_INIT_RESPONSE_TO_RESPONSE_RATE_INFO_BW240_DOT11AX_PE_CONTENT_OFFSET 0x0000000000000090 5453 #define PCU_PPDU_SETUP_INIT_RESPONSE_TO_RESPONSE_RATE_INFO_BW240_DOT11AX_PE_CONTENT_LSB 21 5454 #define PCU_PPDU_SETUP_INIT_RESPONSE_TO_RESPONSE_RATE_INFO_BW240_DOT11AX_PE_CONTENT_MSB 21 5455 #define PCU_PPDU_SETUP_INIT_RESPONSE_TO_RESPONSE_RATE_INFO_BW240_DOT11AX_PE_CONTENT_MASK 0x0000000000200000 5456 5457 5458 /* Description DOT11AX_PE_LTF_SIZE 5459 5460 LTF size to be used during packet extention. . This field 5461 is valid for both FTM and non-FTM packets. 5462 0-1x 5463 1-2x (unsupported un HWK-1) 5464 2-4x (unsupported un HWK-1) 5465 <legal all> 5466 */ 5467 5468 #define PCU_PPDU_SETUP_INIT_RESPONSE_TO_RESPONSE_RATE_INFO_BW240_DOT11AX_PE_LTF_SIZE_OFFSET 0x0000000000000090 5469 #define PCU_PPDU_SETUP_INIT_RESPONSE_TO_RESPONSE_RATE_INFO_BW240_DOT11AX_PE_LTF_SIZE_LSB 22 5470 #define PCU_PPDU_SETUP_INIT_RESPONSE_TO_RESPONSE_RATE_INFO_BW240_DOT11AX_PE_LTF_SIZE_MSB 23 5471 #define PCU_PPDU_SETUP_INIT_RESPONSE_TO_RESPONSE_RATE_INFO_BW240_DOT11AX_PE_LTF_SIZE_MASK 0x0000000000c00000 5472 5473 5474 /* Description DOT11AX_CHAIN_CSD_EN 5475 5476 This field denotes whether to apply CSD on the preamble 5477 and data portion of the packet. This field is valid for 5478 all transmit packets 5479 0: disable per-chain csd 5480 1: enable per-chain csd 5481 <legal all> 5482 */ 5483 5484 #define PCU_PPDU_SETUP_INIT_RESPONSE_TO_RESPONSE_RATE_INFO_BW240_DOT11AX_CHAIN_CSD_EN_OFFSET 0x0000000000000090 5485 #define PCU_PPDU_SETUP_INIT_RESPONSE_TO_RESPONSE_RATE_INFO_BW240_DOT11AX_CHAIN_CSD_EN_LSB 24 5486 #define PCU_PPDU_SETUP_INIT_RESPONSE_TO_RESPONSE_RATE_INFO_BW240_DOT11AX_CHAIN_CSD_EN_MSB 24 5487 #define PCU_PPDU_SETUP_INIT_RESPONSE_TO_RESPONSE_RATE_INFO_BW240_DOT11AX_CHAIN_CSD_EN_MASK 0x0000000001000000 5488 5489 5490 /* Description DOT11AX_PE_CHAIN_CSD_EN 5491 5492 This field denotes whether to apply CSD on the packet extension 5493 portion of the packet. This field is valid for all 11ax 5494 packets. 5495 0: disable per-chain csd 5496 1: enable per-chain csd 5497 <legal all> 5498 */ 5499 5500 #define PCU_PPDU_SETUP_INIT_RESPONSE_TO_RESPONSE_RATE_INFO_BW240_DOT11AX_PE_CHAIN_CSD_EN_OFFSET 0x0000000000000090 5501 #define PCU_PPDU_SETUP_INIT_RESPONSE_TO_RESPONSE_RATE_INFO_BW240_DOT11AX_PE_CHAIN_CSD_EN_LSB 25 5502 #define PCU_PPDU_SETUP_INIT_RESPONSE_TO_RESPONSE_RATE_INFO_BW240_DOT11AX_PE_CHAIN_CSD_EN_MSB 25 5503 #define PCU_PPDU_SETUP_INIT_RESPONSE_TO_RESPONSE_RATE_INFO_BW240_DOT11AX_PE_CHAIN_CSD_EN_MASK 0x0000000002000000 5504 5505 5506 /* Description DOT11AX_DL_UL_FLAG 5507 5508 field is only valid for pkt_type == 11ax 5509 5510 <enum 0 DL_UL_FLAG_IS_DL_OR_TDLS> 5511 <enum 1 DL_UL_FLAG_IS_UL> 5512 5513 <legal all> 5514 */ 5515 5516 #define PCU_PPDU_SETUP_INIT_RESPONSE_TO_RESPONSE_RATE_INFO_BW240_DOT11AX_DL_UL_FLAG_OFFSET 0x0000000000000090 5517 #define PCU_PPDU_SETUP_INIT_RESPONSE_TO_RESPONSE_RATE_INFO_BW240_DOT11AX_DL_UL_FLAG_LSB 26 5518 #define PCU_PPDU_SETUP_INIT_RESPONSE_TO_RESPONSE_RATE_INFO_BW240_DOT11AX_DL_UL_FLAG_MSB 26 5519 #define PCU_PPDU_SETUP_INIT_RESPONSE_TO_RESPONSE_RATE_INFO_BW240_DOT11AX_DL_UL_FLAG_MASK 0x0000000004000000 5520 5521 5522 /* Description RESERVED_4A 5523 5524 <legal 0> 5525 */ 5526 5527 #define PCU_PPDU_SETUP_INIT_RESPONSE_TO_RESPONSE_RATE_INFO_BW240_RESERVED_4A_OFFSET 0x0000000000000090 5528 #define PCU_PPDU_SETUP_INIT_RESPONSE_TO_RESPONSE_RATE_INFO_BW240_RESERVED_4A_LSB 27 5529 #define PCU_PPDU_SETUP_INIT_RESPONSE_TO_RESPONSE_RATE_INFO_BW240_RESERVED_4A_MSB 31 5530 #define PCU_PPDU_SETUP_INIT_RESPONSE_TO_RESPONSE_RATE_INFO_BW240_RESERVED_4A_MASK 0x00000000f8000000 5531 5532 5533 /* Description DOT11AX_EXT_RU_START_INDEX 5534 5535 field is only valid for pkt_type == 11ax and Dot11ax_su_extended 5536 == 1 5537 5538 RU Number to which User is assigned 5539 5540 The RU numbering bitwidth is only enough to cover the 20MHz 5541 BW that extended range allows 5542 <legal 0-8> 5543 */ 5544 5545 #define PCU_PPDU_SETUP_INIT_RESPONSE_TO_RESPONSE_RATE_INFO_BW240_DOT11AX_EXT_RU_START_INDEX_OFFSET 0x0000000000000090 5546 #define PCU_PPDU_SETUP_INIT_RESPONSE_TO_RESPONSE_RATE_INFO_BW240_DOT11AX_EXT_RU_START_INDEX_LSB 32 5547 #define PCU_PPDU_SETUP_INIT_RESPONSE_TO_RESPONSE_RATE_INFO_BW240_DOT11AX_EXT_RU_START_INDEX_MSB 35 5548 #define PCU_PPDU_SETUP_INIT_RESPONSE_TO_RESPONSE_RATE_INFO_BW240_DOT11AX_EXT_RU_START_INDEX_MASK 0x0000000f00000000 5549 5550 5551 /* Description DOT11AX_EXT_RU_SIZE 5552 5553 field is only valid for pkt_type == 11ax and Dot11ax_su_extended 5554 == 1 or pkt_type == 11be and EHT_duplicate_mode == 1 5555 5556 The size of the RU for this user. 5557 5558 In case of EHT duplicate transmissions, this field indicates 5559 the width of the actual content before duplication, e.g. 5560 a 40 MHz PPDU duplicated to 160 MHz will have the bandwidth 5561 fields indicating 160 MHz and this field set to e-num 4 5562 (RU_484). 5563 5564 <enum 0 RU_26> 5565 <enum 1 RU_52> 5566 <enum 2 RU_106> 5567 <enum 3 RU_242> 5568 <enum 4 RU_484> 5569 <enum 5 RU_996> 5570 <enum 6 RU_1992> 5571 <enum 7 RU_FULLBW> Set when the RU occupies the full packet 5572 bandwidth 5573 <enum 8 RU_FULLBW_240> Set when the RU occupies the full 5574 packet bandwidth 5575 <enum 9 RU_FULLBW_320> Set when the RU occupies the full 5576 packet bandwidth 5577 <enum 10 RU_MULTI_LARGE> DO NOT USE 5578 <enum 11 RU_78> DO NOT USE 5579 <enum 12 RU_132> DO NOT USE 5580 <legal 0-12> 5581 */ 5582 5583 #define PCU_PPDU_SETUP_INIT_RESPONSE_TO_RESPONSE_RATE_INFO_BW240_DOT11AX_EXT_RU_SIZE_OFFSET 0x0000000000000090 5584 #define PCU_PPDU_SETUP_INIT_RESPONSE_TO_RESPONSE_RATE_INFO_BW240_DOT11AX_EXT_RU_SIZE_LSB 36 5585 #define PCU_PPDU_SETUP_INIT_RESPONSE_TO_RESPONSE_RATE_INFO_BW240_DOT11AX_EXT_RU_SIZE_MSB 39 5586 #define PCU_PPDU_SETUP_INIT_RESPONSE_TO_RESPONSE_RATE_INFO_BW240_DOT11AX_EXT_RU_SIZE_MASK 0x000000f000000000 5587 5588 5589 /* Description EHT_DUPLICATE_MODE 5590 5591 Field only valid for pkt_type == 11be 5592 5593 Indicates EHT duplicate modulation 5594 5595 <enum 0 eht_no_duplicate> 5596 <enum 1 eht_2x_duplicate> 5597 <enum 2 eht_4x_duplicate> 5598 5599 <legal 0-2> 5600 */ 5601 5602 #define PCU_PPDU_SETUP_INIT_RESPONSE_TO_RESPONSE_RATE_INFO_BW240_EHT_DUPLICATE_MODE_OFFSET 0x0000000000000090 5603 #define PCU_PPDU_SETUP_INIT_RESPONSE_TO_RESPONSE_RATE_INFO_BW240_EHT_DUPLICATE_MODE_LSB 40 5604 #define PCU_PPDU_SETUP_INIT_RESPONSE_TO_RESPONSE_RATE_INFO_BW240_EHT_DUPLICATE_MODE_MSB 41 5605 #define PCU_PPDU_SETUP_INIT_RESPONSE_TO_RESPONSE_RATE_INFO_BW240_EHT_DUPLICATE_MODE_MASK 0x0000030000000000 5606 5607 5608 /* Description HE_SIGB_DCM 5609 5610 Indicates whether dual sub-carrier modulation is applied 5611 to EHT-SIG 5612 <legal all> 5613 */ 5614 5615 #define PCU_PPDU_SETUP_INIT_RESPONSE_TO_RESPONSE_RATE_INFO_BW240_HE_SIGB_DCM_OFFSET 0x0000000000000090 5616 #define PCU_PPDU_SETUP_INIT_RESPONSE_TO_RESPONSE_RATE_INFO_BW240_HE_SIGB_DCM_LSB 42 5617 #define PCU_PPDU_SETUP_INIT_RESPONSE_TO_RESPONSE_RATE_INFO_BW240_HE_SIGB_DCM_MSB 42 5618 #define PCU_PPDU_SETUP_INIT_RESPONSE_TO_RESPONSE_RATE_INFO_BW240_HE_SIGB_DCM_MASK 0x0000040000000000 5619 5620 5621 /* Description HE_SIGB_0_MCS 5622 5623 Indicates the MCS of EHT-SIG 5624 5625 For details, refer to MCS_TYPE description 5626 <legal all> 5627 */ 5628 5629 #define PCU_PPDU_SETUP_INIT_RESPONSE_TO_RESPONSE_RATE_INFO_BW240_HE_SIGB_0_MCS_OFFSET 0x0000000000000090 5630 #define PCU_PPDU_SETUP_INIT_RESPONSE_TO_RESPONSE_RATE_INFO_BW240_HE_SIGB_0_MCS_LSB 43 5631 #define PCU_PPDU_SETUP_INIT_RESPONSE_TO_RESPONSE_RATE_INFO_BW240_HE_SIGB_0_MCS_MSB 45 5632 #define PCU_PPDU_SETUP_INIT_RESPONSE_TO_RESPONSE_RATE_INFO_BW240_HE_SIGB_0_MCS_MASK 0x0000380000000000 5633 5634 5635 /* Description NUM_HE_SIGB_SYM 5636 5637 Indicates the number of EHT-SIG symbols 5638 5639 This field is 0-based with 0 indicating that 1 eht_sig symbol 5640 needs to be transmitted. 5641 <legal all> 5642 */ 5643 5644 #define PCU_PPDU_SETUP_INIT_RESPONSE_TO_RESPONSE_RATE_INFO_BW240_NUM_HE_SIGB_SYM_OFFSET 0x0000000000000090 5645 #define PCU_PPDU_SETUP_INIT_RESPONSE_TO_RESPONSE_RATE_INFO_BW240_NUM_HE_SIGB_SYM_LSB 46 5646 #define PCU_PPDU_SETUP_INIT_RESPONSE_TO_RESPONSE_RATE_INFO_BW240_NUM_HE_SIGB_SYM_MSB 50 5647 #define PCU_PPDU_SETUP_INIT_RESPONSE_TO_RESPONSE_RATE_INFO_BW240_NUM_HE_SIGB_SYM_MASK 0x0007c00000000000 5648 5649 5650 /* Description REQUIRED_RESPONSE_TIME_SOURCE 5651 5652 <enum 0 reqd_resp_time_src_is_RXPCU> Typically from received 5653 HT Control for sync MLO response 5654 <enum 1 reqd_resp_time_src_is_FW> 5655 Typically from 'PCU_PPDU_SETUP_INIT' for sync MLO response 5656 to response 5657 <legal all> 5658 */ 5659 5660 #define PCU_PPDU_SETUP_INIT_RESPONSE_TO_RESPONSE_RATE_INFO_BW240_REQUIRED_RESPONSE_TIME_SOURCE_OFFSET 0x0000000000000090 5661 #define PCU_PPDU_SETUP_INIT_RESPONSE_TO_RESPONSE_RATE_INFO_BW240_REQUIRED_RESPONSE_TIME_SOURCE_LSB 51 5662 #define PCU_PPDU_SETUP_INIT_RESPONSE_TO_RESPONSE_RATE_INFO_BW240_REQUIRED_RESPONSE_TIME_SOURCE_MSB 51 5663 #define PCU_PPDU_SETUP_INIT_RESPONSE_TO_RESPONSE_RATE_INFO_BW240_REQUIRED_RESPONSE_TIME_SOURCE_MASK 0x0008000000000000 5664 5665 5666 /* Description RESERVED_5A 5667 5668 <legal 0> 5669 */ 5670 5671 #define PCU_PPDU_SETUP_INIT_RESPONSE_TO_RESPONSE_RATE_INFO_BW240_RESERVED_5A_OFFSET 0x0000000000000090 5672 #define PCU_PPDU_SETUP_INIT_RESPONSE_TO_RESPONSE_RATE_INFO_BW240_RESERVED_5A_LSB 52 5673 #define PCU_PPDU_SETUP_INIT_RESPONSE_TO_RESPONSE_RATE_INFO_BW240_RESERVED_5A_MSB 57 5674 #define PCU_PPDU_SETUP_INIT_RESPONSE_TO_RESPONSE_RATE_INFO_BW240_RESERVED_5A_MASK 0x03f0000000000000 5675 5676 5677 /* Description U_SIG_PUNCTURE_PATTERN_ENCODING 5678 5679 6-bit value copied from 'RX_RESPONSE_REQUIRED_INFO' and 'TX_CBF_INFO' 5680 to pass on to PDG 5681 <legal 0-29> 5682 */ 5683 5684 #define PCU_PPDU_SETUP_INIT_RESPONSE_TO_RESPONSE_RATE_INFO_BW240_U_SIG_PUNCTURE_PATTERN_ENCODING_OFFSET 0x0000000000000090 5685 #define PCU_PPDU_SETUP_INIT_RESPONSE_TO_RESPONSE_RATE_INFO_BW240_U_SIG_PUNCTURE_PATTERN_ENCODING_LSB 58 5686 #define PCU_PPDU_SETUP_INIT_RESPONSE_TO_RESPONSE_RATE_INFO_BW240_U_SIG_PUNCTURE_PATTERN_ENCODING_MSB 63 5687 #define PCU_PPDU_SETUP_INIT_RESPONSE_TO_RESPONSE_RATE_INFO_BW240_U_SIG_PUNCTURE_PATTERN_ENCODING_MASK 0xfc00000000000000 5688 5689 5690 /* Description MLO_STA_ID_DETAILS_RX 5691 5692 16-bi value copied from 'RX_RESPONSE_REQUIRED_INFO' to pass 5693 on to PDG 5694 5695 Bits 10 and 11 are not valid, bits [9:0] reflect 'NSTR_MLO_STA_ID' 5696 from address search. 5697 5698 See definition of mlo_sta_id_details. 5699 */ 5700 5701 5702 /* Description NSTR_MLO_STA_ID 5703 5704 ID of peer participating in non-STR MLO 5705 */ 5706 5707 #define PCU_PPDU_SETUP_INIT_RESPONSE_TO_RESPONSE_RATE_INFO_BW240_MLO_STA_ID_DETAILS_RX_NSTR_MLO_STA_ID_OFFSET 0x0000000000000098 5708 #define PCU_PPDU_SETUP_INIT_RESPONSE_TO_RESPONSE_RATE_INFO_BW240_MLO_STA_ID_DETAILS_RX_NSTR_MLO_STA_ID_LSB 0 5709 #define PCU_PPDU_SETUP_INIT_RESPONSE_TO_RESPONSE_RATE_INFO_BW240_MLO_STA_ID_DETAILS_RX_NSTR_MLO_STA_ID_MSB 9 5710 #define PCU_PPDU_SETUP_INIT_RESPONSE_TO_RESPONSE_RATE_INFO_BW240_MLO_STA_ID_DETAILS_RX_NSTR_MLO_STA_ID_MASK 0x00000000000003ff 5711 5712 5713 /* Description BLOCK_SELF_ML_SYNC 5714 5715 Only valid for TX 5716 5717 When set, this provides an indication to block the peer 5718 for self-link. 5719 */ 5720 5721 #define PCU_PPDU_SETUP_INIT_RESPONSE_TO_RESPONSE_RATE_INFO_BW240_MLO_STA_ID_DETAILS_RX_BLOCK_SELF_ML_SYNC_OFFSET 0x0000000000000098 5722 #define PCU_PPDU_SETUP_INIT_RESPONSE_TO_RESPONSE_RATE_INFO_BW240_MLO_STA_ID_DETAILS_RX_BLOCK_SELF_ML_SYNC_LSB 10 5723 #define PCU_PPDU_SETUP_INIT_RESPONSE_TO_RESPONSE_RATE_INFO_BW240_MLO_STA_ID_DETAILS_RX_BLOCK_SELF_ML_SYNC_MSB 10 5724 #define PCU_PPDU_SETUP_INIT_RESPONSE_TO_RESPONSE_RATE_INFO_BW240_MLO_STA_ID_DETAILS_RX_BLOCK_SELF_ML_SYNC_MASK 0x0000000000000400 5725 5726 5727 /* Description BLOCK_PARTNER_ML_SYNC 5728 5729 Only valid for TX 5730 5731 When set, this provides an indication to block the peer 5732 for partner links. 5733 */ 5734 5735 #define PCU_PPDU_SETUP_INIT_RESPONSE_TO_RESPONSE_RATE_INFO_BW240_MLO_STA_ID_DETAILS_RX_BLOCK_PARTNER_ML_SYNC_OFFSET 0x0000000000000098 5736 #define PCU_PPDU_SETUP_INIT_RESPONSE_TO_RESPONSE_RATE_INFO_BW240_MLO_STA_ID_DETAILS_RX_BLOCK_PARTNER_ML_SYNC_LSB 11 5737 #define PCU_PPDU_SETUP_INIT_RESPONSE_TO_RESPONSE_RATE_INFO_BW240_MLO_STA_ID_DETAILS_RX_BLOCK_PARTNER_ML_SYNC_MSB 11 5738 #define PCU_PPDU_SETUP_INIT_RESPONSE_TO_RESPONSE_RATE_INFO_BW240_MLO_STA_ID_DETAILS_RX_BLOCK_PARTNER_ML_SYNC_MASK 0x0000000000000800 5739 5740 5741 /* Description NSTR_MLO_STA_ID_VALID 5742 5743 All the fields in this TLV are valid only if this bit is 5744 set. 5745 */ 5746 5747 #define PCU_PPDU_SETUP_INIT_RESPONSE_TO_RESPONSE_RATE_INFO_BW240_MLO_STA_ID_DETAILS_RX_NSTR_MLO_STA_ID_VALID_OFFSET 0x0000000000000098 5748 #define PCU_PPDU_SETUP_INIT_RESPONSE_TO_RESPONSE_RATE_INFO_BW240_MLO_STA_ID_DETAILS_RX_NSTR_MLO_STA_ID_VALID_LSB 12 5749 #define PCU_PPDU_SETUP_INIT_RESPONSE_TO_RESPONSE_RATE_INFO_BW240_MLO_STA_ID_DETAILS_RX_NSTR_MLO_STA_ID_VALID_MSB 12 5750 #define PCU_PPDU_SETUP_INIT_RESPONSE_TO_RESPONSE_RATE_INFO_BW240_MLO_STA_ID_DETAILS_RX_NSTR_MLO_STA_ID_VALID_MASK 0x0000000000001000 5751 5752 5753 /* Description RESERVED_0A 5754 5755 <legal 0> 5756 */ 5757 5758 #define PCU_PPDU_SETUP_INIT_RESPONSE_TO_RESPONSE_RATE_INFO_BW240_MLO_STA_ID_DETAILS_RX_RESERVED_0A_OFFSET 0x0000000000000098 5759 #define PCU_PPDU_SETUP_INIT_RESPONSE_TO_RESPONSE_RATE_INFO_BW240_MLO_STA_ID_DETAILS_RX_RESERVED_0A_LSB 13 5760 #define PCU_PPDU_SETUP_INIT_RESPONSE_TO_RESPONSE_RATE_INFO_BW240_MLO_STA_ID_DETAILS_RX_RESERVED_0A_MSB 15 5761 #define PCU_PPDU_SETUP_INIT_RESPONSE_TO_RESPONSE_RATE_INFO_BW240_MLO_STA_ID_DETAILS_RX_RESERVED_0A_MASK 0x000000000000e000 5762 5763 5764 /* Description REQUIRED_RESPONSE_TIME 5765 5766 When non-zero, indicates that PDG shall pad the response 5767 transmission to the indicated duration (in us) 5768 */ 5769 5770 #define PCU_PPDU_SETUP_INIT_RESPONSE_TO_RESPONSE_RATE_INFO_BW240_REQUIRED_RESPONSE_TIME_OFFSET 0x0000000000000098 5771 #define PCU_PPDU_SETUP_INIT_RESPONSE_TO_RESPONSE_RATE_INFO_BW240_REQUIRED_RESPONSE_TIME_LSB 16 5772 #define PCU_PPDU_SETUP_INIT_RESPONSE_TO_RESPONSE_RATE_INFO_BW240_REQUIRED_RESPONSE_TIME_MSB 27 5773 #define PCU_PPDU_SETUP_INIT_RESPONSE_TO_RESPONSE_RATE_INFO_BW240_REQUIRED_RESPONSE_TIME_MASK 0x000000000fff0000 5774 5775 5776 /* Description DOT11BE_PARAMS_PLACEHOLDER 5777 5778 4 bytes for use as placeholders for 'Dot11be_*' parameters 5779 5780 */ 5781 5782 #define PCU_PPDU_SETUP_INIT_RESPONSE_TO_RESPONSE_RATE_INFO_BW240_DOT11BE_PARAMS_PLACEHOLDER_OFFSET 0x0000000000000098 5783 #define PCU_PPDU_SETUP_INIT_RESPONSE_TO_RESPONSE_RATE_INFO_BW240_DOT11BE_PARAMS_PLACEHOLDER_LSB 28 5784 #define PCU_PPDU_SETUP_INIT_RESPONSE_TO_RESPONSE_RATE_INFO_BW240_DOT11BE_PARAMS_PLACEHOLDER_MSB 31 5785 #define PCU_PPDU_SETUP_INIT_RESPONSE_TO_RESPONSE_RATE_INFO_BW240_DOT11BE_PARAMS_PLACEHOLDER_MASK 0x00000000f0000000 5786 5787 5788 /* Description RESPONSE_TO_RESPONSE_RATE_INFO_BW320 5789 5790 Field only valid in case of Response_to_response set to 5791 SU_BA or MU_BA 5792 5793 NOTE: This field is also known as response_to_response_rate_info_pattern_5 5794 in case punctured transmission is enabled. 5795 5796 Used by TXPCU to determine what the transmit rates are for 5797 the response to response transmission in case original 5798 transmission was 320 MHz. 5799 5800 Note: 5801 see field R2R_bw320_active_channel for the BW of this transmission 5802 5803 */ 5804 5805 5806 /* Description RESERVED_0A 5807 5808 5809 <legal 0> 5810 */ 5811 5812 #define PCU_PPDU_SETUP_INIT_RESPONSE_TO_RESPONSE_RATE_INFO_BW320_RESERVED_0A_OFFSET 0x0000000000000098 5813 #define PCU_PPDU_SETUP_INIT_RESPONSE_TO_RESPONSE_RATE_INFO_BW320_RESERVED_0A_LSB 32 5814 #define PCU_PPDU_SETUP_INIT_RESPONSE_TO_RESPONSE_RATE_INFO_BW320_RESERVED_0A_MSB 32 5815 #define PCU_PPDU_SETUP_INIT_RESPONSE_TO_RESPONSE_RATE_INFO_BW320_RESERVED_0A_MASK 0x0000000100000000 5816 5817 5818 /* Description TX_ANTENNA_SECTOR_CTRL 5819 5820 Sectored transmit antenna 5821 <legal all> 5822 */ 5823 5824 #define PCU_PPDU_SETUP_INIT_RESPONSE_TO_RESPONSE_RATE_INFO_BW320_TX_ANTENNA_SECTOR_CTRL_OFFSET 0x0000000000000098 5825 #define PCU_PPDU_SETUP_INIT_RESPONSE_TO_RESPONSE_RATE_INFO_BW320_TX_ANTENNA_SECTOR_CTRL_LSB 33 5826 #define PCU_PPDU_SETUP_INIT_RESPONSE_TO_RESPONSE_RATE_INFO_BW320_TX_ANTENNA_SECTOR_CTRL_MSB 56 5827 #define PCU_PPDU_SETUP_INIT_RESPONSE_TO_RESPONSE_RATE_INFO_BW320_TX_ANTENNA_SECTOR_CTRL_MASK 0x01fffffe00000000 5828 5829 5830 /* Description PKT_TYPE 5831 5832 Packet type: 5833 <enum 0 dot11a>802.11a PPDU type 5834 <enum 1 dot11b>802.11b PPDU type 5835 <enum 2 dot11n_mm>802.11n Mixed Mode PPDU type 5836 <enum 3 dot11ac>802.11ac PPDU type 5837 <enum 4 dot11ax>802.11ax PPDU type 5838 <enum 5 dot11ba>802.11ba (WUR) PPDU type 5839 <enum 6 dot11be>802.11be PPDU type 5840 <enum 7 dot11az>802.11az (ranging) PPDU type 5841 <enum 8 dot11n_gf>802.11n Green Field PPDU type (unsupported 5842 & aborted) 5843 */ 5844 5845 #define PCU_PPDU_SETUP_INIT_RESPONSE_TO_RESPONSE_RATE_INFO_BW320_PKT_TYPE_OFFSET 0x0000000000000098 5846 #define PCU_PPDU_SETUP_INIT_RESPONSE_TO_RESPONSE_RATE_INFO_BW320_PKT_TYPE_LSB 57 5847 #define PCU_PPDU_SETUP_INIT_RESPONSE_TO_RESPONSE_RATE_INFO_BW320_PKT_TYPE_MSB 60 5848 #define PCU_PPDU_SETUP_INIT_RESPONSE_TO_RESPONSE_RATE_INFO_BW320_PKT_TYPE_MASK 0x1e00000000000000 5849 5850 5851 /* Description SMOOTHING 5852 5853 This field is used by PDG to populate the SMOOTHING filed 5854 in the SIG Preamble of the PPDU 5855 <legal 0-1> 5856 */ 5857 5858 #define PCU_PPDU_SETUP_INIT_RESPONSE_TO_RESPONSE_RATE_INFO_BW320_SMOOTHING_OFFSET 0x0000000000000098 5859 #define PCU_PPDU_SETUP_INIT_RESPONSE_TO_RESPONSE_RATE_INFO_BW320_SMOOTHING_LSB 61 5860 #define PCU_PPDU_SETUP_INIT_RESPONSE_TO_RESPONSE_RATE_INFO_BW320_SMOOTHING_MSB 61 5861 #define PCU_PPDU_SETUP_INIT_RESPONSE_TO_RESPONSE_RATE_INFO_BW320_SMOOTHING_MASK 0x2000000000000000 5862 5863 5864 /* Description LDPC 5865 5866 When set, use LDPC transmission rates 5867 */ 5868 5869 #define PCU_PPDU_SETUP_INIT_RESPONSE_TO_RESPONSE_RATE_INFO_BW320_LDPC_OFFSET 0x0000000000000098 5870 #define PCU_PPDU_SETUP_INIT_RESPONSE_TO_RESPONSE_RATE_INFO_BW320_LDPC_LSB 62 5871 #define PCU_PPDU_SETUP_INIT_RESPONSE_TO_RESPONSE_RATE_INFO_BW320_LDPC_MSB 62 5872 #define PCU_PPDU_SETUP_INIT_RESPONSE_TO_RESPONSE_RATE_INFO_BW320_LDPC_MASK 0x4000000000000000 5873 5874 5875 /* Description STBC 5876 5877 When set, use STBC transmission rates 5878 */ 5879 5880 #define PCU_PPDU_SETUP_INIT_RESPONSE_TO_RESPONSE_RATE_INFO_BW320_STBC_OFFSET 0x0000000000000098 5881 #define PCU_PPDU_SETUP_INIT_RESPONSE_TO_RESPONSE_RATE_INFO_BW320_STBC_LSB 63 5882 #define PCU_PPDU_SETUP_INIT_RESPONSE_TO_RESPONSE_RATE_INFO_BW320_STBC_MSB 63 5883 #define PCU_PPDU_SETUP_INIT_RESPONSE_TO_RESPONSE_RATE_INFO_BW320_STBC_MASK 0x8000000000000000 5884 5885 5886 /* Description ALT_TX_PWR 5887 5888 Coex related AlternativeTransmit parameter 5889 5890 Transmit Power in s6.2 format. 5891 In units of 0.25 dBm 5892 <legal all> 5893 */ 5894 5895 #define PCU_PPDU_SETUP_INIT_RESPONSE_TO_RESPONSE_RATE_INFO_BW320_ALT_TX_PWR_OFFSET 0x00000000000000a0 5896 #define PCU_PPDU_SETUP_INIT_RESPONSE_TO_RESPONSE_RATE_INFO_BW320_ALT_TX_PWR_LSB 0 5897 #define PCU_PPDU_SETUP_INIT_RESPONSE_TO_RESPONSE_RATE_INFO_BW320_ALT_TX_PWR_MSB 7 5898 #define PCU_PPDU_SETUP_INIT_RESPONSE_TO_RESPONSE_RATE_INFO_BW320_ALT_TX_PWR_MASK 0x00000000000000ff 5899 5900 5901 /* Description ALT_MIN_TX_PWR 5902 5903 Coex related Alternative Transmit parameter 5904 5905 Minimum allowed Transmit Power in s6.2 format. 5906 In units of 0.25 dBm 5907 <legal all> 5908 */ 5909 5910 #define PCU_PPDU_SETUP_INIT_RESPONSE_TO_RESPONSE_RATE_INFO_BW320_ALT_MIN_TX_PWR_OFFSET 0x00000000000000a0 5911 #define PCU_PPDU_SETUP_INIT_RESPONSE_TO_RESPONSE_RATE_INFO_BW320_ALT_MIN_TX_PWR_LSB 8 5912 #define PCU_PPDU_SETUP_INIT_RESPONSE_TO_RESPONSE_RATE_INFO_BW320_ALT_MIN_TX_PWR_MSB 15 5913 #define PCU_PPDU_SETUP_INIT_RESPONSE_TO_RESPONSE_RATE_INFO_BW320_ALT_MIN_TX_PWR_MASK 0x000000000000ff00 5914 5915 5916 /* Description ALT_NSS 5917 5918 Coex related Alternative Transmit parameter 5919 5920 Number of spatial streams. 5921 5922 <enum 0 1_spatial_stream>Single spatial stream 5923 <enum 1 2_spatial_streams>2 spatial streams 5924 <enum 2 3_spatial_streams>3 spatial streams 5925 <enum 3 4_spatial_streams>4 spatial streams 5926 <enum 4 5_spatial_streams>5 spatial streams 5927 <enum 5 6_spatial_streams>6 spatial streams 5928 <enum 6 7_spatial_streams>7 spatial streams 5929 <enum 7 8_spatial_streams>8 spatial streams 5930 */ 5931 5932 #define PCU_PPDU_SETUP_INIT_RESPONSE_TO_RESPONSE_RATE_INFO_BW320_ALT_NSS_OFFSET 0x00000000000000a0 5933 #define PCU_PPDU_SETUP_INIT_RESPONSE_TO_RESPONSE_RATE_INFO_BW320_ALT_NSS_LSB 16 5934 #define PCU_PPDU_SETUP_INIT_RESPONSE_TO_RESPONSE_RATE_INFO_BW320_ALT_NSS_MSB 18 5935 #define PCU_PPDU_SETUP_INIT_RESPONSE_TO_RESPONSE_RATE_INFO_BW320_ALT_NSS_MASK 0x0000000000070000 5936 5937 5938 /* Description ALT_TX_CHAIN_MASK 5939 5940 Coex related Alternative Transmit parameter 5941 5942 Chain mask to support up to 8 antennas. 5943 <legal 1-255> 5944 */ 5945 5946 #define PCU_PPDU_SETUP_INIT_RESPONSE_TO_RESPONSE_RATE_INFO_BW320_ALT_TX_CHAIN_MASK_OFFSET 0x00000000000000a0 5947 #define PCU_PPDU_SETUP_INIT_RESPONSE_TO_RESPONSE_RATE_INFO_BW320_ALT_TX_CHAIN_MASK_LSB 19 5948 #define PCU_PPDU_SETUP_INIT_RESPONSE_TO_RESPONSE_RATE_INFO_BW320_ALT_TX_CHAIN_MASK_MSB 26 5949 #define PCU_PPDU_SETUP_INIT_RESPONSE_TO_RESPONSE_RATE_INFO_BW320_ALT_TX_CHAIN_MASK_MASK 0x0000000007f80000 5950 5951 5952 /* Description ALT_BW 5953 5954 Coex related Alternative Transmit parameter 5955 5956 The BW of the upcoming transmission. 5957 5958 <enum 0 20_mhz>20 Mhz BW 5959 <enum 1 40_mhz>40 Mhz BW 5960 <enum 2 80_mhz>80 Mhz BW 5961 <enum 3 160_mhz>160 Mhz BW 5962 <enum 4 320_mhz>320 Mhz BW 5963 <enum 5 240_mhz>240 Mhz BW 5964 */ 5965 5966 #define PCU_PPDU_SETUP_INIT_RESPONSE_TO_RESPONSE_RATE_INFO_BW320_ALT_BW_OFFSET 0x00000000000000a0 5967 #define PCU_PPDU_SETUP_INIT_RESPONSE_TO_RESPONSE_RATE_INFO_BW320_ALT_BW_LSB 27 5968 #define PCU_PPDU_SETUP_INIT_RESPONSE_TO_RESPONSE_RATE_INFO_BW320_ALT_BW_MSB 29 5969 #define PCU_PPDU_SETUP_INIT_RESPONSE_TO_RESPONSE_RATE_INFO_BW320_ALT_BW_MASK 0x0000000038000000 5970 5971 5972 /* Description STF_LTF_3DB_BOOST 5973 5974 Boost the STF and LTF power by 3dB in 11a/n/ac packets. 5975 This includes both the legacy preambles and the HT/VHT preambles.0: 5976 disable power boost1: enable power boost 5977 <legal all> 5978 */ 5979 5980 #define PCU_PPDU_SETUP_INIT_RESPONSE_TO_RESPONSE_RATE_INFO_BW320_STF_LTF_3DB_BOOST_OFFSET 0x00000000000000a0 5981 #define PCU_PPDU_SETUP_INIT_RESPONSE_TO_RESPONSE_RATE_INFO_BW320_STF_LTF_3DB_BOOST_LSB 30 5982 #define PCU_PPDU_SETUP_INIT_RESPONSE_TO_RESPONSE_RATE_INFO_BW320_STF_LTF_3DB_BOOST_MSB 30 5983 #define PCU_PPDU_SETUP_INIT_RESPONSE_TO_RESPONSE_RATE_INFO_BW320_STF_LTF_3DB_BOOST_MASK 0x0000000040000000 5984 5985 5986 /* Description FORCE_EXTRA_SYMBOL 5987 5988 Set to 1 to force an extra OFDM symbol (or symbols) even 5989 if the PPDU encoding process does not result in an extra 5990 OFDM symbol (or symbols) 5991 */ 5992 5993 #define PCU_PPDU_SETUP_INIT_RESPONSE_TO_RESPONSE_RATE_INFO_BW320_FORCE_EXTRA_SYMBOL_OFFSET 0x00000000000000a0 5994 #define PCU_PPDU_SETUP_INIT_RESPONSE_TO_RESPONSE_RATE_INFO_BW320_FORCE_EXTRA_SYMBOL_LSB 31 5995 #define PCU_PPDU_SETUP_INIT_RESPONSE_TO_RESPONSE_RATE_INFO_BW320_FORCE_EXTRA_SYMBOL_MSB 31 5996 #define PCU_PPDU_SETUP_INIT_RESPONSE_TO_RESPONSE_RATE_INFO_BW320_FORCE_EXTRA_SYMBOL_MASK 0x0000000080000000 5997 5998 5999 /* Description ALT_RATE_MCS 6000 6001 Coex related Alternative Transmit parameter 6002 6003 For details, refer to MCS_TYPE 6004 Note: This is "rate" in case of 11a/11b 6005 description 6006 <legal all> 6007 */ 6008 6009 #define PCU_PPDU_SETUP_INIT_RESPONSE_TO_RESPONSE_RATE_INFO_BW320_ALT_RATE_MCS_OFFSET 0x00000000000000a0 6010 #define PCU_PPDU_SETUP_INIT_RESPONSE_TO_RESPONSE_RATE_INFO_BW320_ALT_RATE_MCS_LSB 32 6011 #define PCU_PPDU_SETUP_INIT_RESPONSE_TO_RESPONSE_RATE_INFO_BW320_ALT_RATE_MCS_MSB 35 6012 #define PCU_PPDU_SETUP_INIT_RESPONSE_TO_RESPONSE_RATE_INFO_BW320_ALT_RATE_MCS_MASK 0x0000000f00000000 6013 6014 6015 /* Description NSS 6016 6017 Number of spatial streams. 6018 6019 <enum 0 1_spatial_stream>Single spatial stream 6020 <enum 1 2_spatial_streams>2 spatial streams 6021 <enum 2 3_spatial_streams>3 spatial streams 6022 <enum 3 4_spatial_streams>4 spatial streams 6023 <enum 4 5_spatial_streams>5 spatial streams 6024 <enum 5 6_spatial_streams>6 spatial streams 6025 <enum 6 7_spatial_streams>7 spatial streams 6026 <enum 7 8_spatial_streams>8 spatial streams 6027 */ 6028 6029 #define PCU_PPDU_SETUP_INIT_RESPONSE_TO_RESPONSE_RATE_INFO_BW320_NSS_OFFSET 0x00000000000000a0 6030 #define PCU_PPDU_SETUP_INIT_RESPONSE_TO_RESPONSE_RATE_INFO_BW320_NSS_LSB 36 6031 #define PCU_PPDU_SETUP_INIT_RESPONSE_TO_RESPONSE_RATE_INFO_BW320_NSS_MSB 38 6032 #define PCU_PPDU_SETUP_INIT_RESPONSE_TO_RESPONSE_RATE_INFO_BW320_NSS_MASK 0x0000007000000000 6033 6034 6035 /* Description DPD_ENABLE 6036 6037 DPD enable control 6038 6039 This is needed on a per packet basis 6040 <enum 0 dpd_off> DPD profile not applied to current 6041 packet 6042 <enum 1 dpd_on> DPD profile applied to current packet 6043 if available 6044 <legal 0-1> 6045 6046 This field is not applicable in11ah mode of operation and 6047 is ignored by the HW 6048 */ 6049 6050 #define PCU_PPDU_SETUP_INIT_RESPONSE_TO_RESPONSE_RATE_INFO_BW320_DPD_ENABLE_OFFSET 0x00000000000000a0 6051 #define PCU_PPDU_SETUP_INIT_RESPONSE_TO_RESPONSE_RATE_INFO_BW320_DPD_ENABLE_LSB 39 6052 #define PCU_PPDU_SETUP_INIT_RESPONSE_TO_RESPONSE_RATE_INFO_BW320_DPD_ENABLE_MSB 39 6053 #define PCU_PPDU_SETUP_INIT_RESPONSE_TO_RESPONSE_RATE_INFO_BW320_DPD_ENABLE_MASK 0x0000008000000000 6054 6055 6056 /* Description TX_PWR 6057 6058 Transmit Power in s6.2 format. 6059 In units of 0.25 dBm 6060 <legal all> 6061 */ 6062 6063 #define PCU_PPDU_SETUP_INIT_RESPONSE_TO_RESPONSE_RATE_INFO_BW320_TX_PWR_OFFSET 0x00000000000000a0 6064 #define PCU_PPDU_SETUP_INIT_RESPONSE_TO_RESPONSE_RATE_INFO_BW320_TX_PWR_LSB 40 6065 #define PCU_PPDU_SETUP_INIT_RESPONSE_TO_RESPONSE_RATE_INFO_BW320_TX_PWR_MSB 47 6066 #define PCU_PPDU_SETUP_INIT_RESPONSE_TO_RESPONSE_RATE_INFO_BW320_TX_PWR_MASK 0x0000ff0000000000 6067 6068 6069 /* Description MIN_TX_PWR 6070 6071 Coex related field: 6072 6073 Minimum allowed Transmit Power in s6.2 format. 6074 In units of 0.25 dBm 6075 <legal all> 6076 */ 6077 6078 #define PCU_PPDU_SETUP_INIT_RESPONSE_TO_RESPONSE_RATE_INFO_BW320_MIN_TX_PWR_OFFSET 0x00000000000000a0 6079 #define PCU_PPDU_SETUP_INIT_RESPONSE_TO_RESPONSE_RATE_INFO_BW320_MIN_TX_PWR_LSB 48 6080 #define PCU_PPDU_SETUP_INIT_RESPONSE_TO_RESPONSE_RATE_INFO_BW320_MIN_TX_PWR_MSB 55 6081 #define PCU_PPDU_SETUP_INIT_RESPONSE_TO_RESPONSE_RATE_INFO_BW320_MIN_TX_PWR_MASK 0x00ff000000000000 6082 6083 6084 /* Description TX_CHAIN_MASK 6085 6086 Chain mask to support up to 8 antennas. 6087 <legal 1-255> 6088 */ 6089 6090 #define PCU_PPDU_SETUP_INIT_RESPONSE_TO_RESPONSE_RATE_INFO_BW320_TX_CHAIN_MASK_OFFSET 0x00000000000000a0 6091 #define PCU_PPDU_SETUP_INIT_RESPONSE_TO_RESPONSE_RATE_INFO_BW320_TX_CHAIN_MASK_LSB 56 6092 #define PCU_PPDU_SETUP_INIT_RESPONSE_TO_RESPONSE_RATE_INFO_BW320_TX_CHAIN_MASK_MSB 63 6093 #define PCU_PPDU_SETUP_INIT_RESPONSE_TO_RESPONSE_RATE_INFO_BW320_TX_CHAIN_MASK_MASK 0xff00000000000000 6094 6095 6096 /* Description RESERVED_3A 6097 6098 <legal 0> 6099 */ 6100 6101 #define PCU_PPDU_SETUP_INIT_RESPONSE_TO_RESPONSE_RATE_INFO_BW320_RESERVED_3A_OFFSET 0x00000000000000a8 6102 #define PCU_PPDU_SETUP_INIT_RESPONSE_TO_RESPONSE_RATE_INFO_BW320_RESERVED_3A_LSB 0 6103 #define PCU_PPDU_SETUP_INIT_RESPONSE_TO_RESPONSE_RATE_INFO_BW320_RESERVED_3A_MSB 7 6104 #define PCU_PPDU_SETUP_INIT_RESPONSE_TO_RESPONSE_RATE_INFO_BW320_RESERVED_3A_MASK 0x00000000000000ff 6105 6106 6107 /* Description SGI 6108 6109 Field only valid when pkt type is HT or VHT.For 11ax see 6110 field Dot11ax_CP_LTF_size 6111 6112 <enum 0 0_8_us_sgi > Legacy normal GI. Can also be used 6113 for HE 6114 <enum 1 0_4_us_sgi > Legacy short GI. Can also be used 6115 for HE 6116 <enum 2 1_6_us_sgi > Not used for pre 11ax pkt_types. 6117 6118 <enum 3 3_2_us_sgi > Not used for pre 11ax pkt_types 6119 6120 6121 <legal 0 - 3> 6122 */ 6123 6124 #define PCU_PPDU_SETUP_INIT_RESPONSE_TO_RESPONSE_RATE_INFO_BW320_SGI_OFFSET 0x00000000000000a8 6125 #define PCU_PPDU_SETUP_INIT_RESPONSE_TO_RESPONSE_RATE_INFO_BW320_SGI_LSB 8 6126 #define PCU_PPDU_SETUP_INIT_RESPONSE_TO_RESPONSE_RATE_INFO_BW320_SGI_MSB 9 6127 #define PCU_PPDU_SETUP_INIT_RESPONSE_TO_RESPONSE_RATE_INFO_BW320_SGI_MASK 0x0000000000000300 6128 6129 6130 /* Description RATE_MCS 6131 6132 For details, refer to MCS_TYPE description 6133 Note: This is "rate" in case of 11a/11b 6134 6135 <legal all> 6136 */ 6137 6138 #define PCU_PPDU_SETUP_INIT_RESPONSE_TO_RESPONSE_RATE_INFO_BW320_RATE_MCS_OFFSET 0x00000000000000a8 6139 #define PCU_PPDU_SETUP_INIT_RESPONSE_TO_RESPONSE_RATE_INFO_BW320_RATE_MCS_LSB 10 6140 #define PCU_PPDU_SETUP_INIT_RESPONSE_TO_RESPONSE_RATE_INFO_BW320_RATE_MCS_MSB 13 6141 #define PCU_PPDU_SETUP_INIT_RESPONSE_TO_RESPONSE_RATE_INFO_BW320_RATE_MCS_MASK 0x0000000000003c00 6142 6143 6144 /* Description RESERVED_3B 6145 6146 <legal 0> 6147 */ 6148 6149 #define PCU_PPDU_SETUP_INIT_RESPONSE_TO_RESPONSE_RATE_INFO_BW320_RESERVED_3B_OFFSET 0x00000000000000a8 6150 #define PCU_PPDU_SETUP_INIT_RESPONSE_TO_RESPONSE_RATE_INFO_BW320_RESERVED_3B_LSB 14 6151 #define PCU_PPDU_SETUP_INIT_RESPONSE_TO_RESPONSE_RATE_INFO_BW320_RESERVED_3B_MSB 15 6152 #define PCU_PPDU_SETUP_INIT_RESPONSE_TO_RESPONSE_RATE_INFO_BW320_RESERVED_3B_MASK 0x000000000000c000 6153 6154 6155 /* Description TX_PWR_1 6156 6157 Default (desired) transmit parameter for the second chain 6158 6159 6160 Transmit Power in s6.2 format. 6161 In units of 0.25 dBm 6162 6163 Note that there is no Min value for this 6164 <legal all> 6165 */ 6166 6167 #define PCU_PPDU_SETUP_INIT_RESPONSE_TO_RESPONSE_RATE_INFO_BW320_TX_PWR_1_OFFSET 0x00000000000000a8 6168 #define PCU_PPDU_SETUP_INIT_RESPONSE_TO_RESPONSE_RATE_INFO_BW320_TX_PWR_1_LSB 16 6169 #define PCU_PPDU_SETUP_INIT_RESPONSE_TO_RESPONSE_RATE_INFO_BW320_TX_PWR_1_MSB 23 6170 #define PCU_PPDU_SETUP_INIT_RESPONSE_TO_RESPONSE_RATE_INFO_BW320_TX_PWR_1_MASK 0x0000000000ff0000 6171 6172 6173 /* Description ALT_TX_PWR_1 6174 6175 Alternate (desired) transmit parameter for the second chain 6176 6177 6178 Transmit Power in s6.2 format. 6179 In units of 0.25 dBm 6180 6181 Note that there is no Min value for this 6182 <legal all> 6183 */ 6184 6185 #define PCU_PPDU_SETUP_INIT_RESPONSE_TO_RESPONSE_RATE_INFO_BW320_ALT_TX_PWR_1_OFFSET 0x00000000000000a8 6186 #define PCU_PPDU_SETUP_INIT_RESPONSE_TO_RESPONSE_RATE_INFO_BW320_ALT_TX_PWR_1_LSB 24 6187 #define PCU_PPDU_SETUP_INIT_RESPONSE_TO_RESPONSE_RATE_INFO_BW320_ALT_TX_PWR_1_MSB 31 6188 #define PCU_PPDU_SETUP_INIT_RESPONSE_TO_RESPONSE_RATE_INFO_BW320_ALT_TX_PWR_1_MASK 0x00000000ff000000 6189 6190 6191 /* Description AGGREGATION 6192 6193 Field only valid in case of pkt_type == 11n 6194 6195 <enum 0 mpdu> Indicates MPDU format. TXPCU will select 6196 this setting if the CBF response only contains a single 6197 segment 6198 <enum 1 a_mpdu> Indicates A-MPDU format. TXPCU will 6199 select this setting if the CBF response will contain two 6200 or more segments 6201 <legal 0-1> 6202 */ 6203 6204 #define PCU_PPDU_SETUP_INIT_RESPONSE_TO_RESPONSE_RATE_INFO_BW320_AGGREGATION_OFFSET 0x00000000000000a8 6205 #define PCU_PPDU_SETUP_INIT_RESPONSE_TO_RESPONSE_RATE_INFO_BW320_AGGREGATION_LSB 32 6206 #define PCU_PPDU_SETUP_INIT_RESPONSE_TO_RESPONSE_RATE_INFO_BW320_AGGREGATION_MSB 32 6207 #define PCU_PPDU_SETUP_INIT_RESPONSE_TO_RESPONSE_RATE_INFO_BW320_AGGREGATION_MASK 0x0000000100000000 6208 6209 6210 /* Description DOT11AX_BSS_COLOR_ID 6211 6212 BSS color of the nextwork to which this STA belongs. 6213 When generated by TXPCU, this field is set equal to: Dot11ax_received_Bss_color_id 6214 6215 6216 <legal all> 6217 */ 6218 6219 #define PCU_PPDU_SETUP_INIT_RESPONSE_TO_RESPONSE_RATE_INFO_BW320_DOT11AX_BSS_COLOR_ID_OFFSET 0x00000000000000a8 6220 #define PCU_PPDU_SETUP_INIT_RESPONSE_TO_RESPONSE_RATE_INFO_BW320_DOT11AX_BSS_COLOR_ID_LSB 33 6221 #define PCU_PPDU_SETUP_INIT_RESPONSE_TO_RESPONSE_RATE_INFO_BW320_DOT11AX_BSS_COLOR_ID_MSB 38 6222 #define PCU_PPDU_SETUP_INIT_RESPONSE_TO_RESPONSE_RATE_INFO_BW320_DOT11AX_BSS_COLOR_ID_MASK 0x0000007e00000000 6223 6224 6225 /* Description DOT11AX_SPATIAL_REUSE 6226 6227 This field is only valid for pkt_type == 11ax 6228 6229 Spatial re-use 6230 <legal all> 6231 */ 6232 6233 #define PCU_PPDU_SETUP_INIT_RESPONSE_TO_RESPONSE_RATE_INFO_BW320_DOT11AX_SPATIAL_REUSE_OFFSET 0x00000000000000a8 6234 #define PCU_PPDU_SETUP_INIT_RESPONSE_TO_RESPONSE_RATE_INFO_BW320_DOT11AX_SPATIAL_REUSE_LSB 39 6235 #define PCU_PPDU_SETUP_INIT_RESPONSE_TO_RESPONSE_RATE_INFO_BW320_DOT11AX_SPATIAL_REUSE_MSB 42 6236 #define PCU_PPDU_SETUP_INIT_RESPONSE_TO_RESPONSE_RATE_INFO_BW320_DOT11AX_SPATIAL_REUSE_MASK 0x0000078000000000 6237 6238 6239 /* Description DOT11AX_CP_LTF_SIZE 6240 6241 field is only valid for pkt_type == 11ax 6242 6243 Indicates the CP and HE-LTF type 6244 6245 <enum 0 OneX_LTF_0_8CP> 1xLTF + 0.8 us CP 6246 <enum 1 TwoX_LTF_0_8CP> 2x LTF + 0.8 µs CP 6247 <enum 2 TwoX_LTF_1_6CP> 2x LTF + 1.6 µs CP 6248 <enum 3 FourX_LTF_0_8CP_3_2CP> 6249 When DCM == 0 OR STBC == 0: 4x LTF + 3.2 µs CP 6250 When DCM == 1 AND STBC == 1: 4x LTF + 0.8 µs CP. Note: 6251 In this scenario, Neither DCM nor STBC is applied to HE 6252 data field. 6253 6254 If ( DCM == 1 ) and ( MCS > 0 ) and (STBC == 0) 6255 0 = 1xLTF + 0.4 usec 6256 1 = 2xLTF + 0.4 usec 6257 2~3 = Reserved 6258 6259 <legal all> 6260 */ 6261 6262 #define PCU_PPDU_SETUP_INIT_RESPONSE_TO_RESPONSE_RATE_INFO_BW320_DOT11AX_CP_LTF_SIZE_OFFSET 0x00000000000000a8 6263 #define PCU_PPDU_SETUP_INIT_RESPONSE_TO_RESPONSE_RATE_INFO_BW320_DOT11AX_CP_LTF_SIZE_LSB 43 6264 #define PCU_PPDU_SETUP_INIT_RESPONSE_TO_RESPONSE_RATE_INFO_BW320_DOT11AX_CP_LTF_SIZE_MSB 44 6265 #define PCU_PPDU_SETUP_INIT_RESPONSE_TO_RESPONSE_RATE_INFO_BW320_DOT11AX_CP_LTF_SIZE_MASK 0x0000180000000000 6266 6267 6268 /* Description DOT11AX_DCM 6269 6270 field is only valid for pkt_type == 11ax 6271 6272 Indicates whether dual sub-carrier modulation is applied 6273 6274 0: No DCM 6275 1:DCM 6276 <legal all> 6277 */ 6278 6279 #define PCU_PPDU_SETUP_INIT_RESPONSE_TO_RESPONSE_RATE_INFO_BW320_DOT11AX_DCM_OFFSET 0x00000000000000a8 6280 #define PCU_PPDU_SETUP_INIT_RESPONSE_TO_RESPONSE_RATE_INFO_BW320_DOT11AX_DCM_LSB 45 6281 #define PCU_PPDU_SETUP_INIT_RESPONSE_TO_RESPONSE_RATE_INFO_BW320_DOT11AX_DCM_MSB 45 6282 #define PCU_PPDU_SETUP_INIT_RESPONSE_TO_RESPONSE_RATE_INFO_BW320_DOT11AX_DCM_MASK 0x0000200000000000 6283 6284 6285 /* Description DOT11AX_DOPPLER_INDICATION 6286 6287 field is only valid for pkt_type == 11ax 6288 6289 0: No Doppler support 6290 1: Doppler support 6291 <legal all> 6292 */ 6293 6294 #define PCU_PPDU_SETUP_INIT_RESPONSE_TO_RESPONSE_RATE_INFO_BW320_DOT11AX_DOPPLER_INDICATION_OFFSET 0x00000000000000a8 6295 #define PCU_PPDU_SETUP_INIT_RESPONSE_TO_RESPONSE_RATE_INFO_BW320_DOT11AX_DOPPLER_INDICATION_LSB 46 6296 #define PCU_PPDU_SETUP_INIT_RESPONSE_TO_RESPONSE_RATE_INFO_BW320_DOT11AX_DOPPLER_INDICATION_MSB 46 6297 #define PCU_PPDU_SETUP_INIT_RESPONSE_TO_RESPONSE_RATE_INFO_BW320_DOT11AX_DOPPLER_INDICATION_MASK 0x0000400000000000 6298 6299 6300 /* Description DOT11AX_SU_EXTENDED 6301 6302 field is only valid for pkt_type == 11ax OR pkt_type == 6303 11be 6304 6305 When set, the 11ax or 11be frame is of the extended range 6306 format 6307 <legal all> 6308 */ 6309 6310 #define PCU_PPDU_SETUP_INIT_RESPONSE_TO_RESPONSE_RATE_INFO_BW320_DOT11AX_SU_EXTENDED_OFFSET 0x00000000000000a8 6311 #define PCU_PPDU_SETUP_INIT_RESPONSE_TO_RESPONSE_RATE_INFO_BW320_DOT11AX_SU_EXTENDED_LSB 47 6312 #define PCU_PPDU_SETUP_INIT_RESPONSE_TO_RESPONSE_RATE_INFO_BW320_DOT11AX_SU_EXTENDED_MSB 47 6313 #define PCU_PPDU_SETUP_INIT_RESPONSE_TO_RESPONSE_RATE_INFO_BW320_DOT11AX_SU_EXTENDED_MASK 0x0000800000000000 6314 6315 6316 /* Description DOT11AX_MIN_PACKET_EXTENSION 6317 6318 field is only valid for pkt_type == 11ax OR pkt_type == 6319 11be 6320 6321 The min packet extension duration for this user. 6322 0: no extension 6323 1: 8us 6324 2: 16 us 6325 3: 20 us (only for .11be) 6326 <legal 0-3> 6327 */ 6328 6329 #define PCU_PPDU_SETUP_INIT_RESPONSE_TO_RESPONSE_RATE_INFO_BW320_DOT11AX_MIN_PACKET_EXTENSION_OFFSET 0x00000000000000a8 6330 #define PCU_PPDU_SETUP_INIT_RESPONSE_TO_RESPONSE_RATE_INFO_BW320_DOT11AX_MIN_PACKET_EXTENSION_LSB 48 6331 #define PCU_PPDU_SETUP_INIT_RESPONSE_TO_RESPONSE_RATE_INFO_BW320_DOT11AX_MIN_PACKET_EXTENSION_MSB 49 6332 #define PCU_PPDU_SETUP_INIT_RESPONSE_TO_RESPONSE_RATE_INFO_BW320_DOT11AX_MIN_PACKET_EXTENSION_MASK 0x0003000000000000 6333 6334 6335 /* Description DOT11AX_PE_NSS 6336 6337 Number of active spatial streams during packet extension. 6338 6339 6340 <enum 0 1_spatial_stream>Single spatial stream 6341 <enum 1 2_spatial_streams>2 spatial streams 6342 <enum 2 3_spatial_streams>3 spatial streams 6343 <enum 3 4_spatial_streams>4 spatial streams 6344 <enum 4 5_spatial_streams>5 spatial streams 6345 <enum 5 6_spatial_streams>6 spatial streams 6346 <enum 6 7_spatial_streams>7 spatial streams 6347 <enum 7 8_spatial_streams>8 spatial streams 6348 */ 6349 6350 #define PCU_PPDU_SETUP_INIT_RESPONSE_TO_RESPONSE_RATE_INFO_BW320_DOT11AX_PE_NSS_OFFSET 0x00000000000000a8 6351 #define PCU_PPDU_SETUP_INIT_RESPONSE_TO_RESPONSE_RATE_INFO_BW320_DOT11AX_PE_NSS_LSB 50 6352 #define PCU_PPDU_SETUP_INIT_RESPONSE_TO_RESPONSE_RATE_INFO_BW320_DOT11AX_PE_NSS_MSB 52 6353 #define PCU_PPDU_SETUP_INIT_RESPONSE_TO_RESPONSE_RATE_INFO_BW320_DOT11AX_PE_NSS_MASK 0x001c000000000000 6354 6355 6356 /* Description DOT11AX_PE_CONTENT 6357 6358 Content of packet extension. Valid for all 11ax packets 6359 having packet extension 6360 6361 0-he_ltf, 1-last_data_symbol 6362 <legal all> 6363 */ 6364 6365 #define PCU_PPDU_SETUP_INIT_RESPONSE_TO_RESPONSE_RATE_INFO_BW320_DOT11AX_PE_CONTENT_OFFSET 0x00000000000000a8 6366 #define PCU_PPDU_SETUP_INIT_RESPONSE_TO_RESPONSE_RATE_INFO_BW320_DOT11AX_PE_CONTENT_LSB 53 6367 #define PCU_PPDU_SETUP_INIT_RESPONSE_TO_RESPONSE_RATE_INFO_BW320_DOT11AX_PE_CONTENT_MSB 53 6368 #define PCU_PPDU_SETUP_INIT_RESPONSE_TO_RESPONSE_RATE_INFO_BW320_DOT11AX_PE_CONTENT_MASK 0x0020000000000000 6369 6370 6371 /* Description DOT11AX_PE_LTF_SIZE 6372 6373 LTF size to be used during packet extention. . This field 6374 is valid for both FTM and non-FTM packets. 6375 0-1x 6376 1-2x (unsupported un HWK-1) 6377 2-4x (unsupported un HWK-1) 6378 <legal all> 6379 */ 6380 6381 #define PCU_PPDU_SETUP_INIT_RESPONSE_TO_RESPONSE_RATE_INFO_BW320_DOT11AX_PE_LTF_SIZE_OFFSET 0x00000000000000a8 6382 #define PCU_PPDU_SETUP_INIT_RESPONSE_TO_RESPONSE_RATE_INFO_BW320_DOT11AX_PE_LTF_SIZE_LSB 54 6383 #define PCU_PPDU_SETUP_INIT_RESPONSE_TO_RESPONSE_RATE_INFO_BW320_DOT11AX_PE_LTF_SIZE_MSB 55 6384 #define PCU_PPDU_SETUP_INIT_RESPONSE_TO_RESPONSE_RATE_INFO_BW320_DOT11AX_PE_LTF_SIZE_MASK 0x00c0000000000000 6385 6386 6387 /* Description DOT11AX_CHAIN_CSD_EN 6388 6389 This field denotes whether to apply CSD on the preamble 6390 and data portion of the packet. This field is valid for 6391 all transmit packets 6392 0: disable per-chain csd 6393 1: enable per-chain csd 6394 <legal all> 6395 */ 6396 6397 #define PCU_PPDU_SETUP_INIT_RESPONSE_TO_RESPONSE_RATE_INFO_BW320_DOT11AX_CHAIN_CSD_EN_OFFSET 0x00000000000000a8 6398 #define PCU_PPDU_SETUP_INIT_RESPONSE_TO_RESPONSE_RATE_INFO_BW320_DOT11AX_CHAIN_CSD_EN_LSB 56 6399 #define PCU_PPDU_SETUP_INIT_RESPONSE_TO_RESPONSE_RATE_INFO_BW320_DOT11AX_CHAIN_CSD_EN_MSB 56 6400 #define PCU_PPDU_SETUP_INIT_RESPONSE_TO_RESPONSE_RATE_INFO_BW320_DOT11AX_CHAIN_CSD_EN_MASK 0x0100000000000000 6401 6402 6403 /* Description DOT11AX_PE_CHAIN_CSD_EN 6404 6405 This field denotes whether to apply CSD on the packet extension 6406 portion of the packet. This field is valid for all 11ax 6407 packets. 6408 0: disable per-chain csd 6409 1: enable per-chain csd 6410 <legal all> 6411 */ 6412 6413 #define PCU_PPDU_SETUP_INIT_RESPONSE_TO_RESPONSE_RATE_INFO_BW320_DOT11AX_PE_CHAIN_CSD_EN_OFFSET 0x00000000000000a8 6414 #define PCU_PPDU_SETUP_INIT_RESPONSE_TO_RESPONSE_RATE_INFO_BW320_DOT11AX_PE_CHAIN_CSD_EN_LSB 57 6415 #define PCU_PPDU_SETUP_INIT_RESPONSE_TO_RESPONSE_RATE_INFO_BW320_DOT11AX_PE_CHAIN_CSD_EN_MSB 57 6416 #define PCU_PPDU_SETUP_INIT_RESPONSE_TO_RESPONSE_RATE_INFO_BW320_DOT11AX_PE_CHAIN_CSD_EN_MASK 0x0200000000000000 6417 6418 6419 /* Description DOT11AX_DL_UL_FLAG 6420 6421 field is only valid for pkt_type == 11ax 6422 6423 <enum 0 DL_UL_FLAG_IS_DL_OR_TDLS> 6424 <enum 1 DL_UL_FLAG_IS_UL> 6425 6426 <legal all> 6427 */ 6428 6429 #define PCU_PPDU_SETUP_INIT_RESPONSE_TO_RESPONSE_RATE_INFO_BW320_DOT11AX_DL_UL_FLAG_OFFSET 0x00000000000000a8 6430 #define PCU_PPDU_SETUP_INIT_RESPONSE_TO_RESPONSE_RATE_INFO_BW320_DOT11AX_DL_UL_FLAG_LSB 58 6431 #define PCU_PPDU_SETUP_INIT_RESPONSE_TO_RESPONSE_RATE_INFO_BW320_DOT11AX_DL_UL_FLAG_MSB 58 6432 #define PCU_PPDU_SETUP_INIT_RESPONSE_TO_RESPONSE_RATE_INFO_BW320_DOT11AX_DL_UL_FLAG_MASK 0x0400000000000000 6433 6434 6435 /* Description RESERVED_4A 6436 6437 <legal 0> 6438 */ 6439 6440 #define PCU_PPDU_SETUP_INIT_RESPONSE_TO_RESPONSE_RATE_INFO_BW320_RESERVED_4A_OFFSET 0x00000000000000a8 6441 #define PCU_PPDU_SETUP_INIT_RESPONSE_TO_RESPONSE_RATE_INFO_BW320_RESERVED_4A_LSB 59 6442 #define PCU_PPDU_SETUP_INIT_RESPONSE_TO_RESPONSE_RATE_INFO_BW320_RESERVED_4A_MSB 63 6443 #define PCU_PPDU_SETUP_INIT_RESPONSE_TO_RESPONSE_RATE_INFO_BW320_RESERVED_4A_MASK 0xf800000000000000 6444 6445 6446 /* Description DOT11AX_EXT_RU_START_INDEX 6447 6448 field is only valid for pkt_type == 11ax and Dot11ax_su_extended 6449 == 1 6450 6451 RU Number to which User is assigned 6452 6453 The RU numbering bitwidth is only enough to cover the 20MHz 6454 BW that extended range allows 6455 <legal 0-8> 6456 */ 6457 6458 #define PCU_PPDU_SETUP_INIT_RESPONSE_TO_RESPONSE_RATE_INFO_BW320_DOT11AX_EXT_RU_START_INDEX_OFFSET 0x00000000000000b0 6459 #define PCU_PPDU_SETUP_INIT_RESPONSE_TO_RESPONSE_RATE_INFO_BW320_DOT11AX_EXT_RU_START_INDEX_LSB 0 6460 #define PCU_PPDU_SETUP_INIT_RESPONSE_TO_RESPONSE_RATE_INFO_BW320_DOT11AX_EXT_RU_START_INDEX_MSB 3 6461 #define PCU_PPDU_SETUP_INIT_RESPONSE_TO_RESPONSE_RATE_INFO_BW320_DOT11AX_EXT_RU_START_INDEX_MASK 0x000000000000000f 6462 6463 6464 /* Description DOT11AX_EXT_RU_SIZE 6465 6466 field is only valid for pkt_type == 11ax and Dot11ax_su_extended 6467 == 1 or pkt_type == 11be and EHT_duplicate_mode == 1 6468 6469 The size of the RU for this user. 6470 6471 In case of EHT duplicate transmissions, this field indicates 6472 the width of the actual content before duplication, e.g. 6473 a 40 MHz PPDU duplicated to 160 MHz will have the bandwidth 6474 fields indicating 160 MHz and this field set to e-num 4 6475 (RU_484). 6476 6477 <enum 0 RU_26> 6478 <enum 1 RU_52> 6479 <enum 2 RU_106> 6480 <enum 3 RU_242> 6481 <enum 4 RU_484> 6482 <enum 5 RU_996> 6483 <enum 6 RU_1992> 6484 <enum 7 RU_FULLBW> Set when the RU occupies the full packet 6485 bandwidth 6486 <enum 8 RU_FULLBW_240> Set when the RU occupies the full 6487 packet bandwidth 6488 <enum 9 RU_FULLBW_320> Set when the RU occupies the full 6489 packet bandwidth 6490 <enum 10 RU_MULTI_LARGE> DO NOT USE 6491 <enum 11 RU_78> DO NOT USE 6492 <enum 12 RU_132> DO NOT USE 6493 <legal 0-12> 6494 */ 6495 6496 #define PCU_PPDU_SETUP_INIT_RESPONSE_TO_RESPONSE_RATE_INFO_BW320_DOT11AX_EXT_RU_SIZE_OFFSET 0x00000000000000b0 6497 #define PCU_PPDU_SETUP_INIT_RESPONSE_TO_RESPONSE_RATE_INFO_BW320_DOT11AX_EXT_RU_SIZE_LSB 4 6498 #define PCU_PPDU_SETUP_INIT_RESPONSE_TO_RESPONSE_RATE_INFO_BW320_DOT11AX_EXT_RU_SIZE_MSB 7 6499 #define PCU_PPDU_SETUP_INIT_RESPONSE_TO_RESPONSE_RATE_INFO_BW320_DOT11AX_EXT_RU_SIZE_MASK 0x00000000000000f0 6500 6501 6502 /* Description EHT_DUPLICATE_MODE 6503 6504 Field only valid for pkt_type == 11be 6505 6506 Indicates EHT duplicate modulation 6507 6508 <enum 0 eht_no_duplicate> 6509 <enum 1 eht_2x_duplicate> 6510 <enum 2 eht_4x_duplicate> 6511 6512 <legal 0-2> 6513 */ 6514 6515 #define PCU_PPDU_SETUP_INIT_RESPONSE_TO_RESPONSE_RATE_INFO_BW320_EHT_DUPLICATE_MODE_OFFSET 0x00000000000000b0 6516 #define PCU_PPDU_SETUP_INIT_RESPONSE_TO_RESPONSE_RATE_INFO_BW320_EHT_DUPLICATE_MODE_LSB 8 6517 #define PCU_PPDU_SETUP_INIT_RESPONSE_TO_RESPONSE_RATE_INFO_BW320_EHT_DUPLICATE_MODE_MSB 9 6518 #define PCU_PPDU_SETUP_INIT_RESPONSE_TO_RESPONSE_RATE_INFO_BW320_EHT_DUPLICATE_MODE_MASK 0x0000000000000300 6519 6520 6521 /* Description HE_SIGB_DCM 6522 6523 Indicates whether dual sub-carrier modulation is applied 6524 to EHT-SIG 6525 <legal all> 6526 */ 6527 6528 #define PCU_PPDU_SETUP_INIT_RESPONSE_TO_RESPONSE_RATE_INFO_BW320_HE_SIGB_DCM_OFFSET 0x00000000000000b0 6529 #define PCU_PPDU_SETUP_INIT_RESPONSE_TO_RESPONSE_RATE_INFO_BW320_HE_SIGB_DCM_LSB 10 6530 #define PCU_PPDU_SETUP_INIT_RESPONSE_TO_RESPONSE_RATE_INFO_BW320_HE_SIGB_DCM_MSB 10 6531 #define PCU_PPDU_SETUP_INIT_RESPONSE_TO_RESPONSE_RATE_INFO_BW320_HE_SIGB_DCM_MASK 0x0000000000000400 6532 6533 6534 /* Description HE_SIGB_0_MCS 6535 6536 Indicates the MCS of EHT-SIG 6537 6538 For details, refer to MCS_TYPE description 6539 <legal all> 6540 */ 6541 6542 #define PCU_PPDU_SETUP_INIT_RESPONSE_TO_RESPONSE_RATE_INFO_BW320_HE_SIGB_0_MCS_OFFSET 0x00000000000000b0 6543 #define PCU_PPDU_SETUP_INIT_RESPONSE_TO_RESPONSE_RATE_INFO_BW320_HE_SIGB_0_MCS_LSB 11 6544 #define PCU_PPDU_SETUP_INIT_RESPONSE_TO_RESPONSE_RATE_INFO_BW320_HE_SIGB_0_MCS_MSB 13 6545 #define PCU_PPDU_SETUP_INIT_RESPONSE_TO_RESPONSE_RATE_INFO_BW320_HE_SIGB_0_MCS_MASK 0x0000000000003800 6546 6547 6548 /* Description NUM_HE_SIGB_SYM 6549 6550 Indicates the number of EHT-SIG symbols 6551 6552 This field is 0-based with 0 indicating that 1 eht_sig symbol 6553 needs to be transmitted. 6554 <legal all> 6555 */ 6556 6557 #define PCU_PPDU_SETUP_INIT_RESPONSE_TO_RESPONSE_RATE_INFO_BW320_NUM_HE_SIGB_SYM_OFFSET 0x00000000000000b0 6558 #define PCU_PPDU_SETUP_INIT_RESPONSE_TO_RESPONSE_RATE_INFO_BW320_NUM_HE_SIGB_SYM_LSB 14 6559 #define PCU_PPDU_SETUP_INIT_RESPONSE_TO_RESPONSE_RATE_INFO_BW320_NUM_HE_SIGB_SYM_MSB 18 6560 #define PCU_PPDU_SETUP_INIT_RESPONSE_TO_RESPONSE_RATE_INFO_BW320_NUM_HE_SIGB_SYM_MASK 0x000000000007c000 6561 6562 6563 /* Description REQUIRED_RESPONSE_TIME_SOURCE 6564 6565 <enum 0 reqd_resp_time_src_is_RXPCU> Typically from received 6566 HT Control for sync MLO response 6567 <enum 1 reqd_resp_time_src_is_FW> 6568 Typically from 'PCU_PPDU_SETUP_INIT' for sync MLO response 6569 to response 6570 <legal all> 6571 */ 6572 6573 #define PCU_PPDU_SETUP_INIT_RESPONSE_TO_RESPONSE_RATE_INFO_BW320_REQUIRED_RESPONSE_TIME_SOURCE_OFFSET 0x00000000000000b0 6574 #define PCU_PPDU_SETUP_INIT_RESPONSE_TO_RESPONSE_RATE_INFO_BW320_REQUIRED_RESPONSE_TIME_SOURCE_LSB 19 6575 #define PCU_PPDU_SETUP_INIT_RESPONSE_TO_RESPONSE_RATE_INFO_BW320_REQUIRED_RESPONSE_TIME_SOURCE_MSB 19 6576 #define PCU_PPDU_SETUP_INIT_RESPONSE_TO_RESPONSE_RATE_INFO_BW320_REQUIRED_RESPONSE_TIME_SOURCE_MASK 0x0000000000080000 6577 6578 6579 /* Description RESERVED_5A 6580 6581 <legal 0> 6582 */ 6583 6584 #define PCU_PPDU_SETUP_INIT_RESPONSE_TO_RESPONSE_RATE_INFO_BW320_RESERVED_5A_OFFSET 0x00000000000000b0 6585 #define PCU_PPDU_SETUP_INIT_RESPONSE_TO_RESPONSE_RATE_INFO_BW320_RESERVED_5A_LSB 20 6586 #define PCU_PPDU_SETUP_INIT_RESPONSE_TO_RESPONSE_RATE_INFO_BW320_RESERVED_5A_MSB 25 6587 #define PCU_PPDU_SETUP_INIT_RESPONSE_TO_RESPONSE_RATE_INFO_BW320_RESERVED_5A_MASK 0x0000000003f00000 6588 6589 6590 /* Description U_SIG_PUNCTURE_PATTERN_ENCODING 6591 6592 6-bit value copied from 'RX_RESPONSE_REQUIRED_INFO' and 'TX_CBF_INFO' 6593 to pass on to PDG 6594 <legal 0-29> 6595 */ 6596 6597 #define PCU_PPDU_SETUP_INIT_RESPONSE_TO_RESPONSE_RATE_INFO_BW320_U_SIG_PUNCTURE_PATTERN_ENCODING_OFFSET 0x00000000000000b0 6598 #define PCU_PPDU_SETUP_INIT_RESPONSE_TO_RESPONSE_RATE_INFO_BW320_U_SIG_PUNCTURE_PATTERN_ENCODING_LSB 26 6599 #define PCU_PPDU_SETUP_INIT_RESPONSE_TO_RESPONSE_RATE_INFO_BW320_U_SIG_PUNCTURE_PATTERN_ENCODING_MSB 31 6600 #define PCU_PPDU_SETUP_INIT_RESPONSE_TO_RESPONSE_RATE_INFO_BW320_U_SIG_PUNCTURE_PATTERN_ENCODING_MASK 0x00000000fc000000 6601 6602 6603 /* Description MLO_STA_ID_DETAILS_RX 6604 6605 16-bi value copied from 'RX_RESPONSE_REQUIRED_INFO' to pass 6606 on to PDG 6607 6608 Bits 10 and 11 are not valid, bits [9:0] reflect 'NSTR_MLO_STA_ID' 6609 from address search. 6610 6611 See definition of mlo_sta_id_details. 6612 */ 6613 6614 6615 /* Description NSTR_MLO_STA_ID 6616 6617 ID of peer participating in non-STR MLO 6618 */ 6619 6620 #define PCU_PPDU_SETUP_INIT_RESPONSE_TO_RESPONSE_RATE_INFO_BW320_MLO_STA_ID_DETAILS_RX_NSTR_MLO_STA_ID_OFFSET 0x00000000000000b0 6621 #define PCU_PPDU_SETUP_INIT_RESPONSE_TO_RESPONSE_RATE_INFO_BW320_MLO_STA_ID_DETAILS_RX_NSTR_MLO_STA_ID_LSB 32 6622 #define PCU_PPDU_SETUP_INIT_RESPONSE_TO_RESPONSE_RATE_INFO_BW320_MLO_STA_ID_DETAILS_RX_NSTR_MLO_STA_ID_MSB 41 6623 #define PCU_PPDU_SETUP_INIT_RESPONSE_TO_RESPONSE_RATE_INFO_BW320_MLO_STA_ID_DETAILS_RX_NSTR_MLO_STA_ID_MASK 0x000003ff00000000 6624 6625 6626 /* Description BLOCK_SELF_ML_SYNC 6627 6628 Only valid for TX 6629 6630 When set, this provides an indication to block the peer 6631 for self-link. 6632 */ 6633 6634 #define PCU_PPDU_SETUP_INIT_RESPONSE_TO_RESPONSE_RATE_INFO_BW320_MLO_STA_ID_DETAILS_RX_BLOCK_SELF_ML_SYNC_OFFSET 0x00000000000000b0 6635 #define PCU_PPDU_SETUP_INIT_RESPONSE_TO_RESPONSE_RATE_INFO_BW320_MLO_STA_ID_DETAILS_RX_BLOCK_SELF_ML_SYNC_LSB 42 6636 #define PCU_PPDU_SETUP_INIT_RESPONSE_TO_RESPONSE_RATE_INFO_BW320_MLO_STA_ID_DETAILS_RX_BLOCK_SELF_ML_SYNC_MSB 42 6637 #define PCU_PPDU_SETUP_INIT_RESPONSE_TO_RESPONSE_RATE_INFO_BW320_MLO_STA_ID_DETAILS_RX_BLOCK_SELF_ML_SYNC_MASK 0x0000040000000000 6638 6639 6640 /* Description BLOCK_PARTNER_ML_SYNC 6641 6642 Only valid for TX 6643 6644 When set, this provides an indication to block the peer 6645 for partner links. 6646 */ 6647 6648 #define PCU_PPDU_SETUP_INIT_RESPONSE_TO_RESPONSE_RATE_INFO_BW320_MLO_STA_ID_DETAILS_RX_BLOCK_PARTNER_ML_SYNC_OFFSET 0x00000000000000b0 6649 #define PCU_PPDU_SETUP_INIT_RESPONSE_TO_RESPONSE_RATE_INFO_BW320_MLO_STA_ID_DETAILS_RX_BLOCK_PARTNER_ML_SYNC_LSB 43 6650 #define PCU_PPDU_SETUP_INIT_RESPONSE_TO_RESPONSE_RATE_INFO_BW320_MLO_STA_ID_DETAILS_RX_BLOCK_PARTNER_ML_SYNC_MSB 43 6651 #define PCU_PPDU_SETUP_INIT_RESPONSE_TO_RESPONSE_RATE_INFO_BW320_MLO_STA_ID_DETAILS_RX_BLOCK_PARTNER_ML_SYNC_MASK 0x0000080000000000 6652 6653 6654 /* Description NSTR_MLO_STA_ID_VALID 6655 6656 All the fields in this TLV are valid only if this bit is 6657 set. 6658 */ 6659 6660 #define PCU_PPDU_SETUP_INIT_RESPONSE_TO_RESPONSE_RATE_INFO_BW320_MLO_STA_ID_DETAILS_RX_NSTR_MLO_STA_ID_VALID_OFFSET 0x00000000000000b0 6661 #define PCU_PPDU_SETUP_INIT_RESPONSE_TO_RESPONSE_RATE_INFO_BW320_MLO_STA_ID_DETAILS_RX_NSTR_MLO_STA_ID_VALID_LSB 44 6662 #define PCU_PPDU_SETUP_INIT_RESPONSE_TO_RESPONSE_RATE_INFO_BW320_MLO_STA_ID_DETAILS_RX_NSTR_MLO_STA_ID_VALID_MSB 44 6663 #define PCU_PPDU_SETUP_INIT_RESPONSE_TO_RESPONSE_RATE_INFO_BW320_MLO_STA_ID_DETAILS_RX_NSTR_MLO_STA_ID_VALID_MASK 0x0000100000000000 6664 6665 6666 /* Description RESERVED_0A 6667 6668 <legal 0> 6669 */ 6670 6671 #define PCU_PPDU_SETUP_INIT_RESPONSE_TO_RESPONSE_RATE_INFO_BW320_MLO_STA_ID_DETAILS_RX_RESERVED_0A_OFFSET 0x00000000000000b0 6672 #define PCU_PPDU_SETUP_INIT_RESPONSE_TO_RESPONSE_RATE_INFO_BW320_MLO_STA_ID_DETAILS_RX_RESERVED_0A_LSB 45 6673 #define PCU_PPDU_SETUP_INIT_RESPONSE_TO_RESPONSE_RATE_INFO_BW320_MLO_STA_ID_DETAILS_RX_RESERVED_0A_MSB 47 6674 #define PCU_PPDU_SETUP_INIT_RESPONSE_TO_RESPONSE_RATE_INFO_BW320_MLO_STA_ID_DETAILS_RX_RESERVED_0A_MASK 0x0000e00000000000 6675 6676 6677 /* Description REQUIRED_RESPONSE_TIME 6678 6679 When non-zero, indicates that PDG shall pad the response 6680 transmission to the indicated duration (in us) 6681 */ 6682 6683 #define PCU_PPDU_SETUP_INIT_RESPONSE_TO_RESPONSE_RATE_INFO_BW320_REQUIRED_RESPONSE_TIME_OFFSET 0x00000000000000b0 6684 #define PCU_PPDU_SETUP_INIT_RESPONSE_TO_RESPONSE_RATE_INFO_BW320_REQUIRED_RESPONSE_TIME_LSB 48 6685 #define PCU_PPDU_SETUP_INIT_RESPONSE_TO_RESPONSE_RATE_INFO_BW320_REQUIRED_RESPONSE_TIME_MSB 59 6686 #define PCU_PPDU_SETUP_INIT_RESPONSE_TO_RESPONSE_RATE_INFO_BW320_REQUIRED_RESPONSE_TIME_MASK 0x0fff000000000000 6687 6688 6689 /* Description DOT11BE_PARAMS_PLACEHOLDER 6690 6691 4 bytes for use as placeholders for 'Dot11be_*' parameters 6692 6693 */ 6694 6695 #define PCU_PPDU_SETUP_INIT_RESPONSE_TO_RESPONSE_RATE_INFO_BW320_DOT11BE_PARAMS_PLACEHOLDER_OFFSET 0x00000000000000b0 6696 #define PCU_PPDU_SETUP_INIT_RESPONSE_TO_RESPONSE_RATE_INFO_BW320_DOT11BE_PARAMS_PLACEHOLDER_LSB 60 6697 #define PCU_PPDU_SETUP_INIT_RESPONSE_TO_RESPONSE_RATE_INFO_BW320_DOT11BE_PARAMS_PLACEHOLDER_MSB 63 6698 #define PCU_PPDU_SETUP_INIT_RESPONSE_TO_RESPONSE_RATE_INFO_BW320_DOT11BE_PARAMS_PLACEHOLDER_MASK 0xf000000000000000 6699 6700 6701 /* Description R2R_HW_RESPONSE_TX_DURATION 6702 6703 Field only valid in case of Response_to_response set to 6704 SU_BA or MU_BA 6705 6706 The amount of time the transmission of the HW response to 6707 response will take (in us) 6708 6709 Used for coex as well as e.g. for sync MLO to align R2R 6710 times on the medium across multiple channels 6711 6712 This field also represents the 'alt_hw_response_tx_duration'. 6713 Note that this implies that no different duration can be 6714 programmed for the default and alt setting. SW should program 6715 the worst case value in the RXPCU table in case they are 6716 different. 6717 <legal all> 6718 */ 6719 6720 #define PCU_PPDU_SETUP_INIT_R2R_HW_RESPONSE_TX_DURATION_OFFSET 0x00000000000000b8 6721 #define PCU_PPDU_SETUP_INIT_R2R_HW_RESPONSE_TX_DURATION_LSB 0 6722 #define PCU_PPDU_SETUP_INIT_R2R_HW_RESPONSE_TX_DURATION_MSB 15 6723 #define PCU_PPDU_SETUP_INIT_R2R_HW_RESPONSE_TX_DURATION_MASK 0x000000000000ffff 6724 6725 6726 /* Description R2R_RX_DURATION_FIELD 6727 6728 Field only valid in case of Response_to_response set to 6729 SU_BA or MU_BA 6730 6731 The duration field assumed to have been received in the 6732 response frame and what will be used in the duration field 6733 calculation for the response_to_response_Frame 6734 6735 PDG uses this field to calculate what the duration field 6736 value should be in the response frame. 6737 This is returned to the TXPCU 6738 6739 Note that if PDG has protection in place to wrap around... 6740 I the actual transmit time is larger then the value programmed 6741 here, PDG HW will set the duration field in the response 6742 to response frame to zero. 6743 6744 This field is used in 11ah mode as well 6745 <legal all> 6746 */ 6747 6748 #define PCU_PPDU_SETUP_INIT_R2R_RX_DURATION_FIELD_OFFSET 0x00000000000000b8 6749 #define PCU_PPDU_SETUP_INIT_R2R_RX_DURATION_FIELD_LSB 16 6750 #define PCU_PPDU_SETUP_INIT_R2R_RX_DURATION_FIELD_MSB 31 6751 #define PCU_PPDU_SETUP_INIT_R2R_RX_DURATION_FIELD_MASK 0x00000000ffff0000 6752 6753 6754 /* Description R2R_GROUP_ID 6755 6756 Field only valid in case of Response_to_response set to 6757 SU_BA or MU_BA 6758 6759 Specifies the Group ID to be used in the response to response 6760 frame. 6761 <legal all> 6762 */ 6763 6764 #define PCU_PPDU_SETUP_INIT_R2R_GROUP_ID_OFFSET 0x00000000000000b8 6765 #define PCU_PPDU_SETUP_INIT_R2R_GROUP_ID_LSB 32 6766 #define PCU_PPDU_SETUP_INIT_R2R_GROUP_ID_MSB 37 6767 #define PCU_PPDU_SETUP_INIT_R2R_GROUP_ID_MASK 0x0000003f00000000 6768 6769 6770 /* Description R2R_RESPONSE_FRAME_TYPE 6771 6772 Field only valid in case of Response_to_response set to 6773 SU_BA or MU_BA 6774 6775 Response_frame_type to be indicated in the PDG_RESPONSE 6776 TLV for the response to response frame. 6777 6778 Coex related field 6779 <enum 0 Non_11ah_ACK > 6780 <enum 1 Non_11ah_BA > also used for M-BA 6781 <enum 2 Non_11ah_CTS > 6782 <enum 3 AH_NDP_CTS> 6783 <enum 4 AH_NDP_ACK> 6784 <enum 5 AH_NDP_BA> 6785 <enum 6 AH_NDP_MOD_ACK> 6786 <enum 7 AH_Normal_ACK> 6787 <enum 8 AH_Normal_BA> 6788 <enum 9 RTT_ACK> 6789 <enum 10 CBF_RESPONSE> 6790 <enum 11 MBA> This can be a multi STA BA or multi TID BA 6791 6792 <enum 12 Ranging_NDP> 6793 <enum 13 LMR_RESPONSE> NDP followed by LMR response for 6794 Rx ranging NDPA followed by NDP 6795 6796 <legal 0-12> 6797 */ 6798 6799 #define PCU_PPDU_SETUP_INIT_R2R_RESPONSE_FRAME_TYPE_OFFSET 0x00000000000000b8 6800 #define PCU_PPDU_SETUP_INIT_R2R_RESPONSE_FRAME_TYPE_LSB 38 6801 #define PCU_PPDU_SETUP_INIT_R2R_RESPONSE_FRAME_TYPE_MSB 41 6802 #define PCU_PPDU_SETUP_INIT_R2R_RESPONSE_FRAME_TYPE_MASK 0x000003c000000000 6803 6804 6805 /* Description R2R_STA_PARTIAL_AID 6806 6807 Field only valid in case of Response_to_response set to 6808 SU_BA or MU_BA 6809 6810 Specifies the partial AID of the response to response frame 6811 in case it is transmitted at VHT rates. 6812 <legal all> 6813 */ 6814 6815 #define PCU_PPDU_SETUP_INIT_R2R_STA_PARTIAL_AID_OFFSET 0x00000000000000b8 6816 #define PCU_PPDU_SETUP_INIT_R2R_STA_PARTIAL_AID_LSB 42 6817 #define PCU_PPDU_SETUP_INIT_R2R_STA_PARTIAL_AID_MSB 52 6818 #define PCU_PPDU_SETUP_INIT_R2R_STA_PARTIAL_AID_MASK 0x001ffc0000000000 6819 6820 6821 /* Description USE_ADDRESS_FIELDS_FOR_PROTECTION 6822 6823 When set, the protection_frame_ad1/ad2 fields are to be 6824 used for RTS/CTS2S frames 6825 6826 When set and not disabled through a TXPCU register bit, 6827 the protection_frame_ad2* fields are also copied to the 6828 tx_ad2* fields of the 'EXPECTED_RESPONSE' TLV (i.e. the 6829 expected response Rx AD1) to RXPCU for all frames. 6830 6831 <legal all> 6832 */ 6833 6834 #define PCU_PPDU_SETUP_INIT_USE_ADDRESS_FIELDS_FOR_PROTECTION_OFFSET 0x00000000000000b8 6835 #define PCU_PPDU_SETUP_INIT_USE_ADDRESS_FIELDS_FOR_PROTECTION_LSB 53 6836 #define PCU_PPDU_SETUP_INIT_USE_ADDRESS_FIELDS_FOR_PROTECTION_MSB 53 6837 #define PCU_PPDU_SETUP_INIT_USE_ADDRESS_FIELDS_FOR_PROTECTION_MASK 0x0020000000000000 6838 6839 6840 /* Description R2R_SET_REQUIRED_RESPONSE_TIME 6841 6842 Field only valid in case of response to response 6843 6844 When set, TXPCU shall copy the R2R_Hw_response_tx_duration 6845 field and pass it on to PDG in field required_response_time 6846 in 'PDG_RESPONSE.' 6847 6848 This allows SW to force an R2R time e.g. in case of sync 6849 MLO, making sure that the R2R times on the medium for multiple 6850 links are aligned. 6851 6852 <legal all> 6853 */ 6854 6855 #define PCU_PPDU_SETUP_INIT_R2R_SET_REQUIRED_RESPONSE_TIME_OFFSET 0x00000000000000b8 6856 #define PCU_PPDU_SETUP_INIT_R2R_SET_REQUIRED_RESPONSE_TIME_LSB 54 6857 #define PCU_PPDU_SETUP_INIT_R2R_SET_REQUIRED_RESPONSE_TIME_MSB 54 6858 #define PCU_PPDU_SETUP_INIT_R2R_SET_REQUIRED_RESPONSE_TIME_MASK 0x0040000000000000 6859 6860 6861 /* Description RESERVED_29A 6862 6863 <legal 0> 6864 */ 6865 6866 #define PCU_PPDU_SETUP_INIT_RESERVED_29A_OFFSET 0x00000000000000b8 6867 #define PCU_PPDU_SETUP_INIT_RESERVED_29A_LSB 55 6868 #define PCU_PPDU_SETUP_INIT_RESERVED_29A_MSB 57 6869 #define PCU_PPDU_SETUP_INIT_RESERVED_29A_MASK 0x0380000000000000 6870 6871 6872 /* Description R2R_BW20_ACTIVE_CHANNEL 6873 6874 Field only valid for 20 BW 6875 6876 NOTE: This field is also known as R2R_active_channel_pattern_0 6877 in case punctured transmission is enabled. 6878 6879 This field indicates the active frequency band when the 6880 initial trigger frame transmission was in 20 MHz 6881 <legal all> 6882 */ 6883 6884 #define PCU_PPDU_SETUP_INIT_R2R_BW20_ACTIVE_CHANNEL_OFFSET 0x00000000000000b8 6885 #define PCU_PPDU_SETUP_INIT_R2R_BW20_ACTIVE_CHANNEL_LSB 58 6886 #define PCU_PPDU_SETUP_INIT_R2R_BW20_ACTIVE_CHANNEL_MSB 60 6887 #define PCU_PPDU_SETUP_INIT_R2R_BW20_ACTIVE_CHANNEL_MASK 0x1c00000000000000 6888 6889 6890 /* Description R2R_BW40_ACTIVE_CHANNEL 6891 6892 Field only valid for 40 BW 6893 6894 NOTE: This field is also known as R2R_active_channel_pattern_1 6895 in case punctured transmission is enabled. 6896 6897 This field indicates the active frequency band when the 6898 initial trigger frame transmission was in 40 MHz 6899 <legal all> 6900 */ 6901 6902 #define PCU_PPDU_SETUP_INIT_R2R_BW40_ACTIVE_CHANNEL_OFFSET 0x00000000000000b8 6903 #define PCU_PPDU_SETUP_INIT_R2R_BW40_ACTIVE_CHANNEL_LSB 61 6904 #define PCU_PPDU_SETUP_INIT_R2R_BW40_ACTIVE_CHANNEL_MSB 63 6905 #define PCU_PPDU_SETUP_INIT_R2R_BW40_ACTIVE_CHANNEL_MASK 0xe000000000000000 6906 6907 6908 /* Description R2R_BW80_ACTIVE_CHANNEL 6909 6910 Field only valid for 80 BW 6911 6912 NOTE: This field is also known as R2R_active_channel_pattern_2 6913 in case punctured transmission is enabled. 6914 6915 This field indicates the active frequency band when the 6916 initial trigger frame transmission was in 80 MHz 6917 <legal all> 6918 */ 6919 6920 #define PCU_PPDU_SETUP_INIT_R2R_BW80_ACTIVE_CHANNEL_OFFSET 0x00000000000000c0 6921 #define PCU_PPDU_SETUP_INIT_R2R_BW80_ACTIVE_CHANNEL_LSB 0 6922 #define PCU_PPDU_SETUP_INIT_R2R_BW80_ACTIVE_CHANNEL_MSB 2 6923 #define PCU_PPDU_SETUP_INIT_R2R_BW80_ACTIVE_CHANNEL_MASK 0x0000000000000007 6924 6925 6926 /* Description R2R_BW160_ACTIVE_CHANNEL 6927 6928 Field only valid for 160 BW 6929 6930 NOTE: This field is also known as R2R_active_channel_pattern_3 6931 in case punctured transmission is enabled. 6932 6933 This field indicates the active frequency band when the 6934 initial trigger frame transmission was in 160 MHz 6935 <legal all> 6936 */ 6937 6938 #define PCU_PPDU_SETUP_INIT_R2R_BW160_ACTIVE_CHANNEL_OFFSET 0x00000000000000c0 6939 #define PCU_PPDU_SETUP_INIT_R2R_BW160_ACTIVE_CHANNEL_LSB 3 6940 #define PCU_PPDU_SETUP_INIT_R2R_BW160_ACTIVE_CHANNEL_MSB 5 6941 #define PCU_PPDU_SETUP_INIT_R2R_BW160_ACTIVE_CHANNEL_MASK 0x0000000000000038 6942 6943 6944 /* Description R2R_BW240_ACTIVE_CHANNEL 6945 6946 Field only valid for 240 BW 6947 6948 NOTE: This field is also known as R2R_active_channel_pattern_4 6949 in case punctured transmission is enabled. 6950 6951 This field indicates the active frequency band when the 6952 initial trigger frame transmission was in 240 MHz 6953 <legal all> 6954 */ 6955 6956 #define PCU_PPDU_SETUP_INIT_R2R_BW240_ACTIVE_CHANNEL_OFFSET 0x00000000000000c0 6957 #define PCU_PPDU_SETUP_INIT_R2R_BW240_ACTIVE_CHANNEL_LSB 6 6958 #define PCU_PPDU_SETUP_INIT_R2R_BW240_ACTIVE_CHANNEL_MSB 8 6959 #define PCU_PPDU_SETUP_INIT_R2R_BW240_ACTIVE_CHANNEL_MASK 0x00000000000001c0 6960 6961 6962 /* Description R2R_BW320_ACTIVE_CHANNEL 6963 6964 Field only valid for 320 BW 6965 6966 NOTE: This field is also known as R2R_active_channel_pattern_5 6967 in case punctured transmission is enabled. 6968 6969 This field indicates the active frequency band when the 6970 initial trigger frame transmission was in 320 MHz 6971 <legal all> 6972 */ 6973 6974 #define PCU_PPDU_SETUP_INIT_R2R_BW320_ACTIVE_CHANNEL_OFFSET 0x00000000000000c0 6975 #define PCU_PPDU_SETUP_INIT_R2R_BW320_ACTIVE_CHANNEL_LSB 9 6976 #define PCU_PPDU_SETUP_INIT_R2R_BW320_ACTIVE_CHANNEL_MSB 11 6977 #define PCU_PPDU_SETUP_INIT_R2R_BW320_ACTIVE_CHANNEL_MASK 0x0000000000000e00 6978 6979 6980 /* Description R2R_BW20 6981 6982 The BW for the response to response frame when the initial 6983 trigger frame transmission was in 20 MHz 6984 6985 NOTE: This field is also known as R2R_pattern_0 in case 6986 punctured transmission is enabled. 6987 6988 <enum 0 20_mhz>20 Mhz BW 6989 <enum 1 40_mhz>40 Mhz BW 6990 <enum 2 80_mhz>80 Mhz BW 6991 <enum 3 160_mhz>160 Mhz BW 6992 <enum 4 320_mhz>320 Mhz BW 6993 <enum 5 240_mhz>240 Mhz BW 6994 */ 6995 6996 #define PCU_PPDU_SETUP_INIT_R2R_BW20_OFFSET 0x00000000000000c0 6997 #define PCU_PPDU_SETUP_INIT_R2R_BW20_LSB 12 6998 #define PCU_PPDU_SETUP_INIT_R2R_BW20_MSB 14 6999 #define PCU_PPDU_SETUP_INIT_R2R_BW20_MASK 0x0000000000007000 7000 7001 7002 /* Description R2R_BW40 7003 7004 The BW for the response to response frame when the initial 7005 trigger frame transmission was in 40 MHz 7006 7007 NOTE: This field is also known as R2R_pattern_1 in case 7008 punctured transmission is enabled. 7009 7010 <enum 0 20_mhz>20 Mhz BW 7011 <enum 1 40_mhz>40 Mhz BW 7012 <enum 2 80_mhz>80 Mhz BW 7013 <enum 3 160_mhz>160 Mhz BW 7014 <enum 4 320_mhz>320 Mhz BW 7015 <enum 5 240_mhz>240 Mhz BW 7016 */ 7017 7018 #define PCU_PPDU_SETUP_INIT_R2R_BW40_OFFSET 0x00000000000000c0 7019 #define PCU_PPDU_SETUP_INIT_R2R_BW40_LSB 15 7020 #define PCU_PPDU_SETUP_INIT_R2R_BW40_MSB 17 7021 #define PCU_PPDU_SETUP_INIT_R2R_BW40_MASK 0x0000000000038000 7022 7023 7024 /* Description R2R_BW80 7025 7026 The BW for the response to response frame when the initial 7027 trigger frame transmission was in 80 MHz 7028 7029 NOTE: This field is also known as R2R_pattern_2 in case 7030 punctured transmission is enabled. 7031 7032 <enum 0 20_mhz>20 Mhz BW 7033 <enum 1 40_mhz>40 Mhz BW 7034 <enum 2 80_mhz>80 Mhz BW 7035 <enum 3 160_mhz>160 Mhz BW 7036 <enum 4 320_mhz>320 Mhz BW 7037 <enum 5 240_mhz>240 Mhz BW 7038 */ 7039 7040 #define PCU_PPDU_SETUP_INIT_R2R_BW80_OFFSET 0x00000000000000c0 7041 #define PCU_PPDU_SETUP_INIT_R2R_BW80_LSB 18 7042 #define PCU_PPDU_SETUP_INIT_R2R_BW80_MSB 20 7043 #define PCU_PPDU_SETUP_INIT_R2R_BW80_MASK 0x00000000001c0000 7044 7045 7046 /* Description R2R_BW160 7047 7048 The BW for the response to response frame when the initial 7049 trigger frame transmission was in 160 MHz 7050 7051 NOTE: This field is also known as R2R_pattern_3 in case 7052 punctured transmission is enabled. 7053 7054 <enum 0 20_mhz>20 Mhz BW 7055 <enum 1 40_mhz>40 Mhz BW 7056 <enum 2 80_mhz>80 Mhz BW 7057 <enum 3 160_mhz>160 Mhz BW 7058 <enum 4 320_mhz>320 Mhz BW 7059 <enum 5 240_mhz>240 Mhz BW 7060 */ 7061 7062 #define PCU_PPDU_SETUP_INIT_R2R_BW160_OFFSET 0x00000000000000c0 7063 #define PCU_PPDU_SETUP_INIT_R2R_BW160_LSB 21 7064 #define PCU_PPDU_SETUP_INIT_R2R_BW160_MSB 23 7065 #define PCU_PPDU_SETUP_INIT_R2R_BW160_MASK 0x0000000000e00000 7066 7067 7068 /* Description R2R_BW240 7069 7070 The BW for the response to response frame when the initial 7071 trigger frame transmission was in 240 MHz 7072 7073 NOTE: This field is also known as R2R_pattern_4 in case 7074 punctured transmission is enabled. 7075 7076 <enum 0 20_mhz>20 Mhz BW 7077 <enum 1 40_mhz>40 Mhz BW 7078 <enum 2 80_mhz>80 Mhz BW 7079 <enum 3 160_mhz>160 Mhz BW 7080 <enum 4 320_mhz>320 Mhz BW 7081 <enum 5 240_mhz>240 Mhz BW 7082 */ 7083 7084 #define PCU_PPDU_SETUP_INIT_R2R_BW240_OFFSET 0x00000000000000c0 7085 #define PCU_PPDU_SETUP_INIT_R2R_BW240_LSB 24 7086 #define PCU_PPDU_SETUP_INIT_R2R_BW240_MSB 26 7087 #define PCU_PPDU_SETUP_INIT_R2R_BW240_MASK 0x0000000007000000 7088 7089 7090 /* Description R2R_BW320 7091 7092 The BW for the response to response frame when the initial 7093 trigger frame transmission was in 320 MHz 7094 7095 NOTE: This field is also known as R2R_pattern_5 in case 7096 punctured transmission is enabled. 7097 7098 <enum 0 20_mhz>20 Mhz BW 7099 <enum 1 40_mhz>40 Mhz BW 7100 <enum 2 80_mhz>80 Mhz BW 7101 <enum 3 160_mhz>160 Mhz BW 7102 <enum 4 320_mhz>320 Mhz BW 7103 <enum 5 240_mhz>240 Mhz BW 7104 */ 7105 7106 #define PCU_PPDU_SETUP_INIT_R2R_BW320_OFFSET 0x00000000000000c0 7107 #define PCU_PPDU_SETUP_INIT_R2R_BW320_LSB 27 7108 #define PCU_PPDU_SETUP_INIT_R2R_BW320_MSB 29 7109 #define PCU_PPDU_SETUP_INIT_R2R_BW320_MASK 0x0000000038000000 7110 7111 7112 /* Description RESERVED_30A 7113 7114 <legal 0> 7115 */ 7116 7117 #define PCU_PPDU_SETUP_INIT_RESERVED_30A_OFFSET 0x00000000000000c0 7118 #define PCU_PPDU_SETUP_INIT_RESERVED_30A_LSB 30 7119 #define PCU_PPDU_SETUP_INIT_RESERVED_30A_MSB 31 7120 #define PCU_PPDU_SETUP_INIT_RESERVED_30A_MASK 0x00000000c0000000 7121 7122 7123 /* Description MU_RESPONSE_EXPECTED_BITMAP_31_0 7124 7125 Field only valid in case of MU transmission and a response 7126 from other or more then just user0 is expected. 7127 7128 Note that this implies that for all legacy SU exchanges, 7129 or legacy MU-MIMO where only user 0 can get a response, 7130 this field does not need to be programmed by SW. All existing 7131 programming remains backwards compatible. 7132 7133 Bit 0 represents user 0 7134 Bit 1 represents user 1 7135 ... 7136 When set, a response from this user is expected, and TXPCU 7137 shall generate the 'tx_fes_status_user_response' TLV for 7138 this user 7139 7140 Note that the number of bits set in bitmap fields 0 - 36 7141 (including next field), shall always be equal or greater 7142 then the number indicated in field: Required_UL_MU_resp_user_count 7143 7144 <legal all> 7145 */ 7146 7147 #define PCU_PPDU_SETUP_INIT_MU_RESPONSE_EXPECTED_BITMAP_31_0_OFFSET 0x00000000000000c0 7148 #define PCU_PPDU_SETUP_INIT_MU_RESPONSE_EXPECTED_BITMAP_31_0_LSB 32 7149 #define PCU_PPDU_SETUP_INIT_MU_RESPONSE_EXPECTED_BITMAP_31_0_MSB 63 7150 #define PCU_PPDU_SETUP_INIT_MU_RESPONSE_EXPECTED_BITMAP_31_0_MASK 0xffffffff00000000 7151 7152 7153 /* Description MU_RESPONSE_EXPECTED_BITMAP_36_32 7154 7155 Field only valid in case of MU transmission and a response 7156 from other or more then just user0 is expected. 7157 7158 Note that this implies that for all legacy SU exchanges, 7159 or legacy MU-MIMO where only user 0 can get a response, 7160 this field does not need to be programmed by SW. All existing 7161 programming remains backwards compatible. 7162 7163 Bit 0 represents user 32 7164 Bit 1 represents user 33 7165 ... 7166 When set, a response from this user is expected, and TXPCU 7167 shall generate the 'tx_fes_status_user_response' TLV for 7168 this user 7169 7170 Note that the number of bits set in bitmap fields 0 - 36 7171 (including previous field), shall always be equal or greater 7172 then the number indicated in field: Required_UL_MU_resp_user_count 7173 7174 <legal all> 7175 */ 7176 7177 #define PCU_PPDU_SETUP_INIT_MU_RESPONSE_EXPECTED_BITMAP_36_32_OFFSET 0x00000000000000c8 7178 #define PCU_PPDU_SETUP_INIT_MU_RESPONSE_EXPECTED_BITMAP_36_32_LSB 0 7179 #define PCU_PPDU_SETUP_INIT_MU_RESPONSE_EXPECTED_BITMAP_36_32_MSB 4 7180 #define PCU_PPDU_SETUP_INIT_MU_RESPONSE_EXPECTED_BITMAP_36_32_MASK 0x000000000000001f 7181 7182 7183 /* Description MU_EXPECTED_RESPONSE_CBF_COUNT 7184 7185 Field only valid when Response_type == MU_CBF_expected 7186 7187 The number of STAs that are expected to send a CBF back 7188 7189 Note that the actual amount could be smaller.... 7190 <legal all> 7191 */ 7192 7193 #define PCU_PPDU_SETUP_INIT_MU_EXPECTED_RESPONSE_CBF_COUNT_OFFSET 0x00000000000000c8 7194 #define PCU_PPDU_SETUP_INIT_MU_EXPECTED_RESPONSE_CBF_COUNT_LSB 5 7195 #define PCU_PPDU_SETUP_INIT_MU_EXPECTED_RESPONSE_CBF_COUNT_MSB 10 7196 #define PCU_PPDU_SETUP_INIT_MU_EXPECTED_RESPONSE_CBF_COUNT_MASK 0x00000000000007e0 7197 7198 7199 /* Description MU_EXPECTED_RESPONSE_STA_COUNT 7200 7201 SW shall program this field if the number of STAs that are 7202 expected to send something (ACK, DATA, BA, CBF, etc...) 7203 back is 2 or larger.. 7204 7205 The number of STAs that are expected to send a response 7206 back. 7207 7208 Note that the actual amount could be smaller.... 7209 <legal all> 7210 */ 7211 7212 #define PCU_PPDU_SETUP_INIT_MU_EXPECTED_RESPONSE_STA_COUNT_OFFSET 0x00000000000000c8 7213 #define PCU_PPDU_SETUP_INIT_MU_EXPECTED_RESPONSE_STA_COUNT_LSB 11 7214 #define PCU_PPDU_SETUP_INIT_MU_EXPECTED_RESPONSE_STA_COUNT_MSB 16 7215 #define PCU_PPDU_SETUP_INIT_MU_EXPECTED_RESPONSE_STA_COUNT_MASK 0x000000000001f800 7216 7217 7218 /* Description TRANSMIT_INCLUDES_MULTIDESTINATION 7219 7220 Used by TXPCU 7221 7222 When set, the MD (Multi Destination) feature is used for 7223 this transmission. Either for real multi destination STA 7224 transmissions or Multi TID transmissions. 7225 7226 Used by TXPCU to know when it can start pre-fetching data 7227 in order to do BW constrained frame drops. 7228 7229 <legal all> 7230 */ 7231 7232 #define PCU_PPDU_SETUP_INIT_TRANSMIT_INCLUDES_MULTIDESTINATION_OFFSET 0x00000000000000c8 7233 #define PCU_PPDU_SETUP_INIT_TRANSMIT_INCLUDES_MULTIDESTINATION_LSB 17 7234 #define PCU_PPDU_SETUP_INIT_TRANSMIT_INCLUDES_MULTIDESTINATION_MSB 17 7235 #define PCU_PPDU_SETUP_INIT_TRANSMIT_INCLUDES_MULTIDESTINATION_MASK 0x0000000000020000 7236 7237 7238 /* Description INSERT_PREV_TX_START_TIMING_INFO 7239 7240 When set, TXPCU will insert the value in TXPCU register "prev_phy_tx_start_transmit_time" 7241 in the transmit frame at the byte location indicated by 7242 field tx_start_transmit_time_byte_offset 7243 <legal all> 7244 */ 7245 7246 #define PCU_PPDU_SETUP_INIT_INSERT_PREV_TX_START_TIMING_INFO_OFFSET 0x00000000000000c8 7247 #define PCU_PPDU_SETUP_INIT_INSERT_PREV_TX_START_TIMING_INFO_LSB 18 7248 #define PCU_PPDU_SETUP_INIT_INSERT_PREV_TX_START_TIMING_INFO_MSB 18 7249 #define PCU_PPDU_SETUP_INIT_INSERT_PREV_TX_START_TIMING_INFO_MASK 0x0000000000040000 7250 7251 7252 /* Description INSERT_CURRENT_TX_START_TIMING_INFO 7253 7254 When set, TXPCU will insert the value in TXPCU register "current_phy_tx_start_transmit_time" 7255 in the transmit frame at the byte location indicated by 7256 field tx_start_transmit_time_byte_offset 7257 <legal all> 7258 */ 7259 7260 #define PCU_PPDU_SETUP_INIT_INSERT_CURRENT_TX_START_TIMING_INFO_OFFSET 0x00000000000000c8 7261 #define PCU_PPDU_SETUP_INIT_INSERT_CURRENT_TX_START_TIMING_INFO_LSB 19 7262 #define PCU_PPDU_SETUP_INIT_INSERT_CURRENT_TX_START_TIMING_INFO_MSB 19 7263 #define PCU_PPDU_SETUP_INIT_INSERT_CURRENT_TX_START_TIMING_INFO_MASK 0x0000000000080000 7264 7265 7266 /* Description TX_START_TRANSMIT_TIME_BYTE_OFFSET 7267 7268 Field only valid when insert_prev_tx_start_timing_info or 7269 insert_current_tx_start_timing_info is set. 7270 Start byte offset where the 'start_time' needs to be overwritten 7271 in the frame 7272 <legal all> 7273 */ 7274 7275 #define PCU_PPDU_SETUP_INIT_TX_START_TRANSMIT_TIME_BYTE_OFFSET_OFFSET 0x00000000000000c8 7276 #define PCU_PPDU_SETUP_INIT_TX_START_TRANSMIT_TIME_BYTE_OFFSET_LSB 20 7277 #define PCU_PPDU_SETUP_INIT_TX_START_TRANSMIT_TIME_BYTE_OFFSET_MSB 31 7278 #define PCU_PPDU_SETUP_INIT_TX_START_TRANSMIT_TIME_BYTE_OFFSET_MASK 0x00000000fff00000 7279 7280 7281 /* Description PROTECTION_FRAME_AD1_31_0 7282 7283 Field only valid when use_address_fields_for_protection 7284 is set 7285 7286 The Least Significant 4 bytes of the Protection Frame MAC 7287 Address AD1 7288 <legal all> 7289 */ 7290 7291 #define PCU_PPDU_SETUP_INIT_PROTECTION_FRAME_AD1_31_0_OFFSET 0x00000000000000c8 7292 #define PCU_PPDU_SETUP_INIT_PROTECTION_FRAME_AD1_31_0_LSB 32 7293 #define PCU_PPDU_SETUP_INIT_PROTECTION_FRAME_AD1_31_0_MSB 63 7294 #define PCU_PPDU_SETUP_INIT_PROTECTION_FRAME_AD1_31_0_MASK 0xffffffff00000000 7295 7296 7297 /* Description PROTECTION_FRAME_AD1_47_32 7298 7299 Field only valid when use_address_fields_for_protection 7300 is set 7301 7302 The 2 most significant bytes of the Protection Frame MAC 7303 Address AD1 7304 <legal all> 7305 */ 7306 7307 #define PCU_PPDU_SETUP_INIT_PROTECTION_FRAME_AD1_47_32_OFFSET 0x00000000000000d0 7308 #define PCU_PPDU_SETUP_INIT_PROTECTION_FRAME_AD1_47_32_LSB 0 7309 #define PCU_PPDU_SETUP_INIT_PROTECTION_FRAME_AD1_47_32_MSB 15 7310 #define PCU_PPDU_SETUP_INIT_PROTECTION_FRAME_AD1_47_32_MASK 0x000000000000ffff 7311 7312 7313 /* Description PROTECTION_FRAME_AD2_15_0 7314 7315 Field only valid when use_address_fields_for_protection 7316 is set 7317 7318 The Least Significant 2 bytes of the MAC Address AD2 7319 <legal all> 7320 */ 7321 7322 #define PCU_PPDU_SETUP_INIT_PROTECTION_FRAME_AD2_15_0_OFFSET 0x00000000000000d0 7323 #define PCU_PPDU_SETUP_INIT_PROTECTION_FRAME_AD2_15_0_LSB 16 7324 #define PCU_PPDU_SETUP_INIT_PROTECTION_FRAME_AD2_15_0_MSB 31 7325 #define PCU_PPDU_SETUP_INIT_PROTECTION_FRAME_AD2_15_0_MASK 0x00000000ffff0000 7326 7327 7328 /* Description PROTECTION_FRAME_AD2_47_16 7329 7330 Field only valid when use_address_fields_for_protection 7331 is set 7332 7333 The 4 most significant bytes of the MAC Address AD2 7334 <legal all> 7335 */ 7336 7337 #define PCU_PPDU_SETUP_INIT_PROTECTION_FRAME_AD2_47_16_OFFSET 0x00000000000000d0 7338 #define PCU_PPDU_SETUP_INIT_PROTECTION_FRAME_AD2_47_16_LSB 32 7339 #define PCU_PPDU_SETUP_INIT_PROTECTION_FRAME_AD2_47_16_MSB 63 7340 #define PCU_PPDU_SETUP_INIT_PROTECTION_FRAME_AD2_47_16_MASK 0xffffffff00000000 7341 7342 7343 /* Description DYNAMIC_MEDIUM_PROT_THRESHOLD 7344 7345 Threshold to enable the dynamic medium protection feature 7346 in terms of PPDU duration in us or PSDU length in bytes 7347 7348 7349 This is set to zero to disable the dynamic medium protection 7350 feature. 7351 7352 <legal all> 7353 */ 7354 7355 #define PCU_PPDU_SETUP_INIT_DYNAMIC_MEDIUM_PROT_THRESHOLD_OFFSET 0x00000000000000d8 7356 #define PCU_PPDU_SETUP_INIT_DYNAMIC_MEDIUM_PROT_THRESHOLD_LSB 0 7357 #define PCU_PPDU_SETUP_INIT_DYNAMIC_MEDIUM_PROT_THRESHOLD_MSB 23 7358 #define PCU_PPDU_SETUP_INIT_DYNAMIC_MEDIUM_PROT_THRESHOLD_MASK 0x0000000000ffffff 7359 7360 7361 /* Description DYNAMIC_MEDIUM_PROT_TYPE 7362 7363 <enum 0 dyn_medium_prot_byte> dynamic_medium_prot_threshold 7364 indicates PSDU length in bytes. 7365 <enum 1 dyn_medium_prot_us> 7366 dynamic_medium_prot_threshold indicates PPDU duration in 7367 us. 7368 <legal all> 7369 */ 7370 7371 #define PCU_PPDU_SETUP_INIT_DYNAMIC_MEDIUM_PROT_TYPE_OFFSET 0x00000000000000d8 7372 #define PCU_PPDU_SETUP_INIT_DYNAMIC_MEDIUM_PROT_TYPE_LSB 24 7373 #define PCU_PPDU_SETUP_INIT_DYNAMIC_MEDIUM_PROT_TYPE_MSB 24 7374 #define PCU_PPDU_SETUP_INIT_DYNAMIC_MEDIUM_PROT_TYPE_MASK 0x0000000001000000 7375 7376 7377 /* Description RESERVED_54A 7378 7379 <legal 0> 7380 */ 7381 7382 #define PCU_PPDU_SETUP_INIT_RESERVED_54A_OFFSET 0x00000000000000d8 7383 #define PCU_PPDU_SETUP_INIT_RESERVED_54A_LSB 25 7384 #define PCU_PPDU_SETUP_INIT_RESERVED_54A_MSB 31 7385 #define PCU_PPDU_SETUP_INIT_RESERVED_54A_MASK 0x00000000fe000000 7386 7387 7388 /* Description PROTECTION_FRAME_AD3_31_0 7389 7390 Field only valid when use_address_fields_for_protection 7391 is set 7392 7393 The least significant 4 bytes of the Protection Frame MAC 7394 Address AD3 7395 7396 <legal all> 7397 */ 7398 7399 #define PCU_PPDU_SETUP_INIT_PROTECTION_FRAME_AD3_31_0_OFFSET 0x00000000000000d8 7400 #define PCU_PPDU_SETUP_INIT_PROTECTION_FRAME_AD3_31_0_LSB 32 7401 #define PCU_PPDU_SETUP_INIT_PROTECTION_FRAME_AD3_31_0_MSB 63 7402 #define PCU_PPDU_SETUP_INIT_PROTECTION_FRAME_AD3_31_0_MASK 0xffffffff00000000 7403 7404 7405 /* Description PROTECTION_FRAME_AD3_47_32 7406 7407 Field only valid when use_address_fields_for_protection 7408 is set 7409 7410 The 2 most significant bytes of the Protection Frame MAC 7411 Address AD3 7412 <legal all> 7413 */ 7414 7415 #define PCU_PPDU_SETUP_INIT_PROTECTION_FRAME_AD3_47_32_OFFSET 0x00000000000000e0 7416 #define PCU_PPDU_SETUP_INIT_PROTECTION_FRAME_AD3_47_32_LSB 0 7417 #define PCU_PPDU_SETUP_INIT_PROTECTION_FRAME_AD3_47_32_MSB 15 7418 #define PCU_PPDU_SETUP_INIT_PROTECTION_FRAME_AD3_47_32_MASK 0x000000000000ffff 7419 7420 7421 /* Description PROTECTION_FRAME_AD4_15_0 7422 7423 Field only valid when use_address_fields_for_protection 7424 is set 7425 7426 The least significant 2 bytes of the Protection Frame MAC 7427 Address AD4 7428 <legal all> 7429 */ 7430 7431 #define PCU_PPDU_SETUP_INIT_PROTECTION_FRAME_AD4_15_0_OFFSET 0x00000000000000e0 7432 #define PCU_PPDU_SETUP_INIT_PROTECTION_FRAME_AD4_15_0_LSB 16 7433 #define PCU_PPDU_SETUP_INIT_PROTECTION_FRAME_AD4_15_0_MSB 31 7434 #define PCU_PPDU_SETUP_INIT_PROTECTION_FRAME_AD4_15_0_MASK 0x00000000ffff0000 7435 7436 7437 /* Description PROTECTION_FRAME_AD4_47_16 7438 7439 Field only valid when use_address_fields_for_protection 7440 is set 7441 7442 The 4 most significant bytes of the Protection Frame MAC 7443 Address AD4 7444 <legal all> 7445 */ 7446 7447 #define PCU_PPDU_SETUP_INIT_PROTECTION_FRAME_AD4_47_16_OFFSET 0x00000000000000e0 7448 #define PCU_PPDU_SETUP_INIT_PROTECTION_FRAME_AD4_47_16_LSB 32 7449 #define PCU_PPDU_SETUP_INIT_PROTECTION_FRAME_AD4_47_16_MSB 63 7450 #define PCU_PPDU_SETUP_INIT_PROTECTION_FRAME_AD4_47_16_MASK 0xffffffff00000000 7451 7452 7453 7454 #endif // PCU_PPDU_SETUP_INIT 7455