1 /*
2  * Copyright (c) 2024 Qualcomm Innovation Center, Inc. All rights reserved.
3  *
4  * Permission to use, copy, modify, and/or distribute this software for any
5  * purpose with or without fee is hereby granted, provided that the above
6  * copyright notice and this permission notice appear in all copies.
7  *
8  * THE SOFTWARE IS PROVIDED "AS IS" AND THE AUTHOR DISCLAIMS ALL WARRANTIES
9  * WITH REGARD TO THIS SOFTWARE INCLUDING ALL IMPLIED WARRANTIES OF
10  * MERCHANTABILITY AND FITNESS. IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR
11  * ANY SPECIAL, DIRECT, INDIRECT, OR CONSEQUENTIAL DAMAGES OR ANY DAMAGES
12  * WHATSOEVER RESULTING FROM LOSS OF USE, DATA OR PROFITS, WHETHER IN AN
13  * ACTION OF CONTRACT, NEGLIGENCE OR OTHER TORTIOUS ACTION, ARISING OUT OF
14  * OR IN CONNECTION WITH THE USE OR PERFORMANCE OF THIS SOFTWARE.
15  */
16 
17 
18 #ifndef _TX_MSDU_EXTENSION_H_
19 #define _TX_MSDU_EXTENSION_H_
20 
21 #define NUM_OF_DWORDS_TX_MSDU_EXTENSION 18
22 
23 struct tx_msdu_extension {
24 #ifndef WIFI_BIT_ORDER_BIG_ENDIAN
25              uint32_t tso_enable                                              :  1,
26                       reserved_0a                                             :  6,
27                       tcp_flag                                                :  9,
28                       tcp_flag_mask                                           :  9,
29                       reserved_0b                                             :  7;
30              uint32_t l2_length                                               : 16,
31                       ip_length                                               : 16;
32              uint32_t tcp_seq_number                                          : 32;
33              uint32_t ip_identification                                       : 16,
34                       udp_length                                              : 16;
35              uint32_t checksum_offset                                         : 14,
36                       partial_checksum_en                                     :  1,
37                       reserved_4a                                             :  1,
38                       payload_start_offset                                    : 14,
39                       reserved_4b                                             :  2;
40              uint32_t payload_end_offset                                      : 14,
41                       reserved_5a                                             :  2,
42                       wds                                                     :  1,
43                       reserved_5b                                             : 15;
44              uint32_t buf0_ptr_31_0                                           : 32;
45              uint32_t buf0_ptr_39_32                                          :  8,
46                       extn_override                                           :  1,
47                       encap_type                                              :  2,
48                       encrypt_type                                            :  4,
49                       tqm_no_drop                                             :  1,
50                       buf0_len                                                : 16;
51              uint32_t buf1_ptr_31_0                                           : 32;
52              uint32_t buf1_ptr_39_32                                          :  8,
53                       epd                                                     :  1,
54                       mesh_enable                                             :  2,
55                       reserved_9a                                             :  5,
56                       buf1_len                                                : 16;
57              uint32_t buf2_ptr_31_0                                           : 32;
58              uint32_t buf2_ptr_39_32                                          :  8,
59                       dscp_tid_table_num                                      :  6,
60                       reserved_11a                                            :  2,
61                       buf2_len                                                : 16;
62              uint32_t buf3_ptr_31_0                                           : 32;
63              uint32_t buf3_ptr_39_32                                          :  8,
64                       reserved_13a                                            :  8,
65                       buf3_len                                                : 16;
66              uint32_t buf4_ptr_31_0                                           : 32;
67              uint32_t buf4_ptr_39_32                                          :  8,
68                       reserved_15a                                            :  8,
69                       buf4_len                                                : 16;
70              uint32_t buf5_ptr_31_0                                           : 32;
71              uint32_t buf5_ptr_39_32                                          :  8,
72                       reserved_17a                                            :  8,
73                       buf5_len                                                : 16;
74 #else
75              uint32_t reserved_0b                                             :  7,
76                       tcp_flag_mask                                           :  9,
77                       tcp_flag                                                :  9,
78                       reserved_0a                                             :  6,
79                       tso_enable                                              :  1;
80              uint32_t ip_length                                               : 16,
81                       l2_length                                               : 16;
82              uint32_t tcp_seq_number                                          : 32;
83              uint32_t udp_length                                              : 16,
84                       ip_identification                                       : 16;
85              uint32_t reserved_4b                                             :  2,
86                       payload_start_offset                                    : 14,
87                       reserved_4a                                             :  1,
88                       partial_checksum_en                                     :  1,
89                       checksum_offset                                         : 14;
90              uint32_t reserved_5b                                             : 15,
91                       wds                                                     :  1,
92                       reserved_5a                                             :  2,
93                       payload_end_offset                                      : 14;
94              uint32_t buf0_ptr_31_0                                           : 32;
95              uint32_t buf0_len                                                : 16,
96                       tqm_no_drop                                             :  1,
97                       encrypt_type                                            :  4,
98                       encap_type                                              :  2,
99                       extn_override                                           :  1,
100                       buf0_ptr_39_32                                          :  8;
101              uint32_t buf1_ptr_31_0                                           : 32;
102              uint32_t buf1_len                                                : 16,
103                       reserved_9a                                             :  5,
104                       mesh_enable                                             :  2,
105                       epd                                                     :  1,
106                       buf1_ptr_39_32                                          :  8;
107              uint32_t buf2_ptr_31_0                                           : 32;
108              uint32_t buf2_len                                                : 16,
109                       reserved_11a                                            :  2,
110                       dscp_tid_table_num                                      :  6,
111                       buf2_ptr_39_32                                          :  8;
112              uint32_t buf3_ptr_31_0                                           : 32;
113              uint32_t buf3_len                                                : 16,
114                       reserved_13a                                            :  8,
115                       buf3_ptr_39_32                                          :  8;
116              uint32_t buf4_ptr_31_0                                           : 32;
117              uint32_t buf4_len                                                : 16,
118                       reserved_15a                                            :  8,
119                       buf4_ptr_39_32                                          :  8;
120              uint32_t buf5_ptr_31_0                                           : 32;
121              uint32_t buf5_len                                                : 16,
122                       reserved_17a                                            :  8,
123                       buf5_ptr_39_32                                          :  8;
124 #endif
125 };
126 
127 #define TX_MSDU_EXTENSION_TSO_ENABLE_OFFSET                                         0x00000000
128 #define TX_MSDU_EXTENSION_TSO_ENABLE_LSB                                            0
129 #define TX_MSDU_EXTENSION_TSO_ENABLE_MSB                                            0
130 #define TX_MSDU_EXTENSION_TSO_ENABLE_MASK                                           0x00000001
131 
132 #define TX_MSDU_EXTENSION_RESERVED_0A_OFFSET                                        0x00000000
133 #define TX_MSDU_EXTENSION_RESERVED_0A_LSB                                           1
134 #define TX_MSDU_EXTENSION_RESERVED_0A_MSB                                           6
135 #define TX_MSDU_EXTENSION_RESERVED_0A_MASK                                          0x0000007e
136 
137 #define TX_MSDU_EXTENSION_TCP_FLAG_OFFSET                                           0x00000000
138 #define TX_MSDU_EXTENSION_TCP_FLAG_LSB                                              7
139 #define TX_MSDU_EXTENSION_TCP_FLAG_MSB                                              15
140 #define TX_MSDU_EXTENSION_TCP_FLAG_MASK                                             0x0000ff80
141 
142 #define TX_MSDU_EXTENSION_TCP_FLAG_MASK_OFFSET                                      0x00000000
143 #define TX_MSDU_EXTENSION_TCP_FLAG_MASK_LSB                                         16
144 #define TX_MSDU_EXTENSION_TCP_FLAG_MASK_MSB                                         24
145 #define TX_MSDU_EXTENSION_TCP_FLAG_MASK_MASK                                        0x01ff0000
146 
147 #define TX_MSDU_EXTENSION_RESERVED_0B_OFFSET                                        0x00000000
148 #define TX_MSDU_EXTENSION_RESERVED_0B_LSB                                           25
149 #define TX_MSDU_EXTENSION_RESERVED_0B_MSB                                           31
150 #define TX_MSDU_EXTENSION_RESERVED_0B_MASK                                          0xfe000000
151 
152 #define TX_MSDU_EXTENSION_L2_LENGTH_OFFSET                                          0x00000004
153 #define TX_MSDU_EXTENSION_L2_LENGTH_LSB                                             0
154 #define TX_MSDU_EXTENSION_L2_LENGTH_MSB                                             15
155 #define TX_MSDU_EXTENSION_L2_LENGTH_MASK                                            0x0000ffff
156 
157 #define TX_MSDU_EXTENSION_IP_LENGTH_OFFSET                                          0x00000004
158 #define TX_MSDU_EXTENSION_IP_LENGTH_LSB                                             16
159 #define TX_MSDU_EXTENSION_IP_LENGTH_MSB                                             31
160 #define TX_MSDU_EXTENSION_IP_LENGTH_MASK                                            0xffff0000
161 
162 #define TX_MSDU_EXTENSION_TCP_SEQ_NUMBER_OFFSET                                     0x00000008
163 #define TX_MSDU_EXTENSION_TCP_SEQ_NUMBER_LSB                                        0
164 #define TX_MSDU_EXTENSION_TCP_SEQ_NUMBER_MSB                                        31
165 #define TX_MSDU_EXTENSION_TCP_SEQ_NUMBER_MASK                                       0xffffffff
166 
167 #define TX_MSDU_EXTENSION_IP_IDENTIFICATION_OFFSET                                  0x0000000c
168 #define TX_MSDU_EXTENSION_IP_IDENTIFICATION_LSB                                     0
169 #define TX_MSDU_EXTENSION_IP_IDENTIFICATION_MSB                                     15
170 #define TX_MSDU_EXTENSION_IP_IDENTIFICATION_MASK                                    0x0000ffff
171 
172 #define TX_MSDU_EXTENSION_UDP_LENGTH_OFFSET                                         0x0000000c
173 #define TX_MSDU_EXTENSION_UDP_LENGTH_LSB                                            16
174 #define TX_MSDU_EXTENSION_UDP_LENGTH_MSB                                            31
175 #define TX_MSDU_EXTENSION_UDP_LENGTH_MASK                                           0xffff0000
176 
177 #define TX_MSDU_EXTENSION_CHECKSUM_OFFSET_OFFSET                                    0x00000010
178 #define TX_MSDU_EXTENSION_CHECKSUM_OFFSET_LSB                                       0
179 #define TX_MSDU_EXTENSION_CHECKSUM_OFFSET_MSB                                       13
180 #define TX_MSDU_EXTENSION_CHECKSUM_OFFSET_MASK                                      0x00003fff
181 
182 #define TX_MSDU_EXTENSION_PARTIAL_CHECKSUM_EN_OFFSET                                0x00000010
183 #define TX_MSDU_EXTENSION_PARTIAL_CHECKSUM_EN_LSB                                   14
184 #define TX_MSDU_EXTENSION_PARTIAL_CHECKSUM_EN_MSB                                   14
185 #define TX_MSDU_EXTENSION_PARTIAL_CHECKSUM_EN_MASK                                  0x00004000
186 
187 #define TX_MSDU_EXTENSION_RESERVED_4A_OFFSET                                        0x00000010
188 #define TX_MSDU_EXTENSION_RESERVED_4A_LSB                                           15
189 #define TX_MSDU_EXTENSION_RESERVED_4A_MSB                                           15
190 #define TX_MSDU_EXTENSION_RESERVED_4A_MASK                                          0x00008000
191 
192 #define TX_MSDU_EXTENSION_PAYLOAD_START_OFFSET_OFFSET                               0x00000010
193 #define TX_MSDU_EXTENSION_PAYLOAD_START_OFFSET_LSB                                  16
194 #define TX_MSDU_EXTENSION_PAYLOAD_START_OFFSET_MSB                                  29
195 #define TX_MSDU_EXTENSION_PAYLOAD_START_OFFSET_MASK                                 0x3fff0000
196 
197 #define TX_MSDU_EXTENSION_RESERVED_4B_OFFSET                                        0x00000010
198 #define TX_MSDU_EXTENSION_RESERVED_4B_LSB                                           30
199 #define TX_MSDU_EXTENSION_RESERVED_4B_MSB                                           31
200 #define TX_MSDU_EXTENSION_RESERVED_4B_MASK                                          0xc0000000
201 
202 #define TX_MSDU_EXTENSION_PAYLOAD_END_OFFSET_OFFSET                                 0x00000014
203 #define TX_MSDU_EXTENSION_PAYLOAD_END_OFFSET_LSB                                    0
204 #define TX_MSDU_EXTENSION_PAYLOAD_END_OFFSET_MSB                                    13
205 #define TX_MSDU_EXTENSION_PAYLOAD_END_OFFSET_MASK                                   0x00003fff
206 
207 #define TX_MSDU_EXTENSION_RESERVED_5A_OFFSET                                        0x00000014
208 #define TX_MSDU_EXTENSION_RESERVED_5A_LSB                                           14
209 #define TX_MSDU_EXTENSION_RESERVED_5A_MSB                                           15
210 #define TX_MSDU_EXTENSION_RESERVED_5A_MASK                                          0x0000c000
211 
212 #define TX_MSDU_EXTENSION_WDS_OFFSET                                                0x00000014
213 #define TX_MSDU_EXTENSION_WDS_LSB                                                   16
214 #define TX_MSDU_EXTENSION_WDS_MSB                                                   16
215 #define TX_MSDU_EXTENSION_WDS_MASK                                                  0x00010000
216 
217 #define TX_MSDU_EXTENSION_RESERVED_5B_OFFSET                                        0x00000014
218 #define TX_MSDU_EXTENSION_RESERVED_5B_LSB                                           17
219 #define TX_MSDU_EXTENSION_RESERVED_5B_MSB                                           31
220 #define TX_MSDU_EXTENSION_RESERVED_5B_MASK                                          0xfffe0000
221 
222 #define TX_MSDU_EXTENSION_BUF0_PTR_31_0_OFFSET                                      0x00000018
223 #define TX_MSDU_EXTENSION_BUF0_PTR_31_0_LSB                                         0
224 #define TX_MSDU_EXTENSION_BUF0_PTR_31_0_MSB                                         31
225 #define TX_MSDU_EXTENSION_BUF0_PTR_31_0_MASK                                        0xffffffff
226 
227 #define TX_MSDU_EXTENSION_BUF0_PTR_39_32_OFFSET                                     0x0000001c
228 #define TX_MSDU_EXTENSION_BUF0_PTR_39_32_LSB                                        0
229 #define TX_MSDU_EXTENSION_BUF0_PTR_39_32_MSB                                        7
230 #define TX_MSDU_EXTENSION_BUF0_PTR_39_32_MASK                                       0x000000ff
231 
232 #define TX_MSDU_EXTENSION_EXTN_OVERRIDE_OFFSET                                      0x0000001c
233 #define TX_MSDU_EXTENSION_EXTN_OVERRIDE_LSB                                         8
234 #define TX_MSDU_EXTENSION_EXTN_OVERRIDE_MSB                                         8
235 #define TX_MSDU_EXTENSION_EXTN_OVERRIDE_MASK                                        0x00000100
236 
237 #define TX_MSDU_EXTENSION_ENCAP_TYPE_OFFSET                                         0x0000001c
238 #define TX_MSDU_EXTENSION_ENCAP_TYPE_LSB                                            9
239 #define TX_MSDU_EXTENSION_ENCAP_TYPE_MSB                                            10
240 #define TX_MSDU_EXTENSION_ENCAP_TYPE_MASK                                           0x00000600
241 
242 #define TX_MSDU_EXTENSION_ENCRYPT_TYPE_OFFSET                                       0x0000001c
243 #define TX_MSDU_EXTENSION_ENCRYPT_TYPE_LSB                                          11
244 #define TX_MSDU_EXTENSION_ENCRYPT_TYPE_MSB                                          14
245 #define TX_MSDU_EXTENSION_ENCRYPT_TYPE_MASK                                         0x00007800
246 
247 #define TX_MSDU_EXTENSION_TQM_NO_DROP_OFFSET                                        0x0000001c
248 #define TX_MSDU_EXTENSION_TQM_NO_DROP_LSB                                           15
249 #define TX_MSDU_EXTENSION_TQM_NO_DROP_MSB                                           15
250 #define TX_MSDU_EXTENSION_TQM_NO_DROP_MASK                                          0x00008000
251 
252 #define TX_MSDU_EXTENSION_BUF0_LEN_OFFSET                                           0x0000001c
253 #define TX_MSDU_EXTENSION_BUF0_LEN_LSB                                              16
254 #define TX_MSDU_EXTENSION_BUF0_LEN_MSB                                              31
255 #define TX_MSDU_EXTENSION_BUF0_LEN_MASK                                             0xffff0000
256 
257 #define TX_MSDU_EXTENSION_BUF1_PTR_31_0_OFFSET                                      0x00000020
258 #define TX_MSDU_EXTENSION_BUF1_PTR_31_0_LSB                                         0
259 #define TX_MSDU_EXTENSION_BUF1_PTR_31_0_MSB                                         31
260 #define TX_MSDU_EXTENSION_BUF1_PTR_31_0_MASK                                        0xffffffff
261 
262 #define TX_MSDU_EXTENSION_BUF1_PTR_39_32_OFFSET                                     0x00000024
263 #define TX_MSDU_EXTENSION_BUF1_PTR_39_32_LSB                                        0
264 #define TX_MSDU_EXTENSION_BUF1_PTR_39_32_MSB                                        7
265 #define TX_MSDU_EXTENSION_BUF1_PTR_39_32_MASK                                       0x000000ff
266 
267 #define TX_MSDU_EXTENSION_EPD_OFFSET                                                0x00000024
268 #define TX_MSDU_EXTENSION_EPD_LSB                                                   8
269 #define TX_MSDU_EXTENSION_EPD_MSB                                                   8
270 #define TX_MSDU_EXTENSION_EPD_MASK                                                  0x00000100
271 
272 #define TX_MSDU_EXTENSION_MESH_ENABLE_OFFSET                                        0x00000024
273 #define TX_MSDU_EXTENSION_MESH_ENABLE_LSB                                           9
274 #define TX_MSDU_EXTENSION_MESH_ENABLE_MSB                                           10
275 #define TX_MSDU_EXTENSION_MESH_ENABLE_MASK                                          0x00000600
276 
277 #define TX_MSDU_EXTENSION_RESERVED_9A_OFFSET                                        0x00000024
278 #define TX_MSDU_EXTENSION_RESERVED_9A_LSB                                           11
279 #define TX_MSDU_EXTENSION_RESERVED_9A_MSB                                           15
280 #define TX_MSDU_EXTENSION_RESERVED_9A_MASK                                          0x0000f800
281 
282 #define TX_MSDU_EXTENSION_BUF1_LEN_OFFSET                                           0x00000024
283 #define TX_MSDU_EXTENSION_BUF1_LEN_LSB                                              16
284 #define TX_MSDU_EXTENSION_BUF1_LEN_MSB                                              31
285 #define TX_MSDU_EXTENSION_BUF1_LEN_MASK                                             0xffff0000
286 
287 #define TX_MSDU_EXTENSION_BUF2_PTR_31_0_OFFSET                                      0x00000028
288 #define TX_MSDU_EXTENSION_BUF2_PTR_31_0_LSB                                         0
289 #define TX_MSDU_EXTENSION_BUF2_PTR_31_0_MSB                                         31
290 #define TX_MSDU_EXTENSION_BUF2_PTR_31_0_MASK                                        0xffffffff
291 
292 #define TX_MSDU_EXTENSION_BUF2_PTR_39_32_OFFSET                                     0x0000002c
293 #define TX_MSDU_EXTENSION_BUF2_PTR_39_32_LSB                                        0
294 #define TX_MSDU_EXTENSION_BUF2_PTR_39_32_MSB                                        7
295 #define TX_MSDU_EXTENSION_BUF2_PTR_39_32_MASK                                       0x000000ff
296 
297 #define TX_MSDU_EXTENSION_DSCP_TID_TABLE_NUM_OFFSET                                 0x0000002c
298 #define TX_MSDU_EXTENSION_DSCP_TID_TABLE_NUM_LSB                                    8
299 #define TX_MSDU_EXTENSION_DSCP_TID_TABLE_NUM_MSB                                    13
300 #define TX_MSDU_EXTENSION_DSCP_TID_TABLE_NUM_MASK                                   0x00003f00
301 
302 #define TX_MSDU_EXTENSION_RESERVED_11A_OFFSET                                       0x0000002c
303 #define TX_MSDU_EXTENSION_RESERVED_11A_LSB                                          14
304 #define TX_MSDU_EXTENSION_RESERVED_11A_MSB                                          15
305 #define TX_MSDU_EXTENSION_RESERVED_11A_MASK                                         0x0000c000
306 
307 #define TX_MSDU_EXTENSION_BUF2_LEN_OFFSET                                           0x0000002c
308 #define TX_MSDU_EXTENSION_BUF2_LEN_LSB                                              16
309 #define TX_MSDU_EXTENSION_BUF2_LEN_MSB                                              31
310 #define TX_MSDU_EXTENSION_BUF2_LEN_MASK                                             0xffff0000
311 
312 #define TX_MSDU_EXTENSION_BUF3_PTR_31_0_OFFSET                                      0x00000030
313 #define TX_MSDU_EXTENSION_BUF3_PTR_31_0_LSB                                         0
314 #define TX_MSDU_EXTENSION_BUF3_PTR_31_0_MSB                                         31
315 #define TX_MSDU_EXTENSION_BUF3_PTR_31_0_MASK                                        0xffffffff
316 
317 #define TX_MSDU_EXTENSION_BUF3_PTR_39_32_OFFSET                                     0x00000034
318 #define TX_MSDU_EXTENSION_BUF3_PTR_39_32_LSB                                        0
319 #define TX_MSDU_EXTENSION_BUF3_PTR_39_32_MSB                                        7
320 #define TX_MSDU_EXTENSION_BUF3_PTR_39_32_MASK                                       0x000000ff
321 
322 #define TX_MSDU_EXTENSION_RESERVED_13A_OFFSET                                       0x00000034
323 #define TX_MSDU_EXTENSION_RESERVED_13A_LSB                                          8
324 #define TX_MSDU_EXTENSION_RESERVED_13A_MSB                                          15
325 #define TX_MSDU_EXTENSION_RESERVED_13A_MASK                                         0x0000ff00
326 
327 #define TX_MSDU_EXTENSION_BUF3_LEN_OFFSET                                           0x00000034
328 #define TX_MSDU_EXTENSION_BUF3_LEN_LSB                                              16
329 #define TX_MSDU_EXTENSION_BUF3_LEN_MSB                                              31
330 #define TX_MSDU_EXTENSION_BUF3_LEN_MASK                                             0xffff0000
331 
332 #define TX_MSDU_EXTENSION_BUF4_PTR_31_0_OFFSET                                      0x00000038
333 #define TX_MSDU_EXTENSION_BUF4_PTR_31_0_LSB                                         0
334 #define TX_MSDU_EXTENSION_BUF4_PTR_31_0_MSB                                         31
335 #define TX_MSDU_EXTENSION_BUF4_PTR_31_0_MASK                                        0xffffffff
336 
337 #define TX_MSDU_EXTENSION_BUF4_PTR_39_32_OFFSET                                     0x0000003c
338 #define TX_MSDU_EXTENSION_BUF4_PTR_39_32_LSB                                        0
339 #define TX_MSDU_EXTENSION_BUF4_PTR_39_32_MSB                                        7
340 #define TX_MSDU_EXTENSION_BUF4_PTR_39_32_MASK                                       0x000000ff
341 
342 #define TX_MSDU_EXTENSION_RESERVED_15A_OFFSET                                       0x0000003c
343 #define TX_MSDU_EXTENSION_RESERVED_15A_LSB                                          8
344 #define TX_MSDU_EXTENSION_RESERVED_15A_MSB                                          15
345 #define TX_MSDU_EXTENSION_RESERVED_15A_MASK                                         0x0000ff00
346 
347 #define TX_MSDU_EXTENSION_BUF4_LEN_OFFSET                                           0x0000003c
348 #define TX_MSDU_EXTENSION_BUF4_LEN_LSB                                              16
349 #define TX_MSDU_EXTENSION_BUF4_LEN_MSB                                              31
350 #define TX_MSDU_EXTENSION_BUF4_LEN_MASK                                             0xffff0000
351 
352 #define TX_MSDU_EXTENSION_BUF5_PTR_31_0_OFFSET                                      0x00000040
353 #define TX_MSDU_EXTENSION_BUF5_PTR_31_0_LSB                                         0
354 #define TX_MSDU_EXTENSION_BUF5_PTR_31_0_MSB                                         31
355 #define TX_MSDU_EXTENSION_BUF5_PTR_31_0_MASK                                        0xffffffff
356 
357 #define TX_MSDU_EXTENSION_BUF5_PTR_39_32_OFFSET                                     0x00000044
358 #define TX_MSDU_EXTENSION_BUF5_PTR_39_32_LSB                                        0
359 #define TX_MSDU_EXTENSION_BUF5_PTR_39_32_MSB                                        7
360 #define TX_MSDU_EXTENSION_BUF5_PTR_39_32_MASK                                       0x000000ff
361 
362 #define TX_MSDU_EXTENSION_RESERVED_17A_OFFSET                                       0x00000044
363 #define TX_MSDU_EXTENSION_RESERVED_17A_LSB                                          8
364 #define TX_MSDU_EXTENSION_RESERVED_17A_MSB                                          15
365 #define TX_MSDU_EXTENSION_RESERVED_17A_MASK                                         0x0000ff00
366 
367 #define TX_MSDU_EXTENSION_BUF5_LEN_OFFSET                                           0x00000044
368 #define TX_MSDU_EXTENSION_BUF5_LEN_LSB                                              16
369 #define TX_MSDU_EXTENSION_BUF5_LEN_MSB                                              31
370 #define TX_MSDU_EXTENSION_BUF5_LEN_MASK                                             0xffff0000
371 
372 #endif
373