1  /*
2   * Copyright (c) 2021 The Linux Foundation. All rights reserved.
3   *
4   * Permission to use, copy, modify, and/or distribute this software for any
5   * purpose with or without fee is hereby granted, provided that the above
6   * copyright notice and this permission notice appear in all copies.
7   *
8   * THE SOFTWARE IS PROVIDED "AS IS" AND THE AUTHOR DISCLAIMS ALL WARRANTIES
9   * WITH REGARD TO THIS SOFTWARE INCLUDING ALL IMPLIED WARRANTIES OF
10   * MERCHANTABILITY AND FITNESS. IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR
11   * ANY SPECIAL, DIRECT, INDIRECT, OR CONSEQUENTIAL DAMAGES OR ANY DAMAGES
12   * WHATSOEVER RESULTING FROM LOSS OF USE, DATA OR PROFITS, WHETHER IN AN
13   * ACTION OF CONTRACT, NEGLIGENCE OR OTHER TORTIOUS ACTION, ARISING OUT OF
14   * OR IN CONNECTION WITH THE USE OR PERFORMANCE OF THIS SOFTWARE.
15   */
16  
17  // $ATH_LICENSE_HW_HDR_C$
18  //
19  // DO NOT EDIT!  This file is automatically generated
20  //               These definitions are tied to a particular hardware layout
21  
22  
23  #ifndef _RX_TIMING_OFFSET_INFO_H_
24  #define _RX_TIMING_OFFSET_INFO_H_
25  #if !defined(__ASSEMBLER__)
26  #endif
27  
28  
29  // ################ START SUMMARY #################
30  //
31  //	Dword	Fields
32  //	0	residual_phase_offset[11:0], reserved[31:12]
33  //
34  // ################ END SUMMARY #################
35  
36  #define NUM_OF_DWORDS_RX_TIMING_OFFSET_INFO 1
37  
38  struct rx_timing_offset_info {
39               uint32_t residual_phase_offset           : 12, //[11:0]
40                        reserved                        : 20; //[31:12]
41  };
42  
43  /*
44  
45  residual_phase_offset
46  
47  			Cumulative reference frequency error at end of RX
48  
49  			<legal all>
50  
51  reserved
52  
53  			<legal 0>
54  */
55  
56  
57  /* Description		RX_TIMING_OFFSET_INFO_0_RESIDUAL_PHASE_OFFSET
58  
59  			Cumulative reference frequency error at end of RX
60  
61  			<legal all>
62  */
63  #define RX_TIMING_OFFSET_INFO_0_RESIDUAL_PHASE_OFFSET_OFFSET         0x00000000
64  #define RX_TIMING_OFFSET_INFO_0_RESIDUAL_PHASE_OFFSET_LSB            0
65  #define RX_TIMING_OFFSET_INFO_0_RESIDUAL_PHASE_OFFSET_MASK           0x00000fff
66  
67  /* Description		RX_TIMING_OFFSET_INFO_0_RESERVED
68  
69  			<legal 0>
70  */
71  #define RX_TIMING_OFFSET_INFO_0_RESERVED_OFFSET                      0x00000000
72  #define RX_TIMING_OFFSET_INFO_0_RESERVED_LSB                         12
73  #define RX_TIMING_OFFSET_INFO_0_RESERVED_MASK                        0xfffff000
74  
75  
76  #endif // _RX_TIMING_OFFSET_INFO_H_
77