1 /*
2  * Copyright (c) 2021 The Linux Foundation. All rights reserved.
3  *
4  * Permission to use, copy, modify, and/or distribute this software for any
5  * purpose with or without fee is hereby granted, provided that the above
6  * copyright notice and this permission notice appear in all copies.
7  *
8  * THE SOFTWARE IS PROVIDED "AS IS" AND THE AUTHOR DISCLAIMS ALL WARRANTIES
9  * WITH REGARD TO THIS SOFTWARE INCLUDING ALL IMPLIED WARRANTIES OF
10  * MERCHANTABILITY AND FITNESS. IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR
11  * ANY SPECIAL, DIRECT, INDIRECT, OR CONSEQUENTIAL DAMAGES OR ANY DAMAGES
12  * WHATSOEVER RESULTING FROM LOSS OF USE, DATA OR PROFITS, WHETHER IN AN
13  * ACTION OF CONTRACT, NEGLIGENCE OR OTHER TORTIOUS ACTION, ARISING OUT OF
14  * OR IN CONNECTION WITH THE USE OR PERFORMANCE OF THIS SOFTWARE.
15  */
16 
17 // $ATH_LICENSE_HW_HDR_C$
18 //
19 // DO NOT EDIT!  This file is automatically generated
20 //               These definitions are tied to a particular hardware layout
21 
22 
23 #ifndef _REO_FLUSH_QUEUE_STATUS_H_
24 #define _REO_FLUSH_QUEUE_STATUS_H_
25 #if !defined(__ASSEMBLER__)
26 #endif
27 
28 #include "uniform_reo_status_header.h"
29 
30 // ################ START SUMMARY #################
31 //
32 //	Dword	Fields
33 //	0-1	struct uniform_reo_status_header status_header;
34 //	2	error_detected[0], reserved_2a[31:1]
35 //	3	reserved_3a[31:0]
36 //	4	reserved_4a[31:0]
37 //	5	reserved_5a[31:0]
38 //	6	reserved_6a[31:0]
39 //	7	reserved_7a[31:0]
40 //	8	reserved_8a[31:0]
41 //	9	reserved_9a[31:0]
42 //	10	reserved_10a[31:0]
43 //	11	reserved_11a[31:0]
44 //	12	reserved_12a[31:0]
45 //	13	reserved_13a[31:0]
46 //	14	reserved_14a[31:0]
47 //	15	reserved_15a[31:0]
48 //	16	reserved_16a[31:0]
49 //	17	reserved_17a[31:0]
50 //	18	reserved_18a[31:0]
51 //	19	reserved_19a[31:0]
52 //	20	reserved_20a[31:0]
53 //	21	reserved_21a[31:0]
54 //	22	reserved_22a[31:0]
55 //	23	reserved_23a[31:0]
56 //	24	reserved_24a[27:0], looping_count[31:28]
57 //
58 // ################ END SUMMARY #################
59 
60 #define NUM_OF_DWORDS_REO_FLUSH_QUEUE_STATUS 25
61 
62 struct reo_flush_queue_status {
63     struct            uniform_reo_status_header                       status_header;
64              uint32_t error_detected                  :  1, //[0]
65                       reserved_2a                     : 31; //[31:1]
66              uint32_t reserved_3a                     : 32; //[31:0]
67              uint32_t reserved_4a                     : 32; //[31:0]
68              uint32_t reserved_5a                     : 32; //[31:0]
69              uint32_t reserved_6a                     : 32; //[31:0]
70              uint32_t reserved_7a                     : 32; //[31:0]
71              uint32_t reserved_8a                     : 32; //[31:0]
72              uint32_t reserved_9a                     : 32; //[31:0]
73              uint32_t reserved_10a                    : 32; //[31:0]
74              uint32_t reserved_11a                    : 32; //[31:0]
75              uint32_t reserved_12a                    : 32; //[31:0]
76              uint32_t reserved_13a                    : 32; //[31:0]
77              uint32_t reserved_14a                    : 32; //[31:0]
78              uint32_t reserved_15a                    : 32; //[31:0]
79              uint32_t reserved_16a                    : 32; //[31:0]
80              uint32_t reserved_17a                    : 32; //[31:0]
81              uint32_t reserved_18a                    : 32; //[31:0]
82              uint32_t reserved_19a                    : 32; //[31:0]
83              uint32_t reserved_20a                    : 32; //[31:0]
84              uint32_t reserved_21a                    : 32; //[31:0]
85              uint32_t reserved_22a                    : 32; //[31:0]
86              uint32_t reserved_23a                    : 32; //[31:0]
87              uint32_t reserved_24a                    : 28, //[27:0]
88                       looping_count                   :  4; //[31:28]
89 };
90 
91 /*
92 
93 struct uniform_reo_status_header status_header
94 
95 			Consumer: SW
96 
97 			Producer: REO
98 
99 
100 
101 			Details that can link this status with the original
102 			command. It also contains info on how long REO took to
103 			execute this command.
104 
105 error_detected
106 
107 			Status of the blocking resource
108 
109 			0: No error has been detected while executing this
110 			command
111 
112 			1: Error detected: The resource to be used for blocking
113 			was already in use.
114 
115 reserved_2a
116 
117 			<legal 0>
118 
119 reserved_3a
120 
121 			<legal 0>
122 
123 reserved_4a
124 
125 			<legal 0>
126 
127 reserved_5a
128 
129 			<legal 0>
130 
131 reserved_6a
132 
133 			<legal 0>
134 
135 reserved_7a
136 
137 			<legal 0>
138 
139 reserved_8a
140 
141 			<legal 0>
142 
143 reserved_9a
144 
145 			<legal 0>
146 
147 reserved_10a
148 
149 			<legal 0>
150 
151 reserved_11a
152 
153 			<legal 0>
154 
155 reserved_12a
156 
157 			<legal 0>
158 
159 reserved_13a
160 
161 			<legal 0>
162 
163 reserved_14a
164 
165 			<legal 0>
166 
167 reserved_15a
168 
169 			<legal 0>
170 
171 reserved_16a
172 
173 			<legal 0>
174 
175 reserved_17a
176 
177 			<legal 0>
178 
179 reserved_18a
180 
181 			<legal 0>
182 
183 reserved_19a
184 
185 			<legal 0>
186 
187 reserved_20a
188 
189 			<legal 0>
190 
191 reserved_21a
192 
193 			<legal 0>
194 
195 reserved_22a
196 
197 			<legal 0>
198 
199 reserved_23a
200 
201 			<legal 0>
202 
203 reserved_24a
204 
205 			<legal 0>
206 
207 looping_count
208 
209 			A count value that indicates the number of times the
210 			producer of entries into this Ring has looped around the
211 			ring.
212 
213 			At initialization time, this value is set to 0. On the
214 			first loop, this value is set to 1. After the max value is
215 			reached allowed by the number of bits for this field, the
216 			count value continues with 0 again.
217 
218 
219 
220 			In case SW is the consumer of the ring entries, it can
221 			use this field to figure out up to where the producer of
222 			entries has created new entries. This eliminates the need to
223 			check where the head pointer' of the ring is located once
224 			the SW starts processing an interrupt indicating that new
225 			entries have been put into this ring...
226 
227 
228 
229 			Also note that SW if it wants only needs to look at the
230 			LSB bit of this count value.
231 
232 			<legal all>
233 */
234 
235 
236  /* EXTERNAL REFERENCE : struct uniform_reo_status_header status_header */
237 
238 
239 /* Description		REO_FLUSH_QUEUE_STATUS_0_STATUS_HEADER_REO_STATUS_NUMBER
240 
241 			Consumer: SW , DEBUG
242 
243 			Producer: REO
244 
245 
246 
247 			The value in this field is equal to value of the
248 			'REO_CMD_Number' field the REO command
249 
250 
251 
252 			This field helps to correlate the statuses with the REO
253 			commands.
254 
255 
256 
257 			<legal all>
258 */
259 #define REO_FLUSH_QUEUE_STATUS_0_STATUS_HEADER_REO_STATUS_NUMBER_OFFSET 0x00000000
260 #define REO_FLUSH_QUEUE_STATUS_0_STATUS_HEADER_REO_STATUS_NUMBER_LSB 0
261 #define REO_FLUSH_QUEUE_STATUS_0_STATUS_HEADER_REO_STATUS_NUMBER_MASK 0x0000ffff
262 
263 /* Description		REO_FLUSH_QUEUE_STATUS_0_STATUS_HEADER_CMD_EXECUTION_TIME
264 
265 			Consumer: DEBUG
266 
267 			Producer: REO
268 
269 
270 
271 			The amount of time REO took to excecute the command.
272 			Note that this time does not include the duration of the
273 			command waiting in the command ring, before the execution
274 			started.
275 
276 
277 
278 			In us.
279 
280 
281 
282 			<legal all>
283 */
284 #define REO_FLUSH_QUEUE_STATUS_0_STATUS_HEADER_CMD_EXECUTION_TIME_OFFSET 0x00000000
285 #define REO_FLUSH_QUEUE_STATUS_0_STATUS_HEADER_CMD_EXECUTION_TIME_LSB 16
286 #define REO_FLUSH_QUEUE_STATUS_0_STATUS_HEADER_CMD_EXECUTION_TIME_MASK 0x03ff0000
287 
288 /* Description		REO_FLUSH_QUEUE_STATUS_0_STATUS_HEADER_REO_CMD_EXECUTION_STATUS
289 
290 			Consumer: DEBUG
291 
292 			Producer: REO
293 
294 
295 
296 			Execution status of the command.
297 
298 
299 
300 			<enum 0 reo_successful_execution> Command has
301 			successfully be executed
302 
303 			<enum 1 reo_blocked_execution> Command could not be
304 			executed as the queue or cache was blocked
305 
306 			<enum 2 reo_failed_execution> Command has encountered
307 			problems when executing, like the queue descriptor not being
308 			valid. None of the status fields in the entire STATUS TLV
309 			are valid.
310 
311 			<enum 3 reo_resource_blocked> Command is NOT  executed
312 			because one or more descriptors were blocked. This is SW
313 			programming mistake.
314 
315 			None of the status fields in the entire STATUS TLV are
316 			valid.
317 
318 
319 
320 			<legal  0-3>
321 */
322 #define REO_FLUSH_QUEUE_STATUS_0_STATUS_HEADER_REO_CMD_EXECUTION_STATUS_OFFSET 0x00000000
323 #define REO_FLUSH_QUEUE_STATUS_0_STATUS_HEADER_REO_CMD_EXECUTION_STATUS_LSB 26
324 #define REO_FLUSH_QUEUE_STATUS_0_STATUS_HEADER_REO_CMD_EXECUTION_STATUS_MASK 0x0c000000
325 
326 /* Description		REO_FLUSH_QUEUE_STATUS_0_STATUS_HEADER_RESERVED_0A
327 
328 			<legal 0>
329 */
330 #define REO_FLUSH_QUEUE_STATUS_0_STATUS_HEADER_RESERVED_0A_OFFSET    0x00000000
331 #define REO_FLUSH_QUEUE_STATUS_0_STATUS_HEADER_RESERVED_0A_LSB       28
332 #define REO_FLUSH_QUEUE_STATUS_0_STATUS_HEADER_RESERVED_0A_MASK      0xf0000000
333 
334 /* Description		REO_FLUSH_QUEUE_STATUS_1_STATUS_HEADER_TIMESTAMP
335 
336 			Timestamp at the moment that this status report is
337 			written.
338 
339 
340 
341 			<legal all>
342 */
343 #define REO_FLUSH_QUEUE_STATUS_1_STATUS_HEADER_TIMESTAMP_OFFSET      0x00000004
344 #define REO_FLUSH_QUEUE_STATUS_1_STATUS_HEADER_TIMESTAMP_LSB         0
345 #define REO_FLUSH_QUEUE_STATUS_1_STATUS_HEADER_TIMESTAMP_MASK        0xffffffff
346 
347 /* Description		REO_FLUSH_QUEUE_STATUS_2_ERROR_DETECTED
348 
349 			Status of the blocking resource
350 
351 			0: No error has been detected while executing this
352 			command
353 
354 			1: Error detected: The resource to be used for blocking
355 			was already in use.
356 */
357 #define REO_FLUSH_QUEUE_STATUS_2_ERROR_DETECTED_OFFSET               0x00000008
358 #define REO_FLUSH_QUEUE_STATUS_2_ERROR_DETECTED_LSB                  0
359 #define REO_FLUSH_QUEUE_STATUS_2_ERROR_DETECTED_MASK                 0x00000001
360 
361 /* Description		REO_FLUSH_QUEUE_STATUS_2_RESERVED_2A
362 
363 			<legal 0>
364 */
365 #define REO_FLUSH_QUEUE_STATUS_2_RESERVED_2A_OFFSET                  0x00000008
366 #define REO_FLUSH_QUEUE_STATUS_2_RESERVED_2A_LSB                     1
367 #define REO_FLUSH_QUEUE_STATUS_2_RESERVED_2A_MASK                    0xfffffffe
368 
369 /* Description		REO_FLUSH_QUEUE_STATUS_3_RESERVED_3A
370 
371 			<legal 0>
372 */
373 #define REO_FLUSH_QUEUE_STATUS_3_RESERVED_3A_OFFSET                  0x0000000c
374 #define REO_FLUSH_QUEUE_STATUS_3_RESERVED_3A_LSB                     0
375 #define REO_FLUSH_QUEUE_STATUS_3_RESERVED_3A_MASK                    0xffffffff
376 
377 /* Description		REO_FLUSH_QUEUE_STATUS_4_RESERVED_4A
378 
379 			<legal 0>
380 */
381 #define REO_FLUSH_QUEUE_STATUS_4_RESERVED_4A_OFFSET                  0x00000010
382 #define REO_FLUSH_QUEUE_STATUS_4_RESERVED_4A_LSB                     0
383 #define REO_FLUSH_QUEUE_STATUS_4_RESERVED_4A_MASK                    0xffffffff
384 
385 /* Description		REO_FLUSH_QUEUE_STATUS_5_RESERVED_5A
386 
387 			<legal 0>
388 */
389 #define REO_FLUSH_QUEUE_STATUS_5_RESERVED_5A_OFFSET                  0x00000014
390 #define REO_FLUSH_QUEUE_STATUS_5_RESERVED_5A_LSB                     0
391 #define REO_FLUSH_QUEUE_STATUS_5_RESERVED_5A_MASK                    0xffffffff
392 
393 /* Description		REO_FLUSH_QUEUE_STATUS_6_RESERVED_6A
394 
395 			<legal 0>
396 */
397 #define REO_FLUSH_QUEUE_STATUS_6_RESERVED_6A_OFFSET                  0x00000018
398 #define REO_FLUSH_QUEUE_STATUS_6_RESERVED_6A_LSB                     0
399 #define REO_FLUSH_QUEUE_STATUS_6_RESERVED_6A_MASK                    0xffffffff
400 
401 /* Description		REO_FLUSH_QUEUE_STATUS_7_RESERVED_7A
402 
403 			<legal 0>
404 */
405 #define REO_FLUSH_QUEUE_STATUS_7_RESERVED_7A_OFFSET                  0x0000001c
406 #define REO_FLUSH_QUEUE_STATUS_7_RESERVED_7A_LSB                     0
407 #define REO_FLUSH_QUEUE_STATUS_7_RESERVED_7A_MASK                    0xffffffff
408 
409 /* Description		REO_FLUSH_QUEUE_STATUS_8_RESERVED_8A
410 
411 			<legal 0>
412 */
413 #define REO_FLUSH_QUEUE_STATUS_8_RESERVED_8A_OFFSET                  0x00000020
414 #define REO_FLUSH_QUEUE_STATUS_8_RESERVED_8A_LSB                     0
415 #define REO_FLUSH_QUEUE_STATUS_8_RESERVED_8A_MASK                    0xffffffff
416 
417 /* Description		REO_FLUSH_QUEUE_STATUS_9_RESERVED_9A
418 
419 			<legal 0>
420 */
421 #define REO_FLUSH_QUEUE_STATUS_9_RESERVED_9A_OFFSET                  0x00000024
422 #define REO_FLUSH_QUEUE_STATUS_9_RESERVED_9A_LSB                     0
423 #define REO_FLUSH_QUEUE_STATUS_9_RESERVED_9A_MASK                    0xffffffff
424 
425 /* Description		REO_FLUSH_QUEUE_STATUS_10_RESERVED_10A
426 
427 			<legal 0>
428 */
429 #define REO_FLUSH_QUEUE_STATUS_10_RESERVED_10A_OFFSET                0x00000028
430 #define REO_FLUSH_QUEUE_STATUS_10_RESERVED_10A_LSB                   0
431 #define REO_FLUSH_QUEUE_STATUS_10_RESERVED_10A_MASK                  0xffffffff
432 
433 /* Description		REO_FLUSH_QUEUE_STATUS_11_RESERVED_11A
434 
435 			<legal 0>
436 */
437 #define REO_FLUSH_QUEUE_STATUS_11_RESERVED_11A_OFFSET                0x0000002c
438 #define REO_FLUSH_QUEUE_STATUS_11_RESERVED_11A_LSB                   0
439 #define REO_FLUSH_QUEUE_STATUS_11_RESERVED_11A_MASK                  0xffffffff
440 
441 /* Description		REO_FLUSH_QUEUE_STATUS_12_RESERVED_12A
442 
443 			<legal 0>
444 */
445 #define REO_FLUSH_QUEUE_STATUS_12_RESERVED_12A_OFFSET                0x00000030
446 #define REO_FLUSH_QUEUE_STATUS_12_RESERVED_12A_LSB                   0
447 #define REO_FLUSH_QUEUE_STATUS_12_RESERVED_12A_MASK                  0xffffffff
448 
449 /* Description		REO_FLUSH_QUEUE_STATUS_13_RESERVED_13A
450 
451 			<legal 0>
452 */
453 #define REO_FLUSH_QUEUE_STATUS_13_RESERVED_13A_OFFSET                0x00000034
454 #define REO_FLUSH_QUEUE_STATUS_13_RESERVED_13A_LSB                   0
455 #define REO_FLUSH_QUEUE_STATUS_13_RESERVED_13A_MASK                  0xffffffff
456 
457 /* Description		REO_FLUSH_QUEUE_STATUS_14_RESERVED_14A
458 
459 			<legal 0>
460 */
461 #define REO_FLUSH_QUEUE_STATUS_14_RESERVED_14A_OFFSET                0x00000038
462 #define REO_FLUSH_QUEUE_STATUS_14_RESERVED_14A_LSB                   0
463 #define REO_FLUSH_QUEUE_STATUS_14_RESERVED_14A_MASK                  0xffffffff
464 
465 /* Description		REO_FLUSH_QUEUE_STATUS_15_RESERVED_15A
466 
467 			<legal 0>
468 */
469 #define REO_FLUSH_QUEUE_STATUS_15_RESERVED_15A_OFFSET                0x0000003c
470 #define REO_FLUSH_QUEUE_STATUS_15_RESERVED_15A_LSB                   0
471 #define REO_FLUSH_QUEUE_STATUS_15_RESERVED_15A_MASK                  0xffffffff
472 
473 /* Description		REO_FLUSH_QUEUE_STATUS_16_RESERVED_16A
474 
475 			<legal 0>
476 */
477 #define REO_FLUSH_QUEUE_STATUS_16_RESERVED_16A_OFFSET                0x00000040
478 #define REO_FLUSH_QUEUE_STATUS_16_RESERVED_16A_LSB                   0
479 #define REO_FLUSH_QUEUE_STATUS_16_RESERVED_16A_MASK                  0xffffffff
480 
481 /* Description		REO_FLUSH_QUEUE_STATUS_17_RESERVED_17A
482 
483 			<legal 0>
484 */
485 #define REO_FLUSH_QUEUE_STATUS_17_RESERVED_17A_OFFSET                0x00000044
486 #define REO_FLUSH_QUEUE_STATUS_17_RESERVED_17A_LSB                   0
487 #define REO_FLUSH_QUEUE_STATUS_17_RESERVED_17A_MASK                  0xffffffff
488 
489 /* Description		REO_FLUSH_QUEUE_STATUS_18_RESERVED_18A
490 
491 			<legal 0>
492 */
493 #define REO_FLUSH_QUEUE_STATUS_18_RESERVED_18A_OFFSET                0x00000048
494 #define REO_FLUSH_QUEUE_STATUS_18_RESERVED_18A_LSB                   0
495 #define REO_FLUSH_QUEUE_STATUS_18_RESERVED_18A_MASK                  0xffffffff
496 
497 /* Description		REO_FLUSH_QUEUE_STATUS_19_RESERVED_19A
498 
499 			<legal 0>
500 */
501 #define REO_FLUSH_QUEUE_STATUS_19_RESERVED_19A_OFFSET                0x0000004c
502 #define REO_FLUSH_QUEUE_STATUS_19_RESERVED_19A_LSB                   0
503 #define REO_FLUSH_QUEUE_STATUS_19_RESERVED_19A_MASK                  0xffffffff
504 
505 /* Description		REO_FLUSH_QUEUE_STATUS_20_RESERVED_20A
506 
507 			<legal 0>
508 */
509 #define REO_FLUSH_QUEUE_STATUS_20_RESERVED_20A_OFFSET                0x00000050
510 #define REO_FLUSH_QUEUE_STATUS_20_RESERVED_20A_LSB                   0
511 #define REO_FLUSH_QUEUE_STATUS_20_RESERVED_20A_MASK                  0xffffffff
512 
513 /* Description		REO_FLUSH_QUEUE_STATUS_21_RESERVED_21A
514 
515 			<legal 0>
516 */
517 #define REO_FLUSH_QUEUE_STATUS_21_RESERVED_21A_OFFSET                0x00000054
518 #define REO_FLUSH_QUEUE_STATUS_21_RESERVED_21A_LSB                   0
519 #define REO_FLUSH_QUEUE_STATUS_21_RESERVED_21A_MASK                  0xffffffff
520 
521 /* Description		REO_FLUSH_QUEUE_STATUS_22_RESERVED_22A
522 
523 			<legal 0>
524 */
525 #define REO_FLUSH_QUEUE_STATUS_22_RESERVED_22A_OFFSET                0x00000058
526 #define REO_FLUSH_QUEUE_STATUS_22_RESERVED_22A_LSB                   0
527 #define REO_FLUSH_QUEUE_STATUS_22_RESERVED_22A_MASK                  0xffffffff
528 
529 /* Description		REO_FLUSH_QUEUE_STATUS_23_RESERVED_23A
530 
531 			<legal 0>
532 */
533 #define REO_FLUSH_QUEUE_STATUS_23_RESERVED_23A_OFFSET                0x0000005c
534 #define REO_FLUSH_QUEUE_STATUS_23_RESERVED_23A_LSB                   0
535 #define REO_FLUSH_QUEUE_STATUS_23_RESERVED_23A_MASK                  0xffffffff
536 
537 /* Description		REO_FLUSH_QUEUE_STATUS_24_RESERVED_24A
538 
539 			<legal 0>
540 */
541 #define REO_FLUSH_QUEUE_STATUS_24_RESERVED_24A_OFFSET                0x00000060
542 #define REO_FLUSH_QUEUE_STATUS_24_RESERVED_24A_LSB                   0
543 #define REO_FLUSH_QUEUE_STATUS_24_RESERVED_24A_MASK                  0x0fffffff
544 
545 /* Description		REO_FLUSH_QUEUE_STATUS_24_LOOPING_COUNT
546 
547 			A count value that indicates the number of times the
548 			producer of entries into this Ring has looped around the
549 			ring.
550 
551 			At initialization time, this value is set to 0. On the
552 			first loop, this value is set to 1. After the max value is
553 			reached allowed by the number of bits for this field, the
554 			count value continues with 0 again.
555 
556 
557 
558 			In case SW is the consumer of the ring entries, it can
559 			use this field to figure out up to where the producer of
560 			entries has created new entries. This eliminates the need to
561 			check where the head pointer' of the ring is located once
562 			the SW starts processing an interrupt indicating that new
563 			entries have been put into this ring...
564 
565 
566 
567 			Also note that SW if it wants only needs to look at the
568 			LSB bit of this count value.
569 
570 			<legal all>
571 */
572 #define REO_FLUSH_QUEUE_STATUS_24_LOOPING_COUNT_OFFSET               0x00000060
573 #define REO_FLUSH_QUEUE_STATUS_24_LOOPING_COUNT_LSB                  28
574 #define REO_FLUSH_QUEUE_STATUS_24_LOOPING_COUNT_MASK                 0xf0000000
575 
576 
577 #endif // _REO_FLUSH_QUEUE_STATUS_H_
578