1 /*
2  * Copyright (c) 2021 The Linux Foundation. All rights reserved.
3  *
4  * Permission to use, copy, modify, and/or distribute this software for any
5  * purpose with or without fee is hereby granted, provided that the above
6  * copyright notice and this permission notice appear in all copies.
7  *
8  * THE SOFTWARE IS PROVIDED "AS IS" AND THE AUTHOR DISCLAIMS ALL WARRANTIES
9  * WITH REGARD TO THIS SOFTWARE INCLUDING ALL IMPLIED WARRANTIES OF
10  * MERCHANTABILITY AND FITNESS. IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR
11  * ANY SPECIAL, DIRECT, INDIRECT, OR CONSEQUENTIAL DAMAGES OR ANY DAMAGES
12  * WHATSOEVER RESULTING FROM LOSS OF USE, DATA OR PROFITS, WHETHER IN AN
13  * ACTION OF CONTRACT, NEGLIGENCE OR OTHER TORTIOUS ACTION, ARISING OUT OF
14  * OR IN CONNECTION WITH THE USE OR PERFORMANCE OF THIS SOFTWARE.
15  */
16 
17 // $ATH_LICENSE_HW_HDR_C$
18 //
19 // DO NOT EDIT!  This file is automatically generated
20 //               These definitions are tied to a particular hardware layout
21 
22 
23 #ifndef _PHYRX_ABORT_REQUEST_INFO_H_
24 #define _PHYRX_ABORT_REQUEST_INFO_H_
25 #if !defined(__ASSEMBLER__)
26 #endif
27 
28 
29 // ################ START SUMMARY #################
30 //
31 //	Dword	Fields
32 //	0	phyrx_abort_reason[7:0], phy_enters_nap_state[8], phy_enters_defer_state[9], reserved_0[15:10], receive_duration[31:16]
33 //
34 // ################ END SUMMARY #################
35 
36 #define NUM_OF_DWORDS_PHYRX_ABORT_REQUEST_INFO 1
37 
38 struct phyrx_abort_request_info {
39              uint32_t phyrx_abort_reason              :  8, //[7:0]
40                       phy_enters_nap_state            :  1, //[8]
41                       phy_enters_defer_state          :  1, //[9]
42                       reserved_0                      :  6, //[15:10]
43                       receive_duration                : 16; //[31:16]
44 };
45 
46 /*
47 
48 phyrx_abort_reason
49 
50 			<enum 0 phyrx_err_phy_off> Reception aborted due to
51 			receiving a PHY_OFF TLV
52 
53 			<enum 1 phyrx_err_synth_off>
54 
55 			<enum 2 phyrx_err_ofdma_timing>
56 
57 			<enum 3 phyrx_err_ofdma_signal_parity>
58 
59 			<enum 4 phyrx_err_ofdma_rate_illegal>
60 
61 			<enum 5 phyrx_err_ofdma_length_illegal>
62 
63 			<enum 6 phyrx_err_ofdma_restart>
64 
65 			<enum 7 phyrx_err_ofdma_service>
66 
67 			<enum 8 phyrx_err_ppdu_ofdma_power_drop>
68 
69 
70 
71 			<enum 9 phyrx_err_cck_blokker>
72 
73 			<enum 10 phyrx_err_cck_timing>
74 
75 			<enum 11 phyrx_err_cck_header_crc>
76 
77 			<enum 12 phyrx_err_cck_rate_illegal>
78 
79 			<enum 13 phyrx_err_cck_length_illegal>
80 
81 			<enum 14 phyrx_err_cck_restart>
82 
83 			<enum 15 phyrx_err_cck_service>
84 
85 			<enum 16 phyrx_err_cck_power_drop>
86 
87 
88 
89 			<enum 17 phyrx_err_ht_crc_err>
90 
91 			<enum 18 phyrx_err_ht_length_illegal>
92 
93 			<enum 19 phyrx_err_ht_rate_illegal>
94 
95 			<enum 20 phyrx_err_ht_zlf>
96 
97 			<enum 21 phyrx_err_false_radar_ext>
98 
99 
100 
101 			<enum 22 phyrx_err_green_field>
102 
103 
104 
105 			<enum 23 phyrx_err_bw_gt_dyn_bw>
106 
107 			<enum 24 phyrx_err_leg_ht_mismatch>
108 
109 			<enum 25 phyrx_err_vht_crc_error>
110 
111 			<enum 26 phyrx_err_vht_siga_unsupported>
112 
113 			<enum 27 phyrx_err_vht_lsig_len_invalid>
114 
115 			<enum 28 phyrx_err_vht_ndp_or_zlf>
116 
117 			<enum 29 phyrx_err_vht_nsym_lt_zero>
118 
119 			<enum 30 phyrx_err_vht_rx_extra_symbol_mismatch>
120 
121 			<enum 31 phyrx_err_vht_rx_skip_group_id0>
122 
123 			<enum 32 phyrx_err_vht_rx_skip_group_id1to62>
124 
125 			<enum 33 phyrx_err_vht_rx_skip_group_id63>
126 
127 			<enum 34 phyrx_err_ofdm_ldpc_decoder_disabled>
128 
129 			<enum 35 phyrx_err_defer_nap>
130 
131 			<enum 36 phyrx_err_fdomain_timeout>
132 
133 			<enum 37 phyrx_err_lsig_rel_check>
134 
135 			<enum 38 phyrx_err_bt_collision>
136 
137 			<enum 39 phyrx_err_unsupported_mu_feedback>
138 
139 			<enum 40 phyrx_err_ppdu_tx_interrupt_rx>
140 
141 			<enum 41 phyrx_err_unsupported_cbf>
142 
143 
144 
145 			<enum 42 phyrx_err_other>  Should not really be used. If
146 			needed, ask for documentation update
147 
148 
149 
150 			<enum 43 phyrx_err_he_siga_unsupported > <enum 44
151 			phyrx_err_he_crc_error > <enum 45
152 			phyrx_err_he_sigb_unsupported > <enum 46
153 			phyrx_err_he_mu_mode_unsupported > <enum 47
154 			phyrx_err_he_ndp_or_zlf > <enum 48 phyrx_err_he_nsym_lt_zero
155 			> <enum 49 phyrx_err_he_ru_params_unsupported > <enum 50
156 			phyrx_err_he_num_users_unsupported ><enum 51
157 			phyrx_err_he_sounding_params_unsupported >
158 
159 
160 
161 			<enum 52 phyrx_err_MU_UL_no_power_detected>
162 
163 
164 
165 
166 
167 
168 
169 			<legal 0 - 52>
170 
171 phy_enters_nap_state
172 
173 			When set, PHY enters PHY NAP state after sending this
174 			abort
175 
176 
177 
178 			Note that nap and defer state are mutually exclusive.
179 
180 
181 
182 			Field put pro-actively in place....usage still to be
183 			agreed upon.
184 
185 			<legal all>
186 
187 phy_enters_defer_state
188 
189 			When set, PHY enters PHY defer state after sending this
190 			abort
191 
192 
193 
194 			Note that nap and defer state are mutually exclusive.
195 
196 
197 
198 			Field put pro-actively in place....usage still to be
199 			agreed upon.
200 
201 			<legal all>
202 
203 reserved_0
204 
205 			<legal 0>
206 
207 receive_duration
208 
209 			The remaining receive duration of this PPDU in the
210 			medium (in us). When PHY does not know this duration when
211 			this TLV is generated, the field will be set to 0.
212 
213 			The timing reference point is the reception by the MAC
214 			of this TLV. The value shall be accurate to within 2us.
215 
216 
217 
218 			In case Phy_enters_nap_state and/or
219 			Phy_enters_defer_state is set, there is a possibility that
220 			MAC PMM can also decide to go into a low(er) power state.
221 
222 			<legal all>
223 */
224 
225 
226 /* Description		PHYRX_ABORT_REQUEST_INFO_0_PHYRX_ABORT_REASON
227 
228 			<enum 0 phyrx_err_phy_off> Reception aborted due to
229 			receiving a PHY_OFF TLV
230 
231 			<enum 1 phyrx_err_synth_off>
232 
233 			<enum 2 phyrx_err_ofdma_timing>
234 
235 			<enum 3 phyrx_err_ofdma_signal_parity>
236 
237 			<enum 4 phyrx_err_ofdma_rate_illegal>
238 
239 			<enum 5 phyrx_err_ofdma_length_illegal>
240 
241 			<enum 6 phyrx_err_ofdma_restart>
242 
243 			<enum 7 phyrx_err_ofdma_service>
244 
245 			<enum 8 phyrx_err_ppdu_ofdma_power_drop>
246 
247 
248 
249 			<enum 9 phyrx_err_cck_blokker>
250 
251 			<enum 10 phyrx_err_cck_timing>
252 
253 			<enum 11 phyrx_err_cck_header_crc>
254 
255 			<enum 12 phyrx_err_cck_rate_illegal>
256 
257 			<enum 13 phyrx_err_cck_length_illegal>
258 
259 			<enum 14 phyrx_err_cck_restart>
260 
261 			<enum 15 phyrx_err_cck_service>
262 
263 			<enum 16 phyrx_err_cck_power_drop>
264 
265 
266 
267 			<enum 17 phyrx_err_ht_crc_err>
268 
269 			<enum 18 phyrx_err_ht_length_illegal>
270 
271 			<enum 19 phyrx_err_ht_rate_illegal>
272 
273 			<enum 20 phyrx_err_ht_zlf>
274 
275 			<enum 21 phyrx_err_false_radar_ext>
276 
277 
278 
279 			<enum 22 phyrx_err_green_field>
280 
281 
282 
283 			<enum 23 phyrx_err_bw_gt_dyn_bw>
284 
285 			<enum 24 phyrx_err_leg_ht_mismatch>
286 
287 			<enum 25 phyrx_err_vht_crc_error>
288 
289 			<enum 26 phyrx_err_vht_siga_unsupported>
290 
291 			<enum 27 phyrx_err_vht_lsig_len_invalid>
292 
293 			<enum 28 phyrx_err_vht_ndp_or_zlf>
294 
295 			<enum 29 phyrx_err_vht_nsym_lt_zero>
296 
297 			<enum 30 phyrx_err_vht_rx_extra_symbol_mismatch>
298 
299 			<enum 31 phyrx_err_vht_rx_skip_group_id0>
300 
301 			<enum 32 phyrx_err_vht_rx_skip_group_id1to62>
302 
303 			<enum 33 phyrx_err_vht_rx_skip_group_id63>
304 
305 			<enum 34 phyrx_err_ofdm_ldpc_decoder_disabled>
306 
307 			<enum 35 phyrx_err_defer_nap>
308 
309 			<enum 36 phyrx_err_fdomain_timeout>
310 
311 			<enum 37 phyrx_err_lsig_rel_check>
312 
313 			<enum 38 phyrx_err_bt_collision>
314 
315 			<enum 39 phyrx_err_unsupported_mu_feedback>
316 
317 			<enum 40 phyrx_err_ppdu_tx_interrupt_rx>
318 
319 			<enum 41 phyrx_err_unsupported_cbf>
320 
321 
322 
323 			<enum 42 phyrx_err_other>  Should not really be used. If
324 			needed, ask for documentation update
325 
326 
327 
328 			<enum 43 phyrx_err_he_siga_unsupported > <enum 44
329 			phyrx_err_he_crc_error > <enum 45
330 			phyrx_err_he_sigb_unsupported > <enum 46
331 			phyrx_err_he_mu_mode_unsupported > <enum 47
332 			phyrx_err_he_ndp_or_zlf > <enum 48 phyrx_err_he_nsym_lt_zero
333 			> <enum 49 phyrx_err_he_ru_params_unsupported > <enum 50
334 			phyrx_err_he_num_users_unsupported ><enum 51
335 			phyrx_err_he_sounding_params_unsupported >
336 
337 
338 
339 			<enum 52 phyrx_err_MU_UL_no_power_detected>
340 
341 
342 
343 
344 
345 
346 
347 			<legal 0 - 52>
348 */
349 #define PHYRX_ABORT_REQUEST_INFO_0_PHYRX_ABORT_REASON_OFFSET         0x00000000
350 #define PHYRX_ABORT_REQUEST_INFO_0_PHYRX_ABORT_REASON_LSB            0
351 #define PHYRX_ABORT_REQUEST_INFO_0_PHYRX_ABORT_REASON_MASK           0x000000ff
352 
353 /* Description		PHYRX_ABORT_REQUEST_INFO_0_PHY_ENTERS_NAP_STATE
354 
355 			When set, PHY enters PHY NAP state after sending this
356 			abort
357 
358 
359 
360 			Note that nap and defer state are mutually exclusive.
361 
362 
363 
364 			Field put pro-actively in place....usage still to be
365 			agreed upon.
366 
367 			<legal all>
368 */
369 #define PHYRX_ABORT_REQUEST_INFO_0_PHY_ENTERS_NAP_STATE_OFFSET       0x00000000
370 #define PHYRX_ABORT_REQUEST_INFO_0_PHY_ENTERS_NAP_STATE_LSB          8
371 #define PHYRX_ABORT_REQUEST_INFO_0_PHY_ENTERS_NAP_STATE_MASK         0x00000100
372 
373 /* Description		PHYRX_ABORT_REQUEST_INFO_0_PHY_ENTERS_DEFER_STATE
374 
375 			When set, PHY enters PHY defer state after sending this
376 			abort
377 
378 
379 
380 			Note that nap and defer state are mutually exclusive.
381 
382 
383 
384 			Field put pro-actively in place....usage still to be
385 			agreed upon.
386 
387 			<legal all>
388 */
389 #define PHYRX_ABORT_REQUEST_INFO_0_PHY_ENTERS_DEFER_STATE_OFFSET     0x00000000
390 #define PHYRX_ABORT_REQUEST_INFO_0_PHY_ENTERS_DEFER_STATE_LSB        9
391 #define PHYRX_ABORT_REQUEST_INFO_0_PHY_ENTERS_DEFER_STATE_MASK       0x00000200
392 
393 /* Description		PHYRX_ABORT_REQUEST_INFO_0_RESERVED_0
394 
395 			<legal 0>
396 */
397 #define PHYRX_ABORT_REQUEST_INFO_0_RESERVED_0_OFFSET                 0x00000000
398 #define PHYRX_ABORT_REQUEST_INFO_0_RESERVED_0_LSB                    10
399 #define PHYRX_ABORT_REQUEST_INFO_0_RESERVED_0_MASK                   0x0000fc00
400 
401 /* Description		PHYRX_ABORT_REQUEST_INFO_0_RECEIVE_DURATION
402 
403 			The remaining receive duration of this PPDU in the
404 			medium (in us). When PHY does not know this duration when
405 			this TLV is generated, the field will be set to 0.
406 
407 			The timing reference point is the reception by the MAC
408 			of this TLV. The value shall be accurate to within 2us.
409 
410 
411 
412 			In case Phy_enters_nap_state and/or
413 			Phy_enters_defer_state is set, there is a possibility that
414 			MAC PMM can also decide to go into a low(er) power state.
415 
416 			<legal all>
417 */
418 #define PHYRX_ABORT_REQUEST_INFO_0_RECEIVE_DURATION_OFFSET           0x00000000
419 #define PHYRX_ABORT_REQUEST_INFO_0_RECEIVE_DURATION_LSB              16
420 #define PHYRX_ABORT_REQUEST_INFO_0_RECEIVE_DURATION_MASK             0xffff0000
421 
422 
423 #endif // _PHYRX_ABORT_REQUEST_INFO_H_
424