1 /*
2  * Copyright (c) 2020 The Linux Foundation. All rights reserved.
3  *
4  * Permission to use, copy, modify, and/or distribute this software for any
5  * purpose with or without fee is hereby granted, provided that the above
6  * copyright notice and this permission notice appear in all copies.
7  *
8  * THE SOFTWARE IS PROVIDED "AS IS" AND THE AUTHOR DISCLAIMS ALL WARRANTIES
9  * WITH REGARD TO THIS SOFTWARE INCLUDING ALL IMPLIED WARRANTIES OF
10  * MERCHANTABILITY AND FITNESS. IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR
11  * ANY SPECIAL, DIRECT, INDIRECT, OR CONSEQUENTIAL DAMAGES OR ANY DAMAGES
12  * WHATSOEVER RESULTING FROM LOSS OF USE, DATA OR PROFITS, WHETHER IN AN
13  * ACTION OF CONTRACT, NEGLIGENCE OR OTHER TORTIOUS ACTION, ARISING OUT OF
14  * OR IN CONNECTION WITH THE USE OR PERFORMANCE OF THIS SOFTWARE.
15  */
16 
17 // $ATH_LICENSE_HW_HDR_C$
18 //
19 // DO NOT EDIT!  This file is automatically generated
20 //               These definitions are tied to a particular hardware layout
21 
22 
23 #ifndef _WBM_RELEASE_RING_H_
24 #define _WBM_RELEASE_RING_H_
25 #if !defined(__ASSEMBLER__)
26 #endif
27 
28 #include "buffer_addr_info.h"
29 #include "tx_rate_stats_info.h"
30 
31 // ################ START SUMMARY #################
32 //
33 //	Dword	Fields
34 //	0-1	struct buffer_addr_info released_buff_or_desc_addr_info;
35 //	2	release_source_module[2:0], bm_action[5:3], buffer_or_desc_type[8:6], first_msdu_index[12:9], tqm_release_reason[16:13], rxdma_push_reason[18:17], rxdma_error_code[23:19], reo_push_reason[25:24], reo_error_code[30:26], wbm_internal_error[31]
36 //	3	tqm_status_number[23:0], transmit_count[30:24], reserved_3a[31]
37 //	4	ack_frame_rssi[7:0], sw_release_details_valid[8], first_msdu[9], last_msdu[10], msdu_part_of_amsdu[11], fw_tx_notify_frame[12], buffer_timestamp[31:13]
38 //	5-6	struct tx_rate_stats_info tx_rate_stats;
39 //	7	sw_peer_id[15:0], tid[19:16], ring_id[27:20], looping_count[31:28]
40 //
41 // ################ END SUMMARY #################
42 
43 #define NUM_OF_DWORDS_WBM_RELEASE_RING 8
44 
45 struct wbm_release_ring {
46     struct            buffer_addr_info                       released_buff_or_desc_addr_info;
47              uint32_t release_source_module           :  3, //[2:0]
48                       bm_action                       :  3, //[5:3]
49                       buffer_or_desc_type             :  3, //[8:6]
50                       first_msdu_index                :  4, //[12:9]
51                       tqm_release_reason              :  4, //[16:13]
52                       rxdma_push_reason               :  2, //[18:17]
53                       rxdma_error_code                :  5, //[23:19]
54                       reo_push_reason                 :  2, //[25:24]
55                       reo_error_code                  :  5, //[30:26]
56                       wbm_internal_error              :  1; //[31]
57              uint32_t tqm_status_number               : 24, //[23:0]
58                       transmit_count                  :  7, //[30:24]
59                       reserved_3a                     :  1; //[31]
60              uint32_t ack_frame_rssi                  :  8, //[7:0]
61                       sw_release_details_valid        :  1, //[8]
62                       first_msdu                      :  1, //[9]
63                       last_msdu                       :  1, //[10]
64                       msdu_part_of_amsdu              :  1, //[11]
65                       fw_tx_notify_frame              :  1, //[12]
66                       buffer_timestamp                : 19; //[31:13]
67     struct            tx_rate_stats_info                       tx_rate_stats;
68              uint32_t sw_peer_id                      : 16, //[15:0]
69                       tid                             :  4, //[19:16]
70                       ring_id                         :  8, //[27:20]
71                       looping_count                   :  4; //[31:28]
72 };
73 
74 /*
75 
76 struct buffer_addr_info released_buff_or_desc_addr_info
77 
78 			Consumer: WBM/SW/FW
79 
80 			Producer: SW/TQM/RXDMA/REO/SWITCH
81 
82 
83 
84 			Details of the physical address of the buffer or link
85 			descriptor that is being released. Note that within this
86 			descriptor, WBM will look at the 'owner' of the released
87 			buffer/descriptor and forward it to SW/FW is WBM is not the
88 			owner.
89 
90 release_source_module
91 
92 			Indicates which module initiated the release of this
93 			buffer or descriptor
94 
95 
96 
97 			<enum 0 release_source_TQM> TQM released this buffer or
98 			descriptor
99 
100 			<enum 1 release_source_RXDMA> RXDMA released this buffer
101 			or descriptor
102 
103 			<enum 2 release_source_REO> REO released this buffer or
104 			descriptor
105 
106 			<enum 3 release_source_FW> FW released this buffer or
107 			descriptor
108 
109 			<enum 4 release_source_SW> SW released this buffer or
110 			descriptor
111 
112 			<legal 0-4>
113 
114 bm_action
115 
116 			Consumer: WBM/SW/FW
117 
118 			Producer: SW/TQM/RXDMA/REO/SWITCH
119 
120 
121 
122 			Field only valid when the field return_buffer_manager in
123 			the Released_buff_or_desc_addr_info indicates:
124 
125 			WBM_IDLE_BUF_LIST or
126 
127 			WBM_IDLE_DESC_LIST
128 
129 
130 
131 			An MSDU extension descriptor shall never be marked as
132 
133 
134 
135 			<enum 0 Put_in_idle_list> Put the buffer or descriptor
136 			back in the idle list. In case of MSDU or MDPU link
137 			descriptor, BM does not need to check to release any
138 			individual MSDU buffers
139 
140 
141 
142 			<enum 1 release_msdu_list > This BM action can only be
143 			used in combination with buffer_or_desc_type being
144 			msdu_link_descriptor. Field first_msdu_index points out
145 			which MSDU pointer in the MSDU link descriptor is the first
146 			of an MPDU that is released.
147 
148 			BM shall release all the MSDU buffers linked to this
149 			first MSDU buffer pointer. All related MSDU buffer pointer
150 			entries shall be set to value 0, which represents the 'NULL
151 			pointer. When all MSDU buffer pointers in the MSDU link
152 			descriptor are 'NULL', the MSDU link descriptor itself shall
153 			also be released.
154 
155 
156 
157 			<enum 2 Put_in_idle_list_expanded> CURRENTLY NOT
158 			IMPLEMENTED....
159 
160 			Put the buffer or descriptor back in the idle list. Only
161 			valid in combination with buffer_or_desc_type indicating
162 			MDPU_link_descriptor.
163 
164 			BM shall release the MPDU link descriptor as well as all
165 			MSDUs that are linked to the MPDUs in this descriptor.
166 
167 
168 
169 			<legal 0-2>
170 
171 buffer_or_desc_type
172 
173 			Consumer: WBM/SW/FW
174 
175 			Producer: SW/TQM/RXDMA/REO/SWITCH
176 
177 
178 
179 			Field only valid when WBM is marked as the
180 			return_buffer_manager in the Released_Buffer_address_info
181 
182 
183 
184 			Indicates that type of buffer or descriptor is being
185 			released
186 
187 
188 
189 			<enum 0 MSDU_rel_buffer> The address points to an MSDU
190 			buffer
191 
192 			<enum 1 msdu_link_descriptor> The address points to an
193 			TX MSDU link descriptor
194 
195 			<enum 2 mpdu_link_descriptor> The address points to an
196 			MPDU link descriptor
197 
198 			<enum 3 msdu_ext_descriptor > The address points to an
199 			MSDU extension descriptor.
200 
201 			In case BM finds this one in a release ring, it passes
202 			it on to FW...
203 
204 			<enum 4 queue_ext_descriptor> The address points to an
205 			TQM queue extension descriptor. WBM should treat this is the
206 			same way as a link descriptor. That is, put the 128 byte
207 			buffer back in the link buffer idle list.
208 
209 
210 
211 			<legal 0-4>
212 
213 first_msdu_index
214 
215 			Consumer: WBM/SW/FW
216 
217 			Producer: SW/TQM/RXDMA/REO/SWITCH
218 
219 
220 
221 			Field only valid for the bm_action release_msdu_list.
222 
223 
224 
225 			The index of the first MSDU in an MSDU link descriptor
226 			all belonging to the same MPDU.
227 
228 
229 
230 			<legal 0-6>
231 
232 tqm_release_reason
233 
234 			Consumer: WBM/SW/FW
235 
236 			Producer: TQM
237 
238 
239 
240 			Field only valid when Release_source_module is set to
241 			release_source_TQM
242 
243 
244 
245 			(rr = Release Reason)
246 
247 			<enum 0 tqm_rr_frame_acked> frame is removed because an
248 			ACK of BA for it was received
249 
250 			<enum 1 tqm_rr_rem_cmd_rem> frame is removed because a
251 			remove command of type Remove_mpdus initiated by SW
252 
253 			<enum 2 tqm_rr_rem_cmd_tx> frame is removed because a
254 			remove command of type Remove_transmitted_mpdus initiated by
255 			SW
256 
257 			<enum 3 tqm_rr_rem_cmd_notx> frame is removed because a
258 			remove command of type Remove_untransmitted_mpdus initiated
259 			by SW
260 
261 			<enum 4 tqm_rr_rem_cmd_aged> frame is removed because a
262 			remove command of type Remove_aged_mpdus or
263 			Remove_aged_msdus initiated by SW
264 
265 			<enum 5 tqm_fw_reason1> frame is removed because a
266 			remove command where fw indicated that remove reason is
267 			fw_reason1
268 
269 			<enum 6 tqm_fw_reason2> frame is removed because a
270 			remove command where fw indicated that remove reason is
271 			fw_reason1
272 
273 			<enum 7 tqm_fw_reason3> frame is removed because a
274 			remove command where fw indicated that remove reason is
275 			fw_reason1
276 
277 			<enum 8 tqm_rr_rem_cmd_disable_queue> frame is removed
278 			because a remove command of type
279 			remove_mpdus_and_disable_queue or
280 			remove_msdus_and_disable_flow initiated by SW
281 
282 
283 
284 			<legal 0-8>
285 
286 rxdma_push_reason
287 
288 			Field only valid when Release_source_module is set to
289 			release_source_RXDMA
290 
291 
292 
293 			Indicates why rxdma pushed the frame to this ring
294 
295 
296 
297 			<enum 0 rxdma_error_detected> RXDMA detected an error an
298 			pushed this frame to this queue
299 
300 			<enum 1 rxdma_routing_instruction> RXDMA pushed the
301 			frame to this queue per received routing instructions. No
302 			error within RXDMA was detected
303 
304 			<enum 2 rxdma_rx_flush> RXDMA received an RX_FLUSH. As a
305 			result the MSDU link descriptor might not have the
306 			last_msdu_in_mpdu_flag set, but instead WBM might just see a
307 			NULL pointer in the MSDU link descriptor. This is to be
308 			considered a normal condition for this scenario.
309 
310 
311 
312 			<legal 0 - 2>
313 
314 rxdma_error_code
315 
316 			Field only valid when 'rxdma_push_reason' set to
317 			'rxdma_error_detected'.
318 
319 
320 
321 			<enum 0 rxdma_overflow_err>MPDU frame is not complete
322 			due to a FIFO overflow error in RXPCU.
323 
324 			<enum 1 rxdma_mpdu_length_err>MPDU frame is not complete
325 			due to receiving incomplete MPDU from the PHY
326 
327 
328 			<enum 3 rxdma_decrypt_err>CRYPTO reported a decryption
329 			error or CRYPTO received an encrypted frame, but did not get
330 			a valid corresponding key id in the peer entry.
331 
332 			<enum 4 rxdma_tkip_mic_err>CRYPTO reported a TKIP MIC
333 			error
334 
335 			<enum 5 rxdma_unecrypted_err>CRYPTO reported an
336 			unencrypted frame error when encrypted was expected
337 
338 			<enum 6 rxdma_msdu_len_err>RX OLE reported an MSDU
339 			length error
340 
341 			<enum 7 rxdma_msdu_limit_err>RX OLE reported that max
342 			number of MSDUs allowed in an MPDU got exceeded
343 
344 			<enum 8 rxdma_wifi_parse_err>RX OLE reported a parsing
345 			error
346 
347 			<enum 9 rxdma_amsdu_parse_err>RX OLE reported an A-MSDU
348 			parsing error
349 
350 			<enum 10 rxdma_sa_timeout_err>RX OLE reported a timeout
351 			during SA search
352 
353 			<enum 11 rxdma_da_timeout_err>RX OLE reported a timeout
354 			during DA search
355 
356 			<enum 12 rxdma_flow_timeout_err>RX OLE reported a
357 			timeout during flow search
358 
359 			<enum 13 Rxdma_flush_request>RXDMA received a flush
360 			request
361 
362 reo_push_reason
363 
364 			Field only valid when Release_source_module is set to
365 			release_source_REO
366 
367 
368 
369 			Indicates why REO pushed the frame to this release ring
370 
371 
372 
373 			<enum 0 reo_error_detected> Reo detected an error an
374 			pushed this frame to this queue
375 
376 			<enum 1 reo_routing_instruction> Reo pushed the frame to
377 			this queue per received routing instructions. No error
378 			within REO was detected
379 
380 
381 
382 			<legal 0 - 1>
383 
384 reo_error_code
385 
386 			Field only valid when 'Reo_push_reason' set to
387 			'reo_error_detected'.
388 
389 
390 
391 			<enum 0 reo_queue_desc_addr_zero> Reo queue descriptor
392 			provided in the REO_ENTRANCE ring is set to 0
393 
394 			<enum 1 reo_queue_desc_not_valid> Reo queue descriptor
395 			valid bit is NOT set
396 
397 			<enum 2 ampdu_in_non_ba> AMPDU frame received without BA
398 			session having been setup.
399 
400 			<enum 3 non_ba_duplicate> Non-BA session, SN equal to
401 			SSN, Retry bit set: duplicate frame
402 
403 			<enum 4 ba_duplicate> BA session, duplicate frame
404 
405 			<enum 5 regular_frame_2k_jump> A normal (management/data
406 			frame) received with 2K jump in SN
407 
408 			<enum 6 bar_frame_2k_jump> A bar received with 2K jump
409 			in SSN
410 
411 			<enum 7 regular_frame_OOR> A normal (management/data
412 			frame) received with SN falling within the OOR window
413 
414 			<enum 8 bar_frame_OOR> A bar received with SSN falling
415 			within the OOR window
416 
417 			<enum 9 bar_frame_no_ba_session> A bar received without
418 			a BA session
419 
420 			<enum 10 bar_frame_sn_equals_ssn> A bar received with
421 			SSN equal to SN
422 
423 			<enum 11 pn_check_failed> PN Check Failed packet.
424 
425 			<enum 12 2k_error_handling_flag_set> Frame is forwarded
426 			as a result of the 'Seq_2k_error_detected_flag' been set in
427 			the REO Queue descriptor
428 
429 			<enum 13 pn_error_handling_flag_set> Frame is forwarded
430 			as a result of the 'pn_error_detected_flag' been set in the
431 			REO Queue descriptor
432 
433 			<enum 14 queue_descriptor_blocked_set> Frame is
434 			forwarded as a result of the queue descriptor(address) being
435 			blocked as SW/FW seems to be currently in the process of
436 			making updates to this descriptor...
437 
438 
439 
440 			<legal 0-14>
441 
442 wbm_internal_error
443 
444 			Can only be set by WBM.
445 
446 
447 
448 			Is set when WBM got a buffer pointer but the action was
449 			to push it to the idle link descriptor ring or do link
450 			related activity
451 
452 			OR
453 
454 			Is set when WBM got a link buffer pointer but the action
455 			was to push it to the buffer  descriptor ring
456 
457 
458 
459 			<legal all>
460 
461 tqm_status_number
462 
463 			Field only valid when Release_source_module is set to
464 			release_source_TQM
465 
466 
467 
468 			The value in this field is equal to value of the
469 			'TQM_CMD_Number' field the TQM command or the
470 			'TQM_add_cmd_Number' field from the TQM entrance ring
471 			descriptor
472 
473 
474 
475 			This field helps to correlate the statuses with the TQM
476 			commands.
477 
478 
479 
480 			NOTE that SW could program this number to be equal to
481 			the PPDU_ID number in case direct correlation with the PPDU
482 			ID is desired
483 
484 
485 
486 			<legal all>
487 
488 transmit_count
489 
490 			Field only valid when Release_source_module is set to
491 			release_source_TQM
492 
493 
494 
495 			The number of times this frame has been transmitted
496 
497 reserved_3a
498 
499 			<legal 0>
500 
501 ack_frame_rssi
502 
503 			This field is only valid when the source is TQM.
504 
505 
506 
507 			If this frame is removed as the result of the reception
508 			of an ACK or BA, this field indicates the RSSI of the
509 			received ACK or BA frame.
510 
511 
512 
513 			When the frame is removed as result of a direct remove
514 			command from the SW,  this field is set to 0x0 (which is
515 			never a valid value when real RSSI is available)
516 
517 
518 
519 			<legal all>
520 
521 sw_release_details_valid
522 
523 			Consumer: SW
524 
525 			Producer: WBM
526 
527 
528 
529 			When set, some WBM specific release info for SW is
530 			valid.
531 
532 			This is set when WMB got a 'release_msdu_list' command
533 			from TQM and the return buffer manager is not WMB. WBM will
534 			then de-aggregate all the MSDUs and pass them one at a time
535 			on to the 'buffer owner'
536 
537 
538 
539 			<legal all>
540 
541 first_msdu
542 
543 			Field only valid when SW_release_details_valid is set.
544 
545 
546 
547 			Consumer: SW
548 
549 			Producer: WBM
550 
551 
552 
553 			When set, this MSDU is the first MSDU pointed to in the
554 			'release_msdu_list' command.
555 
556 
557 
558 			<legal all>
559 
560 last_msdu
561 
562 			Field only valid when SW_release_details_valid is set.
563 
564 
565 
566 			Consumer: SW
567 
568 			Producer: WBM
569 
570 
571 
572 			When set, this MSDU is the last MSDU pointed to in the
573 			'release_msdu_list' command.
574 
575 
576 
577 			<legal all>
578 
579 msdu_part_of_amsdu
580 
581 			Field only valid when SW_release_details_valid is set.
582 
583 
584 
585 			Consumer: SW
586 
587 			Producer: WBM
588 
589 
590 
591 			When set, this MSDU was part of an A-MSDU in MPDU
592 
593 			<legal all>
594 
595 fw_tx_notify_frame
596 
597 			Field only valid when SW_release_details_valid is set.
598 
599 
600 
601 			Consumer: SW
602 
603 			Producer: WBM
604 
605 
606 
607 			This is the FW_tx_notify_frame field from the
608 
609 			<legal all>
610 
611 buffer_timestamp
612 
613 			Field only valid when SW_release_details_valid is set.
614 
615 
616 
617 			Consumer: SW
618 
619 			Producer: WBM
620 
621 
622 
623 			This is the Buffer_timestamp field from the
624 
625 
626 
627 			Timestamp in units of 1024 us
628 
629 			<legal all>
630 
631 struct tx_rate_stats_info tx_rate_stats
632 
633 			Consumer: TQM
634 
635 			Producer: SW/SCH(from TXPCU, PDG)
636 
637 
638 
639 			Details for command execution tracking purposes.
640 
641 sw_peer_id
642 
643 			Field only valid when Release_source_module is set to
644 			release_source_TQM
645 
646 
647 
648 			1) Release of msdu buffer due to drop_frame = 1. Flow is
649 			not fetched and hence sw_peer_id and tid = 0
650 
651 			buffer_or_desc_type = e_num 0
652 			MSDU_rel_buffertqm_release_reason = e_num 1
653 			tqm_rr_rem_cmd_rem
654 
655 
656 
657 
658 
659 			2) Release of msdu buffer due to Flow is not fetched and
660 			hence sw_peer_id and tid = 0
661 
662 			buffer_or_desc_type = e_num 0
663 			MSDU_rel_buffertqm_release_reason = e_num 1
664 			tqm_rr_rem_cmd_rem
665 
666 
667 
668 
669 
670 			3) Release of msdu link due to remove_mpdu or acked_mpdu
671 			command.
672 
673 			buffer_or_desc_type = e_num1
674 			msdu_link_descriptortqm_release_reason can be:e_num 1
675 			tqm_rr_rem_cmd_reme_num 2 tqm_rr_rem_cmd_tx
676 
677 			e_num 3 tqm_rr_rem_cmd_notxe_num 4 tqm_rr_rem_cmd_aged
678 
679 
680 
681 			Sw_peer_id from the TX_MSDU_FLOW descriptor or
682 			TX_MPDU_QUEUE descriptor
683 
684 			<legal all>
685 
686 tid
687 
688 			Field only valid when Release_source_module is set to
689 			release_source_TQM
690 
691 
692 
693 			1) Release of msdu buffer due to drop_frame = 1. Flow is
694 			not fetched and hence sw_peer_id and tid = 0
695 
696 			buffer_or_desc_type = e_num 0
697 			MSDU_rel_buffertqm_release_reason = e_num 1
698 			tqm_rr_rem_cmd_rem
699 
700 
701 
702 
703 
704 			2) Release of msdu buffer due to Flow is not fetched and
705 			hence sw_peer_id and tid = 0
706 
707 			buffer_or_desc_type = e_num 0
708 			MSDU_rel_buffertqm_release_reason = e_num 1
709 			tqm_rr_rem_cmd_rem
710 
711 
712 
713 
714 
715 			3) Release of msdu link due to remove_mpdu or acked_mpdu
716 			command.
717 
718 			buffer_or_desc_type = e_num1
719 			msdu_link_descriptortqm_release_reason can be:e_num 1
720 			tqm_rr_rem_cmd_reme_num 2 tqm_rr_rem_cmd_tx
721 
722 			e_num 3 tqm_rr_rem_cmd_notxe_num 4 tqm_rr_rem_cmd_aged
723 
724 
725 
726 
727 
728 			This field represents the TID from the TX_MSDU_FLOW
729 			descriptor or TX_MPDU_QUEUE descriptor
730 
731 
732 
733 			 <legal all>
734 
735 ring_id
736 
737 			Consumer: TQM/REO/RXDMA/SW
738 
739 			Producer: SRNG (of RXDMA)
740 
741 
742 
743 			For debugging.
744 
745 			This field is filled in by the SRNG module.
746 
747 			It help to identify the ring that is being looked <legal
748 			all>
749 
750 looping_count
751 
752 			Consumer: WBM/SW/FW
753 
754 			Producer: SW/TQM/RXDMA/REO/SWITCH
755 
756 
757 
758 			A count value that indicates the number of times the
759 			producer of entries into the Buffer Manager Ring has looped
760 			around the ring.
761 
762 			At initialization time, this value is set to 0. On the
763 			first loop, this value is set to 1. After the max value is
764 			reached allowed by the number of bits for this field, the
765 			count value continues with 0 again.
766 
767 
768 
769 			In case SW is the consumer of the ring entries, it can
770 			use this field to figure out up to where the producer of
771 			entries has created new entries. This eliminates the need to
772 			check where the head pointer' of the ring is located once
773 			the SW starts processing an interrupt indicating that new
774 			entries have been put into this ring...
775 
776 
777 
778 			Also note that SW if it wants only needs to look at the
779 			LSB bit of this count value.
780 
781 			<legal all>
782 */
783 
784 
785  /* EXTERNAL REFERENCE : struct buffer_addr_info released_buff_or_desc_addr_info */
786 
787 
788 /* Description		WBM_RELEASE_RING_0_RELEASED_BUFF_OR_DESC_ADDR_INFO_BUFFER_ADDR_31_0
789 
790 			Address (lower 32 bits) of the MSDU buffer OR
791 			MSDU_EXTENSION descriptor OR Link Descriptor
792 
793 
794 
795 			In case of 'NULL' pointer, this field is set to 0
796 
797 			<legal all>
798 */
799 #define WBM_RELEASE_RING_0_RELEASED_BUFF_OR_DESC_ADDR_INFO_BUFFER_ADDR_31_0_OFFSET 0x00000000
800 #define WBM_RELEASE_RING_0_RELEASED_BUFF_OR_DESC_ADDR_INFO_BUFFER_ADDR_31_0_LSB 0
801 #define WBM_RELEASE_RING_0_RELEASED_BUFF_OR_DESC_ADDR_INFO_BUFFER_ADDR_31_0_MASK 0xffffffff
802 
803 /* Description		WBM_RELEASE_RING_1_RELEASED_BUFF_OR_DESC_ADDR_INFO_BUFFER_ADDR_39_32
804 
805 			Address (upper 8 bits) of the MSDU buffer OR
806 			MSDU_EXTENSION descriptor OR Link Descriptor
807 
808 
809 
810 			In case of 'NULL' pointer, this field is set to 0
811 
812 			<legal all>
813 */
814 #define WBM_RELEASE_RING_1_RELEASED_BUFF_OR_DESC_ADDR_INFO_BUFFER_ADDR_39_32_OFFSET 0x00000004
815 #define WBM_RELEASE_RING_1_RELEASED_BUFF_OR_DESC_ADDR_INFO_BUFFER_ADDR_39_32_LSB 0
816 #define WBM_RELEASE_RING_1_RELEASED_BUFF_OR_DESC_ADDR_INFO_BUFFER_ADDR_39_32_MASK 0x000000ff
817 
818 /* Description		WBM_RELEASE_RING_1_RELEASED_BUFF_OR_DESC_ADDR_INFO_RETURN_BUFFER_MANAGER
819 
820 			Consumer: WBM
821 
822 			Producer: SW/FW
823 
824 
825 
826 			In case of 'NULL' pointer, this field is set to 0
827 
828 
829 
830 			Indicates to which buffer manager the buffer OR
831 			MSDU_EXTENSION descriptor OR link descriptor that is being
832 			pointed to shall be returned after the frame has been
833 			processed. It is used by WBM for routing purposes.
834 
835 
836 
837 			<enum 0 WBM_IDLE_BUF_LIST> This buffer shall be returned
838 			to the WMB buffer idle list
839 
840 			<enum 1 WBM_IDLE_DESC_LIST> This buffer shall be
841 			returned to the WMB idle link descriptor idle list
842 
843 			<enum 2 FW_BM> This buffer shall be returned to the FW
844 
845 			<enum 3 SW0_BM> This buffer shall be returned to the SW,
846 			ring 0
847 
848 			<enum 4 SW1_BM> This buffer shall be returned to the SW,
849 			ring 1
850 
851 			<enum 5 SW2_BM> This buffer shall be returned to the SW,
852 			ring 2
853 
854 			<enum 6 SW3_BM> This buffer shall be returned to the SW,
855 			ring 3
856 
857 			<enum 7 SW4_BM> This buffer shall be returned to the SW,
858 			ring 3
859 
860 
861 
862 			<legal all>
863 */
864 #define WBM_RELEASE_RING_1_RELEASED_BUFF_OR_DESC_ADDR_INFO_RETURN_BUFFER_MANAGER_OFFSET 0x00000004
865 #define WBM_RELEASE_RING_1_RELEASED_BUFF_OR_DESC_ADDR_INFO_RETURN_BUFFER_MANAGER_LSB 8
866 #define WBM_RELEASE_RING_1_RELEASED_BUFF_OR_DESC_ADDR_INFO_RETURN_BUFFER_MANAGER_MASK 0x00000700
867 
868 /* Description		WBM_RELEASE_RING_1_RELEASED_BUFF_OR_DESC_ADDR_INFO_SW_BUFFER_COOKIE
869 
870 			Cookie field exclusively used by SW.
871 
872 
873 
874 			In case of 'NULL' pointer, this field is set to 0
875 
876 
877 
878 			HW ignores the contents, accept that it passes the
879 			programmed value on to other descriptors together with the
880 			physical address
881 
882 
883 
884 			Field can be used by SW to for example associate the
885 			buffers physical address with the virtual address
886 
887 			The bit definitions as used by SW are within SW HLD
888 			specification
889 
890 
891 
892 			NOTE:
893 
894 			The three most significant bits can have a special
895 			meaning in case this struct is embedded in a TX_MPDU_DETAILS
896 			STRUCT, and field transmit_bw_restriction is set
897 
898 
899 
900 			In case of NON punctured transmission:
901 
902 			Sw_buffer_cookie[20:19] = 2'b00: 20 MHz TX only
903 
904 			Sw_buffer_cookie[20:19] = 2'b01: 40 MHz TX only
905 
906 			Sw_buffer_cookie[20:19] = 2'b10: 80 MHz TX only
907 
908 			Sw_buffer_cookie[20:19] = 2'b11: 160 MHz TX only
909 
910 
911 
912 			In case of punctured transmission:
913 
914 			Sw_buffer_cookie[20:18] = 3'b000: pattern 0 only
915 
916 			Sw_buffer_cookie[20:18] = 3'b001: pattern 1 only
917 
918 			Sw_buffer_cookie[20:18] = 3'b010: pattern 2 only
919 
920 			Sw_buffer_cookie[20:18] = 3'b011: pattern 3 only
921 
922 			Sw_buffer_cookie[20:18] = 3'b100: pattern 4 only
923 
924 			Sw_buffer_cookie[20:18] = 3'b101: pattern 5 only
925 
926 			Sw_buffer_cookie[20:18] = 3'b110: pattern 6 only
927 
928 			Sw_buffer_cookie[20:18] = 3'b111: pattern 7 only
929 
930 
931 
932 			Note: a punctured transmission is indicated by the
933 			presence of TLV TX_PUNCTURE_SETUP embedded in the scheduler
934 			TLV
935 
936 
937 
938 			<legal all>
939 */
940 #define WBM_RELEASE_RING_1_RELEASED_BUFF_OR_DESC_ADDR_INFO_SW_BUFFER_COOKIE_OFFSET 0x00000004
941 #define WBM_RELEASE_RING_1_RELEASED_BUFF_OR_DESC_ADDR_INFO_SW_BUFFER_COOKIE_LSB 11
942 #define WBM_RELEASE_RING_1_RELEASED_BUFF_OR_DESC_ADDR_INFO_SW_BUFFER_COOKIE_MASK 0xfffff800
943 
944 /* Description		WBM_RELEASE_RING_2_RELEASE_SOURCE_MODULE
945 
946 			Indicates which module initiated the release of this
947 			buffer or descriptor
948 
949 
950 
951 			<enum 0 release_source_TQM> TQM released this buffer or
952 			descriptor
953 
954 			<enum 1 release_source_RXDMA> RXDMA released this buffer
955 			or descriptor
956 
957 			<enum 2 release_source_REO> REO released this buffer or
958 			descriptor
959 
960 			<enum 3 release_source_FW> FW released this buffer or
961 			descriptor
962 
963 			<enum 4 release_source_SW> SW released this buffer or
964 			descriptor
965 
966 			<legal 0-4>
967 */
968 #define WBM_RELEASE_RING_2_RELEASE_SOURCE_MODULE_OFFSET              0x00000008
969 #define WBM_RELEASE_RING_2_RELEASE_SOURCE_MODULE_LSB                 0
970 #define WBM_RELEASE_RING_2_RELEASE_SOURCE_MODULE_MASK                0x00000007
971 
972 /* Description		WBM_RELEASE_RING_2_BM_ACTION
973 
974 			Consumer: WBM/SW/FW
975 
976 			Producer: SW/TQM/RXDMA/REO/SWITCH
977 
978 
979 
980 			Field only valid when the field return_buffer_manager in
981 			the Released_buff_or_desc_addr_info indicates:
982 
983 			WBM_IDLE_BUF_LIST or
984 
985 			WBM_IDLE_DESC_LIST
986 
987 
988 
989 			An MSDU extension descriptor shall never be marked as
990 
991 
992 
993 			<enum 0 Put_in_idle_list> Put the buffer or descriptor
994 			back in the idle list. In case of MSDU or MDPU link
995 			descriptor, BM does not need to check to release any
996 			individual MSDU buffers
997 
998 
999 
1000 			<enum 1 release_msdu_list > This BM action can only be
1001 			used in combination with buffer_or_desc_type being
1002 			msdu_link_descriptor. Field first_msdu_index points out
1003 			which MSDU pointer in the MSDU link descriptor is the first
1004 			of an MPDU that is released.
1005 
1006 			BM shall release all the MSDU buffers linked to this
1007 			first MSDU buffer pointer. All related MSDU buffer pointer
1008 			entries shall be set to value 0, which represents the 'NULL
1009 			pointer. When all MSDU buffer pointers in the MSDU link
1010 			descriptor are 'NULL', the MSDU link descriptor itself shall
1011 			also be released.
1012 
1013 
1014 
1015 			<enum 2 Put_in_idle_list_expanded> CURRENTLY NOT
1016 			IMPLEMENTED....
1017 
1018 			Put the buffer or descriptor back in the idle list. Only
1019 			valid in combination with buffer_or_desc_type indicating
1020 			MDPU_link_descriptor.
1021 
1022 			BM shall release the MPDU link descriptor as well as all
1023 			MSDUs that are linked to the MPDUs in this descriptor.
1024 
1025 
1026 
1027 			<legal 0-2>
1028 */
1029 #define WBM_RELEASE_RING_2_BM_ACTION_OFFSET                          0x00000008
1030 #define WBM_RELEASE_RING_2_BM_ACTION_LSB                             3
1031 #define WBM_RELEASE_RING_2_BM_ACTION_MASK                            0x00000038
1032 
1033 /* Description		WBM_RELEASE_RING_2_BUFFER_OR_DESC_TYPE
1034 
1035 			Consumer: WBM/SW/FW
1036 
1037 			Producer: SW/TQM/RXDMA/REO/SWITCH
1038 
1039 
1040 
1041 			Field only valid when WBM is marked as the
1042 			return_buffer_manager in the Released_Buffer_address_info
1043 
1044 
1045 
1046 			Indicates that type of buffer or descriptor is being
1047 			released
1048 
1049 
1050 
1051 			<enum 0 MSDU_rel_buffer> The address points to an MSDU
1052 			buffer
1053 
1054 			<enum 1 msdu_link_descriptor> The address points to an
1055 			TX MSDU link descriptor
1056 
1057 			<enum 2 mpdu_link_descriptor> The address points to an
1058 			MPDU link descriptor
1059 
1060 			<enum 3 msdu_ext_descriptor > The address points to an
1061 			MSDU extension descriptor.
1062 
1063 			In case BM finds this one in a release ring, it passes
1064 			it on to FW...
1065 
1066 			<enum 4 queue_ext_descriptor> The address points to an
1067 			TQM queue extension descriptor. WBM should treat this is the
1068 			same way as a link descriptor. That is, put the 128 byte
1069 			buffer back in the link buffer idle list.
1070 
1071 
1072 
1073 			<legal 0-4>
1074 */
1075 #define WBM_RELEASE_RING_2_BUFFER_OR_DESC_TYPE_OFFSET                0x00000008
1076 #define WBM_RELEASE_RING_2_BUFFER_OR_DESC_TYPE_LSB                   6
1077 #define WBM_RELEASE_RING_2_BUFFER_OR_DESC_TYPE_MASK                  0x000001c0
1078 
1079 /* Description		WBM_RELEASE_RING_2_FIRST_MSDU_INDEX
1080 
1081 			Consumer: WBM/SW/FW
1082 
1083 			Producer: SW/TQM/RXDMA/REO/SWITCH
1084 
1085 
1086 
1087 			Field only valid for the bm_action release_msdu_list.
1088 
1089 
1090 
1091 			The index of the first MSDU in an MSDU link descriptor
1092 			all belonging to the same MPDU.
1093 
1094 
1095 
1096 			<legal 0-6>
1097 */
1098 #define WBM_RELEASE_RING_2_FIRST_MSDU_INDEX_OFFSET                   0x00000008
1099 #define WBM_RELEASE_RING_2_FIRST_MSDU_INDEX_LSB                      9
1100 #define WBM_RELEASE_RING_2_FIRST_MSDU_INDEX_MASK                     0x00001e00
1101 
1102 /* Description		WBM_RELEASE_RING_2_TQM_RELEASE_REASON
1103 
1104 			Consumer: WBM/SW/FW
1105 
1106 			Producer: TQM
1107 
1108 
1109 
1110 			Field only valid when Release_source_module is set to
1111 			release_source_TQM
1112 
1113 
1114 
1115 			(rr = Release Reason)
1116 
1117 			<enum 0 tqm_rr_frame_acked> frame is removed because an
1118 			ACK of BA for it was received
1119 
1120 			<enum 1 tqm_rr_rem_cmd_rem> frame is removed because a
1121 			remove command of type Remove_mpdus initiated by SW
1122 
1123 			<enum 2 tqm_rr_rem_cmd_tx> frame is removed because a
1124 			remove command of type Remove_transmitted_mpdus initiated by
1125 			SW
1126 
1127 			<enum 3 tqm_rr_rem_cmd_notx> frame is removed because a
1128 			remove command of type Remove_untransmitted_mpdus initiated
1129 			by SW
1130 
1131 			<enum 4 tqm_rr_rem_cmd_aged> frame is removed because a
1132 			remove command of type Remove_aged_mpdus or
1133 			Remove_aged_msdus initiated by SW
1134 
1135 			<enum 5 tqm_fw_reason1> frame is removed because a
1136 			remove command where fw indicated that remove reason is
1137 			fw_reason1
1138 
1139 			<enum 6 tqm_fw_reason2> frame is removed because a
1140 			remove command where fw indicated that remove reason is
1141 			fw_reason1
1142 
1143 			<enum 7 tqm_fw_reason3> frame is removed because a
1144 			remove command where fw indicated that remove reason is
1145 			fw_reason1
1146 
1147 			<enum 8 tqm_rr_rem_cmd_disable_queue> frame is removed
1148 			because a remove command of type
1149 			remove_mpdus_and_disable_queue or
1150 			remove_msdus_and_disable_flow initiated by SW
1151 
1152 
1153 
1154 			<legal 0-8>
1155 */
1156 #define WBM_RELEASE_RING_2_TQM_RELEASE_REASON_OFFSET                 0x00000008
1157 #define WBM_RELEASE_RING_2_TQM_RELEASE_REASON_LSB                    13
1158 #define WBM_RELEASE_RING_2_TQM_RELEASE_REASON_MASK                   0x0001e000
1159 
1160 /* Description		WBM_RELEASE_RING_2_RXDMA_PUSH_REASON
1161 
1162 			Field only valid when Release_source_module is set to
1163 			release_source_RXDMA
1164 
1165 
1166 
1167 			Indicates why rxdma pushed the frame to this ring
1168 
1169 
1170 
1171 			<enum 0 rxdma_error_detected> RXDMA detected an error an
1172 			pushed this frame to this queue
1173 
1174 			<enum 1 rxdma_routing_instruction> RXDMA pushed the
1175 			frame to this queue per received routing instructions. No
1176 			error within RXDMA was detected
1177 
1178 			<enum 2 rxdma_rx_flush> RXDMA received an RX_FLUSH. As a
1179 			result the MSDU link descriptor might not have the
1180 			last_msdu_in_mpdu_flag set, but instead WBM might just see a
1181 			NULL pointer in the MSDU link descriptor. This is to be
1182 			considered a normal condition for this scenario.
1183 
1184 
1185 
1186 			<legal 0 - 2>
1187 */
1188 #define WBM_RELEASE_RING_2_RXDMA_PUSH_REASON_OFFSET                  0x00000008
1189 #define WBM_RELEASE_RING_2_RXDMA_PUSH_REASON_LSB                     17
1190 #define WBM_RELEASE_RING_2_RXDMA_PUSH_REASON_MASK                    0x00060000
1191 
1192 /* Description		WBM_RELEASE_RING_2_RXDMA_ERROR_CODE
1193 
1194 			Field only valid when 'rxdma_push_reason' set to
1195 			'rxdma_error_detected'.
1196 
1197 
1198 
1199 			<enum 0 rxdma_overflow_err>MPDU frame is not complete
1200 			due to a FIFO overflow error in RXPCU.
1201 
1202 			<enum 1 rxdma_mpdu_length_err>MPDU frame is not complete
1203 			due to receiving incomplete MPDU from the PHY
1204 
1205 
1206 			<enum 3 rxdma_decrypt_err>CRYPTO reported a decryption
1207 			error or CRYPTO received an encrypted frame, but did not get
1208 			a valid corresponding key id in the peer entry.
1209 
1210 			<enum 4 rxdma_tkip_mic_err>CRYPTO reported a TKIP MIC
1211 			error
1212 
1213 			<enum 5 rxdma_unecrypted_err>CRYPTO reported an
1214 			unencrypted frame error when encrypted was expected
1215 
1216 			<enum 6 rxdma_msdu_len_err>RX OLE reported an MSDU
1217 			length error
1218 
1219 			<enum 7 rxdma_msdu_limit_err>RX OLE reported that max
1220 			number of MSDUs allowed in an MPDU got exceeded
1221 
1222 			<enum 8 rxdma_wifi_parse_err>RX OLE reported a parsing
1223 			error
1224 
1225 			<enum 9 rxdma_amsdu_parse_err>RX OLE reported an A-MSDU
1226 			parsing error
1227 
1228 			<enum 10 rxdma_sa_timeout_err>RX OLE reported a timeout
1229 			during SA search
1230 
1231 			<enum 11 rxdma_da_timeout_err>RX OLE reported a timeout
1232 			during DA search
1233 
1234 			<enum 12 rxdma_flow_timeout_err>RX OLE reported a
1235 			timeout during flow search
1236 
1237 			<enum 13 Rxdma_flush_request>RXDMA received a flush
1238 			request
1239 */
1240 #define WBM_RELEASE_RING_2_RXDMA_ERROR_CODE_OFFSET                   0x00000008
1241 #define WBM_RELEASE_RING_2_RXDMA_ERROR_CODE_LSB                      19
1242 #define WBM_RELEASE_RING_2_RXDMA_ERROR_CODE_MASK                     0x00f80000
1243 
1244 /* Description		WBM_RELEASE_RING_2_REO_PUSH_REASON
1245 
1246 			Field only valid when Release_source_module is set to
1247 			release_source_REO
1248 
1249 
1250 
1251 			Indicates why REO pushed the frame to this release ring
1252 
1253 
1254 
1255 			<enum 0 reo_error_detected> Reo detected an error an
1256 			pushed this frame to this queue
1257 
1258 			<enum 1 reo_routing_instruction> Reo pushed the frame to
1259 			this queue per received routing instructions. No error
1260 			within REO was detected
1261 
1262 
1263 
1264 			<legal 0 - 1>
1265 */
1266 #define WBM_RELEASE_RING_2_REO_PUSH_REASON_OFFSET                    0x00000008
1267 #define WBM_RELEASE_RING_2_REO_PUSH_REASON_LSB                       24
1268 #define WBM_RELEASE_RING_2_REO_PUSH_REASON_MASK                      0x03000000
1269 
1270 /* Description		WBM_RELEASE_RING_2_REO_ERROR_CODE
1271 
1272 			Field only valid when 'Reo_push_reason' set to
1273 			'reo_error_detected'.
1274 
1275 
1276 
1277 			<enum 0 reo_queue_desc_addr_zero> Reo queue descriptor
1278 			provided in the REO_ENTRANCE ring is set to 0
1279 
1280 			<enum 1 reo_queue_desc_not_valid> Reo queue descriptor
1281 			valid bit is NOT set
1282 
1283 			<enum 2 ampdu_in_non_ba> AMPDU frame received without BA
1284 			session having been setup.
1285 
1286 			<enum 3 non_ba_duplicate> Non-BA session, SN equal to
1287 			SSN, Retry bit set: duplicate frame
1288 
1289 			<enum 4 ba_duplicate> BA session, duplicate frame
1290 
1291 			<enum 5 regular_frame_2k_jump> A normal (management/data
1292 			frame) received with 2K jump in SN
1293 
1294 			<enum 6 bar_frame_2k_jump> A bar received with 2K jump
1295 			in SSN
1296 
1297 			<enum 7 regular_frame_OOR> A normal (management/data
1298 			frame) received with SN falling within the OOR window
1299 
1300 			<enum 8 bar_frame_OOR> A bar received with SSN falling
1301 			within the OOR window
1302 
1303 			<enum 9 bar_frame_no_ba_session> A bar received without
1304 			a BA session
1305 
1306 			<enum 10 bar_frame_sn_equals_ssn> A bar received with
1307 			SSN equal to SN
1308 
1309 			<enum 11 pn_check_failed> PN Check Failed packet.
1310 
1311 			<enum 12 2k_error_handling_flag_set> Frame is forwarded
1312 			as a result of the 'Seq_2k_error_detected_flag' been set in
1313 			the REO Queue descriptor
1314 
1315 			<enum 13 pn_error_handling_flag_set> Frame is forwarded
1316 			as a result of the 'pn_error_detected_flag' been set in the
1317 			REO Queue descriptor
1318 
1319 			<enum 14 queue_descriptor_blocked_set> Frame is
1320 			forwarded as a result of the queue descriptor(address) being
1321 			blocked as SW/FW seems to be currently in the process of
1322 			making updates to this descriptor...
1323 
1324 
1325 
1326 			<legal 0-14>
1327 */
1328 #define WBM_RELEASE_RING_2_REO_ERROR_CODE_OFFSET                     0x00000008
1329 #define WBM_RELEASE_RING_2_REO_ERROR_CODE_LSB                        26
1330 #define WBM_RELEASE_RING_2_REO_ERROR_CODE_MASK                       0x7c000000
1331 
1332 /* Description		WBM_RELEASE_RING_2_WBM_INTERNAL_ERROR
1333 
1334 			Can only be set by WBM.
1335 
1336 
1337 
1338 			Is set when WBM got a buffer pointer but the action was
1339 			to push it to the idle link descriptor ring or do link
1340 			related activity
1341 
1342 			OR
1343 
1344 			Is set when WBM got a link buffer pointer but the action
1345 			was to push it to the buffer  descriptor ring
1346 
1347 
1348 
1349 			<legal all>
1350 */
1351 #define WBM_RELEASE_RING_2_WBM_INTERNAL_ERROR_OFFSET                 0x00000008
1352 #define WBM_RELEASE_RING_2_WBM_INTERNAL_ERROR_LSB                    31
1353 #define WBM_RELEASE_RING_2_WBM_INTERNAL_ERROR_MASK                   0x80000000
1354 
1355 /* Description		WBM_RELEASE_RING_3_TQM_STATUS_NUMBER
1356 
1357 			Field only valid when Release_source_module is set to
1358 			release_source_TQM
1359 
1360 
1361 
1362 			The value in this field is equal to value of the
1363 			'TQM_CMD_Number' field the TQM command or the
1364 			'TQM_add_cmd_Number' field from the TQM entrance ring
1365 			descriptor
1366 
1367 
1368 
1369 			This field helps to correlate the statuses with the TQM
1370 			commands.
1371 
1372 
1373 
1374 			NOTE that SW could program this number to be equal to
1375 			the PPDU_ID number in case direct correlation with the PPDU
1376 			ID is desired
1377 
1378 
1379 
1380 			<legal all>
1381 */
1382 #define WBM_RELEASE_RING_3_TQM_STATUS_NUMBER_OFFSET                  0x0000000c
1383 #define WBM_RELEASE_RING_3_TQM_STATUS_NUMBER_LSB                     0
1384 #define WBM_RELEASE_RING_3_TQM_STATUS_NUMBER_MASK                    0x00ffffff
1385 
1386 /* Description		WBM_RELEASE_RING_3_TRANSMIT_COUNT
1387 
1388 			Field only valid when Release_source_module is set to
1389 			release_source_TQM
1390 
1391 
1392 
1393 			The number of times this frame has been transmitted
1394 */
1395 #define WBM_RELEASE_RING_3_TRANSMIT_COUNT_OFFSET                     0x0000000c
1396 #define WBM_RELEASE_RING_3_TRANSMIT_COUNT_LSB                        24
1397 #define WBM_RELEASE_RING_3_TRANSMIT_COUNT_MASK                       0x7f000000
1398 
1399 /* Description		WBM_RELEASE_RING_3_RESERVED_3A
1400 
1401 			<legal 0>
1402 */
1403 #define WBM_RELEASE_RING_3_RESERVED_3A_OFFSET                        0x0000000c
1404 #define WBM_RELEASE_RING_3_RESERVED_3A_LSB                           31
1405 #define WBM_RELEASE_RING_3_RESERVED_3A_MASK                          0x80000000
1406 
1407 /* Description		WBM_RELEASE_RING_4_ACK_FRAME_RSSI
1408 
1409 			This field is only valid when the source is TQM.
1410 
1411 
1412 
1413 			If this frame is removed as the result of the reception
1414 			of an ACK or BA, this field indicates the RSSI of the
1415 			received ACK or BA frame.
1416 
1417 
1418 
1419 			When the frame is removed as result of a direct remove
1420 			command from the SW,  this field is set to 0x0 (which is
1421 			never a valid value when real RSSI is available)
1422 
1423 
1424 
1425 			<legal all>
1426 */
1427 #define WBM_RELEASE_RING_4_ACK_FRAME_RSSI_OFFSET                     0x00000010
1428 #define WBM_RELEASE_RING_4_ACK_FRAME_RSSI_LSB                        0
1429 #define WBM_RELEASE_RING_4_ACK_FRAME_RSSI_MASK                       0x000000ff
1430 
1431 /* Description		WBM_RELEASE_RING_4_SW_RELEASE_DETAILS_VALID
1432 
1433 			Consumer: SW
1434 
1435 			Producer: WBM
1436 
1437 
1438 
1439 			When set, some WBM specific release info for SW is
1440 			valid.
1441 
1442 			This is set when WMB got a 'release_msdu_list' command
1443 			from TQM and the return buffer manager is not WMB. WBM will
1444 			then de-aggregate all the MSDUs and pass them one at a time
1445 			on to the 'buffer owner'
1446 
1447 
1448 
1449 			<legal all>
1450 */
1451 #define WBM_RELEASE_RING_4_SW_RELEASE_DETAILS_VALID_OFFSET           0x00000010
1452 #define WBM_RELEASE_RING_4_SW_RELEASE_DETAILS_VALID_LSB              8
1453 #define WBM_RELEASE_RING_4_SW_RELEASE_DETAILS_VALID_MASK             0x00000100
1454 
1455 /* Description		WBM_RELEASE_RING_4_FIRST_MSDU
1456 
1457 			Field only valid when SW_release_details_valid is set.
1458 
1459 
1460 
1461 			Consumer: SW
1462 
1463 			Producer: WBM
1464 
1465 
1466 
1467 			When set, this MSDU is the first MSDU pointed to in the
1468 			'release_msdu_list' command.
1469 
1470 
1471 
1472 			<legal all>
1473 */
1474 #define WBM_RELEASE_RING_4_FIRST_MSDU_OFFSET                         0x00000010
1475 #define WBM_RELEASE_RING_4_FIRST_MSDU_LSB                            9
1476 #define WBM_RELEASE_RING_4_FIRST_MSDU_MASK                           0x00000200
1477 
1478 /* Description		WBM_RELEASE_RING_4_LAST_MSDU
1479 
1480 			Field only valid when SW_release_details_valid is set.
1481 
1482 
1483 
1484 			Consumer: SW
1485 
1486 			Producer: WBM
1487 
1488 
1489 
1490 			When set, this MSDU is the last MSDU pointed to in the
1491 			'release_msdu_list' command.
1492 
1493 
1494 
1495 			<legal all>
1496 */
1497 #define WBM_RELEASE_RING_4_LAST_MSDU_OFFSET                          0x00000010
1498 #define WBM_RELEASE_RING_4_LAST_MSDU_LSB                             10
1499 #define WBM_RELEASE_RING_4_LAST_MSDU_MASK                            0x00000400
1500 
1501 /* Description		WBM_RELEASE_RING_4_MSDU_PART_OF_AMSDU
1502 
1503 			Field only valid when SW_release_details_valid is set.
1504 
1505 
1506 
1507 			Consumer: SW
1508 
1509 			Producer: WBM
1510 
1511 
1512 
1513 			When set, this MSDU was part of an A-MSDU in MPDU
1514 
1515 			<legal all>
1516 */
1517 #define WBM_RELEASE_RING_4_MSDU_PART_OF_AMSDU_OFFSET                 0x00000010
1518 #define WBM_RELEASE_RING_4_MSDU_PART_OF_AMSDU_LSB                    11
1519 #define WBM_RELEASE_RING_4_MSDU_PART_OF_AMSDU_MASK                   0x00000800
1520 
1521 /* Description		WBM_RELEASE_RING_4_FW_TX_NOTIFY_FRAME
1522 
1523 			Field only valid when SW_release_details_valid is set.
1524 
1525 
1526 
1527 			Consumer: SW
1528 
1529 			Producer: WBM
1530 
1531 
1532 
1533 			This is the FW_tx_notify_frame field from the
1534 
1535 			<legal all>
1536 */
1537 #define WBM_RELEASE_RING_4_FW_TX_NOTIFY_FRAME_OFFSET                 0x00000010
1538 #define WBM_RELEASE_RING_4_FW_TX_NOTIFY_FRAME_LSB                    12
1539 #define WBM_RELEASE_RING_4_FW_TX_NOTIFY_FRAME_MASK                   0x00001000
1540 
1541 /* Description		WBM_RELEASE_RING_4_BUFFER_TIMESTAMP
1542 
1543 			Field only valid when SW_release_details_valid is set.
1544 
1545 
1546 
1547 			Consumer: SW
1548 
1549 			Producer: WBM
1550 
1551 
1552 
1553 			This is the Buffer_timestamp field from the
1554 
1555 
1556 
1557 			Timestamp in units of 1024 us
1558 
1559 			<legal all>
1560 */
1561 #define WBM_RELEASE_RING_4_BUFFER_TIMESTAMP_OFFSET                   0x00000010
1562 #define WBM_RELEASE_RING_4_BUFFER_TIMESTAMP_LSB                      13
1563 #define WBM_RELEASE_RING_4_BUFFER_TIMESTAMP_MASK                     0xffffe000
1564 
1565  /* EXTERNAL REFERENCE : struct tx_rate_stats_info tx_rate_stats */
1566 
1567 
1568 /* Description		WBM_RELEASE_RING_5_TX_RATE_STATS_TX_RATE_STATS_INFO_VALID
1569 
1570 			When set all other fields in this STRUCT contain valid
1571 			info.
1572 
1573 
1574 
1575 
1576 			<legal all>
1577 */
1578 #define WBM_RELEASE_RING_5_TX_RATE_STATS_TX_RATE_STATS_INFO_VALID_OFFSET 0x00000014
1579 #define WBM_RELEASE_RING_5_TX_RATE_STATS_TX_RATE_STATS_INFO_VALID_LSB 0
1580 #define WBM_RELEASE_RING_5_TX_RATE_STATS_TX_RATE_STATS_INFO_VALID_MASK 0x00000001
1581 
1582 /* Description		WBM_RELEASE_RING_5_TX_RATE_STATS_TRANSMIT_BW
1583 
1584 			Field only valid when Tx_rate_stats_info_valid is set
1585 
1586 
1587 
1588 			Indicates the BW of the upcoming transmission that shall
1589 			likely start in about 3 -4 us on the medium
1590 
1591 
1592 
1593 			<enum 0 transmit_bw_20_MHz>
1594 
1595 			<enum 1 transmit_bw_40_MHz>
1596 
1597 			<enum 2 transmit_bw_80_MHz>
1598 
1599 			<enum 3 transmit_bw_160_MHz>
1600 
1601 
1602 
1603 			<legal all>
1604 */
1605 #define WBM_RELEASE_RING_5_TX_RATE_STATS_TRANSMIT_BW_OFFSET          0x00000014
1606 #define WBM_RELEASE_RING_5_TX_RATE_STATS_TRANSMIT_BW_LSB             1
1607 #define WBM_RELEASE_RING_5_TX_RATE_STATS_TRANSMIT_BW_MASK            0x00000006
1608 
1609 /* Description		WBM_RELEASE_RING_5_TX_RATE_STATS_TRANSMIT_PKT_TYPE
1610 
1611 			Field only valid when Tx_rate_stats_info_valid is set
1612 
1613 
1614 
1615 			Field filled in by PDG.
1616 
1617 			Not valid when in SW transmit mode
1618 
1619 
1620 
1621 			The packet type
1622 
1623 			<enum 0 dot11a>802.11a PPDU type
1624 
1625 			<enum 1 dot11b>802.11b PPDU type
1626 
1627 			<enum 2 dot11n_mm>802.11n Mixed Mode PPDU type
1628 
1629 			<enum 3 dot11ac>802.11ac PPDU type
1630 
1631 			<enum 4 dot11ax>802.11ax PPDU type
1632 */
1633 #define WBM_RELEASE_RING_5_TX_RATE_STATS_TRANSMIT_PKT_TYPE_OFFSET    0x00000014
1634 #define WBM_RELEASE_RING_5_TX_RATE_STATS_TRANSMIT_PKT_TYPE_LSB       3
1635 #define WBM_RELEASE_RING_5_TX_RATE_STATS_TRANSMIT_PKT_TYPE_MASK      0x00000078
1636 
1637 /* Description		WBM_RELEASE_RING_5_TX_RATE_STATS_TRANSMIT_STBC
1638 
1639 			Field only valid when Tx_rate_stats_info_valid is set
1640 
1641 
1642 
1643 			Field filled in by PDG.
1644 
1645 			Not valid when in SW transmit mode
1646 
1647 
1648 
1649 			When set, STBC transmission rate was used.
1650 */
1651 #define WBM_RELEASE_RING_5_TX_RATE_STATS_TRANSMIT_STBC_OFFSET        0x00000014
1652 #define WBM_RELEASE_RING_5_TX_RATE_STATS_TRANSMIT_STBC_LSB           7
1653 #define WBM_RELEASE_RING_5_TX_RATE_STATS_TRANSMIT_STBC_MASK          0x00000080
1654 
1655 /* Description		WBM_RELEASE_RING_5_TX_RATE_STATS_TRANSMIT_LDPC
1656 
1657 			Field only valid when Tx_rate_stats_info_valid is set
1658 
1659 
1660 
1661 			Field filled in by PDG.
1662 
1663 			Not valid when in SW transmit mode
1664 
1665 
1666 
1667 			When set, use LDPC transmission rates
1668 */
1669 #define WBM_RELEASE_RING_5_TX_RATE_STATS_TRANSMIT_LDPC_OFFSET        0x00000014
1670 #define WBM_RELEASE_RING_5_TX_RATE_STATS_TRANSMIT_LDPC_LSB           8
1671 #define WBM_RELEASE_RING_5_TX_RATE_STATS_TRANSMIT_LDPC_MASK          0x00000100
1672 
1673 /* Description		WBM_RELEASE_RING_5_TX_RATE_STATS_TRANSMIT_SGI
1674 
1675 			Field only valid when Tx_rate_stats_info_valid is set
1676 
1677 
1678 
1679 			Field filled in by PDG.
1680 
1681 			Not valid when in SW transmit mode
1682 
1683 
1684 
1685 			<enum 0     0_8_us_sgi > Legacy normal GI. Can also be
1686 			used for HE
1687 
1688 			<enum 1     0_4_us_sgi > Legacy short GI. Can also be
1689 			used for HE
1690 
1691 			<enum 2     1_6_us_sgi > HE related GI
1692 
1693 			<enum 3     3_2_us_sgi > HE related GI
1694 
1695 			<legal 0 - 3>
1696 */
1697 #define WBM_RELEASE_RING_5_TX_RATE_STATS_TRANSMIT_SGI_OFFSET         0x00000014
1698 #define WBM_RELEASE_RING_5_TX_RATE_STATS_TRANSMIT_SGI_LSB            9
1699 #define WBM_RELEASE_RING_5_TX_RATE_STATS_TRANSMIT_SGI_MASK           0x00000600
1700 
1701 /* Description		WBM_RELEASE_RING_5_TX_RATE_STATS_TRANSMIT_MCS
1702 
1703 			Field only valid when Tx_rate_stats_info_valid is set
1704 
1705 
1706 
1707 			Field filled in by PDG.
1708 
1709 			Not valid when in SW transmit mode
1710 
1711 
1712 
1713 			For details, refer to  MCS_TYPE description
1714 
1715 			<legal all>
1716 */
1717 #define WBM_RELEASE_RING_5_TX_RATE_STATS_TRANSMIT_MCS_OFFSET         0x00000014
1718 #define WBM_RELEASE_RING_5_TX_RATE_STATS_TRANSMIT_MCS_LSB            11
1719 #define WBM_RELEASE_RING_5_TX_RATE_STATS_TRANSMIT_MCS_MASK           0x00007800
1720 
1721 /* Description		WBM_RELEASE_RING_5_TX_RATE_STATS_OFDMA_TRANSMISSION
1722 
1723 			Field only valid when Tx_rate_stats_info_valid is set
1724 
1725 
1726 
1727 			Field filled in by PDG.
1728 
1729 
1730 
1731 			Set when the transmission was an OFDMA transmission (DL
1732 			or UL).
1733 
1734 			<legal all>
1735 */
1736 #define WBM_RELEASE_RING_5_TX_RATE_STATS_OFDMA_TRANSMISSION_OFFSET   0x00000014
1737 #define WBM_RELEASE_RING_5_TX_RATE_STATS_OFDMA_TRANSMISSION_LSB      15
1738 #define WBM_RELEASE_RING_5_TX_RATE_STATS_OFDMA_TRANSMISSION_MASK     0x00008000
1739 
1740 /* Description		WBM_RELEASE_RING_5_TX_RATE_STATS_TONES_IN_RU
1741 
1742 			Field only valid when Tx_rate_stats_info_valid is set
1743 
1744 
1745 
1746 			Field filled in by PDG.
1747 
1748 			Not valid when in SW transmit mode
1749 
1750 
1751 
1752 			The number of tones in the RU used.
1753 
1754 			<legal all>
1755 */
1756 #define WBM_RELEASE_RING_5_TX_RATE_STATS_TONES_IN_RU_OFFSET          0x00000014
1757 #define WBM_RELEASE_RING_5_TX_RATE_STATS_TONES_IN_RU_LSB             16
1758 #define WBM_RELEASE_RING_5_TX_RATE_STATS_TONES_IN_RU_MASK            0x0fff0000
1759 
1760 /* Description		WBM_RELEASE_RING_5_TX_RATE_STATS_RESERVED_0A
1761 
1762 			<legal 0>
1763 */
1764 #define WBM_RELEASE_RING_5_TX_RATE_STATS_RESERVED_0A_OFFSET          0x00000014
1765 #define WBM_RELEASE_RING_5_TX_RATE_STATS_RESERVED_0A_LSB             28
1766 #define WBM_RELEASE_RING_5_TX_RATE_STATS_RESERVED_0A_MASK            0xf0000000
1767 
1768 /* Description		WBM_RELEASE_RING_6_TX_RATE_STATS_PPDU_TRANSMISSION_TSF
1769 
1770 			Field only valid when Tx_rate_stats_info_valid is set
1771 
1772 
1773 
1774 			Based on a HWSCH configuration register setting, this
1775 			field either contains:
1776 
1777 
1778 
1779 			Lower 32 bits of the TSF, snapshot of this value when
1780 			transmission of the PPDU containing the frame finished.
1781 
1782 			OR
1783 
1784 			Lower 32 bits of the TSF, snapshot of this value when
1785 			transmission of the PPDU containing the frame started
1786 
1787 
1788 
1789 			<legal all>
1790 */
1791 #define WBM_RELEASE_RING_6_TX_RATE_STATS_PPDU_TRANSMISSION_TSF_OFFSET 0x00000018
1792 #define WBM_RELEASE_RING_6_TX_RATE_STATS_PPDU_TRANSMISSION_TSF_LSB   0
1793 #define WBM_RELEASE_RING_6_TX_RATE_STATS_PPDU_TRANSMISSION_TSF_MASK  0xffffffff
1794 
1795 /* Description		WBM_RELEASE_RING_7_SW_PEER_ID
1796 
1797 			Field only valid when Release_source_module is set to
1798 			release_source_TQM
1799 
1800 
1801 
1802 			1) Release of msdu buffer due to drop_frame = 1. Flow is
1803 			not fetched and hence sw_peer_id and tid = 0
1804 
1805 			buffer_or_desc_type = e_num 0
1806 			MSDU_rel_buffertqm_release_reason = e_num 1
1807 			tqm_rr_rem_cmd_rem
1808 
1809 
1810 
1811 
1812 
1813 			2) Release of msdu buffer due to Flow is not fetched and
1814 			hence sw_peer_id and tid = 0
1815 
1816 			buffer_or_desc_type = e_num 0
1817 			MSDU_rel_buffertqm_release_reason = e_num 1
1818 			tqm_rr_rem_cmd_rem
1819 
1820 
1821 
1822 
1823 
1824 			3) Release of msdu link due to remove_mpdu or acked_mpdu
1825 			command.
1826 
1827 			buffer_or_desc_type = e_num1
1828 			msdu_link_descriptortqm_release_reason can be:e_num 1
1829 			tqm_rr_rem_cmd_reme_num 2 tqm_rr_rem_cmd_tx
1830 
1831 			e_num 3 tqm_rr_rem_cmd_notxe_num 4 tqm_rr_rem_cmd_aged
1832 
1833 
1834 
1835 			Sw_peer_id from the TX_MSDU_FLOW descriptor or
1836 			TX_MPDU_QUEUE descriptor
1837 
1838 			<legal all>
1839 */
1840 #define WBM_RELEASE_RING_7_SW_PEER_ID_OFFSET                         0x0000001c
1841 #define WBM_RELEASE_RING_7_SW_PEER_ID_LSB                            0
1842 #define WBM_RELEASE_RING_7_SW_PEER_ID_MASK                           0x0000ffff
1843 
1844 /* Description		WBM_RELEASE_RING_7_TID
1845 
1846 			Field only valid when Release_source_module is set to
1847 			release_source_TQM
1848 
1849 
1850 
1851 			1) Release of msdu buffer due to drop_frame = 1. Flow is
1852 			not fetched and hence sw_peer_id and tid = 0
1853 
1854 			buffer_or_desc_type = e_num 0
1855 			MSDU_rel_buffertqm_release_reason = e_num 1
1856 			tqm_rr_rem_cmd_rem
1857 
1858 
1859 
1860 
1861 
1862 			2) Release of msdu buffer due to Flow is not fetched and
1863 			hence sw_peer_id and tid = 0
1864 
1865 			buffer_or_desc_type = e_num 0
1866 			MSDU_rel_buffertqm_release_reason = e_num 1
1867 			tqm_rr_rem_cmd_rem
1868 
1869 
1870 
1871 
1872 
1873 			3) Release of msdu link due to remove_mpdu or acked_mpdu
1874 			command.
1875 
1876 			buffer_or_desc_type = e_num1
1877 			msdu_link_descriptortqm_release_reason can be:e_num 1
1878 			tqm_rr_rem_cmd_reme_num 2 tqm_rr_rem_cmd_tx
1879 
1880 			e_num 3 tqm_rr_rem_cmd_notxe_num 4 tqm_rr_rem_cmd_aged
1881 
1882 
1883 
1884 
1885 
1886 			This field represents the TID from the TX_MSDU_FLOW
1887 			descriptor or TX_MPDU_QUEUE descriptor
1888 
1889 
1890 
1891 			 <legal all>
1892 */
1893 #define WBM_RELEASE_RING_7_TID_OFFSET                                0x0000001c
1894 #define WBM_RELEASE_RING_7_TID_LSB                                   16
1895 #define WBM_RELEASE_RING_7_TID_MASK                                  0x000f0000
1896 
1897 /* Description		WBM_RELEASE_RING_7_RING_ID
1898 
1899 			Consumer: TQM/REO/RXDMA/SW
1900 
1901 			Producer: SRNG (of RXDMA)
1902 
1903 
1904 
1905 			For debugging.
1906 
1907 			This field is filled in by the SRNG module.
1908 
1909 			It help to identify the ring that is being looked <legal
1910 			all>
1911 */
1912 #define WBM_RELEASE_RING_7_RING_ID_OFFSET                            0x0000001c
1913 #define WBM_RELEASE_RING_7_RING_ID_LSB                               20
1914 #define WBM_RELEASE_RING_7_RING_ID_MASK                              0x0ff00000
1915 
1916 /* Description		WBM_RELEASE_RING_7_LOOPING_COUNT
1917 
1918 			Consumer: WBM/SW/FW
1919 
1920 			Producer: SW/TQM/RXDMA/REO/SWITCH
1921 
1922 
1923 
1924 			A count value that indicates the number of times the
1925 			producer of entries into the Buffer Manager Ring has looped
1926 			around the ring.
1927 
1928 			At initialization time, this value is set to 0. On the
1929 			first loop, this value is set to 1. After the max value is
1930 			reached allowed by the number of bits for this field, the
1931 			count value continues with 0 again.
1932 
1933 
1934 
1935 			In case SW is the consumer of the ring entries, it can
1936 			use this field to figure out up to where the producer of
1937 			entries has created new entries. This eliminates the need to
1938 			check where the head pointer' of the ring is located once
1939 			the SW starts processing an interrupt indicating that new
1940 			entries have been put into this ring...
1941 
1942 
1943 
1944 			Also note that SW if it wants only needs to look at the
1945 			LSB bit of this count value.
1946 
1947 			<legal all>
1948 */
1949 #define WBM_RELEASE_RING_7_LOOPING_COUNT_OFFSET                      0x0000001c
1950 #define WBM_RELEASE_RING_7_LOOPING_COUNT_LSB                         28
1951 #define WBM_RELEASE_RING_7_LOOPING_COUNT_MASK                        0xf0000000
1952 
1953 
1954 #endif // _WBM_RELEASE_RING_H_
1955