1 /* 2 * Copyright (c) 2020 The Linux Foundation. All rights reserved. 3 * 4 * Permission to use, copy, modify, and/or distribute this software for any 5 * purpose with or without fee is hereby granted, provided that the above 6 * copyright notice and this permission notice appear in all copies. 7 * 8 * THE SOFTWARE IS PROVIDED "AS IS" AND THE AUTHOR DISCLAIMS ALL WARRANTIES 9 * WITH REGARD TO THIS SOFTWARE INCLUDING ALL IMPLIED WARRANTIES OF 10 * MERCHANTABILITY AND FITNESS. IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR 11 * ANY SPECIAL, DIRECT, INDIRECT, OR CONSEQUENTIAL DAMAGES OR ANY DAMAGES 12 * WHATSOEVER RESULTING FROM LOSS OF USE, DATA OR PROFITS, WHETHER IN AN 13 * ACTION OF CONTRACT, NEGLIGENCE OR OTHER TORTIOUS ACTION, ARISING OUT OF 14 * OR IN CONNECTION WITH THE USE OR PERFORMANCE OF THIS SOFTWARE. 15 */ 16 17 // $ATH_LICENSE_HW_HDR_C$ 18 // 19 // DO NOT EDIT! This file is automatically generated 20 // These definitions are tied to a particular hardware layout 21 22 23 #ifndef _PHYRX_RSSI_LEGACY_H_ 24 #define _PHYRX_RSSI_LEGACY_H_ 25 #if !defined(__ASSEMBLER__) 26 #endif 27 28 #include "receive_rssi_info.h" 29 30 // ################ START SUMMARY ################# 31 // 32 // Dword Fields 33 // 0 reception_type[3:0], rx_chain_mask_type[4], reserved_0[5], receive_bandwidth[7:6], rx_chain_mask[15:8], phy_ppdu_id[31:16] 34 // 1 sw_phy_meta_data[31:0] 35 // 2 ppdu_start_timestamp[31:0] 36 // 3-18 struct receive_rssi_info pre_rssi_info_details; 37 // 19-34 struct receive_rssi_info preamble_rssi_info_details; 38 // 35 pre_rssi_comb[7:0], rssi_comb[15:8], normalized_pre_rssi_comb[23:16], normalized_rssi_comb[31:24] 39 // 40 // ################ END SUMMARY ################# 41 42 #define NUM_OF_DWORDS_PHYRX_RSSI_LEGACY 36 43 44 struct phyrx_rssi_legacy { 45 uint32_t reception_type : 4, //[3:0] 46 rx_chain_mask_type : 1, //[4] 47 reserved_0 : 1, //[5] 48 receive_bandwidth : 2, //[7:6] 49 rx_chain_mask : 8, //[15:8] 50 phy_ppdu_id : 16; //[31:16] 51 uint32_t sw_phy_meta_data : 32; //[31:0] 52 uint32_t ppdu_start_timestamp : 32; //[31:0] 53 struct receive_rssi_info pre_rssi_info_details; 54 struct receive_rssi_info preamble_rssi_info_details; 55 uint32_t pre_rssi_comb : 8, //[7:0] 56 rssi_comb : 8, //[15:8] 57 normalized_pre_rssi_comb : 8, //[23:16] 58 normalized_rssi_comb : 8; //[31:24] 59 }; 60 61 /* 62 63 reception_type 64 65 This field helps MAC SW determine which field in this 66 (and following TLVs) will contain valid information. For 67 example some RSSI info not valid in case of uplink_ofdma.. 68 69 <enum 0 reception_is_uplink_ofdma> 70 71 <enum 1 reception_is_uplink_mimo> 72 73 <enum 2 reception_is_other> 74 75 <enum 3 reception_is_frameless> PHY RX has been 76 instructed in advance that the upcoming reception is 77 frameless. This implieas that in advance it is known that 78 all frames will collide in the medium, and nothing can be 79 properly decoded... This can happen during the CTS reception 80 in response to the triggered MU-RTS transmission. 81 82 MAC takes no action when seeing this e_num. For the 83 frameless reception the indication in pkt_end is the final 84 one evaluated by the MAC 85 86 <legal 0-3> 87 88 rx_chain_mask_type 89 90 Indicates if the field rx_chain_mask represents the mask 91 at start of reception (on which the Rssi_comb value is 92 based), or the setting used during the remainder of the 93 reception 94 95 96 97 1'b0: rxtd.listen_pri80_mask 98 99 1'b1: Final receive mask 100 101 102 103 <legal all> 104 105 reserved_0 106 107 <legal 0> 108 109 receive_bandwidth 110 111 Full receive Bandwidth 112 113 114 115 <enum 0 full_rx_bw_20_mhz> 116 117 <enum 1 full_rx_bw_40_mhz> 118 119 <enum 2 full_rx_bw_80_mhz> 120 121 <enum 3 full_rx_bw_160_mhz> 122 123 124 125 <legal 0-3> 126 127 rx_chain_mask 128 129 Description dependent on the setting of field 130 Rx_chain_mask_type. 131 132 133 134 The chain mask at the start of the reception of this 135 frame when Rx_chain_mask_type is set to 1'b0. In this mode 136 used in 11ax TPC calculations for UL OFDMA/MIMO and has to 137 be in sync with the rssi_comb value as this is also used by 138 the MAC for the TPC calculations. 139 140 141 142 143 144 The final rx chain mask used for the frame reception 145 when Rx_chain_mask_type is set to 1'b1 146 147 148 149 each bit is one antenna 150 151 0: the chain is NOT used 152 153 1: the chain is used 154 155 156 157 Supports up to 8 chains 158 159 160 161 <legal all> 162 163 phy_ppdu_id 164 165 A ppdu counter value that PHY increments for every PPDU 166 received. The counter value wraps around 167 168 <legal all> 169 170 sw_phy_meta_data 171 172 32 bit Meta data that SW can program in a 32 bit PHY 173 register and PHY will insert the value in every 174 RX_RSSI_LEGACY TLV that it generates. 175 176 SW uses this field to embed among other things some SW 177 channel info. 178 179 ppdu_start_timestamp 180 181 Timestamp that indicates when the PPDU that contained 182 this MPDU started on the medium. 183 184 185 186 Note that PHY will detect the start later, and will have 187 to derive out of the preamble info when the frame actually 188 appeared on the medium 189 190 <legal 0- 10> 191 192 struct receive_rssi_info pre_rssi_info_details 193 194 This field is not valid when reception_is_uplink_ofdma 195 196 197 198 Overview of the pre-RSSI values. That is RSSI values 199 measured on the medium before this reception started. 200 201 struct receive_rssi_info preamble_rssi_info_details 202 203 This field is not valid when reception_is_uplink_ofdma 204 205 206 207 Overview of the RSSI values measured during the 208 pre-amble phase of this reception 209 210 pre_rssi_comb 211 212 Combined pre_rssi of all chains. Based on primary 213 channel RSSI. 214 215 216 217 RSSI is reported as 8b signed values. Nominally value is 218 in dB units above or below the noisefloor(minCCApwr). 219 220 221 222 The resolution can be: 223 224 1dB or 0.5dB. This is statically configured within the 225 PHY and MAC 226 227 228 229 In case of 1dB, the Range is: 230 231 -128dB to 127dB 232 233 234 235 In case of 0.5dB, the Range is: 236 237 -64dB to 63.5dB 238 239 240 241 <legal all> 242 243 rssi_comb 244 245 Combined rssi of all chains. Based on primary channel 246 RSSI. 247 248 249 250 RSSI is reported as 8b signed values. Nominally value is 251 in dB units above or below the noisefloor(minCCApwr). 252 253 254 255 The resolution can be: 256 257 1dB or 0.5dB. This is statically configured within the 258 PHY and MAC 259 260 261 262 In case of 1dB, the Range is: 263 264 -128dB to 127dB 265 266 267 268 In case of 0.5dB, the Range is: 269 270 -64dB to 63.5dB 271 272 273 274 <legal all> 275 276 normalized_pre_rssi_comb 277 278 Combined pre_rssi of all chains, but normalized back to 279 a single chain. This avoids PDG from having to evaluate this 280 in combination with receive chain mask and perform all kinds 281 of pre-processing algorithms. 282 283 284 285 Based on primary channel RSSI. 286 287 288 289 RSSI is reported as 8b signed values. Nominally value is 290 in dB units above or below the noisefloor(minCCApwr). 291 292 293 294 The resolution can be: 295 296 1dB or 0.5dB. This is statically configured within the 297 PHY and MAC 298 299 300 301 In case of 1dB, the Range is: 302 303 -128dB to 127dB 304 305 306 307 In case of 0.5dB, the Range is: 308 309 -64dB to 63.5dB 310 311 312 313 <legal all> 314 315 normalized_rssi_comb 316 317 Combined rssi of all chains, but normalized back to a 318 single chain. This avoids PDG from having to evaluate this 319 in combination with receive chain mask and perform all kinds 320 of pre-processing algorithms. 321 322 323 324 Based on primary channel RSSI. 325 326 327 328 RSSI is reported as 8b signed values. Nominally value is 329 in dB units above or below the noisefloor(minCCApwr). 330 331 332 333 The resolution can be: 334 335 1dB or 0.5dB. This is statically configured within the 336 PHY and MAC 337 338 In case of 1dB, the Range is: 339 340 -128dB to 127dB 341 342 343 344 In case of 0.5dB, the Range is: 345 346 -64dB to 63.5dB 347 348 349 350 <legal all> 351 */ 352 353 354 /* Description PHYRX_RSSI_LEGACY_0_RECEPTION_TYPE 355 356 This field helps MAC SW determine which field in this 357 (and following TLVs) will contain valid information. For 358 example some RSSI info not valid in case of uplink_ofdma.. 359 360 <enum 0 reception_is_uplink_ofdma> 361 362 <enum 1 reception_is_uplink_mimo> 363 364 <enum 2 reception_is_other> 365 366 <enum 3 reception_is_frameless> PHY RX has been 367 instructed in advance that the upcoming reception is 368 frameless. This implieas that in advance it is known that 369 all frames will collide in the medium, and nothing can be 370 properly decoded... This can happen during the CTS reception 371 in response to the triggered MU-RTS transmission. 372 373 MAC takes no action when seeing this e_num. For the 374 frameless reception the indication in pkt_end is the final 375 one evaluated by the MAC 376 377 <legal 0-3> 378 */ 379 #define PHYRX_RSSI_LEGACY_0_RECEPTION_TYPE_OFFSET 0x00000000 380 #define PHYRX_RSSI_LEGACY_0_RECEPTION_TYPE_LSB 0 381 #define PHYRX_RSSI_LEGACY_0_RECEPTION_TYPE_MASK 0x0000000f 382 383 /* Description PHYRX_RSSI_LEGACY_0_RX_CHAIN_MASK_TYPE 384 385 Indicates if the field rx_chain_mask represents the mask 386 at start of reception (on which the Rssi_comb value is 387 based), or the setting used during the remainder of the 388 reception 389 390 391 392 1'b0: rxtd.listen_pri80_mask 393 394 1'b1: Final receive mask 395 396 397 398 <legal all> 399 */ 400 #define PHYRX_RSSI_LEGACY_0_RX_CHAIN_MASK_TYPE_OFFSET 0x00000000 401 #define PHYRX_RSSI_LEGACY_0_RX_CHAIN_MASK_TYPE_LSB 4 402 #define PHYRX_RSSI_LEGACY_0_RX_CHAIN_MASK_TYPE_MASK 0x00000010 403 404 /* Description PHYRX_RSSI_LEGACY_0_RESERVED_0 405 406 <legal 0> 407 */ 408 #define PHYRX_RSSI_LEGACY_0_RESERVED_0_OFFSET 0x00000000 409 #define PHYRX_RSSI_LEGACY_0_RESERVED_0_LSB 5 410 #define PHYRX_RSSI_LEGACY_0_RESERVED_0_MASK 0x00000020 411 412 /* Description PHYRX_RSSI_LEGACY_0_RECEIVE_BANDWIDTH 413 414 Full receive Bandwidth 415 416 417 418 <enum 0 full_rx_bw_20_mhz> 419 420 <enum 1 full_rx_bw_40_mhz> 421 422 <enum 2 full_rx_bw_80_mhz> 423 424 <enum 3 full_rx_bw_160_mhz> 425 426 427 428 <legal 0-3> 429 */ 430 #define PHYRX_RSSI_LEGACY_0_RECEIVE_BANDWIDTH_OFFSET 0x00000000 431 #define PHYRX_RSSI_LEGACY_0_RECEIVE_BANDWIDTH_LSB 6 432 #define PHYRX_RSSI_LEGACY_0_RECEIVE_BANDWIDTH_MASK 0x000000c0 433 434 /* Description PHYRX_RSSI_LEGACY_0_RX_CHAIN_MASK 435 436 Description dependent on the setting of field 437 Rx_chain_mask_type. 438 439 440 441 The chain mask at the start of the reception of this 442 frame when Rx_chain_mask_type is set to 1'b0. In this mode 443 used in 11ax TPC calculations for UL OFDMA/MIMO and has to 444 be in sync with the rssi_comb value as this is also used by 445 the MAC for the TPC calculations. 446 447 448 449 450 451 The final rx chain mask used for the frame reception 452 when Rx_chain_mask_type is set to 1'b1 453 454 455 456 each bit is one antenna 457 458 0: the chain is NOT used 459 460 1: the chain is used 461 462 463 464 Supports up to 8 chains 465 466 467 468 <legal all> 469 */ 470 #define PHYRX_RSSI_LEGACY_0_RX_CHAIN_MASK_OFFSET 0x00000000 471 #define PHYRX_RSSI_LEGACY_0_RX_CHAIN_MASK_LSB 8 472 #define PHYRX_RSSI_LEGACY_0_RX_CHAIN_MASK_MASK 0x0000ff00 473 474 /* Description PHYRX_RSSI_LEGACY_0_PHY_PPDU_ID 475 476 A ppdu counter value that PHY increments for every PPDU 477 received. The counter value wraps around 478 479 <legal all> 480 */ 481 #define PHYRX_RSSI_LEGACY_0_PHY_PPDU_ID_OFFSET 0x00000000 482 #define PHYRX_RSSI_LEGACY_0_PHY_PPDU_ID_LSB 16 483 #define PHYRX_RSSI_LEGACY_0_PHY_PPDU_ID_MASK 0xffff0000 484 485 /* Description PHYRX_RSSI_LEGACY_1_SW_PHY_META_DATA 486 487 32 bit Meta data that SW can program in a 32 bit PHY 488 register and PHY will insert the value in every 489 RX_RSSI_LEGACY TLV that it generates. 490 491 SW uses this field to embed among other things some SW 492 channel info. 493 */ 494 #define PHYRX_RSSI_LEGACY_1_SW_PHY_META_DATA_OFFSET 0x00000004 495 #define PHYRX_RSSI_LEGACY_1_SW_PHY_META_DATA_LSB 0 496 #define PHYRX_RSSI_LEGACY_1_SW_PHY_META_DATA_MASK 0xffffffff 497 498 /* Description PHYRX_RSSI_LEGACY_2_PPDU_START_TIMESTAMP 499 500 Timestamp that indicates when the PPDU that contained 501 this MPDU started on the medium. 502 503 504 505 Note that PHY will detect the start later, and will have 506 to derive out of the preamble info when the frame actually 507 appeared on the medium 508 509 <legal 0- 10> 510 */ 511 #define PHYRX_RSSI_LEGACY_2_PPDU_START_TIMESTAMP_OFFSET 0x00000008 512 #define PHYRX_RSSI_LEGACY_2_PPDU_START_TIMESTAMP_LSB 0 513 #define PHYRX_RSSI_LEGACY_2_PPDU_START_TIMESTAMP_MASK 0xffffffff 514 515 /* EXTERNAL REFERENCE : struct receive_rssi_info pre_rssi_info_details */ 516 517 518 /* Description PHYRX_RSSI_LEGACY_3_PRE_RSSI_INFO_DETAILS_RSSI_PRI20_CHAIN0 519 520 RSSI of RX PPDU on chain 0 of primary 20 MHz bandwidth. 521 522 Value of 0x80 indicates invalid. 523 */ 524 #define PHYRX_RSSI_LEGACY_3_PRE_RSSI_INFO_DETAILS_RSSI_PRI20_CHAIN0_OFFSET 0x0000000c 525 #define PHYRX_RSSI_LEGACY_3_PRE_RSSI_INFO_DETAILS_RSSI_PRI20_CHAIN0_LSB 0 526 #define PHYRX_RSSI_LEGACY_3_PRE_RSSI_INFO_DETAILS_RSSI_PRI20_CHAIN0_MASK 0x000000ff 527 528 /* Description PHYRX_RSSI_LEGACY_3_PRE_RSSI_INFO_DETAILS_RSSI_EXT20_CHAIN0 529 530 RSSI of RX PPDU on chain 0 of extension 20 MHz 531 bandwidth. 532 533 Value of 0x80 indicates invalid. 534 */ 535 #define PHYRX_RSSI_LEGACY_3_PRE_RSSI_INFO_DETAILS_RSSI_EXT20_CHAIN0_OFFSET 0x0000000c 536 #define PHYRX_RSSI_LEGACY_3_PRE_RSSI_INFO_DETAILS_RSSI_EXT20_CHAIN0_LSB 8 537 #define PHYRX_RSSI_LEGACY_3_PRE_RSSI_INFO_DETAILS_RSSI_EXT20_CHAIN0_MASK 0x0000ff00 538 539 /* Description PHYRX_RSSI_LEGACY_3_PRE_RSSI_INFO_DETAILS_RSSI_EXT40_LOW20_CHAIN0 540 541 RSSI of RX PPDU on chain 0 of extension 40, low 20 MHz 542 bandwidth. 543 544 Value of 0x80 indicates invalid. 545 */ 546 #define PHYRX_RSSI_LEGACY_3_PRE_RSSI_INFO_DETAILS_RSSI_EXT40_LOW20_CHAIN0_OFFSET 0x0000000c 547 #define PHYRX_RSSI_LEGACY_3_PRE_RSSI_INFO_DETAILS_RSSI_EXT40_LOW20_CHAIN0_LSB 16 548 #define PHYRX_RSSI_LEGACY_3_PRE_RSSI_INFO_DETAILS_RSSI_EXT40_LOW20_CHAIN0_MASK 0x00ff0000 549 550 /* Description PHYRX_RSSI_LEGACY_3_PRE_RSSI_INFO_DETAILS_RSSI_EXT40_HIGH20_CHAIN0 551 552 RSSI of RX PPDU on chain 0 of extension 40, high 20 MHz 553 bandwidth. 554 555 Value of 0x80 indicates invalid. 556 */ 557 #define PHYRX_RSSI_LEGACY_3_PRE_RSSI_INFO_DETAILS_RSSI_EXT40_HIGH20_CHAIN0_OFFSET 0x0000000c 558 #define PHYRX_RSSI_LEGACY_3_PRE_RSSI_INFO_DETAILS_RSSI_EXT40_HIGH20_CHAIN0_LSB 24 559 #define PHYRX_RSSI_LEGACY_3_PRE_RSSI_INFO_DETAILS_RSSI_EXT40_HIGH20_CHAIN0_MASK 0xff000000 560 561 /* Description PHYRX_RSSI_LEGACY_4_PRE_RSSI_INFO_DETAILS_RSSI_EXT80_LOW20_CHAIN0 562 563 RSSI of RX PPDU on chain 0 of extension 80, low 20 MHz 564 bandwidth. 565 566 Value of 0x80 indicates invalid. 567 */ 568 #define PHYRX_RSSI_LEGACY_4_PRE_RSSI_INFO_DETAILS_RSSI_EXT80_LOW20_CHAIN0_OFFSET 0x00000010 569 #define PHYRX_RSSI_LEGACY_4_PRE_RSSI_INFO_DETAILS_RSSI_EXT80_LOW20_CHAIN0_LSB 0 570 #define PHYRX_RSSI_LEGACY_4_PRE_RSSI_INFO_DETAILS_RSSI_EXT80_LOW20_CHAIN0_MASK 0x000000ff 571 572 /* Description PHYRX_RSSI_LEGACY_4_PRE_RSSI_INFO_DETAILS_RSSI_EXT80_LOW_HIGH20_CHAIN0 573 574 RSSI of RX PPDU on chain 0 of extension 80, low-high 20 575 MHz bandwidth. 576 577 Value of 0x80 indicates invalid. 578 */ 579 #define PHYRX_RSSI_LEGACY_4_PRE_RSSI_INFO_DETAILS_RSSI_EXT80_LOW_HIGH20_CHAIN0_OFFSET 0x00000010 580 #define PHYRX_RSSI_LEGACY_4_PRE_RSSI_INFO_DETAILS_RSSI_EXT80_LOW_HIGH20_CHAIN0_LSB 8 581 #define PHYRX_RSSI_LEGACY_4_PRE_RSSI_INFO_DETAILS_RSSI_EXT80_LOW_HIGH20_CHAIN0_MASK 0x0000ff00 582 583 /* Description PHYRX_RSSI_LEGACY_4_PRE_RSSI_INFO_DETAILS_RSSI_EXT80_HIGH_LOW20_CHAIN0 584 585 RSSI of RX PPDU on chain 0 of extension 80, high-low 20 586 MHz bandwidth. 587 588 Value of 0x80 indicates invalid. 589 */ 590 #define PHYRX_RSSI_LEGACY_4_PRE_RSSI_INFO_DETAILS_RSSI_EXT80_HIGH_LOW20_CHAIN0_OFFSET 0x00000010 591 #define PHYRX_RSSI_LEGACY_4_PRE_RSSI_INFO_DETAILS_RSSI_EXT80_HIGH_LOW20_CHAIN0_LSB 16 592 #define PHYRX_RSSI_LEGACY_4_PRE_RSSI_INFO_DETAILS_RSSI_EXT80_HIGH_LOW20_CHAIN0_MASK 0x00ff0000 593 594 /* Description PHYRX_RSSI_LEGACY_4_PRE_RSSI_INFO_DETAILS_RSSI_EXT80_HIGH20_CHAIN0 595 596 RSSI of RX PPDU on chain 0 of extension 80, high 20 MHz 597 bandwidth. 598 599 Value of 0x80 indicates invalid. 600 */ 601 #define PHYRX_RSSI_LEGACY_4_PRE_RSSI_INFO_DETAILS_RSSI_EXT80_HIGH20_CHAIN0_OFFSET 0x00000010 602 #define PHYRX_RSSI_LEGACY_4_PRE_RSSI_INFO_DETAILS_RSSI_EXT80_HIGH20_CHAIN0_LSB 24 603 #define PHYRX_RSSI_LEGACY_4_PRE_RSSI_INFO_DETAILS_RSSI_EXT80_HIGH20_CHAIN0_MASK 0xff000000 604 605 /* Description PHYRX_RSSI_LEGACY_5_PRE_RSSI_INFO_DETAILS_RSSI_PRI20_CHAIN1 606 607 RSSI of RX PPDU on chain 1 of primary 20 MHz bandwidth. 608 609 Value of 0x80 indicates invalid. 610 */ 611 #define PHYRX_RSSI_LEGACY_5_PRE_RSSI_INFO_DETAILS_RSSI_PRI20_CHAIN1_OFFSET 0x00000014 612 #define PHYRX_RSSI_LEGACY_5_PRE_RSSI_INFO_DETAILS_RSSI_PRI20_CHAIN1_LSB 0 613 #define PHYRX_RSSI_LEGACY_5_PRE_RSSI_INFO_DETAILS_RSSI_PRI20_CHAIN1_MASK 0x000000ff 614 615 /* Description PHYRX_RSSI_LEGACY_5_PRE_RSSI_INFO_DETAILS_RSSI_EXT20_CHAIN1 616 617 RSSI of RX PPDU on chain 1 of extension 20 MHz 618 bandwidth. 619 620 Value of 0x80 indicates invalid. 621 */ 622 #define PHYRX_RSSI_LEGACY_5_PRE_RSSI_INFO_DETAILS_RSSI_EXT20_CHAIN1_OFFSET 0x00000014 623 #define PHYRX_RSSI_LEGACY_5_PRE_RSSI_INFO_DETAILS_RSSI_EXT20_CHAIN1_LSB 8 624 #define PHYRX_RSSI_LEGACY_5_PRE_RSSI_INFO_DETAILS_RSSI_EXT20_CHAIN1_MASK 0x0000ff00 625 626 /* Description PHYRX_RSSI_LEGACY_5_PRE_RSSI_INFO_DETAILS_RSSI_EXT40_LOW20_CHAIN1 627 628 RSSI of RX PPDU on chain 1 of extension 40, low 20 MHz 629 bandwidth. 630 631 Value of 0x80 indicates invalid. 632 */ 633 #define PHYRX_RSSI_LEGACY_5_PRE_RSSI_INFO_DETAILS_RSSI_EXT40_LOW20_CHAIN1_OFFSET 0x00000014 634 #define PHYRX_RSSI_LEGACY_5_PRE_RSSI_INFO_DETAILS_RSSI_EXT40_LOW20_CHAIN1_LSB 16 635 #define PHYRX_RSSI_LEGACY_5_PRE_RSSI_INFO_DETAILS_RSSI_EXT40_LOW20_CHAIN1_MASK 0x00ff0000 636 637 /* Description PHYRX_RSSI_LEGACY_5_PRE_RSSI_INFO_DETAILS_RSSI_EXT40_HIGH20_CHAIN1 638 639 RSSI of RX PPDU on chain 1 of extension 40, high 20 MHz 640 bandwidth. 641 642 Value of 0x80 indicates invalid. 643 */ 644 #define PHYRX_RSSI_LEGACY_5_PRE_RSSI_INFO_DETAILS_RSSI_EXT40_HIGH20_CHAIN1_OFFSET 0x00000014 645 #define PHYRX_RSSI_LEGACY_5_PRE_RSSI_INFO_DETAILS_RSSI_EXT40_HIGH20_CHAIN1_LSB 24 646 #define PHYRX_RSSI_LEGACY_5_PRE_RSSI_INFO_DETAILS_RSSI_EXT40_HIGH20_CHAIN1_MASK 0xff000000 647 648 /* Description PHYRX_RSSI_LEGACY_6_PRE_RSSI_INFO_DETAILS_RSSI_EXT80_LOW20_CHAIN1 649 650 RSSI of RX PPDU on chain 1 of extension 80, low 20 MHz 651 bandwidth. 652 653 Value of 0x80 indicates invalid. 654 */ 655 #define PHYRX_RSSI_LEGACY_6_PRE_RSSI_INFO_DETAILS_RSSI_EXT80_LOW20_CHAIN1_OFFSET 0x00000018 656 #define PHYRX_RSSI_LEGACY_6_PRE_RSSI_INFO_DETAILS_RSSI_EXT80_LOW20_CHAIN1_LSB 0 657 #define PHYRX_RSSI_LEGACY_6_PRE_RSSI_INFO_DETAILS_RSSI_EXT80_LOW20_CHAIN1_MASK 0x000000ff 658 659 /* Description PHYRX_RSSI_LEGACY_6_PRE_RSSI_INFO_DETAILS_RSSI_EXT80_LOW_HIGH20_CHAIN1 660 661 RSSI of RX PPDU on chain 1 of extension 80, low-high 20 662 MHz bandwidth. 663 664 Value of 0x80 indicates invalid. 665 */ 666 #define PHYRX_RSSI_LEGACY_6_PRE_RSSI_INFO_DETAILS_RSSI_EXT80_LOW_HIGH20_CHAIN1_OFFSET 0x00000018 667 #define PHYRX_RSSI_LEGACY_6_PRE_RSSI_INFO_DETAILS_RSSI_EXT80_LOW_HIGH20_CHAIN1_LSB 8 668 #define PHYRX_RSSI_LEGACY_6_PRE_RSSI_INFO_DETAILS_RSSI_EXT80_LOW_HIGH20_CHAIN1_MASK 0x0000ff00 669 670 /* Description PHYRX_RSSI_LEGACY_6_PRE_RSSI_INFO_DETAILS_RSSI_EXT80_HIGH_LOW20_CHAIN1 671 672 RSSI of RX PPDU on chain 1 of extension 80, high-low 20 673 MHz bandwidth. 674 675 Value of 0x80 indicates invalid. 676 */ 677 #define PHYRX_RSSI_LEGACY_6_PRE_RSSI_INFO_DETAILS_RSSI_EXT80_HIGH_LOW20_CHAIN1_OFFSET 0x00000018 678 #define PHYRX_RSSI_LEGACY_6_PRE_RSSI_INFO_DETAILS_RSSI_EXT80_HIGH_LOW20_CHAIN1_LSB 16 679 #define PHYRX_RSSI_LEGACY_6_PRE_RSSI_INFO_DETAILS_RSSI_EXT80_HIGH_LOW20_CHAIN1_MASK 0x00ff0000 680 681 /* Description PHYRX_RSSI_LEGACY_6_PRE_RSSI_INFO_DETAILS_RSSI_EXT80_HIGH20_CHAIN1 682 683 RSSI of RX PPDU on chain 1 of extension 80, high 20 MHz 684 bandwidth. 685 686 Value of 0x80 indicates invalid. 687 */ 688 #define PHYRX_RSSI_LEGACY_6_PRE_RSSI_INFO_DETAILS_RSSI_EXT80_HIGH20_CHAIN1_OFFSET 0x00000018 689 #define PHYRX_RSSI_LEGACY_6_PRE_RSSI_INFO_DETAILS_RSSI_EXT80_HIGH20_CHAIN1_LSB 24 690 #define PHYRX_RSSI_LEGACY_6_PRE_RSSI_INFO_DETAILS_RSSI_EXT80_HIGH20_CHAIN1_MASK 0xff000000 691 692 /* Description PHYRX_RSSI_LEGACY_7_PRE_RSSI_INFO_DETAILS_RSSI_PRI20_CHAIN2 693 694 RSSI of RX PPDU on chain 2 of primary 20 MHz bandwidth. 695 696 Value of 0x80 indicates invalid. 697 */ 698 #define PHYRX_RSSI_LEGACY_7_PRE_RSSI_INFO_DETAILS_RSSI_PRI20_CHAIN2_OFFSET 0x0000001c 699 #define PHYRX_RSSI_LEGACY_7_PRE_RSSI_INFO_DETAILS_RSSI_PRI20_CHAIN2_LSB 0 700 #define PHYRX_RSSI_LEGACY_7_PRE_RSSI_INFO_DETAILS_RSSI_PRI20_CHAIN2_MASK 0x000000ff 701 702 /* Description PHYRX_RSSI_LEGACY_7_PRE_RSSI_INFO_DETAILS_RSSI_EXT20_CHAIN2 703 704 RSSI of RX PPDU on chain 2 of extension 20 MHz 705 bandwidth. 706 707 Value of 0x80 indicates invalid. 708 */ 709 #define PHYRX_RSSI_LEGACY_7_PRE_RSSI_INFO_DETAILS_RSSI_EXT20_CHAIN2_OFFSET 0x0000001c 710 #define PHYRX_RSSI_LEGACY_7_PRE_RSSI_INFO_DETAILS_RSSI_EXT20_CHAIN2_LSB 8 711 #define PHYRX_RSSI_LEGACY_7_PRE_RSSI_INFO_DETAILS_RSSI_EXT20_CHAIN2_MASK 0x0000ff00 712 713 /* Description PHYRX_RSSI_LEGACY_7_PRE_RSSI_INFO_DETAILS_RSSI_EXT40_LOW20_CHAIN2 714 715 RSSI of RX PPDU on chain 2 of extension 40, low 20 MHz 716 bandwidth. 717 718 Value of 0x80 indicates invalid. 719 */ 720 #define PHYRX_RSSI_LEGACY_7_PRE_RSSI_INFO_DETAILS_RSSI_EXT40_LOW20_CHAIN2_OFFSET 0x0000001c 721 #define PHYRX_RSSI_LEGACY_7_PRE_RSSI_INFO_DETAILS_RSSI_EXT40_LOW20_CHAIN2_LSB 16 722 #define PHYRX_RSSI_LEGACY_7_PRE_RSSI_INFO_DETAILS_RSSI_EXT40_LOW20_CHAIN2_MASK 0x00ff0000 723 724 /* Description PHYRX_RSSI_LEGACY_7_PRE_RSSI_INFO_DETAILS_RSSI_EXT40_HIGH20_CHAIN2 725 726 RSSI of RX PPDU on chain 2 of extension 40, high 20 MHz 727 bandwidth. 728 729 Value of 0x80 indicates invalid. 730 */ 731 #define PHYRX_RSSI_LEGACY_7_PRE_RSSI_INFO_DETAILS_RSSI_EXT40_HIGH20_CHAIN2_OFFSET 0x0000001c 732 #define PHYRX_RSSI_LEGACY_7_PRE_RSSI_INFO_DETAILS_RSSI_EXT40_HIGH20_CHAIN2_LSB 24 733 #define PHYRX_RSSI_LEGACY_7_PRE_RSSI_INFO_DETAILS_RSSI_EXT40_HIGH20_CHAIN2_MASK 0xff000000 734 735 /* Description PHYRX_RSSI_LEGACY_8_PRE_RSSI_INFO_DETAILS_RSSI_EXT80_LOW20_CHAIN2 736 737 RSSI of RX PPDU on chain 2 of extension 80, low 20 MHz 738 bandwidth. 739 740 Value of 0x80 indicates invalid. 741 */ 742 #define PHYRX_RSSI_LEGACY_8_PRE_RSSI_INFO_DETAILS_RSSI_EXT80_LOW20_CHAIN2_OFFSET 0x00000020 743 #define PHYRX_RSSI_LEGACY_8_PRE_RSSI_INFO_DETAILS_RSSI_EXT80_LOW20_CHAIN2_LSB 0 744 #define PHYRX_RSSI_LEGACY_8_PRE_RSSI_INFO_DETAILS_RSSI_EXT80_LOW20_CHAIN2_MASK 0x000000ff 745 746 /* Description PHYRX_RSSI_LEGACY_8_PRE_RSSI_INFO_DETAILS_RSSI_EXT80_LOW_HIGH20_CHAIN2 747 748 RSSI of RX PPDU on chain 2 of extension 80, low-high 20 749 MHz bandwidth. 750 751 Value of 0x80 indicates invalid. 752 */ 753 #define PHYRX_RSSI_LEGACY_8_PRE_RSSI_INFO_DETAILS_RSSI_EXT80_LOW_HIGH20_CHAIN2_OFFSET 0x00000020 754 #define PHYRX_RSSI_LEGACY_8_PRE_RSSI_INFO_DETAILS_RSSI_EXT80_LOW_HIGH20_CHAIN2_LSB 8 755 #define PHYRX_RSSI_LEGACY_8_PRE_RSSI_INFO_DETAILS_RSSI_EXT80_LOW_HIGH20_CHAIN2_MASK 0x0000ff00 756 757 /* Description PHYRX_RSSI_LEGACY_8_PRE_RSSI_INFO_DETAILS_RSSI_EXT80_HIGH_LOW20_CHAIN2 758 759 RSSI of RX PPDU on chain 2 of extension 80, high-low 20 760 MHz bandwidth. 761 762 Value of 0x80 indicates invalid. 763 */ 764 #define PHYRX_RSSI_LEGACY_8_PRE_RSSI_INFO_DETAILS_RSSI_EXT80_HIGH_LOW20_CHAIN2_OFFSET 0x00000020 765 #define PHYRX_RSSI_LEGACY_8_PRE_RSSI_INFO_DETAILS_RSSI_EXT80_HIGH_LOW20_CHAIN2_LSB 16 766 #define PHYRX_RSSI_LEGACY_8_PRE_RSSI_INFO_DETAILS_RSSI_EXT80_HIGH_LOW20_CHAIN2_MASK 0x00ff0000 767 768 /* Description PHYRX_RSSI_LEGACY_8_PRE_RSSI_INFO_DETAILS_RSSI_EXT80_HIGH20_CHAIN2 769 770 RSSI of RX PPDU on chain 2 of extension 80, high 20 MHz 771 bandwidth. 772 773 Value of 0x80 indicates invalid. 774 */ 775 #define PHYRX_RSSI_LEGACY_8_PRE_RSSI_INFO_DETAILS_RSSI_EXT80_HIGH20_CHAIN2_OFFSET 0x00000020 776 #define PHYRX_RSSI_LEGACY_8_PRE_RSSI_INFO_DETAILS_RSSI_EXT80_HIGH20_CHAIN2_LSB 24 777 #define PHYRX_RSSI_LEGACY_8_PRE_RSSI_INFO_DETAILS_RSSI_EXT80_HIGH20_CHAIN2_MASK 0xff000000 778 779 /* Description PHYRX_RSSI_LEGACY_9_PRE_RSSI_INFO_DETAILS_RSSI_PRI20_CHAIN3 780 781 RSSI of RX PPDU on chain 3 of primary 20 MHz bandwidth. 782 783 Value of 0x80 indicates invalid. 784 */ 785 #define PHYRX_RSSI_LEGACY_9_PRE_RSSI_INFO_DETAILS_RSSI_PRI20_CHAIN3_OFFSET 0x00000024 786 #define PHYRX_RSSI_LEGACY_9_PRE_RSSI_INFO_DETAILS_RSSI_PRI20_CHAIN3_LSB 0 787 #define PHYRX_RSSI_LEGACY_9_PRE_RSSI_INFO_DETAILS_RSSI_PRI20_CHAIN3_MASK 0x000000ff 788 789 /* Description PHYRX_RSSI_LEGACY_9_PRE_RSSI_INFO_DETAILS_RSSI_EXT20_CHAIN3 790 791 RSSI of RX PPDU on chain 3 of extension 20 MHz 792 bandwidth. 793 794 Value of 0x80 indicates invalid. 795 */ 796 #define PHYRX_RSSI_LEGACY_9_PRE_RSSI_INFO_DETAILS_RSSI_EXT20_CHAIN3_OFFSET 0x00000024 797 #define PHYRX_RSSI_LEGACY_9_PRE_RSSI_INFO_DETAILS_RSSI_EXT20_CHAIN3_LSB 8 798 #define PHYRX_RSSI_LEGACY_9_PRE_RSSI_INFO_DETAILS_RSSI_EXT20_CHAIN3_MASK 0x0000ff00 799 800 /* Description PHYRX_RSSI_LEGACY_9_PRE_RSSI_INFO_DETAILS_RSSI_EXT40_LOW20_CHAIN3 801 802 RSSI of RX PPDU on chain 3 of extension 40, low 20 MHz 803 bandwidth. 804 805 Value of 0x80 indicates invalid. 806 */ 807 #define PHYRX_RSSI_LEGACY_9_PRE_RSSI_INFO_DETAILS_RSSI_EXT40_LOW20_CHAIN3_OFFSET 0x00000024 808 #define PHYRX_RSSI_LEGACY_9_PRE_RSSI_INFO_DETAILS_RSSI_EXT40_LOW20_CHAIN3_LSB 16 809 #define PHYRX_RSSI_LEGACY_9_PRE_RSSI_INFO_DETAILS_RSSI_EXT40_LOW20_CHAIN3_MASK 0x00ff0000 810 811 /* Description PHYRX_RSSI_LEGACY_9_PRE_RSSI_INFO_DETAILS_RSSI_EXT40_HIGH20_CHAIN3 812 813 RSSI of RX PPDU on chain 3 of extension 40, high 20 MHz 814 bandwidth. 815 816 Value of 0x80 indicates invalid. 817 */ 818 #define PHYRX_RSSI_LEGACY_9_PRE_RSSI_INFO_DETAILS_RSSI_EXT40_HIGH20_CHAIN3_OFFSET 0x00000024 819 #define PHYRX_RSSI_LEGACY_9_PRE_RSSI_INFO_DETAILS_RSSI_EXT40_HIGH20_CHAIN3_LSB 24 820 #define PHYRX_RSSI_LEGACY_9_PRE_RSSI_INFO_DETAILS_RSSI_EXT40_HIGH20_CHAIN3_MASK 0xff000000 821 822 /* Description PHYRX_RSSI_LEGACY_10_PRE_RSSI_INFO_DETAILS_RSSI_EXT80_LOW20_CHAIN3 823 824 RSSI of RX PPDU on chain 3 of extension 80, low 20 MHz 825 bandwidth. 826 827 Value of 0x80 indicates invalid. 828 */ 829 #define PHYRX_RSSI_LEGACY_10_PRE_RSSI_INFO_DETAILS_RSSI_EXT80_LOW20_CHAIN3_OFFSET 0x00000028 830 #define PHYRX_RSSI_LEGACY_10_PRE_RSSI_INFO_DETAILS_RSSI_EXT80_LOW20_CHAIN3_LSB 0 831 #define PHYRX_RSSI_LEGACY_10_PRE_RSSI_INFO_DETAILS_RSSI_EXT80_LOW20_CHAIN3_MASK 0x000000ff 832 833 /* Description PHYRX_RSSI_LEGACY_10_PRE_RSSI_INFO_DETAILS_RSSI_EXT80_LOW_HIGH20_CHAIN3 834 835 RSSI of RX PPDU on chain 3 of extension 80, low-high 20 836 MHz bandwidth. 837 838 Value of 0x80 indicates invalid. 839 */ 840 #define PHYRX_RSSI_LEGACY_10_PRE_RSSI_INFO_DETAILS_RSSI_EXT80_LOW_HIGH20_CHAIN3_OFFSET 0x00000028 841 #define PHYRX_RSSI_LEGACY_10_PRE_RSSI_INFO_DETAILS_RSSI_EXT80_LOW_HIGH20_CHAIN3_LSB 8 842 #define PHYRX_RSSI_LEGACY_10_PRE_RSSI_INFO_DETAILS_RSSI_EXT80_LOW_HIGH20_CHAIN3_MASK 0x0000ff00 843 844 /* Description PHYRX_RSSI_LEGACY_10_PRE_RSSI_INFO_DETAILS_RSSI_EXT80_HIGH_LOW20_CHAIN3 845 846 RSSI of RX PPDU on chain 3 of extension 80, high-low 20 847 MHz bandwidth. 848 849 Value of 0x80 indicates invalid. 850 */ 851 #define PHYRX_RSSI_LEGACY_10_PRE_RSSI_INFO_DETAILS_RSSI_EXT80_HIGH_LOW20_CHAIN3_OFFSET 0x00000028 852 #define PHYRX_RSSI_LEGACY_10_PRE_RSSI_INFO_DETAILS_RSSI_EXT80_HIGH_LOW20_CHAIN3_LSB 16 853 #define PHYRX_RSSI_LEGACY_10_PRE_RSSI_INFO_DETAILS_RSSI_EXT80_HIGH_LOW20_CHAIN3_MASK 0x00ff0000 854 855 /* Description PHYRX_RSSI_LEGACY_10_PRE_RSSI_INFO_DETAILS_RSSI_EXT80_HIGH20_CHAIN3 856 857 RSSI of RX PPDU on chain 3 of extension 80, high 20 MHz 858 bandwidth. 859 860 Value of 0x80 indicates invalid. 861 */ 862 #define PHYRX_RSSI_LEGACY_10_PRE_RSSI_INFO_DETAILS_RSSI_EXT80_HIGH20_CHAIN3_OFFSET 0x00000028 863 #define PHYRX_RSSI_LEGACY_10_PRE_RSSI_INFO_DETAILS_RSSI_EXT80_HIGH20_CHAIN3_LSB 24 864 #define PHYRX_RSSI_LEGACY_10_PRE_RSSI_INFO_DETAILS_RSSI_EXT80_HIGH20_CHAIN3_MASK 0xff000000 865 866 /* Description PHYRX_RSSI_LEGACY_11_PRE_RSSI_INFO_DETAILS_RSSI_PRI20_CHAIN4 867 868 RSSI of RX PPDU on chain 4 of primary 20 MHz bandwidth. 869 870 Value of 0x80 indicates invalid. 871 */ 872 #define PHYRX_RSSI_LEGACY_11_PRE_RSSI_INFO_DETAILS_RSSI_PRI20_CHAIN4_OFFSET 0x0000002c 873 #define PHYRX_RSSI_LEGACY_11_PRE_RSSI_INFO_DETAILS_RSSI_PRI20_CHAIN4_LSB 0 874 #define PHYRX_RSSI_LEGACY_11_PRE_RSSI_INFO_DETAILS_RSSI_PRI20_CHAIN4_MASK 0x000000ff 875 876 /* Description PHYRX_RSSI_LEGACY_11_PRE_RSSI_INFO_DETAILS_RSSI_EXT20_CHAIN4 877 878 RSSI of RX PPDU on chain 4 of extension 20 MHz 879 bandwidth. 880 881 Value of 0x80 indicates invalid. 882 */ 883 #define PHYRX_RSSI_LEGACY_11_PRE_RSSI_INFO_DETAILS_RSSI_EXT20_CHAIN4_OFFSET 0x0000002c 884 #define PHYRX_RSSI_LEGACY_11_PRE_RSSI_INFO_DETAILS_RSSI_EXT20_CHAIN4_LSB 8 885 #define PHYRX_RSSI_LEGACY_11_PRE_RSSI_INFO_DETAILS_RSSI_EXT20_CHAIN4_MASK 0x0000ff00 886 887 /* Description PHYRX_RSSI_LEGACY_11_PRE_RSSI_INFO_DETAILS_RSSI_EXT40_LOW20_CHAIN4 888 889 RSSI of RX PPDU on chain 4 of extension 40, low 20 MHz 890 bandwidth. 891 892 Value of 0x80 indicates invalid. 893 */ 894 #define PHYRX_RSSI_LEGACY_11_PRE_RSSI_INFO_DETAILS_RSSI_EXT40_LOW20_CHAIN4_OFFSET 0x0000002c 895 #define PHYRX_RSSI_LEGACY_11_PRE_RSSI_INFO_DETAILS_RSSI_EXT40_LOW20_CHAIN4_LSB 16 896 #define PHYRX_RSSI_LEGACY_11_PRE_RSSI_INFO_DETAILS_RSSI_EXT40_LOW20_CHAIN4_MASK 0x00ff0000 897 898 /* Description PHYRX_RSSI_LEGACY_11_PRE_RSSI_INFO_DETAILS_RSSI_EXT40_HIGH20_CHAIN4 899 900 RSSI of RX PPDU on chain 4 of extension 40, high 20 MHz 901 bandwidth. 902 903 Value of 0x80 indicates invalid. 904 */ 905 #define PHYRX_RSSI_LEGACY_11_PRE_RSSI_INFO_DETAILS_RSSI_EXT40_HIGH20_CHAIN4_OFFSET 0x0000002c 906 #define PHYRX_RSSI_LEGACY_11_PRE_RSSI_INFO_DETAILS_RSSI_EXT40_HIGH20_CHAIN4_LSB 24 907 #define PHYRX_RSSI_LEGACY_11_PRE_RSSI_INFO_DETAILS_RSSI_EXT40_HIGH20_CHAIN4_MASK 0xff000000 908 909 /* Description PHYRX_RSSI_LEGACY_12_PRE_RSSI_INFO_DETAILS_RSSI_EXT80_LOW20_CHAIN4 910 911 RSSI of RX PPDU on chain 4 of extension 80, low 20 MHz 912 bandwidth. 913 914 Value of 0x80 indicates invalid. 915 */ 916 #define PHYRX_RSSI_LEGACY_12_PRE_RSSI_INFO_DETAILS_RSSI_EXT80_LOW20_CHAIN4_OFFSET 0x00000030 917 #define PHYRX_RSSI_LEGACY_12_PRE_RSSI_INFO_DETAILS_RSSI_EXT80_LOW20_CHAIN4_LSB 0 918 #define PHYRX_RSSI_LEGACY_12_PRE_RSSI_INFO_DETAILS_RSSI_EXT80_LOW20_CHAIN4_MASK 0x000000ff 919 920 /* Description PHYRX_RSSI_LEGACY_12_PRE_RSSI_INFO_DETAILS_RSSI_EXT80_LOW_HIGH20_CHAIN4 921 922 RSSI of RX PPDU on chain 4 of extension 80, low-high 20 923 MHz bandwidth. 924 925 Value of 0x80 indicates invalid. 926 */ 927 #define PHYRX_RSSI_LEGACY_12_PRE_RSSI_INFO_DETAILS_RSSI_EXT80_LOW_HIGH20_CHAIN4_OFFSET 0x00000030 928 #define PHYRX_RSSI_LEGACY_12_PRE_RSSI_INFO_DETAILS_RSSI_EXT80_LOW_HIGH20_CHAIN4_LSB 8 929 #define PHYRX_RSSI_LEGACY_12_PRE_RSSI_INFO_DETAILS_RSSI_EXT80_LOW_HIGH20_CHAIN4_MASK 0x0000ff00 930 931 /* Description PHYRX_RSSI_LEGACY_12_PRE_RSSI_INFO_DETAILS_RSSI_EXT80_HIGH_LOW20_CHAIN4 932 933 RSSI of RX PPDU on chain 4 of extension 80, high-low 20 934 MHz bandwidth. 935 936 Value of 0x80 indicates invalid. 937 */ 938 #define PHYRX_RSSI_LEGACY_12_PRE_RSSI_INFO_DETAILS_RSSI_EXT80_HIGH_LOW20_CHAIN4_OFFSET 0x00000030 939 #define PHYRX_RSSI_LEGACY_12_PRE_RSSI_INFO_DETAILS_RSSI_EXT80_HIGH_LOW20_CHAIN4_LSB 16 940 #define PHYRX_RSSI_LEGACY_12_PRE_RSSI_INFO_DETAILS_RSSI_EXT80_HIGH_LOW20_CHAIN4_MASK 0x00ff0000 941 942 /* Description PHYRX_RSSI_LEGACY_12_PRE_RSSI_INFO_DETAILS_RSSI_EXT80_HIGH20_CHAIN4 943 944 RSSI of RX PPDU on chain 4 of extension 80, high 20 MHz 945 bandwidth. 946 947 Value of 0x80 indicates invalid. 948 */ 949 #define PHYRX_RSSI_LEGACY_12_PRE_RSSI_INFO_DETAILS_RSSI_EXT80_HIGH20_CHAIN4_OFFSET 0x00000030 950 #define PHYRX_RSSI_LEGACY_12_PRE_RSSI_INFO_DETAILS_RSSI_EXT80_HIGH20_CHAIN4_LSB 24 951 #define PHYRX_RSSI_LEGACY_12_PRE_RSSI_INFO_DETAILS_RSSI_EXT80_HIGH20_CHAIN4_MASK 0xff000000 952 953 /* Description PHYRX_RSSI_LEGACY_13_PRE_RSSI_INFO_DETAILS_RSSI_PRI20_CHAIN5 954 955 RSSI of RX PPDU on chain 0 of primary 20 MHz bandwidth. 956 957 Value of 0x80 indicates invalid. 958 */ 959 #define PHYRX_RSSI_LEGACY_13_PRE_RSSI_INFO_DETAILS_RSSI_PRI20_CHAIN5_OFFSET 0x00000034 960 #define PHYRX_RSSI_LEGACY_13_PRE_RSSI_INFO_DETAILS_RSSI_PRI20_CHAIN5_LSB 0 961 #define PHYRX_RSSI_LEGACY_13_PRE_RSSI_INFO_DETAILS_RSSI_PRI20_CHAIN5_MASK 0x000000ff 962 963 /* Description PHYRX_RSSI_LEGACY_13_PRE_RSSI_INFO_DETAILS_RSSI_EXT20_CHAIN5 964 965 RSSI of RX PPDU on chain 5 of extension 20 MHz 966 bandwidth. 967 968 Value of 0x80 indicates invalid. 969 */ 970 #define PHYRX_RSSI_LEGACY_13_PRE_RSSI_INFO_DETAILS_RSSI_EXT20_CHAIN5_OFFSET 0x00000034 971 #define PHYRX_RSSI_LEGACY_13_PRE_RSSI_INFO_DETAILS_RSSI_EXT20_CHAIN5_LSB 8 972 #define PHYRX_RSSI_LEGACY_13_PRE_RSSI_INFO_DETAILS_RSSI_EXT20_CHAIN5_MASK 0x0000ff00 973 974 /* Description PHYRX_RSSI_LEGACY_13_PRE_RSSI_INFO_DETAILS_RSSI_EXT40_LOW20_CHAIN5 975 976 RSSI of RX PPDU on chain 5 of extension 40, low 20 MHz 977 bandwidth. 978 979 Value of 0x80 indicates invalid. 980 */ 981 #define PHYRX_RSSI_LEGACY_13_PRE_RSSI_INFO_DETAILS_RSSI_EXT40_LOW20_CHAIN5_OFFSET 0x00000034 982 #define PHYRX_RSSI_LEGACY_13_PRE_RSSI_INFO_DETAILS_RSSI_EXT40_LOW20_CHAIN5_LSB 16 983 #define PHYRX_RSSI_LEGACY_13_PRE_RSSI_INFO_DETAILS_RSSI_EXT40_LOW20_CHAIN5_MASK 0x00ff0000 984 985 /* Description PHYRX_RSSI_LEGACY_13_PRE_RSSI_INFO_DETAILS_RSSI_EXT40_HIGH20_CHAIN5 986 987 RSSI of RX PPDU on chain 5 of extension 40, high 20 MHz 988 bandwidth. 989 990 Value of 0x80 indicates invalid. 991 */ 992 #define PHYRX_RSSI_LEGACY_13_PRE_RSSI_INFO_DETAILS_RSSI_EXT40_HIGH20_CHAIN5_OFFSET 0x00000034 993 #define PHYRX_RSSI_LEGACY_13_PRE_RSSI_INFO_DETAILS_RSSI_EXT40_HIGH20_CHAIN5_LSB 24 994 #define PHYRX_RSSI_LEGACY_13_PRE_RSSI_INFO_DETAILS_RSSI_EXT40_HIGH20_CHAIN5_MASK 0xff000000 995 996 /* Description PHYRX_RSSI_LEGACY_14_PRE_RSSI_INFO_DETAILS_RSSI_EXT80_LOW20_CHAIN5 997 998 RSSI of RX PPDU on chain 5 of extension 80, low 20 MHz 999 bandwidth. 1000 1001 Value of 0x80 indicates invalid. 1002 */ 1003 #define PHYRX_RSSI_LEGACY_14_PRE_RSSI_INFO_DETAILS_RSSI_EXT80_LOW20_CHAIN5_OFFSET 0x00000038 1004 #define PHYRX_RSSI_LEGACY_14_PRE_RSSI_INFO_DETAILS_RSSI_EXT80_LOW20_CHAIN5_LSB 0 1005 #define PHYRX_RSSI_LEGACY_14_PRE_RSSI_INFO_DETAILS_RSSI_EXT80_LOW20_CHAIN5_MASK 0x000000ff 1006 1007 /* Description PHYRX_RSSI_LEGACY_14_PRE_RSSI_INFO_DETAILS_RSSI_EXT80_LOW_HIGH20_CHAIN5 1008 1009 RSSI of RX PPDU on chain 5 of extension 80, low-high 20 1010 MHz bandwidth. 1011 1012 Value of 0x80 indicates invalid. 1013 */ 1014 #define PHYRX_RSSI_LEGACY_14_PRE_RSSI_INFO_DETAILS_RSSI_EXT80_LOW_HIGH20_CHAIN5_OFFSET 0x00000038 1015 #define PHYRX_RSSI_LEGACY_14_PRE_RSSI_INFO_DETAILS_RSSI_EXT80_LOW_HIGH20_CHAIN5_LSB 8 1016 #define PHYRX_RSSI_LEGACY_14_PRE_RSSI_INFO_DETAILS_RSSI_EXT80_LOW_HIGH20_CHAIN5_MASK 0x0000ff00 1017 1018 /* Description PHYRX_RSSI_LEGACY_14_PRE_RSSI_INFO_DETAILS_RSSI_EXT80_HIGH_LOW20_CHAIN5 1019 1020 RSSI of RX PPDU on chain 5 of extension 80, high-low 20 1021 MHz bandwidth. 1022 1023 Value of 0x80 indicates invalid. 1024 */ 1025 #define PHYRX_RSSI_LEGACY_14_PRE_RSSI_INFO_DETAILS_RSSI_EXT80_HIGH_LOW20_CHAIN5_OFFSET 0x00000038 1026 #define PHYRX_RSSI_LEGACY_14_PRE_RSSI_INFO_DETAILS_RSSI_EXT80_HIGH_LOW20_CHAIN5_LSB 16 1027 #define PHYRX_RSSI_LEGACY_14_PRE_RSSI_INFO_DETAILS_RSSI_EXT80_HIGH_LOW20_CHAIN5_MASK 0x00ff0000 1028 1029 /* Description PHYRX_RSSI_LEGACY_14_PRE_RSSI_INFO_DETAILS_RSSI_EXT80_HIGH20_CHAIN5 1030 1031 RSSI of RX PPDU on chain 5 of extension 80, high 20 MHz 1032 bandwidth. 1033 1034 Value of 0x80 indicates invalid. 1035 */ 1036 #define PHYRX_RSSI_LEGACY_14_PRE_RSSI_INFO_DETAILS_RSSI_EXT80_HIGH20_CHAIN5_OFFSET 0x00000038 1037 #define PHYRX_RSSI_LEGACY_14_PRE_RSSI_INFO_DETAILS_RSSI_EXT80_HIGH20_CHAIN5_LSB 24 1038 #define PHYRX_RSSI_LEGACY_14_PRE_RSSI_INFO_DETAILS_RSSI_EXT80_HIGH20_CHAIN5_MASK 0xff000000 1039 1040 /* Description PHYRX_RSSI_LEGACY_15_PRE_RSSI_INFO_DETAILS_RSSI_PRI20_CHAIN6 1041 1042 RSSI of RX PPDU on chain 6 of primary 20 MHz bandwidth. 1043 1044 Value of 0x80 indicates invalid. 1045 */ 1046 #define PHYRX_RSSI_LEGACY_15_PRE_RSSI_INFO_DETAILS_RSSI_PRI20_CHAIN6_OFFSET 0x0000003c 1047 #define PHYRX_RSSI_LEGACY_15_PRE_RSSI_INFO_DETAILS_RSSI_PRI20_CHAIN6_LSB 0 1048 #define PHYRX_RSSI_LEGACY_15_PRE_RSSI_INFO_DETAILS_RSSI_PRI20_CHAIN6_MASK 0x000000ff 1049 1050 /* Description PHYRX_RSSI_LEGACY_15_PRE_RSSI_INFO_DETAILS_RSSI_EXT20_CHAIN6 1051 1052 RSSI of RX PPDU on chain 6 of extension 20 MHz 1053 bandwidth. 1054 1055 Value of 0x80 indicates invalid. 1056 */ 1057 #define PHYRX_RSSI_LEGACY_15_PRE_RSSI_INFO_DETAILS_RSSI_EXT20_CHAIN6_OFFSET 0x0000003c 1058 #define PHYRX_RSSI_LEGACY_15_PRE_RSSI_INFO_DETAILS_RSSI_EXT20_CHAIN6_LSB 8 1059 #define PHYRX_RSSI_LEGACY_15_PRE_RSSI_INFO_DETAILS_RSSI_EXT20_CHAIN6_MASK 0x0000ff00 1060 1061 /* Description PHYRX_RSSI_LEGACY_15_PRE_RSSI_INFO_DETAILS_RSSI_EXT40_LOW20_CHAIN6 1062 1063 RSSI of RX PPDU on chain 6 of extension 40, low 20 MHz 1064 bandwidth. 1065 1066 Value of 0x80 indicates invalid. 1067 */ 1068 #define PHYRX_RSSI_LEGACY_15_PRE_RSSI_INFO_DETAILS_RSSI_EXT40_LOW20_CHAIN6_OFFSET 0x0000003c 1069 #define PHYRX_RSSI_LEGACY_15_PRE_RSSI_INFO_DETAILS_RSSI_EXT40_LOW20_CHAIN6_LSB 16 1070 #define PHYRX_RSSI_LEGACY_15_PRE_RSSI_INFO_DETAILS_RSSI_EXT40_LOW20_CHAIN6_MASK 0x00ff0000 1071 1072 /* Description PHYRX_RSSI_LEGACY_15_PRE_RSSI_INFO_DETAILS_RSSI_EXT40_HIGH20_CHAIN6 1073 1074 RSSI of RX PPDU on chain 6 of extension 40, high 20 MHz 1075 bandwidth. 1076 1077 Value of 0x80 indicates invalid. 1078 */ 1079 #define PHYRX_RSSI_LEGACY_15_PRE_RSSI_INFO_DETAILS_RSSI_EXT40_HIGH20_CHAIN6_OFFSET 0x0000003c 1080 #define PHYRX_RSSI_LEGACY_15_PRE_RSSI_INFO_DETAILS_RSSI_EXT40_HIGH20_CHAIN6_LSB 24 1081 #define PHYRX_RSSI_LEGACY_15_PRE_RSSI_INFO_DETAILS_RSSI_EXT40_HIGH20_CHAIN6_MASK 0xff000000 1082 1083 /* Description PHYRX_RSSI_LEGACY_16_PRE_RSSI_INFO_DETAILS_RSSI_EXT80_LOW20_CHAIN6 1084 1085 RSSI of RX PPDU on chain 6 of extension 80, low 20 MHz 1086 bandwidth. 1087 1088 Value of 0x80 indicates invalid. 1089 */ 1090 #define PHYRX_RSSI_LEGACY_16_PRE_RSSI_INFO_DETAILS_RSSI_EXT80_LOW20_CHAIN6_OFFSET 0x00000040 1091 #define PHYRX_RSSI_LEGACY_16_PRE_RSSI_INFO_DETAILS_RSSI_EXT80_LOW20_CHAIN6_LSB 0 1092 #define PHYRX_RSSI_LEGACY_16_PRE_RSSI_INFO_DETAILS_RSSI_EXT80_LOW20_CHAIN6_MASK 0x000000ff 1093 1094 /* Description PHYRX_RSSI_LEGACY_16_PRE_RSSI_INFO_DETAILS_RSSI_EXT80_LOW_HIGH20_CHAIN6 1095 1096 RSSI of RX PPDU on chain 6 of extension 80, low-high 20 1097 MHz bandwidth. 1098 1099 Value of 0x80 indicates invalid. 1100 */ 1101 #define PHYRX_RSSI_LEGACY_16_PRE_RSSI_INFO_DETAILS_RSSI_EXT80_LOW_HIGH20_CHAIN6_OFFSET 0x00000040 1102 #define PHYRX_RSSI_LEGACY_16_PRE_RSSI_INFO_DETAILS_RSSI_EXT80_LOW_HIGH20_CHAIN6_LSB 8 1103 #define PHYRX_RSSI_LEGACY_16_PRE_RSSI_INFO_DETAILS_RSSI_EXT80_LOW_HIGH20_CHAIN6_MASK 0x0000ff00 1104 1105 /* Description PHYRX_RSSI_LEGACY_16_PRE_RSSI_INFO_DETAILS_RSSI_EXT80_HIGH_LOW20_CHAIN6 1106 1107 RSSI of RX PPDU on chain 6 of extension 80, high-low 20 1108 MHz bandwidth. 1109 1110 Value of 0x80 indicates invalid. 1111 */ 1112 #define PHYRX_RSSI_LEGACY_16_PRE_RSSI_INFO_DETAILS_RSSI_EXT80_HIGH_LOW20_CHAIN6_OFFSET 0x00000040 1113 #define PHYRX_RSSI_LEGACY_16_PRE_RSSI_INFO_DETAILS_RSSI_EXT80_HIGH_LOW20_CHAIN6_LSB 16 1114 #define PHYRX_RSSI_LEGACY_16_PRE_RSSI_INFO_DETAILS_RSSI_EXT80_HIGH_LOW20_CHAIN6_MASK 0x00ff0000 1115 1116 /* Description PHYRX_RSSI_LEGACY_16_PRE_RSSI_INFO_DETAILS_RSSI_EXT80_HIGH20_CHAIN6 1117 1118 RSSI of RX PPDU on chain 6 of extension 80, high 20 MHz 1119 bandwidth. 1120 1121 Value of 0x80 indicates invalid. 1122 */ 1123 #define PHYRX_RSSI_LEGACY_16_PRE_RSSI_INFO_DETAILS_RSSI_EXT80_HIGH20_CHAIN6_OFFSET 0x00000040 1124 #define PHYRX_RSSI_LEGACY_16_PRE_RSSI_INFO_DETAILS_RSSI_EXT80_HIGH20_CHAIN6_LSB 24 1125 #define PHYRX_RSSI_LEGACY_16_PRE_RSSI_INFO_DETAILS_RSSI_EXT80_HIGH20_CHAIN6_MASK 0xff000000 1126 1127 /* Description PHYRX_RSSI_LEGACY_17_PRE_RSSI_INFO_DETAILS_RSSI_PRI20_CHAIN7 1128 1129 RSSI of RX PPDU on chain 7 of primary 20 MHz bandwidth. 1130 1131 Value of 0x80 indicates invalid. 1132 */ 1133 #define PHYRX_RSSI_LEGACY_17_PRE_RSSI_INFO_DETAILS_RSSI_PRI20_CHAIN7_OFFSET 0x00000044 1134 #define PHYRX_RSSI_LEGACY_17_PRE_RSSI_INFO_DETAILS_RSSI_PRI20_CHAIN7_LSB 0 1135 #define PHYRX_RSSI_LEGACY_17_PRE_RSSI_INFO_DETAILS_RSSI_PRI20_CHAIN7_MASK 0x000000ff 1136 1137 /* Description PHYRX_RSSI_LEGACY_17_PRE_RSSI_INFO_DETAILS_RSSI_EXT20_CHAIN7 1138 1139 RSSI of RX PPDU on chain 7 of extension 20 MHz 1140 bandwidth. 1141 1142 Value of 0x80 indicates invalid. 1143 */ 1144 #define PHYRX_RSSI_LEGACY_17_PRE_RSSI_INFO_DETAILS_RSSI_EXT20_CHAIN7_OFFSET 0x00000044 1145 #define PHYRX_RSSI_LEGACY_17_PRE_RSSI_INFO_DETAILS_RSSI_EXT20_CHAIN7_LSB 8 1146 #define PHYRX_RSSI_LEGACY_17_PRE_RSSI_INFO_DETAILS_RSSI_EXT20_CHAIN7_MASK 0x0000ff00 1147 1148 /* Description PHYRX_RSSI_LEGACY_17_PRE_RSSI_INFO_DETAILS_RSSI_EXT40_LOW20_CHAIN7 1149 1150 RSSI of RX PPDU on chain 7 of extension 40, low 20 MHz 1151 bandwidth. 1152 1153 Value of 0x80 indicates invalid. 1154 */ 1155 #define PHYRX_RSSI_LEGACY_17_PRE_RSSI_INFO_DETAILS_RSSI_EXT40_LOW20_CHAIN7_OFFSET 0x00000044 1156 #define PHYRX_RSSI_LEGACY_17_PRE_RSSI_INFO_DETAILS_RSSI_EXT40_LOW20_CHAIN7_LSB 16 1157 #define PHYRX_RSSI_LEGACY_17_PRE_RSSI_INFO_DETAILS_RSSI_EXT40_LOW20_CHAIN7_MASK 0x00ff0000 1158 1159 /* Description PHYRX_RSSI_LEGACY_17_PRE_RSSI_INFO_DETAILS_RSSI_EXT40_HIGH20_CHAIN7 1160 1161 RSSI of RX PPDU on chain 7 of extension 40, high 20 MHz 1162 bandwidth. 1163 1164 Value of 0x80 indicates invalid. 1165 */ 1166 #define PHYRX_RSSI_LEGACY_17_PRE_RSSI_INFO_DETAILS_RSSI_EXT40_HIGH20_CHAIN7_OFFSET 0x00000044 1167 #define PHYRX_RSSI_LEGACY_17_PRE_RSSI_INFO_DETAILS_RSSI_EXT40_HIGH20_CHAIN7_LSB 24 1168 #define PHYRX_RSSI_LEGACY_17_PRE_RSSI_INFO_DETAILS_RSSI_EXT40_HIGH20_CHAIN7_MASK 0xff000000 1169 1170 /* Description PHYRX_RSSI_LEGACY_18_PRE_RSSI_INFO_DETAILS_RSSI_EXT80_LOW20_CHAIN7 1171 1172 RSSI of RX PPDU on chain 7 of extension 80, low 20 MHz 1173 bandwidth. 1174 1175 Value of 0x80 indicates invalid. 1176 */ 1177 #define PHYRX_RSSI_LEGACY_18_PRE_RSSI_INFO_DETAILS_RSSI_EXT80_LOW20_CHAIN7_OFFSET 0x00000048 1178 #define PHYRX_RSSI_LEGACY_18_PRE_RSSI_INFO_DETAILS_RSSI_EXT80_LOW20_CHAIN7_LSB 0 1179 #define PHYRX_RSSI_LEGACY_18_PRE_RSSI_INFO_DETAILS_RSSI_EXT80_LOW20_CHAIN7_MASK 0x000000ff 1180 1181 /* Description PHYRX_RSSI_LEGACY_18_PRE_RSSI_INFO_DETAILS_RSSI_EXT80_LOW_HIGH20_CHAIN7 1182 1183 RSSI of RX PPDU on chain 7 of extension 80, low-high 20 1184 MHz bandwidth. 1185 1186 Value of 0x80 indicates invalid. 1187 */ 1188 #define PHYRX_RSSI_LEGACY_18_PRE_RSSI_INFO_DETAILS_RSSI_EXT80_LOW_HIGH20_CHAIN7_OFFSET 0x00000048 1189 #define PHYRX_RSSI_LEGACY_18_PRE_RSSI_INFO_DETAILS_RSSI_EXT80_LOW_HIGH20_CHAIN7_LSB 8 1190 #define PHYRX_RSSI_LEGACY_18_PRE_RSSI_INFO_DETAILS_RSSI_EXT80_LOW_HIGH20_CHAIN7_MASK 0x0000ff00 1191 1192 /* Description PHYRX_RSSI_LEGACY_18_PRE_RSSI_INFO_DETAILS_RSSI_EXT80_HIGH_LOW20_CHAIN7 1193 1194 RSSI of RX PPDU on chain 7 of extension 80, high-low 20 1195 MHz bandwidth. 1196 1197 Value of 0x80 indicates invalid. 1198 */ 1199 #define PHYRX_RSSI_LEGACY_18_PRE_RSSI_INFO_DETAILS_RSSI_EXT80_HIGH_LOW20_CHAIN7_OFFSET 0x00000048 1200 #define PHYRX_RSSI_LEGACY_18_PRE_RSSI_INFO_DETAILS_RSSI_EXT80_HIGH_LOW20_CHAIN7_LSB 16 1201 #define PHYRX_RSSI_LEGACY_18_PRE_RSSI_INFO_DETAILS_RSSI_EXT80_HIGH_LOW20_CHAIN7_MASK 0x00ff0000 1202 1203 /* Description PHYRX_RSSI_LEGACY_18_PRE_RSSI_INFO_DETAILS_RSSI_EXT80_HIGH20_CHAIN7 1204 1205 RSSI of RX PPDU on chain 7 of extension 80, high 20 MHz 1206 bandwidth. 1207 1208 Value of 0x80 indicates invalid. 1209 */ 1210 #define PHYRX_RSSI_LEGACY_18_PRE_RSSI_INFO_DETAILS_RSSI_EXT80_HIGH20_CHAIN7_OFFSET 0x00000048 1211 #define PHYRX_RSSI_LEGACY_18_PRE_RSSI_INFO_DETAILS_RSSI_EXT80_HIGH20_CHAIN7_LSB 24 1212 #define PHYRX_RSSI_LEGACY_18_PRE_RSSI_INFO_DETAILS_RSSI_EXT80_HIGH20_CHAIN7_MASK 0xff000000 1213 1214 /* EXTERNAL REFERENCE : struct receive_rssi_info preamble_rssi_info_details */ 1215 1216 1217 /* Description PHYRX_RSSI_LEGACY_19_PREAMBLE_RSSI_INFO_DETAILS_RSSI_PRI20_CHAIN0 1218 1219 RSSI of RX PPDU on chain 0 of primary 20 MHz bandwidth. 1220 1221 Value of 0x80 indicates invalid. 1222 */ 1223 #define PHYRX_RSSI_LEGACY_19_PREAMBLE_RSSI_INFO_DETAILS_RSSI_PRI20_CHAIN0_OFFSET 0x0000004c 1224 #define PHYRX_RSSI_LEGACY_19_PREAMBLE_RSSI_INFO_DETAILS_RSSI_PRI20_CHAIN0_LSB 0 1225 #define PHYRX_RSSI_LEGACY_19_PREAMBLE_RSSI_INFO_DETAILS_RSSI_PRI20_CHAIN0_MASK 0x000000ff 1226 1227 /* Description PHYRX_RSSI_LEGACY_19_PREAMBLE_RSSI_INFO_DETAILS_RSSI_EXT20_CHAIN0 1228 1229 RSSI of RX PPDU on chain 0 of extension 20 MHz 1230 bandwidth. 1231 1232 Value of 0x80 indicates invalid. 1233 */ 1234 #define PHYRX_RSSI_LEGACY_19_PREAMBLE_RSSI_INFO_DETAILS_RSSI_EXT20_CHAIN0_OFFSET 0x0000004c 1235 #define PHYRX_RSSI_LEGACY_19_PREAMBLE_RSSI_INFO_DETAILS_RSSI_EXT20_CHAIN0_LSB 8 1236 #define PHYRX_RSSI_LEGACY_19_PREAMBLE_RSSI_INFO_DETAILS_RSSI_EXT20_CHAIN0_MASK 0x0000ff00 1237 1238 /* Description PHYRX_RSSI_LEGACY_19_PREAMBLE_RSSI_INFO_DETAILS_RSSI_EXT40_LOW20_CHAIN0 1239 1240 RSSI of RX PPDU on chain 0 of extension 40, low 20 MHz 1241 bandwidth. 1242 1243 Value of 0x80 indicates invalid. 1244 */ 1245 #define PHYRX_RSSI_LEGACY_19_PREAMBLE_RSSI_INFO_DETAILS_RSSI_EXT40_LOW20_CHAIN0_OFFSET 0x0000004c 1246 #define PHYRX_RSSI_LEGACY_19_PREAMBLE_RSSI_INFO_DETAILS_RSSI_EXT40_LOW20_CHAIN0_LSB 16 1247 #define PHYRX_RSSI_LEGACY_19_PREAMBLE_RSSI_INFO_DETAILS_RSSI_EXT40_LOW20_CHAIN0_MASK 0x00ff0000 1248 1249 /* Description PHYRX_RSSI_LEGACY_19_PREAMBLE_RSSI_INFO_DETAILS_RSSI_EXT40_HIGH20_CHAIN0 1250 1251 RSSI of RX PPDU on chain 0 of extension 40, high 20 MHz 1252 bandwidth. 1253 1254 Value of 0x80 indicates invalid. 1255 */ 1256 #define PHYRX_RSSI_LEGACY_19_PREAMBLE_RSSI_INFO_DETAILS_RSSI_EXT40_HIGH20_CHAIN0_OFFSET 0x0000004c 1257 #define PHYRX_RSSI_LEGACY_19_PREAMBLE_RSSI_INFO_DETAILS_RSSI_EXT40_HIGH20_CHAIN0_LSB 24 1258 #define PHYRX_RSSI_LEGACY_19_PREAMBLE_RSSI_INFO_DETAILS_RSSI_EXT40_HIGH20_CHAIN0_MASK 0xff000000 1259 1260 /* Description PHYRX_RSSI_LEGACY_20_PREAMBLE_RSSI_INFO_DETAILS_RSSI_EXT80_LOW20_CHAIN0 1261 1262 RSSI of RX PPDU on chain 0 of extension 80, low 20 MHz 1263 bandwidth. 1264 1265 Value of 0x80 indicates invalid. 1266 */ 1267 #define PHYRX_RSSI_LEGACY_20_PREAMBLE_RSSI_INFO_DETAILS_RSSI_EXT80_LOW20_CHAIN0_OFFSET 0x00000050 1268 #define PHYRX_RSSI_LEGACY_20_PREAMBLE_RSSI_INFO_DETAILS_RSSI_EXT80_LOW20_CHAIN0_LSB 0 1269 #define PHYRX_RSSI_LEGACY_20_PREAMBLE_RSSI_INFO_DETAILS_RSSI_EXT80_LOW20_CHAIN0_MASK 0x000000ff 1270 1271 /* Description PHYRX_RSSI_LEGACY_20_PREAMBLE_RSSI_INFO_DETAILS_RSSI_EXT80_LOW_HIGH20_CHAIN0 1272 1273 RSSI of RX PPDU on chain 0 of extension 80, low-high 20 1274 MHz bandwidth. 1275 1276 Value of 0x80 indicates invalid. 1277 */ 1278 #define PHYRX_RSSI_LEGACY_20_PREAMBLE_RSSI_INFO_DETAILS_RSSI_EXT80_LOW_HIGH20_CHAIN0_OFFSET 0x00000050 1279 #define PHYRX_RSSI_LEGACY_20_PREAMBLE_RSSI_INFO_DETAILS_RSSI_EXT80_LOW_HIGH20_CHAIN0_LSB 8 1280 #define PHYRX_RSSI_LEGACY_20_PREAMBLE_RSSI_INFO_DETAILS_RSSI_EXT80_LOW_HIGH20_CHAIN0_MASK 0x0000ff00 1281 1282 /* Description PHYRX_RSSI_LEGACY_20_PREAMBLE_RSSI_INFO_DETAILS_RSSI_EXT80_HIGH_LOW20_CHAIN0 1283 1284 RSSI of RX PPDU on chain 0 of extension 80, high-low 20 1285 MHz bandwidth. 1286 1287 Value of 0x80 indicates invalid. 1288 */ 1289 #define PHYRX_RSSI_LEGACY_20_PREAMBLE_RSSI_INFO_DETAILS_RSSI_EXT80_HIGH_LOW20_CHAIN0_OFFSET 0x00000050 1290 #define PHYRX_RSSI_LEGACY_20_PREAMBLE_RSSI_INFO_DETAILS_RSSI_EXT80_HIGH_LOW20_CHAIN0_LSB 16 1291 #define PHYRX_RSSI_LEGACY_20_PREAMBLE_RSSI_INFO_DETAILS_RSSI_EXT80_HIGH_LOW20_CHAIN0_MASK 0x00ff0000 1292 1293 /* Description PHYRX_RSSI_LEGACY_20_PREAMBLE_RSSI_INFO_DETAILS_RSSI_EXT80_HIGH20_CHAIN0 1294 1295 RSSI of RX PPDU on chain 0 of extension 80, high 20 MHz 1296 bandwidth. 1297 1298 Value of 0x80 indicates invalid. 1299 */ 1300 #define PHYRX_RSSI_LEGACY_20_PREAMBLE_RSSI_INFO_DETAILS_RSSI_EXT80_HIGH20_CHAIN0_OFFSET 0x00000050 1301 #define PHYRX_RSSI_LEGACY_20_PREAMBLE_RSSI_INFO_DETAILS_RSSI_EXT80_HIGH20_CHAIN0_LSB 24 1302 #define PHYRX_RSSI_LEGACY_20_PREAMBLE_RSSI_INFO_DETAILS_RSSI_EXT80_HIGH20_CHAIN0_MASK 0xff000000 1303 1304 /* Description PHYRX_RSSI_LEGACY_21_PREAMBLE_RSSI_INFO_DETAILS_RSSI_PRI20_CHAIN1 1305 1306 RSSI of RX PPDU on chain 1 of primary 20 MHz bandwidth. 1307 1308 Value of 0x80 indicates invalid. 1309 */ 1310 #define PHYRX_RSSI_LEGACY_21_PREAMBLE_RSSI_INFO_DETAILS_RSSI_PRI20_CHAIN1_OFFSET 0x00000054 1311 #define PHYRX_RSSI_LEGACY_21_PREAMBLE_RSSI_INFO_DETAILS_RSSI_PRI20_CHAIN1_LSB 0 1312 #define PHYRX_RSSI_LEGACY_21_PREAMBLE_RSSI_INFO_DETAILS_RSSI_PRI20_CHAIN1_MASK 0x000000ff 1313 1314 /* Description PHYRX_RSSI_LEGACY_21_PREAMBLE_RSSI_INFO_DETAILS_RSSI_EXT20_CHAIN1 1315 1316 RSSI of RX PPDU on chain 1 of extension 20 MHz 1317 bandwidth. 1318 1319 Value of 0x80 indicates invalid. 1320 */ 1321 #define PHYRX_RSSI_LEGACY_21_PREAMBLE_RSSI_INFO_DETAILS_RSSI_EXT20_CHAIN1_OFFSET 0x00000054 1322 #define PHYRX_RSSI_LEGACY_21_PREAMBLE_RSSI_INFO_DETAILS_RSSI_EXT20_CHAIN1_LSB 8 1323 #define PHYRX_RSSI_LEGACY_21_PREAMBLE_RSSI_INFO_DETAILS_RSSI_EXT20_CHAIN1_MASK 0x0000ff00 1324 1325 /* Description PHYRX_RSSI_LEGACY_21_PREAMBLE_RSSI_INFO_DETAILS_RSSI_EXT40_LOW20_CHAIN1 1326 1327 RSSI of RX PPDU on chain 1 of extension 40, low 20 MHz 1328 bandwidth. 1329 1330 Value of 0x80 indicates invalid. 1331 */ 1332 #define PHYRX_RSSI_LEGACY_21_PREAMBLE_RSSI_INFO_DETAILS_RSSI_EXT40_LOW20_CHAIN1_OFFSET 0x00000054 1333 #define PHYRX_RSSI_LEGACY_21_PREAMBLE_RSSI_INFO_DETAILS_RSSI_EXT40_LOW20_CHAIN1_LSB 16 1334 #define PHYRX_RSSI_LEGACY_21_PREAMBLE_RSSI_INFO_DETAILS_RSSI_EXT40_LOW20_CHAIN1_MASK 0x00ff0000 1335 1336 /* Description PHYRX_RSSI_LEGACY_21_PREAMBLE_RSSI_INFO_DETAILS_RSSI_EXT40_HIGH20_CHAIN1 1337 1338 RSSI of RX PPDU on chain 1 of extension 40, high 20 MHz 1339 bandwidth. 1340 1341 Value of 0x80 indicates invalid. 1342 */ 1343 #define PHYRX_RSSI_LEGACY_21_PREAMBLE_RSSI_INFO_DETAILS_RSSI_EXT40_HIGH20_CHAIN1_OFFSET 0x00000054 1344 #define PHYRX_RSSI_LEGACY_21_PREAMBLE_RSSI_INFO_DETAILS_RSSI_EXT40_HIGH20_CHAIN1_LSB 24 1345 #define PHYRX_RSSI_LEGACY_21_PREAMBLE_RSSI_INFO_DETAILS_RSSI_EXT40_HIGH20_CHAIN1_MASK 0xff000000 1346 1347 /* Description PHYRX_RSSI_LEGACY_22_PREAMBLE_RSSI_INFO_DETAILS_RSSI_EXT80_LOW20_CHAIN1 1348 1349 RSSI of RX PPDU on chain 1 of extension 80, low 20 MHz 1350 bandwidth. 1351 1352 Value of 0x80 indicates invalid. 1353 */ 1354 #define PHYRX_RSSI_LEGACY_22_PREAMBLE_RSSI_INFO_DETAILS_RSSI_EXT80_LOW20_CHAIN1_OFFSET 0x00000058 1355 #define PHYRX_RSSI_LEGACY_22_PREAMBLE_RSSI_INFO_DETAILS_RSSI_EXT80_LOW20_CHAIN1_LSB 0 1356 #define PHYRX_RSSI_LEGACY_22_PREAMBLE_RSSI_INFO_DETAILS_RSSI_EXT80_LOW20_CHAIN1_MASK 0x000000ff 1357 1358 /* Description PHYRX_RSSI_LEGACY_22_PREAMBLE_RSSI_INFO_DETAILS_RSSI_EXT80_LOW_HIGH20_CHAIN1 1359 1360 RSSI of RX PPDU on chain 1 of extension 80, low-high 20 1361 MHz bandwidth. 1362 1363 Value of 0x80 indicates invalid. 1364 */ 1365 #define PHYRX_RSSI_LEGACY_22_PREAMBLE_RSSI_INFO_DETAILS_RSSI_EXT80_LOW_HIGH20_CHAIN1_OFFSET 0x00000058 1366 #define PHYRX_RSSI_LEGACY_22_PREAMBLE_RSSI_INFO_DETAILS_RSSI_EXT80_LOW_HIGH20_CHAIN1_LSB 8 1367 #define PHYRX_RSSI_LEGACY_22_PREAMBLE_RSSI_INFO_DETAILS_RSSI_EXT80_LOW_HIGH20_CHAIN1_MASK 0x0000ff00 1368 1369 /* Description PHYRX_RSSI_LEGACY_22_PREAMBLE_RSSI_INFO_DETAILS_RSSI_EXT80_HIGH_LOW20_CHAIN1 1370 1371 RSSI of RX PPDU on chain 1 of extension 80, high-low 20 1372 MHz bandwidth. 1373 1374 Value of 0x80 indicates invalid. 1375 */ 1376 #define PHYRX_RSSI_LEGACY_22_PREAMBLE_RSSI_INFO_DETAILS_RSSI_EXT80_HIGH_LOW20_CHAIN1_OFFSET 0x00000058 1377 #define PHYRX_RSSI_LEGACY_22_PREAMBLE_RSSI_INFO_DETAILS_RSSI_EXT80_HIGH_LOW20_CHAIN1_LSB 16 1378 #define PHYRX_RSSI_LEGACY_22_PREAMBLE_RSSI_INFO_DETAILS_RSSI_EXT80_HIGH_LOW20_CHAIN1_MASK 0x00ff0000 1379 1380 /* Description PHYRX_RSSI_LEGACY_22_PREAMBLE_RSSI_INFO_DETAILS_RSSI_EXT80_HIGH20_CHAIN1 1381 1382 RSSI of RX PPDU on chain 1 of extension 80, high 20 MHz 1383 bandwidth. 1384 1385 Value of 0x80 indicates invalid. 1386 */ 1387 #define PHYRX_RSSI_LEGACY_22_PREAMBLE_RSSI_INFO_DETAILS_RSSI_EXT80_HIGH20_CHAIN1_OFFSET 0x00000058 1388 #define PHYRX_RSSI_LEGACY_22_PREAMBLE_RSSI_INFO_DETAILS_RSSI_EXT80_HIGH20_CHAIN1_LSB 24 1389 #define PHYRX_RSSI_LEGACY_22_PREAMBLE_RSSI_INFO_DETAILS_RSSI_EXT80_HIGH20_CHAIN1_MASK 0xff000000 1390 1391 /* Description PHYRX_RSSI_LEGACY_23_PREAMBLE_RSSI_INFO_DETAILS_RSSI_PRI20_CHAIN2 1392 1393 RSSI of RX PPDU on chain 2 of primary 20 MHz bandwidth. 1394 1395 Value of 0x80 indicates invalid. 1396 */ 1397 #define PHYRX_RSSI_LEGACY_23_PREAMBLE_RSSI_INFO_DETAILS_RSSI_PRI20_CHAIN2_OFFSET 0x0000005c 1398 #define PHYRX_RSSI_LEGACY_23_PREAMBLE_RSSI_INFO_DETAILS_RSSI_PRI20_CHAIN2_LSB 0 1399 #define PHYRX_RSSI_LEGACY_23_PREAMBLE_RSSI_INFO_DETAILS_RSSI_PRI20_CHAIN2_MASK 0x000000ff 1400 1401 /* Description PHYRX_RSSI_LEGACY_23_PREAMBLE_RSSI_INFO_DETAILS_RSSI_EXT20_CHAIN2 1402 1403 RSSI of RX PPDU on chain 2 of extension 20 MHz 1404 bandwidth. 1405 1406 Value of 0x80 indicates invalid. 1407 */ 1408 #define PHYRX_RSSI_LEGACY_23_PREAMBLE_RSSI_INFO_DETAILS_RSSI_EXT20_CHAIN2_OFFSET 0x0000005c 1409 #define PHYRX_RSSI_LEGACY_23_PREAMBLE_RSSI_INFO_DETAILS_RSSI_EXT20_CHAIN2_LSB 8 1410 #define PHYRX_RSSI_LEGACY_23_PREAMBLE_RSSI_INFO_DETAILS_RSSI_EXT20_CHAIN2_MASK 0x0000ff00 1411 1412 /* Description PHYRX_RSSI_LEGACY_23_PREAMBLE_RSSI_INFO_DETAILS_RSSI_EXT40_LOW20_CHAIN2 1413 1414 RSSI of RX PPDU on chain 2 of extension 40, low 20 MHz 1415 bandwidth. 1416 1417 Value of 0x80 indicates invalid. 1418 */ 1419 #define PHYRX_RSSI_LEGACY_23_PREAMBLE_RSSI_INFO_DETAILS_RSSI_EXT40_LOW20_CHAIN2_OFFSET 0x0000005c 1420 #define PHYRX_RSSI_LEGACY_23_PREAMBLE_RSSI_INFO_DETAILS_RSSI_EXT40_LOW20_CHAIN2_LSB 16 1421 #define PHYRX_RSSI_LEGACY_23_PREAMBLE_RSSI_INFO_DETAILS_RSSI_EXT40_LOW20_CHAIN2_MASK 0x00ff0000 1422 1423 /* Description PHYRX_RSSI_LEGACY_23_PREAMBLE_RSSI_INFO_DETAILS_RSSI_EXT40_HIGH20_CHAIN2 1424 1425 RSSI of RX PPDU on chain 2 of extension 40, high 20 MHz 1426 bandwidth. 1427 1428 Value of 0x80 indicates invalid. 1429 */ 1430 #define PHYRX_RSSI_LEGACY_23_PREAMBLE_RSSI_INFO_DETAILS_RSSI_EXT40_HIGH20_CHAIN2_OFFSET 0x0000005c 1431 #define PHYRX_RSSI_LEGACY_23_PREAMBLE_RSSI_INFO_DETAILS_RSSI_EXT40_HIGH20_CHAIN2_LSB 24 1432 #define PHYRX_RSSI_LEGACY_23_PREAMBLE_RSSI_INFO_DETAILS_RSSI_EXT40_HIGH20_CHAIN2_MASK 0xff000000 1433 1434 /* Description PHYRX_RSSI_LEGACY_24_PREAMBLE_RSSI_INFO_DETAILS_RSSI_EXT80_LOW20_CHAIN2 1435 1436 RSSI of RX PPDU on chain 2 of extension 80, low 20 MHz 1437 bandwidth. 1438 1439 Value of 0x80 indicates invalid. 1440 */ 1441 #define PHYRX_RSSI_LEGACY_24_PREAMBLE_RSSI_INFO_DETAILS_RSSI_EXT80_LOW20_CHAIN2_OFFSET 0x00000060 1442 #define PHYRX_RSSI_LEGACY_24_PREAMBLE_RSSI_INFO_DETAILS_RSSI_EXT80_LOW20_CHAIN2_LSB 0 1443 #define PHYRX_RSSI_LEGACY_24_PREAMBLE_RSSI_INFO_DETAILS_RSSI_EXT80_LOW20_CHAIN2_MASK 0x000000ff 1444 1445 /* Description PHYRX_RSSI_LEGACY_24_PREAMBLE_RSSI_INFO_DETAILS_RSSI_EXT80_LOW_HIGH20_CHAIN2 1446 1447 RSSI of RX PPDU on chain 2 of extension 80, low-high 20 1448 MHz bandwidth. 1449 1450 Value of 0x80 indicates invalid. 1451 */ 1452 #define PHYRX_RSSI_LEGACY_24_PREAMBLE_RSSI_INFO_DETAILS_RSSI_EXT80_LOW_HIGH20_CHAIN2_OFFSET 0x00000060 1453 #define PHYRX_RSSI_LEGACY_24_PREAMBLE_RSSI_INFO_DETAILS_RSSI_EXT80_LOW_HIGH20_CHAIN2_LSB 8 1454 #define PHYRX_RSSI_LEGACY_24_PREAMBLE_RSSI_INFO_DETAILS_RSSI_EXT80_LOW_HIGH20_CHAIN2_MASK 0x0000ff00 1455 1456 /* Description PHYRX_RSSI_LEGACY_24_PREAMBLE_RSSI_INFO_DETAILS_RSSI_EXT80_HIGH_LOW20_CHAIN2 1457 1458 RSSI of RX PPDU on chain 2 of extension 80, high-low 20 1459 MHz bandwidth. 1460 1461 Value of 0x80 indicates invalid. 1462 */ 1463 #define PHYRX_RSSI_LEGACY_24_PREAMBLE_RSSI_INFO_DETAILS_RSSI_EXT80_HIGH_LOW20_CHAIN2_OFFSET 0x00000060 1464 #define PHYRX_RSSI_LEGACY_24_PREAMBLE_RSSI_INFO_DETAILS_RSSI_EXT80_HIGH_LOW20_CHAIN2_LSB 16 1465 #define PHYRX_RSSI_LEGACY_24_PREAMBLE_RSSI_INFO_DETAILS_RSSI_EXT80_HIGH_LOW20_CHAIN2_MASK 0x00ff0000 1466 1467 /* Description PHYRX_RSSI_LEGACY_24_PREAMBLE_RSSI_INFO_DETAILS_RSSI_EXT80_HIGH20_CHAIN2 1468 1469 RSSI of RX PPDU on chain 2 of extension 80, high 20 MHz 1470 bandwidth. 1471 1472 Value of 0x80 indicates invalid. 1473 */ 1474 #define PHYRX_RSSI_LEGACY_24_PREAMBLE_RSSI_INFO_DETAILS_RSSI_EXT80_HIGH20_CHAIN2_OFFSET 0x00000060 1475 #define PHYRX_RSSI_LEGACY_24_PREAMBLE_RSSI_INFO_DETAILS_RSSI_EXT80_HIGH20_CHAIN2_LSB 24 1476 #define PHYRX_RSSI_LEGACY_24_PREAMBLE_RSSI_INFO_DETAILS_RSSI_EXT80_HIGH20_CHAIN2_MASK 0xff000000 1477 1478 /* Description PHYRX_RSSI_LEGACY_25_PREAMBLE_RSSI_INFO_DETAILS_RSSI_PRI20_CHAIN3 1479 1480 RSSI of RX PPDU on chain 3 of primary 20 MHz bandwidth. 1481 1482 Value of 0x80 indicates invalid. 1483 */ 1484 #define PHYRX_RSSI_LEGACY_25_PREAMBLE_RSSI_INFO_DETAILS_RSSI_PRI20_CHAIN3_OFFSET 0x00000064 1485 #define PHYRX_RSSI_LEGACY_25_PREAMBLE_RSSI_INFO_DETAILS_RSSI_PRI20_CHAIN3_LSB 0 1486 #define PHYRX_RSSI_LEGACY_25_PREAMBLE_RSSI_INFO_DETAILS_RSSI_PRI20_CHAIN3_MASK 0x000000ff 1487 1488 /* Description PHYRX_RSSI_LEGACY_25_PREAMBLE_RSSI_INFO_DETAILS_RSSI_EXT20_CHAIN3 1489 1490 RSSI of RX PPDU on chain 3 of extension 20 MHz 1491 bandwidth. 1492 1493 Value of 0x80 indicates invalid. 1494 */ 1495 #define PHYRX_RSSI_LEGACY_25_PREAMBLE_RSSI_INFO_DETAILS_RSSI_EXT20_CHAIN3_OFFSET 0x00000064 1496 #define PHYRX_RSSI_LEGACY_25_PREAMBLE_RSSI_INFO_DETAILS_RSSI_EXT20_CHAIN3_LSB 8 1497 #define PHYRX_RSSI_LEGACY_25_PREAMBLE_RSSI_INFO_DETAILS_RSSI_EXT20_CHAIN3_MASK 0x0000ff00 1498 1499 /* Description PHYRX_RSSI_LEGACY_25_PREAMBLE_RSSI_INFO_DETAILS_RSSI_EXT40_LOW20_CHAIN3 1500 1501 RSSI of RX PPDU on chain 3 of extension 40, low 20 MHz 1502 bandwidth. 1503 1504 Value of 0x80 indicates invalid. 1505 */ 1506 #define PHYRX_RSSI_LEGACY_25_PREAMBLE_RSSI_INFO_DETAILS_RSSI_EXT40_LOW20_CHAIN3_OFFSET 0x00000064 1507 #define PHYRX_RSSI_LEGACY_25_PREAMBLE_RSSI_INFO_DETAILS_RSSI_EXT40_LOW20_CHAIN3_LSB 16 1508 #define PHYRX_RSSI_LEGACY_25_PREAMBLE_RSSI_INFO_DETAILS_RSSI_EXT40_LOW20_CHAIN3_MASK 0x00ff0000 1509 1510 /* Description PHYRX_RSSI_LEGACY_25_PREAMBLE_RSSI_INFO_DETAILS_RSSI_EXT40_HIGH20_CHAIN3 1511 1512 RSSI of RX PPDU on chain 3 of extension 40, high 20 MHz 1513 bandwidth. 1514 1515 Value of 0x80 indicates invalid. 1516 */ 1517 #define PHYRX_RSSI_LEGACY_25_PREAMBLE_RSSI_INFO_DETAILS_RSSI_EXT40_HIGH20_CHAIN3_OFFSET 0x00000064 1518 #define PHYRX_RSSI_LEGACY_25_PREAMBLE_RSSI_INFO_DETAILS_RSSI_EXT40_HIGH20_CHAIN3_LSB 24 1519 #define PHYRX_RSSI_LEGACY_25_PREAMBLE_RSSI_INFO_DETAILS_RSSI_EXT40_HIGH20_CHAIN3_MASK 0xff000000 1520 1521 /* Description PHYRX_RSSI_LEGACY_26_PREAMBLE_RSSI_INFO_DETAILS_RSSI_EXT80_LOW20_CHAIN3 1522 1523 RSSI of RX PPDU on chain 3 of extension 80, low 20 MHz 1524 bandwidth. 1525 1526 Value of 0x80 indicates invalid. 1527 */ 1528 #define PHYRX_RSSI_LEGACY_26_PREAMBLE_RSSI_INFO_DETAILS_RSSI_EXT80_LOW20_CHAIN3_OFFSET 0x00000068 1529 #define PHYRX_RSSI_LEGACY_26_PREAMBLE_RSSI_INFO_DETAILS_RSSI_EXT80_LOW20_CHAIN3_LSB 0 1530 #define PHYRX_RSSI_LEGACY_26_PREAMBLE_RSSI_INFO_DETAILS_RSSI_EXT80_LOW20_CHAIN3_MASK 0x000000ff 1531 1532 /* Description PHYRX_RSSI_LEGACY_26_PREAMBLE_RSSI_INFO_DETAILS_RSSI_EXT80_LOW_HIGH20_CHAIN3 1533 1534 RSSI of RX PPDU on chain 3 of extension 80, low-high 20 1535 MHz bandwidth. 1536 1537 Value of 0x80 indicates invalid. 1538 */ 1539 #define PHYRX_RSSI_LEGACY_26_PREAMBLE_RSSI_INFO_DETAILS_RSSI_EXT80_LOW_HIGH20_CHAIN3_OFFSET 0x00000068 1540 #define PHYRX_RSSI_LEGACY_26_PREAMBLE_RSSI_INFO_DETAILS_RSSI_EXT80_LOW_HIGH20_CHAIN3_LSB 8 1541 #define PHYRX_RSSI_LEGACY_26_PREAMBLE_RSSI_INFO_DETAILS_RSSI_EXT80_LOW_HIGH20_CHAIN3_MASK 0x0000ff00 1542 1543 /* Description PHYRX_RSSI_LEGACY_26_PREAMBLE_RSSI_INFO_DETAILS_RSSI_EXT80_HIGH_LOW20_CHAIN3 1544 1545 RSSI of RX PPDU on chain 3 of extension 80, high-low 20 1546 MHz bandwidth. 1547 1548 Value of 0x80 indicates invalid. 1549 */ 1550 #define PHYRX_RSSI_LEGACY_26_PREAMBLE_RSSI_INFO_DETAILS_RSSI_EXT80_HIGH_LOW20_CHAIN3_OFFSET 0x00000068 1551 #define PHYRX_RSSI_LEGACY_26_PREAMBLE_RSSI_INFO_DETAILS_RSSI_EXT80_HIGH_LOW20_CHAIN3_LSB 16 1552 #define PHYRX_RSSI_LEGACY_26_PREAMBLE_RSSI_INFO_DETAILS_RSSI_EXT80_HIGH_LOW20_CHAIN3_MASK 0x00ff0000 1553 1554 /* Description PHYRX_RSSI_LEGACY_26_PREAMBLE_RSSI_INFO_DETAILS_RSSI_EXT80_HIGH20_CHAIN3 1555 1556 RSSI of RX PPDU on chain 3 of extension 80, high 20 MHz 1557 bandwidth. 1558 1559 Value of 0x80 indicates invalid. 1560 */ 1561 #define PHYRX_RSSI_LEGACY_26_PREAMBLE_RSSI_INFO_DETAILS_RSSI_EXT80_HIGH20_CHAIN3_OFFSET 0x00000068 1562 #define PHYRX_RSSI_LEGACY_26_PREAMBLE_RSSI_INFO_DETAILS_RSSI_EXT80_HIGH20_CHAIN3_LSB 24 1563 #define PHYRX_RSSI_LEGACY_26_PREAMBLE_RSSI_INFO_DETAILS_RSSI_EXT80_HIGH20_CHAIN3_MASK 0xff000000 1564 1565 /* Description PHYRX_RSSI_LEGACY_27_PREAMBLE_RSSI_INFO_DETAILS_RSSI_PRI20_CHAIN4 1566 1567 RSSI of RX PPDU on chain 4 of primary 20 MHz bandwidth. 1568 1569 Value of 0x80 indicates invalid. 1570 */ 1571 #define PHYRX_RSSI_LEGACY_27_PREAMBLE_RSSI_INFO_DETAILS_RSSI_PRI20_CHAIN4_OFFSET 0x0000006c 1572 #define PHYRX_RSSI_LEGACY_27_PREAMBLE_RSSI_INFO_DETAILS_RSSI_PRI20_CHAIN4_LSB 0 1573 #define PHYRX_RSSI_LEGACY_27_PREAMBLE_RSSI_INFO_DETAILS_RSSI_PRI20_CHAIN4_MASK 0x000000ff 1574 1575 /* Description PHYRX_RSSI_LEGACY_27_PREAMBLE_RSSI_INFO_DETAILS_RSSI_EXT20_CHAIN4 1576 1577 RSSI of RX PPDU on chain 4 of extension 20 MHz 1578 bandwidth. 1579 1580 Value of 0x80 indicates invalid. 1581 */ 1582 #define PHYRX_RSSI_LEGACY_27_PREAMBLE_RSSI_INFO_DETAILS_RSSI_EXT20_CHAIN4_OFFSET 0x0000006c 1583 #define PHYRX_RSSI_LEGACY_27_PREAMBLE_RSSI_INFO_DETAILS_RSSI_EXT20_CHAIN4_LSB 8 1584 #define PHYRX_RSSI_LEGACY_27_PREAMBLE_RSSI_INFO_DETAILS_RSSI_EXT20_CHAIN4_MASK 0x0000ff00 1585 1586 /* Description PHYRX_RSSI_LEGACY_27_PREAMBLE_RSSI_INFO_DETAILS_RSSI_EXT40_LOW20_CHAIN4 1587 1588 RSSI of RX PPDU on chain 4 of extension 40, low 20 MHz 1589 bandwidth. 1590 1591 Value of 0x80 indicates invalid. 1592 */ 1593 #define PHYRX_RSSI_LEGACY_27_PREAMBLE_RSSI_INFO_DETAILS_RSSI_EXT40_LOW20_CHAIN4_OFFSET 0x0000006c 1594 #define PHYRX_RSSI_LEGACY_27_PREAMBLE_RSSI_INFO_DETAILS_RSSI_EXT40_LOW20_CHAIN4_LSB 16 1595 #define PHYRX_RSSI_LEGACY_27_PREAMBLE_RSSI_INFO_DETAILS_RSSI_EXT40_LOW20_CHAIN4_MASK 0x00ff0000 1596 1597 /* Description PHYRX_RSSI_LEGACY_27_PREAMBLE_RSSI_INFO_DETAILS_RSSI_EXT40_HIGH20_CHAIN4 1598 1599 RSSI of RX PPDU on chain 4 of extension 40, high 20 MHz 1600 bandwidth. 1601 1602 Value of 0x80 indicates invalid. 1603 */ 1604 #define PHYRX_RSSI_LEGACY_27_PREAMBLE_RSSI_INFO_DETAILS_RSSI_EXT40_HIGH20_CHAIN4_OFFSET 0x0000006c 1605 #define PHYRX_RSSI_LEGACY_27_PREAMBLE_RSSI_INFO_DETAILS_RSSI_EXT40_HIGH20_CHAIN4_LSB 24 1606 #define PHYRX_RSSI_LEGACY_27_PREAMBLE_RSSI_INFO_DETAILS_RSSI_EXT40_HIGH20_CHAIN4_MASK 0xff000000 1607 1608 /* Description PHYRX_RSSI_LEGACY_28_PREAMBLE_RSSI_INFO_DETAILS_RSSI_EXT80_LOW20_CHAIN4 1609 1610 RSSI of RX PPDU on chain 4 of extension 80, low 20 MHz 1611 bandwidth. 1612 1613 Value of 0x80 indicates invalid. 1614 */ 1615 #define PHYRX_RSSI_LEGACY_28_PREAMBLE_RSSI_INFO_DETAILS_RSSI_EXT80_LOW20_CHAIN4_OFFSET 0x00000070 1616 #define PHYRX_RSSI_LEGACY_28_PREAMBLE_RSSI_INFO_DETAILS_RSSI_EXT80_LOW20_CHAIN4_LSB 0 1617 #define PHYRX_RSSI_LEGACY_28_PREAMBLE_RSSI_INFO_DETAILS_RSSI_EXT80_LOW20_CHAIN4_MASK 0x000000ff 1618 1619 /* Description PHYRX_RSSI_LEGACY_28_PREAMBLE_RSSI_INFO_DETAILS_RSSI_EXT80_LOW_HIGH20_CHAIN4 1620 1621 RSSI of RX PPDU on chain 4 of extension 80, low-high 20 1622 MHz bandwidth. 1623 1624 Value of 0x80 indicates invalid. 1625 */ 1626 #define PHYRX_RSSI_LEGACY_28_PREAMBLE_RSSI_INFO_DETAILS_RSSI_EXT80_LOW_HIGH20_CHAIN4_OFFSET 0x00000070 1627 #define PHYRX_RSSI_LEGACY_28_PREAMBLE_RSSI_INFO_DETAILS_RSSI_EXT80_LOW_HIGH20_CHAIN4_LSB 8 1628 #define PHYRX_RSSI_LEGACY_28_PREAMBLE_RSSI_INFO_DETAILS_RSSI_EXT80_LOW_HIGH20_CHAIN4_MASK 0x0000ff00 1629 1630 /* Description PHYRX_RSSI_LEGACY_28_PREAMBLE_RSSI_INFO_DETAILS_RSSI_EXT80_HIGH_LOW20_CHAIN4 1631 1632 RSSI of RX PPDU on chain 4 of extension 80, high-low 20 1633 MHz bandwidth. 1634 1635 Value of 0x80 indicates invalid. 1636 */ 1637 #define PHYRX_RSSI_LEGACY_28_PREAMBLE_RSSI_INFO_DETAILS_RSSI_EXT80_HIGH_LOW20_CHAIN4_OFFSET 0x00000070 1638 #define PHYRX_RSSI_LEGACY_28_PREAMBLE_RSSI_INFO_DETAILS_RSSI_EXT80_HIGH_LOW20_CHAIN4_LSB 16 1639 #define PHYRX_RSSI_LEGACY_28_PREAMBLE_RSSI_INFO_DETAILS_RSSI_EXT80_HIGH_LOW20_CHAIN4_MASK 0x00ff0000 1640 1641 /* Description PHYRX_RSSI_LEGACY_28_PREAMBLE_RSSI_INFO_DETAILS_RSSI_EXT80_HIGH20_CHAIN4 1642 1643 RSSI of RX PPDU on chain 4 of extension 80, high 20 MHz 1644 bandwidth. 1645 1646 Value of 0x80 indicates invalid. 1647 */ 1648 #define PHYRX_RSSI_LEGACY_28_PREAMBLE_RSSI_INFO_DETAILS_RSSI_EXT80_HIGH20_CHAIN4_OFFSET 0x00000070 1649 #define PHYRX_RSSI_LEGACY_28_PREAMBLE_RSSI_INFO_DETAILS_RSSI_EXT80_HIGH20_CHAIN4_LSB 24 1650 #define PHYRX_RSSI_LEGACY_28_PREAMBLE_RSSI_INFO_DETAILS_RSSI_EXT80_HIGH20_CHAIN4_MASK 0xff000000 1651 1652 /* Description PHYRX_RSSI_LEGACY_29_PREAMBLE_RSSI_INFO_DETAILS_RSSI_PRI20_CHAIN5 1653 1654 RSSI of RX PPDU on chain 0 of primary 20 MHz bandwidth. 1655 1656 Value of 0x80 indicates invalid. 1657 */ 1658 #define PHYRX_RSSI_LEGACY_29_PREAMBLE_RSSI_INFO_DETAILS_RSSI_PRI20_CHAIN5_OFFSET 0x00000074 1659 #define PHYRX_RSSI_LEGACY_29_PREAMBLE_RSSI_INFO_DETAILS_RSSI_PRI20_CHAIN5_LSB 0 1660 #define PHYRX_RSSI_LEGACY_29_PREAMBLE_RSSI_INFO_DETAILS_RSSI_PRI20_CHAIN5_MASK 0x000000ff 1661 1662 /* Description PHYRX_RSSI_LEGACY_29_PREAMBLE_RSSI_INFO_DETAILS_RSSI_EXT20_CHAIN5 1663 1664 RSSI of RX PPDU on chain 5 of extension 20 MHz 1665 bandwidth. 1666 1667 Value of 0x80 indicates invalid. 1668 */ 1669 #define PHYRX_RSSI_LEGACY_29_PREAMBLE_RSSI_INFO_DETAILS_RSSI_EXT20_CHAIN5_OFFSET 0x00000074 1670 #define PHYRX_RSSI_LEGACY_29_PREAMBLE_RSSI_INFO_DETAILS_RSSI_EXT20_CHAIN5_LSB 8 1671 #define PHYRX_RSSI_LEGACY_29_PREAMBLE_RSSI_INFO_DETAILS_RSSI_EXT20_CHAIN5_MASK 0x0000ff00 1672 1673 /* Description PHYRX_RSSI_LEGACY_29_PREAMBLE_RSSI_INFO_DETAILS_RSSI_EXT40_LOW20_CHAIN5 1674 1675 RSSI of RX PPDU on chain 5 of extension 40, low 20 MHz 1676 bandwidth. 1677 1678 Value of 0x80 indicates invalid. 1679 */ 1680 #define PHYRX_RSSI_LEGACY_29_PREAMBLE_RSSI_INFO_DETAILS_RSSI_EXT40_LOW20_CHAIN5_OFFSET 0x00000074 1681 #define PHYRX_RSSI_LEGACY_29_PREAMBLE_RSSI_INFO_DETAILS_RSSI_EXT40_LOW20_CHAIN5_LSB 16 1682 #define PHYRX_RSSI_LEGACY_29_PREAMBLE_RSSI_INFO_DETAILS_RSSI_EXT40_LOW20_CHAIN5_MASK 0x00ff0000 1683 1684 /* Description PHYRX_RSSI_LEGACY_29_PREAMBLE_RSSI_INFO_DETAILS_RSSI_EXT40_HIGH20_CHAIN5 1685 1686 RSSI of RX PPDU on chain 5 of extension 40, high 20 MHz 1687 bandwidth. 1688 1689 Value of 0x80 indicates invalid. 1690 */ 1691 #define PHYRX_RSSI_LEGACY_29_PREAMBLE_RSSI_INFO_DETAILS_RSSI_EXT40_HIGH20_CHAIN5_OFFSET 0x00000074 1692 #define PHYRX_RSSI_LEGACY_29_PREAMBLE_RSSI_INFO_DETAILS_RSSI_EXT40_HIGH20_CHAIN5_LSB 24 1693 #define PHYRX_RSSI_LEGACY_29_PREAMBLE_RSSI_INFO_DETAILS_RSSI_EXT40_HIGH20_CHAIN5_MASK 0xff000000 1694 1695 /* Description PHYRX_RSSI_LEGACY_30_PREAMBLE_RSSI_INFO_DETAILS_RSSI_EXT80_LOW20_CHAIN5 1696 1697 RSSI of RX PPDU on chain 5 of extension 80, low 20 MHz 1698 bandwidth. 1699 1700 Value of 0x80 indicates invalid. 1701 */ 1702 #define PHYRX_RSSI_LEGACY_30_PREAMBLE_RSSI_INFO_DETAILS_RSSI_EXT80_LOW20_CHAIN5_OFFSET 0x00000078 1703 #define PHYRX_RSSI_LEGACY_30_PREAMBLE_RSSI_INFO_DETAILS_RSSI_EXT80_LOW20_CHAIN5_LSB 0 1704 #define PHYRX_RSSI_LEGACY_30_PREAMBLE_RSSI_INFO_DETAILS_RSSI_EXT80_LOW20_CHAIN5_MASK 0x000000ff 1705 1706 /* Description PHYRX_RSSI_LEGACY_30_PREAMBLE_RSSI_INFO_DETAILS_RSSI_EXT80_LOW_HIGH20_CHAIN5 1707 1708 RSSI of RX PPDU on chain 5 of extension 80, low-high 20 1709 MHz bandwidth. 1710 1711 Value of 0x80 indicates invalid. 1712 */ 1713 #define PHYRX_RSSI_LEGACY_30_PREAMBLE_RSSI_INFO_DETAILS_RSSI_EXT80_LOW_HIGH20_CHAIN5_OFFSET 0x00000078 1714 #define PHYRX_RSSI_LEGACY_30_PREAMBLE_RSSI_INFO_DETAILS_RSSI_EXT80_LOW_HIGH20_CHAIN5_LSB 8 1715 #define PHYRX_RSSI_LEGACY_30_PREAMBLE_RSSI_INFO_DETAILS_RSSI_EXT80_LOW_HIGH20_CHAIN5_MASK 0x0000ff00 1716 1717 /* Description PHYRX_RSSI_LEGACY_30_PREAMBLE_RSSI_INFO_DETAILS_RSSI_EXT80_HIGH_LOW20_CHAIN5 1718 1719 RSSI of RX PPDU on chain 5 of extension 80, high-low 20 1720 MHz bandwidth. 1721 1722 Value of 0x80 indicates invalid. 1723 */ 1724 #define PHYRX_RSSI_LEGACY_30_PREAMBLE_RSSI_INFO_DETAILS_RSSI_EXT80_HIGH_LOW20_CHAIN5_OFFSET 0x00000078 1725 #define PHYRX_RSSI_LEGACY_30_PREAMBLE_RSSI_INFO_DETAILS_RSSI_EXT80_HIGH_LOW20_CHAIN5_LSB 16 1726 #define PHYRX_RSSI_LEGACY_30_PREAMBLE_RSSI_INFO_DETAILS_RSSI_EXT80_HIGH_LOW20_CHAIN5_MASK 0x00ff0000 1727 1728 /* Description PHYRX_RSSI_LEGACY_30_PREAMBLE_RSSI_INFO_DETAILS_RSSI_EXT80_HIGH20_CHAIN5 1729 1730 RSSI of RX PPDU on chain 5 of extension 80, high 20 MHz 1731 bandwidth. 1732 1733 Value of 0x80 indicates invalid. 1734 */ 1735 #define PHYRX_RSSI_LEGACY_30_PREAMBLE_RSSI_INFO_DETAILS_RSSI_EXT80_HIGH20_CHAIN5_OFFSET 0x00000078 1736 #define PHYRX_RSSI_LEGACY_30_PREAMBLE_RSSI_INFO_DETAILS_RSSI_EXT80_HIGH20_CHAIN5_LSB 24 1737 #define PHYRX_RSSI_LEGACY_30_PREAMBLE_RSSI_INFO_DETAILS_RSSI_EXT80_HIGH20_CHAIN5_MASK 0xff000000 1738 1739 /* Description PHYRX_RSSI_LEGACY_31_PREAMBLE_RSSI_INFO_DETAILS_RSSI_PRI20_CHAIN6 1740 1741 RSSI of RX PPDU on chain 6 of primary 20 MHz bandwidth. 1742 1743 Value of 0x80 indicates invalid. 1744 */ 1745 #define PHYRX_RSSI_LEGACY_31_PREAMBLE_RSSI_INFO_DETAILS_RSSI_PRI20_CHAIN6_OFFSET 0x0000007c 1746 #define PHYRX_RSSI_LEGACY_31_PREAMBLE_RSSI_INFO_DETAILS_RSSI_PRI20_CHAIN6_LSB 0 1747 #define PHYRX_RSSI_LEGACY_31_PREAMBLE_RSSI_INFO_DETAILS_RSSI_PRI20_CHAIN6_MASK 0x000000ff 1748 1749 /* Description PHYRX_RSSI_LEGACY_31_PREAMBLE_RSSI_INFO_DETAILS_RSSI_EXT20_CHAIN6 1750 1751 RSSI of RX PPDU on chain 6 of extension 20 MHz 1752 bandwidth. 1753 1754 Value of 0x80 indicates invalid. 1755 */ 1756 #define PHYRX_RSSI_LEGACY_31_PREAMBLE_RSSI_INFO_DETAILS_RSSI_EXT20_CHAIN6_OFFSET 0x0000007c 1757 #define PHYRX_RSSI_LEGACY_31_PREAMBLE_RSSI_INFO_DETAILS_RSSI_EXT20_CHAIN6_LSB 8 1758 #define PHYRX_RSSI_LEGACY_31_PREAMBLE_RSSI_INFO_DETAILS_RSSI_EXT20_CHAIN6_MASK 0x0000ff00 1759 1760 /* Description PHYRX_RSSI_LEGACY_31_PREAMBLE_RSSI_INFO_DETAILS_RSSI_EXT40_LOW20_CHAIN6 1761 1762 RSSI of RX PPDU on chain 6 of extension 40, low 20 MHz 1763 bandwidth. 1764 1765 Value of 0x80 indicates invalid. 1766 */ 1767 #define PHYRX_RSSI_LEGACY_31_PREAMBLE_RSSI_INFO_DETAILS_RSSI_EXT40_LOW20_CHAIN6_OFFSET 0x0000007c 1768 #define PHYRX_RSSI_LEGACY_31_PREAMBLE_RSSI_INFO_DETAILS_RSSI_EXT40_LOW20_CHAIN6_LSB 16 1769 #define PHYRX_RSSI_LEGACY_31_PREAMBLE_RSSI_INFO_DETAILS_RSSI_EXT40_LOW20_CHAIN6_MASK 0x00ff0000 1770 1771 /* Description PHYRX_RSSI_LEGACY_31_PREAMBLE_RSSI_INFO_DETAILS_RSSI_EXT40_HIGH20_CHAIN6 1772 1773 RSSI of RX PPDU on chain 6 of extension 40, high 20 MHz 1774 bandwidth. 1775 1776 Value of 0x80 indicates invalid. 1777 */ 1778 #define PHYRX_RSSI_LEGACY_31_PREAMBLE_RSSI_INFO_DETAILS_RSSI_EXT40_HIGH20_CHAIN6_OFFSET 0x0000007c 1779 #define PHYRX_RSSI_LEGACY_31_PREAMBLE_RSSI_INFO_DETAILS_RSSI_EXT40_HIGH20_CHAIN6_LSB 24 1780 #define PHYRX_RSSI_LEGACY_31_PREAMBLE_RSSI_INFO_DETAILS_RSSI_EXT40_HIGH20_CHAIN6_MASK 0xff000000 1781 1782 /* Description PHYRX_RSSI_LEGACY_32_PREAMBLE_RSSI_INFO_DETAILS_RSSI_EXT80_LOW20_CHAIN6 1783 1784 RSSI of RX PPDU on chain 6 of extension 80, low 20 MHz 1785 bandwidth. 1786 1787 Value of 0x80 indicates invalid. 1788 */ 1789 #define PHYRX_RSSI_LEGACY_32_PREAMBLE_RSSI_INFO_DETAILS_RSSI_EXT80_LOW20_CHAIN6_OFFSET 0x00000080 1790 #define PHYRX_RSSI_LEGACY_32_PREAMBLE_RSSI_INFO_DETAILS_RSSI_EXT80_LOW20_CHAIN6_LSB 0 1791 #define PHYRX_RSSI_LEGACY_32_PREAMBLE_RSSI_INFO_DETAILS_RSSI_EXT80_LOW20_CHAIN6_MASK 0x000000ff 1792 1793 /* Description PHYRX_RSSI_LEGACY_32_PREAMBLE_RSSI_INFO_DETAILS_RSSI_EXT80_LOW_HIGH20_CHAIN6 1794 1795 RSSI of RX PPDU on chain 6 of extension 80, low-high 20 1796 MHz bandwidth. 1797 1798 Value of 0x80 indicates invalid. 1799 */ 1800 #define PHYRX_RSSI_LEGACY_32_PREAMBLE_RSSI_INFO_DETAILS_RSSI_EXT80_LOW_HIGH20_CHAIN6_OFFSET 0x00000080 1801 #define PHYRX_RSSI_LEGACY_32_PREAMBLE_RSSI_INFO_DETAILS_RSSI_EXT80_LOW_HIGH20_CHAIN6_LSB 8 1802 #define PHYRX_RSSI_LEGACY_32_PREAMBLE_RSSI_INFO_DETAILS_RSSI_EXT80_LOW_HIGH20_CHAIN6_MASK 0x0000ff00 1803 1804 /* Description PHYRX_RSSI_LEGACY_32_PREAMBLE_RSSI_INFO_DETAILS_RSSI_EXT80_HIGH_LOW20_CHAIN6 1805 1806 RSSI of RX PPDU on chain 6 of extension 80, high-low 20 1807 MHz bandwidth. 1808 1809 Value of 0x80 indicates invalid. 1810 */ 1811 #define PHYRX_RSSI_LEGACY_32_PREAMBLE_RSSI_INFO_DETAILS_RSSI_EXT80_HIGH_LOW20_CHAIN6_OFFSET 0x00000080 1812 #define PHYRX_RSSI_LEGACY_32_PREAMBLE_RSSI_INFO_DETAILS_RSSI_EXT80_HIGH_LOW20_CHAIN6_LSB 16 1813 #define PHYRX_RSSI_LEGACY_32_PREAMBLE_RSSI_INFO_DETAILS_RSSI_EXT80_HIGH_LOW20_CHAIN6_MASK 0x00ff0000 1814 1815 /* Description PHYRX_RSSI_LEGACY_32_PREAMBLE_RSSI_INFO_DETAILS_RSSI_EXT80_HIGH20_CHAIN6 1816 1817 RSSI of RX PPDU on chain 6 of extension 80, high 20 MHz 1818 bandwidth. 1819 1820 Value of 0x80 indicates invalid. 1821 */ 1822 #define PHYRX_RSSI_LEGACY_32_PREAMBLE_RSSI_INFO_DETAILS_RSSI_EXT80_HIGH20_CHAIN6_OFFSET 0x00000080 1823 #define PHYRX_RSSI_LEGACY_32_PREAMBLE_RSSI_INFO_DETAILS_RSSI_EXT80_HIGH20_CHAIN6_LSB 24 1824 #define PHYRX_RSSI_LEGACY_32_PREAMBLE_RSSI_INFO_DETAILS_RSSI_EXT80_HIGH20_CHAIN6_MASK 0xff000000 1825 1826 /* Description PHYRX_RSSI_LEGACY_33_PREAMBLE_RSSI_INFO_DETAILS_RSSI_PRI20_CHAIN7 1827 1828 RSSI of RX PPDU on chain 7 of primary 20 MHz bandwidth. 1829 1830 Value of 0x80 indicates invalid. 1831 */ 1832 #define PHYRX_RSSI_LEGACY_33_PREAMBLE_RSSI_INFO_DETAILS_RSSI_PRI20_CHAIN7_OFFSET 0x00000084 1833 #define PHYRX_RSSI_LEGACY_33_PREAMBLE_RSSI_INFO_DETAILS_RSSI_PRI20_CHAIN7_LSB 0 1834 #define PHYRX_RSSI_LEGACY_33_PREAMBLE_RSSI_INFO_DETAILS_RSSI_PRI20_CHAIN7_MASK 0x000000ff 1835 1836 /* Description PHYRX_RSSI_LEGACY_33_PREAMBLE_RSSI_INFO_DETAILS_RSSI_EXT20_CHAIN7 1837 1838 RSSI of RX PPDU on chain 7 of extension 20 MHz 1839 bandwidth. 1840 1841 Value of 0x80 indicates invalid. 1842 */ 1843 #define PHYRX_RSSI_LEGACY_33_PREAMBLE_RSSI_INFO_DETAILS_RSSI_EXT20_CHAIN7_OFFSET 0x00000084 1844 #define PHYRX_RSSI_LEGACY_33_PREAMBLE_RSSI_INFO_DETAILS_RSSI_EXT20_CHAIN7_LSB 8 1845 #define PHYRX_RSSI_LEGACY_33_PREAMBLE_RSSI_INFO_DETAILS_RSSI_EXT20_CHAIN7_MASK 0x0000ff00 1846 1847 /* Description PHYRX_RSSI_LEGACY_33_PREAMBLE_RSSI_INFO_DETAILS_RSSI_EXT40_LOW20_CHAIN7 1848 1849 RSSI of RX PPDU on chain 7 of extension 40, low 20 MHz 1850 bandwidth. 1851 1852 Value of 0x80 indicates invalid. 1853 */ 1854 #define PHYRX_RSSI_LEGACY_33_PREAMBLE_RSSI_INFO_DETAILS_RSSI_EXT40_LOW20_CHAIN7_OFFSET 0x00000084 1855 #define PHYRX_RSSI_LEGACY_33_PREAMBLE_RSSI_INFO_DETAILS_RSSI_EXT40_LOW20_CHAIN7_LSB 16 1856 #define PHYRX_RSSI_LEGACY_33_PREAMBLE_RSSI_INFO_DETAILS_RSSI_EXT40_LOW20_CHAIN7_MASK 0x00ff0000 1857 1858 /* Description PHYRX_RSSI_LEGACY_33_PREAMBLE_RSSI_INFO_DETAILS_RSSI_EXT40_HIGH20_CHAIN7 1859 1860 RSSI of RX PPDU on chain 7 of extension 40, high 20 MHz 1861 bandwidth. 1862 1863 Value of 0x80 indicates invalid. 1864 */ 1865 #define PHYRX_RSSI_LEGACY_33_PREAMBLE_RSSI_INFO_DETAILS_RSSI_EXT40_HIGH20_CHAIN7_OFFSET 0x00000084 1866 #define PHYRX_RSSI_LEGACY_33_PREAMBLE_RSSI_INFO_DETAILS_RSSI_EXT40_HIGH20_CHAIN7_LSB 24 1867 #define PHYRX_RSSI_LEGACY_33_PREAMBLE_RSSI_INFO_DETAILS_RSSI_EXT40_HIGH20_CHAIN7_MASK 0xff000000 1868 1869 /* Description PHYRX_RSSI_LEGACY_34_PREAMBLE_RSSI_INFO_DETAILS_RSSI_EXT80_LOW20_CHAIN7 1870 1871 RSSI of RX PPDU on chain 7 of extension 80, low 20 MHz 1872 bandwidth. 1873 1874 Value of 0x80 indicates invalid. 1875 */ 1876 #define PHYRX_RSSI_LEGACY_34_PREAMBLE_RSSI_INFO_DETAILS_RSSI_EXT80_LOW20_CHAIN7_OFFSET 0x00000088 1877 #define PHYRX_RSSI_LEGACY_34_PREAMBLE_RSSI_INFO_DETAILS_RSSI_EXT80_LOW20_CHAIN7_LSB 0 1878 #define PHYRX_RSSI_LEGACY_34_PREAMBLE_RSSI_INFO_DETAILS_RSSI_EXT80_LOW20_CHAIN7_MASK 0x000000ff 1879 1880 /* Description PHYRX_RSSI_LEGACY_34_PREAMBLE_RSSI_INFO_DETAILS_RSSI_EXT80_LOW_HIGH20_CHAIN7 1881 1882 RSSI of RX PPDU on chain 7 of extension 80, low-high 20 1883 MHz bandwidth. 1884 1885 Value of 0x80 indicates invalid. 1886 */ 1887 #define PHYRX_RSSI_LEGACY_34_PREAMBLE_RSSI_INFO_DETAILS_RSSI_EXT80_LOW_HIGH20_CHAIN7_OFFSET 0x00000088 1888 #define PHYRX_RSSI_LEGACY_34_PREAMBLE_RSSI_INFO_DETAILS_RSSI_EXT80_LOW_HIGH20_CHAIN7_LSB 8 1889 #define PHYRX_RSSI_LEGACY_34_PREAMBLE_RSSI_INFO_DETAILS_RSSI_EXT80_LOW_HIGH20_CHAIN7_MASK 0x0000ff00 1890 1891 /* Description PHYRX_RSSI_LEGACY_34_PREAMBLE_RSSI_INFO_DETAILS_RSSI_EXT80_HIGH_LOW20_CHAIN7 1892 1893 RSSI of RX PPDU on chain 7 of extension 80, high-low 20 1894 MHz bandwidth. 1895 1896 Value of 0x80 indicates invalid. 1897 */ 1898 #define PHYRX_RSSI_LEGACY_34_PREAMBLE_RSSI_INFO_DETAILS_RSSI_EXT80_HIGH_LOW20_CHAIN7_OFFSET 0x00000088 1899 #define PHYRX_RSSI_LEGACY_34_PREAMBLE_RSSI_INFO_DETAILS_RSSI_EXT80_HIGH_LOW20_CHAIN7_LSB 16 1900 #define PHYRX_RSSI_LEGACY_34_PREAMBLE_RSSI_INFO_DETAILS_RSSI_EXT80_HIGH_LOW20_CHAIN7_MASK 0x00ff0000 1901 1902 /* Description PHYRX_RSSI_LEGACY_34_PREAMBLE_RSSI_INFO_DETAILS_RSSI_EXT80_HIGH20_CHAIN7 1903 1904 RSSI of RX PPDU on chain 7 of extension 80, high 20 MHz 1905 bandwidth. 1906 1907 Value of 0x80 indicates invalid. 1908 */ 1909 #define PHYRX_RSSI_LEGACY_34_PREAMBLE_RSSI_INFO_DETAILS_RSSI_EXT80_HIGH20_CHAIN7_OFFSET 0x00000088 1910 #define PHYRX_RSSI_LEGACY_34_PREAMBLE_RSSI_INFO_DETAILS_RSSI_EXT80_HIGH20_CHAIN7_LSB 24 1911 #define PHYRX_RSSI_LEGACY_34_PREAMBLE_RSSI_INFO_DETAILS_RSSI_EXT80_HIGH20_CHAIN7_MASK 0xff000000 1912 1913 /* Description PHYRX_RSSI_LEGACY_35_PRE_RSSI_COMB 1914 1915 Combined pre_rssi of all chains. Based on primary 1916 channel RSSI. 1917 1918 1919 1920 RSSI is reported as 8b signed values. Nominally value is 1921 in dB units above or below the noisefloor(minCCApwr). 1922 1923 1924 1925 The resolution can be: 1926 1927 1dB or 0.5dB. This is statically configured within the 1928 PHY and MAC 1929 1930 1931 1932 In case of 1dB, the Range is: 1933 1934 -128dB to 127dB 1935 1936 1937 1938 In case of 0.5dB, the Range is: 1939 1940 -64dB to 63.5dB 1941 1942 1943 1944 <legal all> 1945 */ 1946 #define PHYRX_RSSI_LEGACY_35_PRE_RSSI_COMB_OFFSET 0x0000008c 1947 #define PHYRX_RSSI_LEGACY_35_PRE_RSSI_COMB_LSB 0 1948 #define PHYRX_RSSI_LEGACY_35_PRE_RSSI_COMB_MASK 0x000000ff 1949 1950 /* Description PHYRX_RSSI_LEGACY_35_RSSI_COMB 1951 1952 Combined rssi of all chains. Based on primary channel 1953 RSSI. 1954 1955 1956 1957 RSSI is reported as 8b signed values. Nominally value is 1958 in dB units above or below the noisefloor(minCCApwr). 1959 1960 1961 1962 The resolution can be: 1963 1964 1dB or 0.5dB. This is statically configured within the 1965 PHY and MAC 1966 1967 1968 1969 In case of 1dB, the Range is: 1970 1971 -128dB to 127dB 1972 1973 1974 1975 In case of 0.5dB, the Range is: 1976 1977 -64dB to 63.5dB 1978 1979 1980 1981 <legal all> 1982 */ 1983 #define PHYRX_RSSI_LEGACY_35_RSSI_COMB_OFFSET 0x0000008c 1984 #define PHYRX_RSSI_LEGACY_35_RSSI_COMB_LSB 8 1985 #define PHYRX_RSSI_LEGACY_35_RSSI_COMB_MASK 0x0000ff00 1986 1987 /* Description PHYRX_RSSI_LEGACY_35_NORMALIZED_PRE_RSSI_COMB 1988 1989 Combined pre_rssi of all chains, but normalized back to 1990 a single chain. This avoids PDG from having to evaluate this 1991 in combination with receive chain mask and perform all kinds 1992 of pre-processing algorithms. 1993 1994 1995 1996 Based on primary channel RSSI. 1997 1998 1999 2000 RSSI is reported as 8b signed values. Nominally value is 2001 in dB units above or below the noisefloor(minCCApwr). 2002 2003 2004 2005 The resolution can be: 2006 2007 1dB or 0.5dB. This is statically configured within the 2008 PHY and MAC 2009 2010 2011 2012 In case of 1dB, the Range is: 2013 2014 -128dB to 127dB 2015 2016 2017 2018 In case of 0.5dB, the Range is: 2019 2020 -64dB to 63.5dB 2021 2022 2023 2024 <legal all> 2025 */ 2026 #define PHYRX_RSSI_LEGACY_35_NORMALIZED_PRE_RSSI_COMB_OFFSET 0x0000008c 2027 #define PHYRX_RSSI_LEGACY_35_NORMALIZED_PRE_RSSI_COMB_LSB 16 2028 #define PHYRX_RSSI_LEGACY_35_NORMALIZED_PRE_RSSI_COMB_MASK 0x00ff0000 2029 2030 /* Description PHYRX_RSSI_LEGACY_35_NORMALIZED_RSSI_COMB 2031 2032 Combined rssi of all chains, but normalized back to a 2033 single chain. This avoids PDG from having to evaluate this 2034 in combination with receive chain mask and perform all kinds 2035 of pre-processing algorithms. 2036 2037 2038 2039 Based on primary channel RSSI. 2040 2041 2042 2043 RSSI is reported as 8b signed values. Nominally value is 2044 in dB units above or below the noisefloor(minCCApwr). 2045 2046 2047 2048 The resolution can be: 2049 2050 1dB or 0.5dB. This is statically configured within the 2051 PHY and MAC 2052 2053 In case of 1dB, the Range is: 2054 2055 -128dB to 127dB 2056 2057 2058 2059 In case of 0.5dB, the Range is: 2060 2061 -64dB to 63.5dB 2062 2063 2064 2065 <legal all> 2066 */ 2067 #define PHYRX_RSSI_LEGACY_35_NORMALIZED_RSSI_COMB_OFFSET 0x0000008c 2068 #define PHYRX_RSSI_LEGACY_35_NORMALIZED_RSSI_COMB_LSB 24 2069 #define PHYRX_RSSI_LEGACY_35_NORMALIZED_RSSI_COMB_MASK 0xff000000 2070 2071 2072 #endif // _PHYRX_RSSI_LEGACY_H_ 2073