1 /*
2  * Copyright (c) 2020 The Linux Foundation. All rights reserved.
3  *
4  * Permission to use, copy, modify, and/or distribute this software for any
5  * purpose with or without fee is hereby granted, provided that the above
6  * copyright notice and this permission notice appear in all copies.
7  *
8  * THE SOFTWARE IS PROVIDED "AS IS" AND THE AUTHOR DISCLAIMS ALL WARRANTIES
9  * WITH REGARD TO THIS SOFTWARE INCLUDING ALL IMPLIED WARRANTIES OF
10  * MERCHANTABILITY AND FITNESS. IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR
11  * ANY SPECIAL, DIRECT, INDIRECT, OR CONSEQUENTIAL DAMAGES OR ANY DAMAGES
12  * WHATSOEVER RESULTING FROM LOSS OF USE, DATA OR PROFITS, WHETHER IN AN
13  * ACTION OF CONTRACT, NEGLIGENCE OR OTHER TORTIOUS ACTION, ARISING OUT OF
14  * OR IN CONNECTION WITH THE USE OR PERFORMANCE OF THIS SOFTWARE.
15  */
16 
17 // $ATH_LICENSE_HW_HDR_C$
18 //
19 // DO NOT EDIT!  This file is automatically generated
20 //               These definitions are tied to a particular hardware layout
21 
22 
23 #ifndef _PHYRX_HE_SIG_A_SU_H_
24 #define _PHYRX_HE_SIG_A_SU_H_
25 #if !defined(__ASSEMBLER__)
26 #endif
27 
28 #include "he_sig_a_su_info.h"
29 
30 // ################ START SUMMARY #################
31 //
32 //	Dword	Fields
33 //	0-1	struct he_sig_a_su_info phyrx_he_sig_a_su_info_details;
34 //
35 // ################ END SUMMARY #################
36 
37 #define NUM_OF_DWORDS_PHYRX_HE_SIG_A_SU 2
38 
39 struct phyrx_he_sig_a_su {
40     struct            he_sig_a_su_info                       phyrx_he_sig_a_su_info_details;
41 };
42 
43 /*
44 
45 struct he_sig_a_su_info phyrx_he_sig_a_su_info_details
46 
47 			See detailed description of the STRUCT
48 */
49 
50 
51  /* EXTERNAL REFERENCE : struct he_sig_a_su_info phyrx_he_sig_a_su_info_details */
52 
53 
54 /* Description		PHYRX_HE_SIG_A_SU_0_PHYRX_HE_SIG_A_SU_INFO_DETAILS_FORMAT_INDICATION
55 
56 			<enum 0 HE_SIGA_FORMAT_HE_TRIG>
57 
58 			<enum 1 HE_SIGA_FORMAT_SU_OR_EXT_SU>
59 
60 			<legal all>
61 */
62 #define PHYRX_HE_SIG_A_SU_0_PHYRX_HE_SIG_A_SU_INFO_DETAILS_FORMAT_INDICATION_OFFSET 0x00000000
63 #define PHYRX_HE_SIG_A_SU_0_PHYRX_HE_SIG_A_SU_INFO_DETAILS_FORMAT_INDICATION_LSB 0
64 #define PHYRX_HE_SIG_A_SU_0_PHYRX_HE_SIG_A_SU_INFO_DETAILS_FORMAT_INDICATION_MASK 0x00000001
65 
66 /* Description		PHYRX_HE_SIG_A_SU_0_PHYRX_HE_SIG_A_SU_INFO_DETAILS_BEAM_CHANGE
67 
68 			Indicates whether spatial mapping is changed between
69 			legacy and HE portion of preamble. If not, channel
70 			estimation can include legacy preamble to improve accuracy
71 
72 			<legal all>
73 */
74 #define PHYRX_HE_SIG_A_SU_0_PHYRX_HE_SIG_A_SU_INFO_DETAILS_BEAM_CHANGE_OFFSET 0x00000000
75 #define PHYRX_HE_SIG_A_SU_0_PHYRX_HE_SIG_A_SU_INFO_DETAILS_BEAM_CHANGE_LSB 1
76 #define PHYRX_HE_SIG_A_SU_0_PHYRX_HE_SIG_A_SU_INFO_DETAILS_BEAM_CHANGE_MASK 0x00000002
77 
78 /* Description		PHYRX_HE_SIG_A_SU_0_PHYRX_HE_SIG_A_SU_INFO_DETAILS_DL_UL_FLAG
79 
80 			Differentiates between DL and UL transmission
81 
82 
83 
84 			<enum 0 DL_UL_FLAG_IS_DL_OR_TDLS>
85 
86 			<enum 1 DL_UL_FLAG_IS_UL>
87 
88 			<legal all>
89 */
90 #define PHYRX_HE_SIG_A_SU_0_PHYRX_HE_SIG_A_SU_INFO_DETAILS_DL_UL_FLAG_OFFSET 0x00000000
91 #define PHYRX_HE_SIG_A_SU_0_PHYRX_HE_SIG_A_SU_INFO_DETAILS_DL_UL_FLAG_LSB 2
92 #define PHYRX_HE_SIG_A_SU_0_PHYRX_HE_SIG_A_SU_INFO_DETAILS_DL_UL_FLAG_MASK 0x00000004
93 
94 /* Description		PHYRX_HE_SIG_A_SU_0_PHYRX_HE_SIG_A_SU_INFO_DETAILS_TRANSMIT_MCS
95 
96 			Indicates the data MCS
97 
98 
99 
100 			Field Used by MAC HW
101 
102 			<legal all>
103 */
104 #define PHYRX_HE_SIG_A_SU_0_PHYRX_HE_SIG_A_SU_INFO_DETAILS_TRANSMIT_MCS_OFFSET 0x00000000
105 #define PHYRX_HE_SIG_A_SU_0_PHYRX_HE_SIG_A_SU_INFO_DETAILS_TRANSMIT_MCS_LSB 3
106 #define PHYRX_HE_SIG_A_SU_0_PHYRX_HE_SIG_A_SU_INFO_DETAILS_TRANSMIT_MCS_MASK 0x00000078
107 
108 /* Description		PHYRX_HE_SIG_A_SU_0_PHYRX_HE_SIG_A_SU_INFO_DETAILS_DCM
109 
110 
111 			0: No DCM
112 
113 			1:DCM
114 
115 			<legal all>
116 */
117 #define PHYRX_HE_SIG_A_SU_0_PHYRX_HE_SIG_A_SU_INFO_DETAILS_DCM_OFFSET 0x00000000
118 #define PHYRX_HE_SIG_A_SU_0_PHYRX_HE_SIG_A_SU_INFO_DETAILS_DCM_LSB   7
119 #define PHYRX_HE_SIG_A_SU_0_PHYRX_HE_SIG_A_SU_INFO_DETAILS_DCM_MASK  0x00000080
120 
121 /* Description		PHYRX_HE_SIG_A_SU_0_PHYRX_HE_SIG_A_SU_INFO_DETAILS_BSS_COLOR_ID
122 
123 			BSS color ID
124 
125 
126 
127 			Field Used by MAC HW
128 
129 			<legal all>
130 */
131 #define PHYRX_HE_SIG_A_SU_0_PHYRX_HE_SIG_A_SU_INFO_DETAILS_BSS_COLOR_ID_OFFSET 0x00000000
132 #define PHYRX_HE_SIG_A_SU_0_PHYRX_HE_SIG_A_SU_INFO_DETAILS_BSS_COLOR_ID_LSB 8
133 #define PHYRX_HE_SIG_A_SU_0_PHYRX_HE_SIG_A_SU_INFO_DETAILS_BSS_COLOR_ID_MASK 0x00003f00
134 
135 /* Description		PHYRX_HE_SIG_A_SU_0_PHYRX_HE_SIG_A_SU_INFO_DETAILS_RESERVED_0A
136 
137 			Note: spec indicates this shall be set to 1
138 
139 			<legal 1>
140 */
141 #define PHYRX_HE_SIG_A_SU_0_PHYRX_HE_SIG_A_SU_INFO_DETAILS_RESERVED_0A_OFFSET 0x00000000
142 #define PHYRX_HE_SIG_A_SU_0_PHYRX_HE_SIG_A_SU_INFO_DETAILS_RESERVED_0A_LSB 14
143 #define PHYRX_HE_SIG_A_SU_0_PHYRX_HE_SIG_A_SU_INFO_DETAILS_RESERVED_0A_MASK 0x00004000
144 
145 /* Description		PHYRX_HE_SIG_A_SU_0_PHYRX_HE_SIG_A_SU_INFO_DETAILS_SPATIAL_REUSE
146 
147 			Spatial reuse
148 
149 
150 
151 			For 20MHz one SR field corresponding to entire 20MHz
152 			(other 3 fields indicate identical values)
153 
154 			For 40MHz two SR fields for each 20MHz (other 2 fields
155 			indicate identical values)
156 
157 			For 80MHz four SR fields for each 20MHz
158 
159 			For 160MHz four SR fields for each 40MHz
160 
161 			<legal all>
162 */
163 #define PHYRX_HE_SIG_A_SU_0_PHYRX_HE_SIG_A_SU_INFO_DETAILS_SPATIAL_REUSE_OFFSET 0x00000000
164 #define PHYRX_HE_SIG_A_SU_0_PHYRX_HE_SIG_A_SU_INFO_DETAILS_SPATIAL_REUSE_LSB 15
165 #define PHYRX_HE_SIG_A_SU_0_PHYRX_HE_SIG_A_SU_INFO_DETAILS_SPATIAL_REUSE_MASK 0x00078000
166 
167 /* Description		PHYRX_HE_SIG_A_SU_0_PHYRX_HE_SIG_A_SU_INFO_DETAILS_TRANSMIT_BW
168 
169 			Bandwidth of the PPDU.
170 
171 
172 
173 			For HE SU PPDU
174 
175 
176 			<enum 0 HE_SIG_A_BW20> 20 Mhz
177 
178 			<enum 1 HE_SIG_A_BW40> 40 Mhz
179 
180 			<enum 2 HE_SIG_A_BW80> 80 Mhz
181 
182 			<enum 3 HE_SIG_A_BW160> 160 MHz or 80+80 MHz
183 
184 
185 
186 			For HE Extended Range SU PPDU
187 
188 			Set to 0 for 242-tone RU
189 			 Set to 1 for right 106-tone RU within the primary 20 MHz
190 
191 
192 
193 			On RX side, Field Used by MAC HW
194 
195 			<legal all>
196 */
197 #define PHYRX_HE_SIG_A_SU_0_PHYRX_HE_SIG_A_SU_INFO_DETAILS_TRANSMIT_BW_OFFSET 0x00000000
198 #define PHYRX_HE_SIG_A_SU_0_PHYRX_HE_SIG_A_SU_INFO_DETAILS_TRANSMIT_BW_LSB 19
199 #define PHYRX_HE_SIG_A_SU_0_PHYRX_HE_SIG_A_SU_INFO_DETAILS_TRANSMIT_BW_MASK 0x00180000
200 
201 /* Description		PHYRX_HE_SIG_A_SU_0_PHYRX_HE_SIG_A_SU_INFO_DETAILS_CP_LTF_SIZE
202 
203 			Indicates the CP and HE-LTF type
204 
205 
206 
207 			<enum 0 OneX_LTF_0_8CP> 1xLTF + 0.8 us CP
208 
209 			<enum 1 TwoX_LTF_0_8CP> 2x LTF + 0.8 µs CP
210 
211 			<enum 2 TwoX_LTF_1_6CP> 2x LTF + 1.6 µs CP
212 
213 
214 
215 			<enum 3 FourX_LTF_0_8CP_3_2CP>
216 
217 			When DCM == 0 OR STBC == 0: 4x LTF + 3.2 µs CP
218 
219 			When DCM == 1 AND STBC == 1: 4x LTF + 0.8 µs CP. Note:
220 			In this scenario, Neither DCM nor STBC is applied to HE data
221 			field.
222 
223 
224 			NOTE:
225 
226 			If ( DCM == 1 ) and ( MCS > 0 ) and (STBC == 0)
227 
228 			0      = 1xLTF + 0.4 usec
229 
230 			1      = 2xLTF + 0.4 usec
231 
232 			2~3 = Reserved
233 
234 
235 
236 			<legal all>
237 */
238 #define PHYRX_HE_SIG_A_SU_0_PHYRX_HE_SIG_A_SU_INFO_DETAILS_CP_LTF_SIZE_OFFSET 0x00000000
239 #define PHYRX_HE_SIG_A_SU_0_PHYRX_HE_SIG_A_SU_INFO_DETAILS_CP_LTF_SIZE_LSB 21
240 #define PHYRX_HE_SIG_A_SU_0_PHYRX_HE_SIG_A_SU_INFO_DETAILS_CP_LTF_SIZE_MASK 0x00600000
241 
242 /* Description		PHYRX_HE_SIG_A_SU_0_PHYRX_HE_SIG_A_SU_INFO_DETAILS_NSTS
243 
244 
245 
246 
247 			For HE SU PPDU
248 
249 
250 
251 			For HE Extended Range PPDU
252 
253 			<legal all>
254 */
255 #define PHYRX_HE_SIG_A_SU_0_PHYRX_HE_SIG_A_SU_INFO_DETAILS_NSTS_OFFSET 0x00000000
256 #define PHYRX_HE_SIG_A_SU_0_PHYRX_HE_SIG_A_SU_INFO_DETAILS_NSTS_LSB  23
257 #define PHYRX_HE_SIG_A_SU_0_PHYRX_HE_SIG_A_SU_INFO_DETAILS_NSTS_MASK 0x03800000
258 
259 /* Description		PHYRX_HE_SIG_A_SU_0_PHYRX_HE_SIG_A_SU_INFO_DETAILS_RESERVED_0B
260 
261 			<legal 0>
262 */
263 #define PHYRX_HE_SIG_A_SU_0_PHYRX_HE_SIG_A_SU_INFO_DETAILS_RESERVED_0B_OFFSET 0x00000000
264 #define PHYRX_HE_SIG_A_SU_0_PHYRX_HE_SIG_A_SU_INFO_DETAILS_RESERVED_0B_LSB 26
265 #define PHYRX_HE_SIG_A_SU_0_PHYRX_HE_SIG_A_SU_INFO_DETAILS_RESERVED_0B_MASK 0xfc000000
266 
267 /* Description		PHYRX_HE_SIG_A_SU_1_PHYRX_HE_SIG_A_SU_INFO_DETAILS_TXOP_DURATION
268 
269 			Indicates the remaining time in the current TXOP
270 
271 
272 
273 			Field Used by MAC HW
274 
275 			 <legal all>
276 */
277 #define PHYRX_HE_SIG_A_SU_1_PHYRX_HE_SIG_A_SU_INFO_DETAILS_TXOP_DURATION_OFFSET 0x00000004
278 #define PHYRX_HE_SIG_A_SU_1_PHYRX_HE_SIG_A_SU_INFO_DETAILS_TXOP_DURATION_LSB 0
279 #define PHYRX_HE_SIG_A_SU_1_PHYRX_HE_SIG_A_SU_INFO_DETAILS_TXOP_DURATION_MASK 0x0000007f
280 
281 /* Description		PHYRX_HE_SIG_A_SU_1_PHYRX_HE_SIG_A_SU_INFO_DETAILS_CODING
282 
283 			Distinguishes between BCC and LDPC coding.
284 
285 
286 
287 			0: BCC
288 
289 			1: LDPC
290 
291 			<legal all>
292 */
293 #define PHYRX_HE_SIG_A_SU_1_PHYRX_HE_SIG_A_SU_INFO_DETAILS_CODING_OFFSET 0x00000004
294 #define PHYRX_HE_SIG_A_SU_1_PHYRX_HE_SIG_A_SU_INFO_DETAILS_CODING_LSB 7
295 #define PHYRX_HE_SIG_A_SU_1_PHYRX_HE_SIG_A_SU_INFO_DETAILS_CODING_MASK 0x00000080
296 
297 /* Description		PHYRX_HE_SIG_A_SU_1_PHYRX_HE_SIG_A_SU_INFO_DETAILS_LDPC_EXTRA_SYMBOL
298 
299 			If LDPC,
300 
301 			  0: LDPC extra symbol not present
302 
303 			  1: LDPC extra symbol present
304 
305 			Else
306 
307 			  Set to 1
308 
309 			<legal all>
310 */
311 #define PHYRX_HE_SIG_A_SU_1_PHYRX_HE_SIG_A_SU_INFO_DETAILS_LDPC_EXTRA_SYMBOL_OFFSET 0x00000004
312 #define PHYRX_HE_SIG_A_SU_1_PHYRX_HE_SIG_A_SU_INFO_DETAILS_LDPC_EXTRA_SYMBOL_LSB 8
313 #define PHYRX_HE_SIG_A_SU_1_PHYRX_HE_SIG_A_SU_INFO_DETAILS_LDPC_EXTRA_SYMBOL_MASK 0x00000100
314 
315 /* Description		PHYRX_HE_SIG_A_SU_1_PHYRX_HE_SIG_A_SU_INFO_DETAILS_STBC
316 
317 			Indicates whether STBC is applied
318 
319 			0: No STBC
320 
321 			1: STBC
322 
323 			<legal all>
324 */
325 #define PHYRX_HE_SIG_A_SU_1_PHYRX_HE_SIG_A_SU_INFO_DETAILS_STBC_OFFSET 0x00000004
326 #define PHYRX_HE_SIG_A_SU_1_PHYRX_HE_SIG_A_SU_INFO_DETAILS_STBC_LSB  9
327 #define PHYRX_HE_SIG_A_SU_1_PHYRX_HE_SIG_A_SU_INFO_DETAILS_STBC_MASK 0x00000200
328 
329 /* Description		PHYRX_HE_SIG_A_SU_1_PHYRX_HE_SIG_A_SU_INFO_DETAILS_TXBF
330 
331 			Indicates whether beamforming is applied
332 
333 			0: No beamforming
334 
335 			1: beamforming
336 
337 			<legal all>
338 */
339 #define PHYRX_HE_SIG_A_SU_1_PHYRX_HE_SIG_A_SU_INFO_DETAILS_TXBF_OFFSET 0x00000004
340 #define PHYRX_HE_SIG_A_SU_1_PHYRX_HE_SIG_A_SU_INFO_DETAILS_TXBF_LSB  10
341 #define PHYRX_HE_SIG_A_SU_1_PHYRX_HE_SIG_A_SU_INFO_DETAILS_TXBF_MASK 0x00000400
342 
343 /* Description		PHYRX_HE_SIG_A_SU_1_PHYRX_HE_SIG_A_SU_INFO_DETAILS_PACKET_EXTENSION_A_FACTOR
344 
345 			Common trigger info
346 
347 
348 
349 			the packet extension duration of the trigger-based PPDU
350 			response with these two bits indicating the a-factor
351 
352 
353 
354 			<enum 0 a_factor_4>
355 
356 			<enum 1 a_factor_1>
357 
358 			<enum 2 a_factor_2>
359 
360 			<enum 3 a_factor_3>
361 
362 
363 
364 			<legal all>
365 */
366 #define PHYRX_HE_SIG_A_SU_1_PHYRX_HE_SIG_A_SU_INFO_DETAILS_PACKET_EXTENSION_A_FACTOR_OFFSET 0x00000004
367 #define PHYRX_HE_SIG_A_SU_1_PHYRX_HE_SIG_A_SU_INFO_DETAILS_PACKET_EXTENSION_A_FACTOR_LSB 11
368 #define PHYRX_HE_SIG_A_SU_1_PHYRX_HE_SIG_A_SU_INFO_DETAILS_PACKET_EXTENSION_A_FACTOR_MASK 0x00001800
369 
370 /* Description		PHYRX_HE_SIG_A_SU_1_PHYRX_HE_SIG_A_SU_INFO_DETAILS_PACKET_EXTENSION_PE_DISAMBIGUITY
371 
372 			Common trigger info
373 
374 
375 
376 			the packet extension duration of the trigger-based PPDU
377 			response with this bit indicating the PE-Disambiguity
378 
379 			<legal all>
380 */
381 #define PHYRX_HE_SIG_A_SU_1_PHYRX_HE_SIG_A_SU_INFO_DETAILS_PACKET_EXTENSION_PE_DISAMBIGUITY_OFFSET 0x00000004
382 #define PHYRX_HE_SIG_A_SU_1_PHYRX_HE_SIG_A_SU_INFO_DETAILS_PACKET_EXTENSION_PE_DISAMBIGUITY_LSB 13
383 #define PHYRX_HE_SIG_A_SU_1_PHYRX_HE_SIG_A_SU_INFO_DETAILS_PACKET_EXTENSION_PE_DISAMBIGUITY_MASK 0x00002000
384 
385 /* Description		PHYRX_HE_SIG_A_SU_1_PHYRX_HE_SIG_A_SU_INFO_DETAILS_RESERVED_1A
386 
387 			Note: per standard, set to 1
388 
389 			<legal 1>
390 */
391 #define PHYRX_HE_SIG_A_SU_1_PHYRX_HE_SIG_A_SU_INFO_DETAILS_RESERVED_1A_OFFSET 0x00000004
392 #define PHYRX_HE_SIG_A_SU_1_PHYRX_HE_SIG_A_SU_INFO_DETAILS_RESERVED_1A_LSB 14
393 #define PHYRX_HE_SIG_A_SU_1_PHYRX_HE_SIG_A_SU_INFO_DETAILS_RESERVED_1A_MASK 0x00004000
394 
395 /* Description		PHYRX_HE_SIG_A_SU_1_PHYRX_HE_SIG_A_SU_INFO_DETAILS_DOPPLER_INDICATION
396 
397 			0: No Doppler support
398 
399 			1: Doppler support
400 
401 			<legal all>
402 */
403 #define PHYRX_HE_SIG_A_SU_1_PHYRX_HE_SIG_A_SU_INFO_DETAILS_DOPPLER_INDICATION_OFFSET 0x00000004
404 #define PHYRX_HE_SIG_A_SU_1_PHYRX_HE_SIG_A_SU_INFO_DETAILS_DOPPLER_INDICATION_LSB 15
405 #define PHYRX_HE_SIG_A_SU_1_PHYRX_HE_SIG_A_SU_INFO_DETAILS_DOPPLER_INDICATION_MASK 0x00008000
406 
407 /* Description		PHYRX_HE_SIG_A_SU_1_PHYRX_HE_SIG_A_SU_INFO_DETAILS_CRC
408 
409 			CRC for HE-SIG-A contents.
410 
411 			<legal all>
412 */
413 #define PHYRX_HE_SIG_A_SU_1_PHYRX_HE_SIG_A_SU_INFO_DETAILS_CRC_OFFSET 0x00000004
414 #define PHYRX_HE_SIG_A_SU_1_PHYRX_HE_SIG_A_SU_INFO_DETAILS_CRC_LSB   16
415 #define PHYRX_HE_SIG_A_SU_1_PHYRX_HE_SIG_A_SU_INFO_DETAILS_CRC_MASK  0x000f0000
416 
417 /* Description		PHYRX_HE_SIG_A_SU_1_PHYRX_HE_SIG_A_SU_INFO_DETAILS_TAIL
418 
419 			<legal 0>
420 */
421 #define PHYRX_HE_SIG_A_SU_1_PHYRX_HE_SIG_A_SU_INFO_DETAILS_TAIL_OFFSET 0x00000004
422 #define PHYRX_HE_SIG_A_SU_1_PHYRX_HE_SIG_A_SU_INFO_DETAILS_TAIL_LSB  20
423 #define PHYRX_HE_SIG_A_SU_1_PHYRX_HE_SIG_A_SU_INFO_DETAILS_TAIL_MASK 0x03f00000
424 
425 /* Description		PHYRX_HE_SIG_A_SU_1_PHYRX_HE_SIG_A_SU_INFO_DETAILS_DOT11AX_SU_EXTENDED
426 
427 			TX side:
428 
429 			Set to 0
430 
431 
432 
433 			RX side:
434 
435 			On RX side, evaluated by MAC HW. This is the only way
436 			for MAC RX to know that this was an HE_SIG_A_SU received in
437 			'extended' format
438 
439 
440 
441 
442 			<legal all>
443 */
444 #define PHYRX_HE_SIG_A_SU_1_PHYRX_HE_SIG_A_SU_INFO_DETAILS_DOT11AX_SU_EXTENDED_OFFSET 0x00000004
445 #define PHYRX_HE_SIG_A_SU_1_PHYRX_HE_SIG_A_SU_INFO_DETAILS_DOT11AX_SU_EXTENDED_LSB 26
446 #define PHYRX_HE_SIG_A_SU_1_PHYRX_HE_SIG_A_SU_INFO_DETAILS_DOT11AX_SU_EXTENDED_MASK 0x04000000
447 
448 /* Description		PHYRX_HE_SIG_A_SU_1_PHYRX_HE_SIG_A_SU_INFO_DETAILS_DOT11AX_EXT_RU_SIZE
449 
450 			TX side:
451 
452 			Set to 0
453 
454 
455 
456 			RX side:
457 
458 			Field only contains valid info when dot11ax_su_extended
459 			is set.
460 
461 
462 
463 			On RX side, evaluated by MAC HW. This is the only way
464 			for MAC RX to know what the number of based RUs was in this
465 			extended range reception. It is used by the MAC to determine
466 			the RU size for the response...
467 
468 			<legal all>
469 */
470 #define PHYRX_HE_SIG_A_SU_1_PHYRX_HE_SIG_A_SU_INFO_DETAILS_DOT11AX_EXT_RU_SIZE_OFFSET 0x00000004
471 #define PHYRX_HE_SIG_A_SU_1_PHYRX_HE_SIG_A_SU_INFO_DETAILS_DOT11AX_EXT_RU_SIZE_LSB 27
472 #define PHYRX_HE_SIG_A_SU_1_PHYRX_HE_SIG_A_SU_INFO_DETAILS_DOT11AX_EXT_RU_SIZE_MASK 0x78000000
473 
474 /* Description		PHYRX_HE_SIG_A_SU_1_PHYRX_HE_SIG_A_SU_INFO_DETAILS_RX_NDP
475 
476 			TX side:
477 
478 			Set to 0
479 
480 
481 
482 			RX side:Valid on RX side only, and looked at by MAC HW
483 
484 
485 
486 			When set, PHY has received (expected) NDP frame
487 
488 			<legal all>
489 */
490 #define PHYRX_HE_SIG_A_SU_1_PHYRX_HE_SIG_A_SU_INFO_DETAILS_RX_NDP_OFFSET 0x00000004
491 #define PHYRX_HE_SIG_A_SU_1_PHYRX_HE_SIG_A_SU_INFO_DETAILS_RX_NDP_LSB 31
492 #define PHYRX_HE_SIG_A_SU_1_PHYRX_HE_SIG_A_SU_INFO_DETAILS_RX_NDP_MASK 0x80000000
493 
494 
495 #endif // _PHYRX_HE_SIG_A_SU_H_
496