1 /*
2  * Copyright (c) 2016 The Linux Foundation. All rights reserved.
3  *
4  * Permission to use, copy, modify, and/or distribute this software for
5  * any purpose with or without fee is hereby granted, provided that the
6  * above copyright notice and this permission notice appear in all
7  * copies.
8  *
9  * THE SOFTWARE IS PROVIDED "AS IS" AND THE AUTHOR DISCLAIMS ALL
10  * WARRANTIES WITH REGARD TO THIS SOFTWARE INCLUDING ALL IMPLIED
11  * WARRANTIES OF MERCHANTABILITY AND FITNESS. IN NO EVENT SHALL THE
12  * AUTHOR BE LIABLE FOR ANY SPECIAL, DIRECT, INDIRECT, OR CONSEQUENTIAL
13  * DAMAGES OR ANY DAMAGES WHATSOEVER RESULTING FROM LOSS OF USE, DATA OR
14  * PROFITS, WHETHER IN AN ACTION OF CONTRACT, NEGLIGENCE OR OTHER
15  * TORTIOUS ACTION, ARISING OUT OF OR IN CONNECTION WITH THE USE OR
16  * PERFORMANCE OF THIS SOFTWARE.
17  */
18 
19 // $ATH_LICENSE_HW_HDR_C$
20 //
21 // DO NOT EDIT!  This file is automatically generated
22 //               These definitions are tied to a particular hardware layout
23 
24 
25 #ifndef _UNIFORM_DESCRIPTOR_HEADER_H_
26 #define _UNIFORM_DESCRIPTOR_HEADER_H_
27 #if !defined(__ASSEMBLER__)
28 #endif
29 
30 
31 // ################ START SUMMARY #################
32 //
33 //	Dword	Fields
34 //	0	owner[3:0], buffer_type[7:4], reserved_0a[31:8]
35 //
36 // ################ END SUMMARY #################
37 
38 #define NUM_OF_DWORDS_UNIFORM_DESCRIPTOR_HEADER 1
39 
40 struct uniform_descriptor_header {
41              uint32_t owner                           :  4, //[3:0]
42                       buffer_type                     :  4, //[7:4]
43                       reserved_0a                     : 24; //[31:8]
44 };
45 
46 /*
47 
48 owner
49 
50 			Consumer: In DEBUG mode: WBM, TQM, TXDMA, RXDMA, REO
51 
52 			Producer: In DEBUG mode: WBM, TQM, TXDMA, RXDMA, REO
53 
54 
55 
56 			The owner of this data structure:
57 
58 			<enum 0 WBM_owned> Buffer Manager currently owns this
59 			data structure.
60 
61 			<enum 1 SW_OR_FW_owned> Software of FW currently owns
62 			this data structure.
63 
64 			<enum 2 TQM_owned> Transmit Queue Manager currently owns
65 			this data structure.
66 
67 			<enum 3 RXDMA_owned> Receive DMA currently owns this
68 			data structure.
69 
70 			<enum 4 REO_owned> Reorder currently owns this data
71 			structure.
72 
73 			<enum 5 SWITCH_owned> SWITCH currently owns this data
74 			structure.
75 
76 
77 
78 			<legal 0-5>
79 
80 buffer_type
81 
82 			Consumer: In DEBUG mode: WBM, TQM, TXDMA, RXDMA, REO
83 
84 			Producer: In DEBUG mode: WBM, TQM, TXDMA, RXDMA, REO
85 
86 
87 
88 			Field describing what contents format is of this
89 			descriptor
90 
91 
92 
93 			<enum 0 Transmit_MSDU_Link_descriptor >
94 
95 			<enum 1 Transmit_MPDU_Link_descriptor >
96 
97 			<enum 2 Transmit_MPDU_Queue_head_descriptor>
98 
99 			<enum 3 Transmit_MPDU_Queue_ext_descriptor>
100 
101 			<enum 4 Transmit_flow_descriptor>
102 
103 			<enum 5 Transmit_buffer >
104 
105 
106 
107 			<enum 6 Receive_MSDU_Link_descriptor >
108 
109 			<enum 7 Receive_MPDU_Link_descriptor >
110 
111 			<enum 8 Receive_REO_queue_descriptor >
112 
113 			<enum 9 Receive_REO_queue_ext_descriptor >
114 
115 
116 
117 			<enum 10 Receive_buffer >
118 
119 
120 
121 			<enum 11 Idle_link_list_entry>
122 
123 
124 
125 			<legal 0-11>
126 
127 reserved_0a
128 
129 			<legal 0>
130 */
131 
132 
133 /* Description		UNIFORM_DESCRIPTOR_HEADER_0_OWNER
134 
135 			Consumer: In DEBUG mode: WBM, TQM, TXDMA, RXDMA, REO
136 
137 			Producer: In DEBUG mode: WBM, TQM, TXDMA, RXDMA, REO
138 
139 
140 
141 			The owner of this data structure:
142 
143 			<enum 0 WBM_owned> Buffer Manager currently owns this
144 			data structure.
145 
146 			<enum 1 SW_OR_FW_owned> Software of FW currently owns
147 			this data structure.
148 
149 			<enum 2 TQM_owned> Transmit Queue Manager currently owns
150 			this data structure.
151 
152 			<enum 3 RXDMA_owned> Receive DMA currently owns this
153 			data structure.
154 
155 			<enum 4 REO_owned> Reorder currently owns this data
156 			structure.
157 
158 			<enum 5 SWITCH_owned> SWITCH currently owns this data
159 			structure.
160 
161 
162 
163 			<legal 0-5>
164 */
165 #define UNIFORM_DESCRIPTOR_HEADER_0_OWNER_OFFSET                     0x00000000
166 #define UNIFORM_DESCRIPTOR_HEADER_0_OWNER_LSB                        0
167 #define UNIFORM_DESCRIPTOR_HEADER_0_OWNER_MASK                       0x0000000f
168 
169 /* Description		UNIFORM_DESCRIPTOR_HEADER_0_BUFFER_TYPE
170 
171 			Consumer: In DEBUG mode: WBM, TQM, TXDMA, RXDMA, REO
172 
173 			Producer: In DEBUG mode: WBM, TQM, TXDMA, RXDMA, REO
174 
175 
176 
177 			Field describing what contents format is of this
178 			descriptor
179 
180 
181 
182 			<enum 0 Transmit_MSDU_Link_descriptor >
183 
184 			<enum 1 Transmit_MPDU_Link_descriptor >
185 
186 			<enum 2 Transmit_MPDU_Queue_head_descriptor>
187 
188 			<enum 3 Transmit_MPDU_Queue_ext_descriptor>
189 
190 			<enum 4 Transmit_flow_descriptor>
191 
192 			<enum 5 Transmit_buffer >
193 
194 
195 
196 			<enum 6 Receive_MSDU_Link_descriptor >
197 
198 			<enum 7 Receive_MPDU_Link_descriptor >
199 
200 			<enum 8 Receive_REO_queue_descriptor >
201 
202 			<enum 9 Receive_REO_queue_ext_descriptor >
203 
204 
205 
206 			<enum 10 Receive_buffer >
207 
208 
209 
210 			<enum 11 Idle_link_list_entry>
211 
212 
213 
214 			<legal 0-11>
215 */
216 #define UNIFORM_DESCRIPTOR_HEADER_0_BUFFER_TYPE_OFFSET               0x00000000
217 #define UNIFORM_DESCRIPTOR_HEADER_0_BUFFER_TYPE_LSB                  4
218 #define UNIFORM_DESCRIPTOR_HEADER_0_BUFFER_TYPE_MASK                 0x000000f0
219 
220 /* Description		UNIFORM_DESCRIPTOR_HEADER_0_RESERVED_0A
221 
222 			<legal 0>
223 */
224 #define UNIFORM_DESCRIPTOR_HEADER_0_RESERVED_0A_OFFSET               0x00000000
225 #define UNIFORM_DESCRIPTOR_HEADER_0_RESERVED_0A_LSB                  8
226 #define UNIFORM_DESCRIPTOR_HEADER_0_RESERVED_0A_MASK                 0xffffff00
227 
228 
229 #endif // _UNIFORM_DESCRIPTOR_HEADER_H_
230