1 /*
2  * Copyright (c) 2019 The Linux Foundation. All rights reserved.
3  *
4  * Permission to use, copy, modify, and/or distribute this software for
5  * any purpose with or without fee is hereby granted, provided that the
6  * above copyright notice and this permission notice appear in all
7  * copies.
8  *
9  * THE SOFTWARE IS PROVIDED "AS IS" AND THE AUTHOR DISCLAIMS ALL
10  * WARRANTIES WITH REGARD TO THIS SOFTWARE INCLUDING ALL IMPLIED
11  * WARRANTIES OF MERCHANTABILITY AND FITNESS. IN NO EVENT SHALL THE
12  * AUTHOR BE LIABLE FOR ANY SPECIAL, DIRECT, INDIRECT, OR CONSEQUENTIAL
13  * DAMAGES OR ANY DAMAGES WHATSOEVER RESULTING FROM LOSS OF USE, DATA OR
14  * PROFITS, WHETHER IN AN ACTION OF CONTRACT, NEGLIGENCE OR OTHER
15  * TORTIOUS ACTION, ARISING OUT OF OR IN CONNECTION WITH THE USE OR
16  * PERFORMANCE OF THIS SOFTWARE.
17  */
18 
19 //
20 // DO NOT EDIT!  This file is automatically generated
21 //               These definitions are tied to a particular hardware layout
22 
23 
24 #ifndef _TCL_STATUS_RING_H_
25 #define _TCL_STATUS_RING_H_
26 #if !defined(__ASSEMBLER__)
27 #endif
28 
29 
30 // ################ START SUMMARY #################
31 //
32 //	Dword	Fields
33 //	0	gse_ctrl[3:0], ase_fse_sel[4], cache_op_res[6:5], index_search_en[7], msdu_cnt_n[31:8]
34 //	1	msdu_byte_cnt_n[31:0]
35 //	2	msdu_timestmp_n[31:0]
36 //	3	cmd_meta_data_31_0[31:0]
37 //	4	cmd_meta_data_63_32[31:0]
38 //	5	hash_indx_val[19:0], cache_set_num[23:20], reserved_5a[31:24]
39 //	6	reserved_6a[31:0]
40 //	7	reserved_7a[19:0], ring_id[27:20], looping_count[31:28]
41 //
42 // ################ END SUMMARY #################
43 
44 #define NUM_OF_DWORDS_TCL_STATUS_RING 8
45 
46 struct tcl_status_ring {
47              uint32_t gse_ctrl                        :  4, //[3:0]
48                       ase_fse_sel                     :  1, //[4]
49                       cache_op_res                    :  2, //[6:5]
50                       index_search_en                 :  1, //[7]
51                       msdu_cnt_n                      : 24; //[31:8]
52              uint32_t msdu_byte_cnt_n                 : 32; //[31:0]
53              uint32_t msdu_timestmp_n                 : 32; //[31:0]
54              uint32_t cmd_meta_data_31_0              : 32; //[31:0]
55              uint32_t cmd_meta_data_63_32             : 32; //[31:0]
56              uint32_t hash_indx_val                   : 20, //[19:0]
57                       cache_set_num                   :  4, //[23:20]
58                       reserved_5a                     :  8; //[31:24]
59              uint32_t reserved_6a                     : 32; //[31:0]
60              uint32_t reserved_7a                     : 20, //[19:0]
61                       ring_id                         :  8, //[27:20]
62                       looping_count                   :  4; //[31:28]
63 };
64 
65 /*
66 
67 gse_ctrl
68 
69 			GSE control operations. This includes cache operations
70 			and table entry statistics read/clear operation.
71 
72 			<enum 0 rd_stat> Report or Read statistics
73 
74 			<enum 1 srch_dis> Search disable. Report only Hash
75 
76 			<enum 2 Wr_bk_single> Write Back single entry
77 
78 			<enum 3 wr_bk_all> Write Back entire cache entry
79 
80 			<enum 4 inval_single> Invalidate single cache entry
81 
82 			<enum 5 inval_all> Invalidate entire cache
83 
84 			<enum 6 wr_bk_inval_single> Write back and Invalidate
85 			single entry in cache
86 
87 			<enum 7 wr_bk_inval_all> write back and invalidate
88 			entire cache
89 
90 			<enum 8 clr_stat_single> Clear statistics for single
91 			entry
92 
93 			<legal 0-8>
94 
95 			Rest of the values reserved.
96 
97 			For all single entry control operations (write back,
98 			Invalidate or both)Statistics will be reported
99 
100 ase_fse_sel
101 
102 			Search Engine for which operation is done.
103 
104 			1'b0: Address Search Engine Result
105 
106 			1'b1: Flow Search Engine result
107 
108 cache_op_res
109 
110 			Cache operation result. Following are results of cache
111 			operation.
112 
113 			<enum 0 op_done>  Operation successful
114 
115 			<enum 1 not_fnd> Entry not found in Table
116 
117 			<enum 2 timeout_er>  Timeout Error
118 
119 			<legal 0-2>
120 
121 index_search_en
122 
123 			When this bit is set to 1 control_buffer_addr[19:0] will
124 			be considered as index of the AST or Flow table and GSE
125 			commands will be executed accordingly on the entry pointed
126 			by the index.
127 
128 			This feature is disabled by setting this bit to 0.
129 
130 			<enum 0 index_based_cmd_disable>
131 
132 			<enum 1 index_based_cmd_enable>
133 
134 
135 
136 			<legal all>
137 
138 msdu_cnt_n
139 
140 			MSDU count of Entry. Valid when GSE_CTRL is 4'b0111 and
141 			4'b1000
142 
143 msdu_byte_cnt_n
144 
145 			MSDU byte count for entry 1. Valid when GSE_CTRL is
146 			4'b0111 and 4'b1000
147 
148 msdu_timestmp_n
149 
150 			MSDU timestamp for entry 1. Valid when GSE_CTRL is
151 			4'b0111 and 4'b1000
152 
153 cmd_meta_data_31_0
154 
155 			Meta data from input ring
156 
157 			<legal all>
158 
159 cmd_meta_data_63_32
160 
161 			Meta data from input ring
162 
163 			<legal all>
164 
165 hash_indx_val
166 
167 
168 			Hash value of the entry in table in case of search
169 			failed or search disable.
170 
171 			<legal all>
172 
173 cache_set_num
174 
175 			Cache set number copied from TCL_GSE_CMD
176 
177 reserved_5a
178 
179 			<legal 0>
180 
181 reserved_6a
182 
183 			<legal 0>
184 
185 reserved_7a
186 
187 			<legal 0>
188 
189 ring_id
190 
191 			The buffer pointer ring ID.
192 
193 
194 
195 			Helps with debugging when dumping ring contents.
196 
197 			<legal all>
198 
199 looping_count
200 
201 			A count value that indicates the number of times the
202 			producer of entries into the Ring has looped around the
203 			ring.
204 
205 			At initialization time, this value is set to 0. On the
206 			first loop, this value is set to 1. After the max value is
207 			reached allowed by the number of bits for this field, the
208 			count value continues with 0 again.
209 
210 
211 
212 			In case SW is the consumer of the ring entries, it can
213 			use this field to figure out up to where the producer of
214 			entries has created new entries. This eliminates the need to
215 			check where the head pointer' of the ring is located once
216 			the SW starts processing an interrupt indicating that new
217 			entries have been put into this ring...
218 
219 
220 
221 			Also note that SW if it wants only needs to look at the
222 			LSB bit of this count value.
223 
224 			<legal all>
225 */
226 
227 
228 /* Description		TCL_STATUS_RING_0_GSE_CTRL
229 
230 			GSE control operations. This includes cache operations
231 			and table entry statistics read/clear operation.
232 
233 			<enum 0 rd_stat> Report or Read statistics
234 
235 			<enum 1 srch_dis> Search disable. Report only Hash
236 
237 			<enum 2 Wr_bk_single> Write Back single entry
238 
239 			<enum 3 wr_bk_all> Write Back entire cache entry
240 
241 			<enum 4 inval_single> Invalidate single cache entry
242 
243 			<enum 5 inval_all> Invalidate entire cache
244 
245 			<enum 6 wr_bk_inval_single> Write back and Invalidate
246 			single entry in cache
247 
248 			<enum 7 wr_bk_inval_all> write back and invalidate
249 			entire cache
250 
251 			<enum 8 clr_stat_single> Clear statistics for single
252 			entry
253 
254 			<legal 0-8>
255 
256 			Rest of the values reserved.
257 
258 			For all single entry control operations (write back,
259 			Invalidate or both)Statistics will be reported
260 */
261 #define TCL_STATUS_RING_0_GSE_CTRL_OFFSET                            0x00000000
262 #define TCL_STATUS_RING_0_GSE_CTRL_LSB                               0
263 #define TCL_STATUS_RING_0_GSE_CTRL_MASK                              0x0000000f
264 
265 /* Description		TCL_STATUS_RING_0_ASE_FSE_SEL
266 
267 			Search Engine for which operation is done.
268 
269 			1'b0: Address Search Engine Result
270 
271 			1'b1: Flow Search Engine result
272 */
273 #define TCL_STATUS_RING_0_ASE_FSE_SEL_OFFSET                         0x00000000
274 #define TCL_STATUS_RING_0_ASE_FSE_SEL_LSB                            4
275 #define TCL_STATUS_RING_0_ASE_FSE_SEL_MASK                           0x00000010
276 
277 /* Description		TCL_STATUS_RING_0_CACHE_OP_RES
278 
279 			Cache operation result. Following are results of cache
280 			operation.
281 
282 			<enum 0 op_done>  Operation successful
283 
284 			<enum 1 not_fnd> Entry not found in Table
285 
286 			<enum 2 timeout_er>  Timeout Error
287 
288 			<legal 0-2>
289 */
290 #define TCL_STATUS_RING_0_CACHE_OP_RES_OFFSET                        0x00000000
291 #define TCL_STATUS_RING_0_CACHE_OP_RES_LSB                           5
292 #define TCL_STATUS_RING_0_CACHE_OP_RES_MASK                          0x00000060
293 
294 /* Description		TCL_STATUS_RING_0_INDEX_SEARCH_EN
295 
296 			When this bit is set to 1 control_buffer_addr[19:0] will
297 			be considered as index of the AST or Flow table and GSE
298 			commands will be executed accordingly on the entry pointed
299 			by the index.
300 
301 			This feature is disabled by setting this bit to 0.
302 
303 			<enum 0 index_based_cmd_disable>
304 
305 			<enum 1 index_based_cmd_enable>
306 
307 
308 
309 			<legal all>
310 */
311 #define TCL_STATUS_RING_0_INDEX_SEARCH_EN_OFFSET                     0x00000000
312 #define TCL_STATUS_RING_0_INDEX_SEARCH_EN_LSB                        7
313 #define TCL_STATUS_RING_0_INDEX_SEARCH_EN_MASK                       0x00000080
314 
315 /* Description		TCL_STATUS_RING_0_MSDU_CNT_N
316 
317 			MSDU count of Entry. Valid when GSE_CTRL is 4'b0111 and
318 			4'b1000
319 */
320 #define TCL_STATUS_RING_0_MSDU_CNT_N_OFFSET                          0x00000000
321 #define TCL_STATUS_RING_0_MSDU_CNT_N_LSB                             8
322 #define TCL_STATUS_RING_0_MSDU_CNT_N_MASK                            0xffffff00
323 
324 /* Description		TCL_STATUS_RING_1_MSDU_BYTE_CNT_N
325 
326 			MSDU byte count for entry 1. Valid when GSE_CTRL is
327 			4'b0111 and 4'b1000
328 */
329 #define TCL_STATUS_RING_1_MSDU_BYTE_CNT_N_OFFSET                     0x00000004
330 #define TCL_STATUS_RING_1_MSDU_BYTE_CNT_N_LSB                        0
331 #define TCL_STATUS_RING_1_MSDU_BYTE_CNT_N_MASK                       0xffffffff
332 
333 /* Description		TCL_STATUS_RING_2_MSDU_TIMESTMP_N
334 
335 			MSDU timestamp for entry 1. Valid when GSE_CTRL is
336 			4'b0111 and 4'b1000
337 */
338 #define TCL_STATUS_RING_2_MSDU_TIMESTMP_N_OFFSET                     0x00000008
339 #define TCL_STATUS_RING_2_MSDU_TIMESTMP_N_LSB                        0
340 #define TCL_STATUS_RING_2_MSDU_TIMESTMP_N_MASK                       0xffffffff
341 
342 /* Description		TCL_STATUS_RING_3_CMD_META_DATA_31_0
343 
344 			Meta data from input ring
345 
346 			<legal all>
347 */
348 #define TCL_STATUS_RING_3_CMD_META_DATA_31_0_OFFSET                  0x0000000c
349 #define TCL_STATUS_RING_3_CMD_META_DATA_31_0_LSB                     0
350 #define TCL_STATUS_RING_3_CMD_META_DATA_31_0_MASK                    0xffffffff
351 
352 /* Description		TCL_STATUS_RING_4_CMD_META_DATA_63_32
353 
354 			Meta data from input ring
355 
356 			<legal all>
357 */
358 #define TCL_STATUS_RING_4_CMD_META_DATA_63_32_OFFSET                 0x00000010
359 #define TCL_STATUS_RING_4_CMD_META_DATA_63_32_LSB                    0
360 #define TCL_STATUS_RING_4_CMD_META_DATA_63_32_MASK                   0xffffffff
361 
362 /* Description		TCL_STATUS_RING_5_HASH_INDX_VAL
363 
364 
365 			Hash value of the entry in table in case of search
366 			failed or search disable.
367 
368 			<legal all>
369 */
370 #define TCL_STATUS_RING_5_HASH_INDX_VAL_OFFSET                       0x00000014
371 #define TCL_STATUS_RING_5_HASH_INDX_VAL_LSB                          0
372 #define TCL_STATUS_RING_5_HASH_INDX_VAL_MASK                         0x000fffff
373 
374 /* Description		TCL_STATUS_RING_5_CACHE_SET_NUM
375 
376 			Cache set number copied from TCL_GSE_CMD
377 */
378 #define TCL_STATUS_RING_5_CACHE_SET_NUM_OFFSET                       0x00000014
379 #define TCL_STATUS_RING_5_CACHE_SET_NUM_LSB                          20
380 #define TCL_STATUS_RING_5_CACHE_SET_NUM_MASK                         0x00f00000
381 
382 /* Description		TCL_STATUS_RING_5_RESERVED_5A
383 
384 			<legal 0>
385 */
386 #define TCL_STATUS_RING_5_RESERVED_5A_OFFSET                         0x00000014
387 #define TCL_STATUS_RING_5_RESERVED_5A_LSB                            24
388 #define TCL_STATUS_RING_5_RESERVED_5A_MASK                           0xff000000
389 
390 /* Description		TCL_STATUS_RING_6_RESERVED_6A
391 
392 			<legal 0>
393 */
394 #define TCL_STATUS_RING_6_RESERVED_6A_OFFSET                         0x00000018
395 #define TCL_STATUS_RING_6_RESERVED_6A_LSB                            0
396 #define TCL_STATUS_RING_6_RESERVED_6A_MASK                           0xffffffff
397 
398 /* Description		TCL_STATUS_RING_7_RESERVED_7A
399 
400 			<legal 0>
401 */
402 #define TCL_STATUS_RING_7_RESERVED_7A_OFFSET                         0x0000001c
403 #define TCL_STATUS_RING_7_RESERVED_7A_LSB                            0
404 #define TCL_STATUS_RING_7_RESERVED_7A_MASK                           0x000fffff
405 
406 /* Description		TCL_STATUS_RING_7_RING_ID
407 
408 			The buffer pointer ring ID.
409 
410 
411 
412 			Helps with debugging when dumping ring contents.
413 
414 			<legal all>
415 */
416 #define TCL_STATUS_RING_7_RING_ID_OFFSET                             0x0000001c
417 #define TCL_STATUS_RING_7_RING_ID_LSB                                20
418 #define TCL_STATUS_RING_7_RING_ID_MASK                               0x0ff00000
419 
420 /* Description		TCL_STATUS_RING_7_LOOPING_COUNT
421 
422 			A count value that indicates the number of times the
423 			producer of entries into the Ring has looped around the
424 			ring.
425 
426 			At initialization time, this value is set to 0. On the
427 			first loop, this value is set to 1. After the max value is
428 			reached allowed by the number of bits for this field, the
429 			count value continues with 0 again.
430 
431 
432 
433 			In case SW is the consumer of the ring entries, it can
434 			use this field to figure out up to where the producer of
435 			entries has created new entries. This eliminates the need to
436 			check where the head pointer' of the ring is located once
437 			the SW starts processing an interrupt indicating that new
438 			entries have been put into this ring...
439 
440 
441 
442 			Also note that SW if it wants only needs to look at the
443 			LSB bit of this count value.
444 
445 			<legal all>
446 */
447 #define TCL_STATUS_RING_7_LOOPING_COUNT_OFFSET                       0x0000001c
448 #define TCL_STATUS_RING_7_LOOPING_COUNT_LSB                          28
449 #define TCL_STATUS_RING_7_LOOPING_COUNT_MASK                         0xf0000000
450 
451 
452 #endif // _TCL_STATUS_RING_H_
453