1 /*
2  * Copyright (c) 2016-2017 The Linux Foundation. All rights reserved.
3  *
4  * Permission to use, copy, modify, and/or distribute this software for
5  * any purpose with or without fee is hereby granted, provided that the
6  * above copyright notice and this permission notice appear in all
7  * copies.
8  *
9  * THE SOFTWARE IS PROVIDED "AS IS" AND THE AUTHOR DISCLAIMS ALL
10  * WARRANTIES WITH REGARD TO THIS SOFTWARE INCLUDING ALL IMPLIED
11  * WARRANTIES OF MERCHANTABILITY AND FITNESS. IN NO EVENT SHALL THE
12  * AUTHOR BE LIABLE FOR ANY SPECIAL, DIRECT, INDIRECT, OR CONSEQUENTIAL
13  * DAMAGES OR ANY DAMAGES WHATSOEVER RESULTING FROM LOSS OF USE, DATA OR
14  * PROFITS, WHETHER IN AN ACTION OF CONTRACT, NEGLIGENCE OR OTHER
15  * TORTIOUS ACTION, ARISING OUT OF OR IN CONNECTION WITH THE USE OR
16  * PERFORMANCE OF THIS SOFTWARE.
17  */
18 
19 //
20 // DO NOT EDIT!  This file is automatically generated
21 //               These definitions are tied to a particular hardware layout
22 
23 
24 #ifndef _REO_DESTINATION_RING_H_
25 #define _REO_DESTINATION_RING_H_
26 #if !defined(__ASSEMBLER__)
27 #endif
28 
29 #include "buffer_addr_info.h"
30 #include "rx_mpdu_desc_info.h"
31 #include "rx_msdu_desc_info.h"
32 
33 // ################ START SUMMARY #################
34 //
35 //	Dword	Fields
36 //	0-1	struct buffer_addr_info buf_or_link_desc_addr_info;
37 //	2-3	struct rx_mpdu_desc_info rx_mpdu_desc_info_details;
38 //	4-5	struct rx_msdu_desc_info rx_msdu_desc_info_details;
39 //	6	rx_reo_queue_desc_addr_31_0[31:0]
40 //	7	rx_reo_queue_desc_addr_39_32[7:0], reo_dest_buffer_type[8], reo_push_reason[10:9], reo_error_code[15:11], receive_queue_number[31:16]
41 //	8	soft_reorder_info_valid[0], reorder_opcode[4:1], reorder_slot_index[12:5], reserved_8a[31:13]
42 //	9	reserved_9a[31:0]
43 //	10	reserved_10a[31:0]
44 //	11	reserved_11a[31:0]
45 //	12	reserved_12a[31:0]
46 //	13	reserved_13a[31:0]
47 //	14	reserved_14a[31:0]
48 //	15	reserved_15[19:0], ring_id[27:20], looping_count[31:28]
49 //
50 // ################ END SUMMARY #################
51 
52 #define NUM_OF_DWORDS_REO_DESTINATION_RING 16
53 
54 struct reo_destination_ring {
55     struct            buffer_addr_info                       buf_or_link_desc_addr_info;
56     struct            rx_mpdu_desc_info                       rx_mpdu_desc_info_details;
57     struct            rx_msdu_desc_info                       rx_msdu_desc_info_details;
58              uint32_t rx_reo_queue_desc_addr_31_0     : 32; //[31:0]
59              uint32_t rx_reo_queue_desc_addr_39_32    :  8, //[7:0]
60                       reo_dest_buffer_type            :  1, //[8]
61                       reo_push_reason                 :  2, //[10:9]
62                       reo_error_code                  :  5, //[15:11]
63                       receive_queue_number            : 16; //[31:16]
64              uint32_t soft_reorder_info_valid         :  1, //[0]
65                       reorder_opcode                  :  4, //[4:1]
66                       reorder_slot_index              :  8, //[12:5]
67                       reserved_8a                     : 19; //[31:13]
68              uint32_t reserved_9a                     : 32; //[31:0]
69              uint32_t reserved_10a                    : 32; //[31:0]
70              uint32_t reserved_11a                    : 32; //[31:0]
71              uint32_t reserved_12a                    : 32; //[31:0]
72              uint32_t reserved_13a                    : 32; //[31:0]
73              uint32_t reserved_14a                    : 32; //[31:0]
74              uint32_t reserved_15                     : 20, //[19:0]
75                       ring_id                         :  8, //[27:20]
76                       looping_count                   :  4; //[31:28]
77 };
78 
79 /*
80 
81 struct buffer_addr_info buf_or_link_desc_addr_info
82 
83 			Consumer: REO/SW/FW
84 
85 			Producer: RXDMA
86 
87 
88 
89 			Details of the physical address of the a buffer or MSDU
90 			link descriptor
91 
92 struct rx_mpdu_desc_info rx_mpdu_desc_info_details
93 
94 			Consumer: REO/SW/FW
95 
96 			Producer: RXDMA
97 
98 
99 
100 			General information related to the MPDU that is passed
101 			on from REO entrance ring to the REO destination ring
102 
103 struct rx_msdu_desc_info rx_msdu_desc_info_details
104 
105 			General information related to the MSDU that is passed
106 			on from RXDMA all the way to to the REO destination ring.
107 
108 rx_reo_queue_desc_addr_31_0
109 
110 			Consumer: REO
111 
112 			Producer: RXDMA
113 
114 
115 
116 			Address (lower 32 bits) of the REO queue descriptor.
117 
118 			<legal all>
119 
120 rx_reo_queue_desc_addr_39_32
121 
122 			Consumer: REO
123 
124 			Producer: RXDMA
125 
126 
127 
128 			Address (upper 8 bits) of the REO queue descriptor.
129 
130 			<legal all>
131 
132 reo_dest_buffer_type
133 
134 			Indicates the type of address provided in the
135 			'Buf_or_link_desc_addr_info'
136 
137 
138 
139 			<enum 0 MSDU_buf_address> The address of an MSDU buffer
140 
141 			<enum 1 MSDU_link_desc_address> The address of the MSDU
142 			link descriptor.
143 
144 
145 
146 			<legal all>
147 
148 reo_push_reason
149 
150 			Indicates why REO pushed the frame to this exit ring
151 
152 
153 
154 			<enum 0 reo_error_detected> Reo detected an error an
155 			pushed this frame to this queue
156 
157 			<enum 1 reo_routing_instruction> Reo pushed the frame to
158 			this queue per received routing instructions. No error
159 			within REO was detected
160 
161 
162 
163 
164 
165 			<legal 0 - 1>
166 
167 reo_error_code
168 
169 			Field only valid when 'Reo_push_reason' set to
170 			'reo_error_detected'.
171 
172 
173 
174 			<enum 0 reo_queue_desc_addr_zero> Reo queue descriptor
175 			provided in the REO_ENTRANCE ring is set to 0
176 
177 			<enum 1 reo_queue_desc_not_valid> Reo queue descriptor
178 			valid bit is NOT set
179 
180 			<enum 2 ampdu_in_non_ba> AMPDU frame received without BA
181 			session having been setup.
182 
183 			<enum 3 non_ba_duplicate> Non-BA session, SN equal to
184 			SSN, Retry bit set: duplicate frame
185 
186 			<enum 4 ba_duplicate> BA session, duplicate frame
187 
188 			<enum 5 regular_frame_2k_jump> A normal (management/data
189 			frame) received with 2K jump in SN
190 
191 			<enum 6 bar_frame_2k_jump> A bar received with 2K jump
192 			in SSN
193 
194 			<enum 7 regular_frame_OOR> A normal (management/data
195 			frame) received with SN falling within the OOR window
196 
197 			<enum 8 bar_frame_OOR> A bar received with SSN falling
198 			within the OOR window
199 
200 			<enum 9 bar_frame_no_ba_session> A bar received without
201 			a BA session
202 
203 			<enum 10 bar_frame_sn_equals_ssn> A bar received with
204 			SSN equal to SN
205 
206 			<enum 11 pn_check_failed> PN Check Failed packet.
207 
208 			<enum 12 2k_error_handling_flag_set> Frame is forwarded
209 			as a result of the 'Seq_2k_error_detected_flag' been set in
210 			the REO Queue descriptor
211 
212 			<enum 13 pn_error_handling_flag_set> Frame is forwarded
213 			as a result of the 'pn_error_detected_flag' been set in the
214 			REO Queue descriptor
215 
216 			<enum 14 queue_descriptor_blocked_set> Frame is
217 			forwarded as a result of the queue descriptor(address) being
218 			blocked as SW/FW seems to be currently in the process of
219 			making updates to this descriptor...
220 
221 
222 
223 			<legal 0-14>
224 
225 receive_queue_number
226 
227 			This field indicates the REO MPDU reorder queue ID from
228 			which this frame originated. This field is populated from a
229 			field with the same name in the RX_REO_QUEUE descriptor.
230 
231 			<legal all>
232 
233 soft_reorder_info_valid
234 
235 			When set, REO has been instructed to not perform the
236 			actual re-ordering of frames for this queue, but just to
237 			insert the reorder opcodes
238 
239 			<legal all>
240 
241 reorder_opcode
242 
243 			Field is valid when 'Soft_reorder_info_valid' is set.
244 			This field is always valid for debug purpose as well.
245 
246 			Details are in the MLD.
247 
248 
249 
250 			<enum 0 invalid>
251 
252 			<enum 1 fwdcur_fwdbuf>
253 
254 			<enum 2 fwdbuf_fwdcur>
255 
256 			<enum 3 qcur>
257 
258 			<enum 4 fwdbuf_qcur>
259 
260 			<enum 5 fwdbuf_drop>
261 
262 			<enum 6 fwdall_drop>
263 
264 			<enum 7 fwdall_qcur>
265 
266 			<enum 8 reserved_reo_opcode_1>
267 
268 			<enum 9 dropcur>  the error reason code is in
269 			reo_error_code field.
270 
271 			<enum 10 reserved_reo_opcode_2>
272 
273 			<enum 11 reserved_reo_opcode_3>
274 
275 			<enum 12 reserved_reo_opcode_4>
276 
277 			<enum 13 reserved_reo_opcode_5>
278 
279 			<enum 14 reserved_reo_opcode_6>
280 
281 			<enum 15 reserved_reo_opcode_7>
282 
283 
284 
285 			<legal all>
286 
287 reorder_slot_index
288 
289 			Field only valid when 'Soft_reorder_info_valid' is set.
290 
291 
292 
293 			TODO: add description
294 
295 
296 
297 			<legal all>
298 
299 reserved_8a
300 
301 			<legal 0>
302 
303 reserved_9a
304 
305 			<legal 0>
306 
307 reserved_10a
308 
309 			<legal 0>
310 
311 reserved_11a
312 
313 			<legal 0>
314 
315 reserved_12a
316 
317 			<legal 0>
318 
319 reserved_13a
320 
321 			<legal 0>
322 
323 reserved_14a
324 
325 			<legal 0>
326 
327 reserved_15
328 
329 			<legal 0>
330 
331 ring_id
332 
333 			The buffer pointer ring ID.
334 
335 			0 refers to the IDLE ring
336 
337 			1 - N refers to other rings
338 
339 
340 
341 			Helps with debugging when dumping ring contents.
342 
343 			<legal all>
344 
345 looping_count
346 
347 			A count value that indicates the number of times the
348 			producer of entries into this Ring has looped around the
349 			ring.
350 
351 			At initialization time, this value is set to 0. On the
352 			first loop, this value is set to 1. After the max value is
353 			reached allowed by the number of bits for this field, the
354 			count value continues with 0 again.
355 
356 			In case SW is the consumer of the ring entries, it can
357 			use this field to figure out up to where the producer of
358 			entries has created new entries. This eliminates the need to
359 			check where the head pointer' of the ring is located once
360 			the SW starts processing an interrupt indicating that new
361 			entries have been put into this ring...
362 
363 
364 
365 			Also note that SW if it wants only needs to look at the
366 			LSB bit of this count value.
367 
368 			<legal all>
369 */
370 
371 #define REO_DESTINATION_RING_0_BUFFER_ADDR_INFO_BUF_OR_LINK_DESC_ADDR_INFO_OFFSET 0x00000000
372 #define REO_DESTINATION_RING_0_BUFFER_ADDR_INFO_BUF_OR_LINK_DESC_ADDR_INFO_LSB 28
373 #define REO_DESTINATION_RING_0_BUFFER_ADDR_INFO_BUF_OR_LINK_DESC_ADDR_INFO_MASK 0xffffffff
374 #define REO_DESTINATION_RING_1_BUFFER_ADDR_INFO_BUF_OR_LINK_DESC_ADDR_INFO_OFFSET 0x00000004
375 #define REO_DESTINATION_RING_1_BUFFER_ADDR_INFO_BUF_OR_LINK_DESC_ADDR_INFO_LSB 28
376 #define REO_DESTINATION_RING_1_BUFFER_ADDR_INFO_BUF_OR_LINK_DESC_ADDR_INFO_MASK 0xffffffff
377 #define REO_DESTINATION_RING_2_RX_MPDU_DESC_INFO_RX_MPDU_DESC_INFO_DETAILS_OFFSET 0x00000008
378 #define REO_DESTINATION_RING_2_RX_MPDU_DESC_INFO_RX_MPDU_DESC_INFO_DETAILS_LSB 28
379 #define REO_DESTINATION_RING_2_RX_MPDU_DESC_INFO_RX_MPDU_DESC_INFO_DETAILS_MASK 0xffffffff
380 #define REO_DESTINATION_RING_3_RX_MPDU_DESC_INFO_RX_MPDU_DESC_INFO_DETAILS_OFFSET 0x0000000c
381 #define REO_DESTINATION_RING_3_RX_MPDU_DESC_INFO_RX_MPDU_DESC_INFO_DETAILS_LSB 28
382 #define REO_DESTINATION_RING_3_RX_MPDU_DESC_INFO_RX_MPDU_DESC_INFO_DETAILS_MASK 0xffffffff
383 #define REO_DESTINATION_RING_4_RX_MSDU_DESC_INFO_RX_MSDU_DESC_INFO_DETAILS_OFFSET 0x00000010
384 #define REO_DESTINATION_RING_4_RX_MSDU_DESC_INFO_RX_MSDU_DESC_INFO_DETAILS_LSB 28
385 #define REO_DESTINATION_RING_4_RX_MSDU_DESC_INFO_RX_MSDU_DESC_INFO_DETAILS_MASK 0xffffffff
386 #define REO_DESTINATION_RING_5_RX_MSDU_DESC_INFO_RX_MSDU_DESC_INFO_DETAILS_OFFSET 0x00000014
387 #define REO_DESTINATION_RING_5_RX_MSDU_DESC_INFO_RX_MSDU_DESC_INFO_DETAILS_LSB 28
388 #define REO_DESTINATION_RING_5_RX_MSDU_DESC_INFO_RX_MSDU_DESC_INFO_DETAILS_MASK 0xffffffff
389 
390 /* Description		REO_DESTINATION_RING_6_RX_REO_QUEUE_DESC_ADDR_31_0
391 
392 			Consumer: REO
393 
394 			Producer: RXDMA
395 
396 
397 
398 			Address (lower 32 bits) of the REO queue descriptor.
399 
400 			<legal all>
401 */
402 #define REO_DESTINATION_RING_6_RX_REO_QUEUE_DESC_ADDR_31_0_OFFSET    0x00000018
403 #define REO_DESTINATION_RING_6_RX_REO_QUEUE_DESC_ADDR_31_0_LSB       0
404 #define REO_DESTINATION_RING_6_RX_REO_QUEUE_DESC_ADDR_31_0_MASK      0xffffffff
405 
406 /* Description		REO_DESTINATION_RING_7_RX_REO_QUEUE_DESC_ADDR_39_32
407 
408 			Consumer: REO
409 
410 			Producer: RXDMA
411 
412 
413 
414 			Address (upper 8 bits) of the REO queue descriptor.
415 
416 			<legal all>
417 */
418 #define REO_DESTINATION_RING_7_RX_REO_QUEUE_DESC_ADDR_39_32_OFFSET   0x0000001c
419 #define REO_DESTINATION_RING_7_RX_REO_QUEUE_DESC_ADDR_39_32_LSB      0
420 #define REO_DESTINATION_RING_7_RX_REO_QUEUE_DESC_ADDR_39_32_MASK     0x000000ff
421 
422 /* Description		REO_DESTINATION_RING_7_REO_DEST_BUFFER_TYPE
423 
424 			Indicates the type of address provided in the
425 			'Buf_or_link_desc_addr_info'
426 
427 
428 
429 			<enum 0 MSDU_buf_address> The address of an MSDU buffer
430 
431 			<enum 1 MSDU_link_desc_address> The address of the MSDU
432 			link descriptor.
433 
434 
435 
436 			<legal all>
437 */
438 #define REO_DESTINATION_RING_7_REO_DEST_BUFFER_TYPE_OFFSET           0x0000001c
439 #define REO_DESTINATION_RING_7_REO_DEST_BUFFER_TYPE_LSB              8
440 #define REO_DESTINATION_RING_7_REO_DEST_BUFFER_TYPE_MASK             0x00000100
441 
442 /* Description		REO_DESTINATION_RING_7_REO_PUSH_REASON
443 
444 			Indicates why REO pushed the frame to this exit ring
445 
446 
447 
448 			<enum 0 reo_error_detected> Reo detected an error an
449 			pushed this frame to this queue
450 
451 			<enum 1 reo_routing_instruction> Reo pushed the frame to
452 			this queue per received routing instructions. No error
453 			within REO was detected
454 
455 
456 
457 
458 
459 			<legal 0 - 1>
460 */
461 #define REO_DESTINATION_RING_7_REO_PUSH_REASON_OFFSET                0x0000001c
462 #define REO_DESTINATION_RING_7_REO_PUSH_REASON_LSB                   9
463 #define REO_DESTINATION_RING_7_REO_PUSH_REASON_MASK                  0x00000600
464 
465 /* Description		REO_DESTINATION_RING_7_REO_ERROR_CODE
466 
467 			Field only valid when 'Reo_push_reason' set to
468 			'reo_error_detected'.
469 
470 
471 
472 			<enum 0 reo_queue_desc_addr_zero> Reo queue descriptor
473 			provided in the REO_ENTRANCE ring is set to 0
474 
475 			<enum 1 reo_queue_desc_not_valid> Reo queue descriptor
476 			valid bit is NOT set
477 
478 			<enum 2 ampdu_in_non_ba> AMPDU frame received without BA
479 			session having been setup.
480 
481 			<enum 3 non_ba_duplicate> Non-BA session, SN equal to
482 			SSN, Retry bit set: duplicate frame
483 
484 			<enum 4 ba_duplicate> BA session, duplicate frame
485 
486 			<enum 5 regular_frame_2k_jump> A normal (management/data
487 			frame) received with 2K jump in SN
488 
489 			<enum 6 bar_frame_2k_jump> A bar received with 2K jump
490 			in SSN
491 
492 			<enum 7 regular_frame_OOR> A normal (management/data
493 			frame) received with SN falling within the OOR window
494 
495 			<enum 8 bar_frame_OOR> A bar received with SSN falling
496 			within the OOR window
497 
498 			<enum 9 bar_frame_no_ba_session> A bar received without
499 			a BA session
500 
501 			<enum 10 bar_frame_sn_equals_ssn> A bar received with
502 			SSN equal to SN
503 
504 			<enum 11 pn_check_failed> PN Check Failed packet.
505 
506 			<enum 12 2k_error_handling_flag_set> Frame is forwarded
507 			as a result of the 'Seq_2k_error_detected_flag' been set in
508 			the REO Queue descriptor
509 
510 			<enum 13 pn_error_handling_flag_set> Frame is forwarded
511 			as a result of the 'pn_error_detected_flag' been set in the
512 			REO Queue descriptor
513 
514 			<enum 14 queue_descriptor_blocked_set> Frame is
515 			forwarded as a result of the queue descriptor(address) being
516 			blocked as SW/FW seems to be currently in the process of
517 			making updates to this descriptor...
518 
519 
520 
521 			<legal 0-14>
522 */
523 #define REO_DESTINATION_RING_7_REO_ERROR_CODE_OFFSET                 0x0000001c
524 #define REO_DESTINATION_RING_7_REO_ERROR_CODE_LSB                    11
525 #define REO_DESTINATION_RING_7_REO_ERROR_CODE_MASK                   0x0000f800
526 
527 /* Description		REO_DESTINATION_RING_7_RECEIVE_QUEUE_NUMBER
528 
529 			This field indicates the REO MPDU reorder queue ID from
530 			which this frame originated. This field is populated from a
531 			field with the same name in the RX_REO_QUEUE descriptor.
532 
533 			<legal all>
534 */
535 #define REO_DESTINATION_RING_7_RECEIVE_QUEUE_NUMBER_OFFSET           0x0000001c
536 #define REO_DESTINATION_RING_7_RECEIVE_QUEUE_NUMBER_LSB              16
537 #define REO_DESTINATION_RING_7_RECEIVE_QUEUE_NUMBER_MASK             0xffff0000
538 
539 /* Description		REO_DESTINATION_RING_8_SOFT_REORDER_INFO_VALID
540 
541 			When set, REO has been instructed to not perform the
542 			actual re-ordering of frames for this queue, but just to
543 			insert the reorder opcodes
544 
545 			<legal all>
546 */
547 #define REO_DESTINATION_RING_8_SOFT_REORDER_INFO_VALID_OFFSET        0x00000020
548 #define REO_DESTINATION_RING_8_SOFT_REORDER_INFO_VALID_LSB           0
549 #define REO_DESTINATION_RING_8_SOFT_REORDER_INFO_VALID_MASK          0x00000001
550 
551 /* Description		REO_DESTINATION_RING_8_REORDER_OPCODE
552 
553 			Field is valid when 'Soft_reorder_info_valid' is set.
554 			This field is always valid for debug purpose as well.
555 
556 			Details are in the MLD.
557 
558 
559 
560 			<enum 0 invalid>
561 
562 			<enum 1 fwdcur_fwdbuf>
563 
564 			<enum 2 fwdbuf_fwdcur>
565 
566 			<enum 3 qcur>
567 
568 			<enum 4 fwdbuf_qcur>
569 
570 			<enum 5 fwdbuf_drop>
571 
572 			<enum 6 fwdall_drop>
573 
574 			<enum 7 fwdall_qcur>
575 
576 			<enum 8 reserved_reo_opcode_1>
577 
578 			<enum 9 dropcur>  the error reason code is in
579 			reo_error_code field.
580 
581 			<enum 10 reserved_reo_opcode_2>
582 
583 			<enum 11 reserved_reo_opcode_3>
584 
585 			<enum 12 reserved_reo_opcode_4>
586 
587 			<enum 13 reserved_reo_opcode_5>
588 
589 			<enum 14 reserved_reo_opcode_6>
590 
591 			<enum 15 reserved_reo_opcode_7>
592 
593 
594 
595 			<legal all>
596 */
597 #define REO_DESTINATION_RING_8_REORDER_OPCODE_OFFSET                 0x00000020
598 #define REO_DESTINATION_RING_8_REORDER_OPCODE_LSB                    1
599 #define REO_DESTINATION_RING_8_REORDER_OPCODE_MASK                   0x0000001e
600 
601 /* Description		REO_DESTINATION_RING_8_REORDER_SLOT_INDEX
602 
603 			Field only valid when 'Soft_reorder_info_valid' is set.
604 
605 
606 
607 			TODO: add description
608 
609 
610 
611 			<legal all>
612 */
613 #define REO_DESTINATION_RING_8_REORDER_SLOT_INDEX_OFFSET             0x00000020
614 #define REO_DESTINATION_RING_8_REORDER_SLOT_INDEX_LSB                5
615 #define REO_DESTINATION_RING_8_REORDER_SLOT_INDEX_MASK               0x00001fe0
616 
617 /* Description		REO_DESTINATION_RING_8_RESERVED_8A
618 
619 			<legal 0>
620 */
621 #define REO_DESTINATION_RING_8_RESERVED_8A_OFFSET                    0x00000020
622 #define REO_DESTINATION_RING_8_RESERVED_8A_LSB                       13
623 #define REO_DESTINATION_RING_8_RESERVED_8A_MASK                      0xffffe000
624 
625 /* Description		REO_DESTINATION_RING_9_RESERVED_9A
626 
627 			<legal 0>
628 */
629 #define REO_DESTINATION_RING_9_RESERVED_9A_OFFSET                    0x00000024
630 #define REO_DESTINATION_RING_9_RESERVED_9A_LSB                       0
631 #define REO_DESTINATION_RING_9_RESERVED_9A_MASK                      0xffffffff
632 
633 /* Description		REO_DESTINATION_RING_10_RESERVED_10A
634 
635 			<legal 0>
636 */
637 #define REO_DESTINATION_RING_10_RESERVED_10A_OFFSET                  0x00000028
638 #define REO_DESTINATION_RING_10_RESERVED_10A_LSB                     0
639 #define REO_DESTINATION_RING_10_RESERVED_10A_MASK                    0xffffffff
640 
641 /* Description		REO_DESTINATION_RING_11_RESERVED_11A
642 
643 			<legal 0>
644 */
645 #define REO_DESTINATION_RING_11_RESERVED_11A_OFFSET                  0x0000002c
646 #define REO_DESTINATION_RING_11_RESERVED_11A_LSB                     0
647 #define REO_DESTINATION_RING_11_RESERVED_11A_MASK                    0xffffffff
648 
649 /* Description		REO_DESTINATION_RING_12_RESERVED_12A
650 
651 			<legal 0>
652 */
653 #define REO_DESTINATION_RING_12_RESERVED_12A_OFFSET                  0x00000030
654 #define REO_DESTINATION_RING_12_RESERVED_12A_LSB                     0
655 #define REO_DESTINATION_RING_12_RESERVED_12A_MASK                    0xffffffff
656 
657 /* Description		REO_DESTINATION_RING_13_RESERVED_13A
658 
659 			<legal 0>
660 */
661 #define REO_DESTINATION_RING_13_RESERVED_13A_OFFSET                  0x00000034
662 #define REO_DESTINATION_RING_13_RESERVED_13A_LSB                     0
663 #define REO_DESTINATION_RING_13_RESERVED_13A_MASK                    0xffffffff
664 
665 /* Description		REO_DESTINATION_RING_14_RESERVED_14A
666 
667 			<legal 0>
668 */
669 #define REO_DESTINATION_RING_14_RESERVED_14A_OFFSET                  0x00000038
670 #define REO_DESTINATION_RING_14_RESERVED_14A_LSB                     0
671 #define REO_DESTINATION_RING_14_RESERVED_14A_MASK                    0xffffffff
672 
673 /* Description		REO_DESTINATION_RING_15_RESERVED_15
674 
675 			<legal 0>
676 */
677 #define REO_DESTINATION_RING_15_RESERVED_15_OFFSET                   0x0000003c
678 #define REO_DESTINATION_RING_15_RESERVED_15_LSB                      0
679 #define REO_DESTINATION_RING_15_RESERVED_15_MASK                     0x000fffff
680 
681 /* Description		REO_DESTINATION_RING_15_RING_ID
682 
683 			The buffer pointer ring ID.
684 
685 			0 refers to the IDLE ring
686 
687 			1 - N refers to other rings
688 
689 
690 
691 			Helps with debugging when dumping ring contents.
692 
693 			<legal all>
694 */
695 #define REO_DESTINATION_RING_15_RING_ID_OFFSET                       0x0000003c
696 #define REO_DESTINATION_RING_15_RING_ID_LSB                          20
697 #define REO_DESTINATION_RING_15_RING_ID_MASK                         0x0ff00000
698 
699 /* Description		REO_DESTINATION_RING_15_LOOPING_COUNT
700 
701 			A count value that indicates the number of times the
702 			producer of entries into this Ring has looped around the
703 			ring.
704 
705 			At initialization time, this value is set to 0. On the
706 			first loop, this value is set to 1. After the max value is
707 			reached allowed by the number of bits for this field, the
708 			count value continues with 0 again.
709 
710 			In case SW is the consumer of the ring entries, it can
711 			use this field to figure out up to where the producer of
712 			entries has created new entries. This eliminates the need to
713 			check where the head pointer' of the ring is located once
714 			the SW starts processing an interrupt indicating that new
715 			entries have been put into this ring...
716 
717 
718 
719 			Also note that SW if it wants only needs to look at the
720 			LSB bit of this count value.
721 
722 			<legal all>
723 */
724 #define REO_DESTINATION_RING_15_LOOPING_COUNT_OFFSET                 0x0000003c
725 #define REO_DESTINATION_RING_15_LOOPING_COUNT_LSB                    28
726 #define REO_DESTINATION_RING_15_LOOPING_COUNT_MASK                   0xf0000000
727 
728 
729 #endif // _REO_DESTINATION_RING_H_
730