1 /* 2 * Copyright (c) 2016-2017 The Linux Foundation. All rights reserved. 3 * 4 * Permission to use, copy, modify, and/or distribute this software for 5 * any purpose with or without fee is hereby granted, provided that the 6 * above copyright notice and this permission notice appear in all 7 * copies. 8 * 9 * THE SOFTWARE IS PROVIDED "AS IS" AND THE AUTHOR DISCLAIMS ALL 10 * WARRANTIES WITH REGARD TO THIS SOFTWARE INCLUDING ALL IMPLIED 11 * WARRANTIES OF MERCHANTABILITY AND FITNESS. IN NO EVENT SHALL THE 12 * AUTHOR BE LIABLE FOR ANY SPECIAL, DIRECT, INDIRECT, OR CONSEQUENTIAL 13 * DAMAGES OR ANY DAMAGES WHATSOEVER RESULTING FROM LOSS OF USE, DATA OR 14 * PROFITS, WHETHER IN AN ACTION OF CONTRACT, NEGLIGENCE OR OTHER 15 * TORTIOUS ACTION, ARISING OUT OF OR IN CONNECTION WITH THE USE OR 16 * PERFORMANCE OF THIS SOFTWARE. 17 */ 18 19 // $ATH_LICENSE_HW_HDR_C$ 20 // 21 // DO NOT EDIT! This file is automatically generated 22 // These definitions are tied to a particular hardware layout 23 24 25 #ifndef _TX_MSDU_EXTENSION_H_ 26 #define _TX_MSDU_EXTENSION_H_ 27 #if !defined(__ASSEMBLER__) 28 #endif 29 30 31 // ################ START SUMMARY ################# 32 // 33 // Dword Fields 34 // 0 tso_enable[0], ipv4_checksum_en[1], udp_over_ipv4_checksum_en[2], udp_over_ipv6_checksum_en[3], tcp_over_ipv4_checksum_en[4], tcp_over_ipv6_checksum_en[5], reserved_0a[6], tcp_flag[15:7], tcp_flag_mask[24:16], reserved_0b[31:25] 35 // 1 l2_length[15:0], ip_length[31:16] 36 // 2 tcp_seq_number[31:0] 37 // 3 ip_identification[15:0], udp_length[31:16] 38 // 4 checksum_offset[13:0], partial_checksum_en[14], reserved_4a[15], payload_start_offset[29:16], reserved_4b[31:30] 39 // 5 payload_end_offset[13:0], reserved_5a[15:14], wds[16], reserved_5b[31:17] 40 // 6 buf0_ptr_31_0[31:0] 41 // 7 buf0_ptr_39_32[7:0], reserved_7a[15:8], buf0_len[31:16] 42 // 8 buf1_ptr_31_0[31:0] 43 // 9 buf1_ptr_39_32[7:0], reserved_9a[15:8], buf1_len[31:16] 44 // 10 buf2_ptr_31_0[31:0] 45 // 11 buf2_ptr_39_32[7:0], reserved_11a[15:8], buf2_len[31:16] 46 // 12 buf3_ptr_31_0[31:0] 47 // 13 buf3_ptr_39_32[7:0], reserved_13a[15:8], buf3_len[31:16] 48 // 14 buf4_ptr_31_0[31:0] 49 // 15 buf4_ptr_39_32[7:0], reserved_15a[15:8], buf4_len[31:16] 50 // 16 buf5_ptr_31_0[31:0] 51 // 17 buf5_ptr_39_32[7:0], reserved_17a[15:8], buf5_len[31:16] 52 // 53 // ################ END SUMMARY ################# 54 55 #define NUM_OF_DWORDS_TX_MSDU_EXTENSION 18 56 57 struct tx_msdu_extension { 58 uint32_t tso_enable : 1, //[0] 59 ipv4_checksum_en : 1, //[1] 60 udp_over_ipv4_checksum_en : 1, //[2] 61 udp_over_ipv6_checksum_en : 1, //[3] 62 tcp_over_ipv4_checksum_en : 1, //[4] 63 tcp_over_ipv6_checksum_en : 1, //[5] 64 reserved_0a : 1, //[6] 65 tcp_flag : 9, //[15:7] 66 tcp_flag_mask : 9, //[24:16] 67 reserved_0b : 7; //[31:25] 68 uint32_t l2_length : 16, //[15:0] 69 ip_length : 16; //[31:16] 70 uint32_t tcp_seq_number : 32; //[31:0] 71 uint32_t ip_identification : 16, //[15:0] 72 udp_length : 16; //[31:16] 73 uint32_t checksum_offset : 14, //[13:0] 74 partial_checksum_en : 1, //[14] 75 reserved_4a : 1, //[15] 76 payload_start_offset : 14, //[29:16] 77 reserved_4b : 2; //[31:30] 78 uint32_t payload_end_offset : 14, //[13:0] 79 reserved_5a : 2, //[15:14] 80 wds : 1, //[16] 81 reserved_5b : 15; //[31:17] 82 uint32_t buf0_ptr_31_0 : 32; //[31:0] 83 uint32_t buf0_ptr_39_32 : 8, //[7:0] 84 reserved_7a : 8, //[15:8] 85 buf0_len : 16; //[31:16] 86 uint32_t buf1_ptr_31_0 : 32; //[31:0] 87 uint32_t buf1_ptr_39_32 : 8, //[7:0] 88 reserved_9a : 8, //[15:8] 89 buf1_len : 16; //[31:16] 90 uint32_t buf2_ptr_31_0 : 32; //[31:0] 91 uint32_t buf2_ptr_39_32 : 8, //[7:0] 92 reserved_11a : 8, //[15:8] 93 buf2_len : 16; //[31:16] 94 uint32_t buf3_ptr_31_0 : 32; //[31:0] 95 uint32_t buf3_ptr_39_32 : 8, //[7:0] 96 reserved_13a : 8, //[15:8] 97 buf3_len : 16; //[31:16] 98 uint32_t buf4_ptr_31_0 : 32; //[31:0] 99 uint32_t buf4_ptr_39_32 : 8, //[7:0] 100 reserved_15a : 8, //[15:8] 101 buf4_len : 16; //[31:16] 102 uint32_t buf5_ptr_31_0 : 32; //[31:0] 103 uint32_t buf5_ptr_39_32 : 8, //[7:0] 104 reserved_17a : 8, //[15:8] 105 buf5_len : 16; //[31:16] 106 }; 107 108 /* 109 110 tso_enable 111 112 Enable transmit segmentation offload <legal all> 113 114 ipv4_checksum_en 115 116 FIELD NOT USED IN HAWKEYE 1.0 117 118 119 120 Enable IPv4 checksum replacement 121 122 udp_over_ipv4_checksum_en 123 124 FIELD NOT USED IN HAWKEYE 1.0 125 126 127 128 Enable UDP over IPv4 checksum replacement. UDP checksum 129 over IPv4 is optional for TCP/IP stacks. 130 131 udp_over_ipv6_checksum_en 132 133 FIELD NOT USED IN HAWKEYE 1.0 134 135 136 137 Enable UDP over IPv6 checksum replacement. UDP checksum 138 over IPv6 is mandatory for TCP/IP stacks. 139 140 tcp_over_ipv4_checksum_en 141 142 FIELD NOT USED IN HAWKEYE 1.0 143 144 145 146 Enable TCP checksum over IPv4 replacement 147 148 tcp_over_ipv6_checksum_en 149 150 FIELD NOT USED IN HAWKEYE 1.0 151 152 153 154 Enable TCP checksum over IPv6 eplacement 155 156 reserved_0a 157 158 FW will set to 0, MAC will ignore. <legal 0> 159 160 tcp_flag 161 162 TCP flags 163 164 {NS,CWR,ECE,URG,ACK,PSH, RST ,SYN,FIN}<legal all> 165 166 tcp_flag_mask 167 168 TCP flag mask. Tcp_flag is inserted into the header 169 based on the mask, if tso is enabled 170 171 reserved_0b 172 173 FW will set to 0, MAC will ignore. <legal 0> 174 175 l2_length 176 177 L2 length for the msdu, if tso is enabled <legal all> 178 179 ip_length 180 181 Ip length for the msdu, if tso is enabled <legal all> 182 183 tcp_seq_number 184 185 Tcp_seq_number for the msdu, if tso is enabled <legal 186 all> 187 188 ip_identification 189 190 Ip_identification for the msdu, if tso is enabled <legal 191 all> 192 193 udp_length 194 195 TXDMA is copies this field into MSDU START TLV 196 197 checksum_offset 198 199 The calculated checksum from start offset to end offset 200 will be added to the checksum at the offset given by this 201 field<legal all> 202 203 partial_checksum_en 204 205 Partial Checksum Enable Bit. 206 207 <legal 0-1> 208 209 reserved_4a 210 211 <Legal 0> 212 213 payload_start_offset 214 215 L4 checksum calculations will start fromt this offset 216 217 <Legal all> 218 219 reserved_4b 220 221 <Legal 0> 222 223 payload_end_offset 224 225 L4 checksum calculations will end at this offset. 226 227 <Legal all> 228 229 reserved_5a 230 231 <Legal 0> 232 233 wds 234 235 If set the current packet is 4-address frame. Required 236 because an aggregate can include some frames with 3 address 237 format and other frames with 4 address format. Used by the 238 OLE during encapsulation. 239 240 Note: there is also global wds tx control in the 241 TX_PEER_ENTRY 242 243 <legal all> 244 245 reserved_5b 246 247 <Legal 0> 248 249 buf0_ptr_31_0 250 251 Lower 32 bits of the first buffer pointer 252 253 254 255 NOTE: SW/FW manages the 'cookie' info related to this 256 buffer together with the 'cookie' info for this 257 MSDU_EXTENSION descriptor 258 259 <legal all> 260 261 buf0_ptr_39_32 262 263 Upper 8 bits of the first buffer pointer <legal all> 264 265 reserved_7a 266 267 <Legal 0> 268 269 buf0_len 270 271 Length of the first buffer <legal all> 272 273 buf1_ptr_31_0 274 275 Lower 32 bits of the second buffer pointer 276 277 278 279 NOTE: SW/FW manages the 'cookie' info related to this 280 buffer together with the 'cookie' info for this 281 MSDU_EXTENSION descriptor 282 283 <legal all> 284 285 buf1_ptr_39_32 286 287 Upper 8 bits of the second buffer pointer <legal all> 288 289 reserved_9a 290 291 <Legal 0> 292 293 buf1_len 294 295 Length of the second buffer <legal all> 296 297 buf2_ptr_31_0 298 299 Lower 32 bits of the third buffer pointer 300 301 NOTE: SW/FW manages the 'cookie' info related to this 302 buffer together with the 'cookie' info for this 303 MSDU_EXTENSION descriptor 304 305 <legal all> 306 307 buf2_ptr_39_32 308 309 Upper 8 bits of the third buffer pointer <legal all> 310 311 reserved_11a 312 313 <Legal 0> 314 315 buf2_len 316 317 Length of the third buffer <legal all> 318 319 buf3_ptr_31_0 320 321 Lower 32 bits of the fourth buffer pointer 322 323 324 325 NOTE: SW/FW manages the 'cookie' info related to this 326 buffer together with the 'cookie' info for this 327 MSDU_EXTENSION descriptor 328 329 <legal all> 330 331 buf3_ptr_39_32 332 333 Upper 8 bits of the fourth buffer pointer <legal all> 334 335 reserved_13a 336 337 <Legal 0> 338 339 buf3_len 340 341 Length of the fourth buffer <legal all> 342 343 buf4_ptr_31_0 344 345 Lower 32 bits of the fifth buffer pointer 346 347 348 349 NOTE: SW/FW manages the 'cookie' info related to this 350 buffer together with the 'cookie' info for this 351 MSDU_EXTENSION descriptor 352 353 <legal all> 354 355 buf4_ptr_39_32 356 357 Upper 8 bits of the fifth buffer pointer <legal all> 358 359 reserved_15a 360 361 <Legal 0> 362 363 buf4_len 364 365 Length of the fifth buffer <legal all> 366 367 buf5_ptr_31_0 368 369 Lower 32 bits of the sixth buffer pointer 370 371 372 373 NOTE: SW/FW manages the 'cookie' info related to this 374 buffer together with the 'cookie' info for this 375 MSDU_EXTENSION descriptor 376 377 <legal all> 378 379 buf5_ptr_39_32 380 381 Upper 8 bits of the sixth buffer pointer <legal all> 382 383 reserved_17a 384 385 <Legal 0> 386 387 buf5_len 388 389 Length of the sixth buffer <legal all> 390 */ 391 392 393 /* Description TX_MSDU_EXTENSION_0_TSO_ENABLE 394 395 Enable transmit segmentation offload <legal all> 396 */ 397 #define TX_MSDU_EXTENSION_0_TSO_ENABLE_OFFSET 0x00000000 398 #define TX_MSDU_EXTENSION_0_TSO_ENABLE_LSB 0 399 #define TX_MSDU_EXTENSION_0_TSO_ENABLE_MASK 0x00000001 400 401 /* Description TX_MSDU_EXTENSION_0_IPV4_CHECKSUM_EN 402 403 FIELD NOT USED IN HAWKEYE 1.0 404 405 406 407 Enable IPv4 checksum replacement 408 */ 409 #define TX_MSDU_EXTENSION_0_IPV4_CHECKSUM_EN_OFFSET 0x00000000 410 #define TX_MSDU_EXTENSION_0_IPV4_CHECKSUM_EN_LSB 1 411 #define TX_MSDU_EXTENSION_0_IPV4_CHECKSUM_EN_MASK 0x00000002 412 413 /* Description TX_MSDU_EXTENSION_0_UDP_OVER_IPV4_CHECKSUM_EN 414 415 FIELD NOT USED IN HAWKEYE 1.0 416 417 418 419 Enable UDP over IPv4 checksum replacement. UDP checksum 420 over IPv4 is optional for TCP/IP stacks. 421 */ 422 #define TX_MSDU_EXTENSION_0_UDP_OVER_IPV4_CHECKSUM_EN_OFFSET 0x00000000 423 #define TX_MSDU_EXTENSION_0_UDP_OVER_IPV4_CHECKSUM_EN_LSB 2 424 #define TX_MSDU_EXTENSION_0_UDP_OVER_IPV4_CHECKSUM_EN_MASK 0x00000004 425 426 /* Description TX_MSDU_EXTENSION_0_UDP_OVER_IPV6_CHECKSUM_EN 427 428 FIELD NOT USED IN HAWKEYE 1.0 429 430 431 432 Enable UDP over IPv6 checksum replacement. UDP checksum 433 over IPv6 is mandatory for TCP/IP stacks. 434 */ 435 #define TX_MSDU_EXTENSION_0_UDP_OVER_IPV6_CHECKSUM_EN_OFFSET 0x00000000 436 #define TX_MSDU_EXTENSION_0_UDP_OVER_IPV6_CHECKSUM_EN_LSB 3 437 #define TX_MSDU_EXTENSION_0_UDP_OVER_IPV6_CHECKSUM_EN_MASK 0x00000008 438 439 /* Description TX_MSDU_EXTENSION_0_TCP_OVER_IPV4_CHECKSUM_EN 440 441 FIELD NOT USED IN HAWKEYE 1.0 442 443 444 445 Enable TCP checksum over IPv4 replacement 446 */ 447 #define TX_MSDU_EXTENSION_0_TCP_OVER_IPV4_CHECKSUM_EN_OFFSET 0x00000000 448 #define TX_MSDU_EXTENSION_0_TCP_OVER_IPV4_CHECKSUM_EN_LSB 4 449 #define TX_MSDU_EXTENSION_0_TCP_OVER_IPV4_CHECKSUM_EN_MASK 0x00000010 450 451 /* Description TX_MSDU_EXTENSION_0_TCP_OVER_IPV6_CHECKSUM_EN 452 453 FIELD NOT USED IN HAWKEYE 1.0 454 455 456 457 Enable TCP checksum over IPv6 eplacement 458 */ 459 #define TX_MSDU_EXTENSION_0_TCP_OVER_IPV6_CHECKSUM_EN_OFFSET 0x00000000 460 #define TX_MSDU_EXTENSION_0_TCP_OVER_IPV6_CHECKSUM_EN_LSB 5 461 #define TX_MSDU_EXTENSION_0_TCP_OVER_IPV6_CHECKSUM_EN_MASK 0x00000020 462 463 /* Description TX_MSDU_EXTENSION_0_RESERVED_0A 464 465 FW will set to 0, MAC will ignore. <legal 0> 466 */ 467 #define TX_MSDU_EXTENSION_0_RESERVED_0A_OFFSET 0x00000000 468 #define TX_MSDU_EXTENSION_0_RESERVED_0A_LSB 6 469 #define TX_MSDU_EXTENSION_0_RESERVED_0A_MASK 0x00000040 470 471 /* Description TX_MSDU_EXTENSION_0_TCP_FLAG 472 473 TCP flags 474 475 {NS,CWR,ECE,URG,ACK,PSH, RST ,SYN,FIN}<legal all> 476 */ 477 #define TX_MSDU_EXTENSION_0_TCP_FLAG_OFFSET 0x00000000 478 #define TX_MSDU_EXTENSION_0_TCP_FLAG_LSB 7 479 #define TX_MSDU_EXTENSION_0_TCP_FLAG_MASK 0x0000ff80 480 481 /* Description TX_MSDU_EXTENSION_0_TCP_FLAG_MASK 482 483 TCP flag mask. Tcp_flag is inserted into the header 484 based on the mask, if tso is enabled 485 */ 486 #define TX_MSDU_EXTENSION_0_TCP_FLAG_MASK_OFFSET 0x00000000 487 #define TX_MSDU_EXTENSION_0_TCP_FLAG_MASK_LSB 16 488 #define TX_MSDU_EXTENSION_0_TCP_FLAG_MASK_MASK 0x01ff0000 489 490 /* Description TX_MSDU_EXTENSION_0_RESERVED_0B 491 492 FW will set to 0, MAC will ignore. <legal 0> 493 */ 494 #define TX_MSDU_EXTENSION_0_RESERVED_0B_OFFSET 0x00000000 495 #define TX_MSDU_EXTENSION_0_RESERVED_0B_LSB 25 496 #define TX_MSDU_EXTENSION_0_RESERVED_0B_MASK 0xfe000000 497 498 /* Description TX_MSDU_EXTENSION_1_L2_LENGTH 499 500 L2 length for the msdu, if tso is enabled <legal all> 501 */ 502 #define TX_MSDU_EXTENSION_1_L2_LENGTH_OFFSET 0x00000004 503 #define TX_MSDU_EXTENSION_1_L2_LENGTH_LSB 0 504 #define TX_MSDU_EXTENSION_1_L2_LENGTH_MASK 0x0000ffff 505 506 /* Description TX_MSDU_EXTENSION_1_IP_LENGTH 507 508 Ip length for the msdu, if tso is enabled <legal all> 509 */ 510 #define TX_MSDU_EXTENSION_1_IP_LENGTH_OFFSET 0x00000004 511 #define TX_MSDU_EXTENSION_1_IP_LENGTH_LSB 16 512 #define TX_MSDU_EXTENSION_1_IP_LENGTH_MASK 0xffff0000 513 514 /* Description TX_MSDU_EXTENSION_2_TCP_SEQ_NUMBER 515 516 Tcp_seq_number for the msdu, if tso is enabled <legal 517 all> 518 */ 519 #define TX_MSDU_EXTENSION_2_TCP_SEQ_NUMBER_OFFSET 0x00000008 520 #define TX_MSDU_EXTENSION_2_TCP_SEQ_NUMBER_LSB 0 521 #define TX_MSDU_EXTENSION_2_TCP_SEQ_NUMBER_MASK 0xffffffff 522 523 /* Description TX_MSDU_EXTENSION_3_IP_IDENTIFICATION 524 525 Ip_identification for the msdu, if tso is enabled <legal 526 all> 527 */ 528 #define TX_MSDU_EXTENSION_3_IP_IDENTIFICATION_OFFSET 0x0000000c 529 #define TX_MSDU_EXTENSION_3_IP_IDENTIFICATION_LSB 0 530 #define TX_MSDU_EXTENSION_3_IP_IDENTIFICATION_MASK 0x0000ffff 531 532 /* Description TX_MSDU_EXTENSION_3_UDP_LENGTH 533 534 TXDMA is copies this field into MSDU START TLV 535 */ 536 #define TX_MSDU_EXTENSION_3_UDP_LENGTH_OFFSET 0x0000000c 537 #define TX_MSDU_EXTENSION_3_UDP_LENGTH_LSB 16 538 #define TX_MSDU_EXTENSION_3_UDP_LENGTH_MASK 0xffff0000 539 540 /* Description TX_MSDU_EXTENSION_4_CHECKSUM_OFFSET 541 542 The calculated checksum from start offset to end offset 543 will be added to the checksum at the offset given by this 544 field<legal all> 545 */ 546 #define TX_MSDU_EXTENSION_4_CHECKSUM_OFFSET_OFFSET 0x00000010 547 #define TX_MSDU_EXTENSION_4_CHECKSUM_OFFSET_LSB 0 548 #define TX_MSDU_EXTENSION_4_CHECKSUM_OFFSET_MASK 0x00003fff 549 550 /* Description TX_MSDU_EXTENSION_4_PARTIAL_CHECKSUM_EN 551 552 Partial Checksum Enable Bit. 553 554 <legal 0-1> 555 */ 556 #define TX_MSDU_EXTENSION_4_PARTIAL_CHECKSUM_EN_OFFSET 0x00000010 557 #define TX_MSDU_EXTENSION_4_PARTIAL_CHECKSUM_EN_LSB 14 558 #define TX_MSDU_EXTENSION_4_PARTIAL_CHECKSUM_EN_MASK 0x00004000 559 560 /* Description TX_MSDU_EXTENSION_4_RESERVED_4A 561 562 <Legal 0> 563 */ 564 #define TX_MSDU_EXTENSION_4_RESERVED_4A_OFFSET 0x00000010 565 #define TX_MSDU_EXTENSION_4_RESERVED_4A_LSB 15 566 #define TX_MSDU_EXTENSION_4_RESERVED_4A_MASK 0x00008000 567 568 /* Description TX_MSDU_EXTENSION_4_PAYLOAD_START_OFFSET 569 570 L4 checksum calculations will start fromt this offset 571 572 <Legal all> 573 */ 574 #define TX_MSDU_EXTENSION_4_PAYLOAD_START_OFFSET_OFFSET 0x00000010 575 #define TX_MSDU_EXTENSION_4_PAYLOAD_START_OFFSET_LSB 16 576 #define TX_MSDU_EXTENSION_4_PAYLOAD_START_OFFSET_MASK 0x3fff0000 577 578 /* Description TX_MSDU_EXTENSION_4_RESERVED_4B 579 580 <Legal 0> 581 */ 582 #define TX_MSDU_EXTENSION_4_RESERVED_4B_OFFSET 0x00000010 583 #define TX_MSDU_EXTENSION_4_RESERVED_4B_LSB 30 584 #define TX_MSDU_EXTENSION_4_RESERVED_4B_MASK 0xc0000000 585 586 /* Description TX_MSDU_EXTENSION_5_PAYLOAD_END_OFFSET 587 588 L4 checksum calculations will end at this offset. 589 590 <Legal all> 591 */ 592 #define TX_MSDU_EXTENSION_5_PAYLOAD_END_OFFSET_OFFSET 0x00000014 593 #define TX_MSDU_EXTENSION_5_PAYLOAD_END_OFFSET_LSB 0 594 #define TX_MSDU_EXTENSION_5_PAYLOAD_END_OFFSET_MASK 0x00003fff 595 596 /* Description TX_MSDU_EXTENSION_5_RESERVED_5A 597 598 <Legal 0> 599 */ 600 #define TX_MSDU_EXTENSION_5_RESERVED_5A_OFFSET 0x00000014 601 #define TX_MSDU_EXTENSION_5_RESERVED_5A_LSB 14 602 #define TX_MSDU_EXTENSION_5_RESERVED_5A_MASK 0x0000c000 603 604 /* Description TX_MSDU_EXTENSION_5_WDS 605 606 If set the current packet is 4-address frame. Required 607 because an aggregate can include some frames with 3 address 608 format and other frames with 4 address format. Used by the 609 OLE during encapsulation. 610 611 Note: there is also global wds tx control in the 612 TX_PEER_ENTRY 613 614 <legal all> 615 */ 616 #define TX_MSDU_EXTENSION_5_WDS_OFFSET 0x00000014 617 #define TX_MSDU_EXTENSION_5_WDS_LSB 16 618 #define TX_MSDU_EXTENSION_5_WDS_MASK 0x00010000 619 620 /* Description TX_MSDU_EXTENSION_5_RESERVED_5B 621 622 <Legal 0> 623 */ 624 #define TX_MSDU_EXTENSION_5_RESERVED_5B_OFFSET 0x00000014 625 #define TX_MSDU_EXTENSION_5_RESERVED_5B_LSB 17 626 #define TX_MSDU_EXTENSION_5_RESERVED_5B_MASK 0xfffe0000 627 628 /* Description TX_MSDU_EXTENSION_6_BUF0_PTR_31_0 629 630 Lower 32 bits of the first buffer pointer 631 632 633 634 NOTE: SW/FW manages the 'cookie' info related to this 635 buffer together with the 'cookie' info for this 636 MSDU_EXTENSION descriptor 637 638 <legal all> 639 */ 640 #define TX_MSDU_EXTENSION_6_BUF0_PTR_31_0_OFFSET 0x00000018 641 #define TX_MSDU_EXTENSION_6_BUF0_PTR_31_0_LSB 0 642 #define TX_MSDU_EXTENSION_6_BUF0_PTR_31_0_MASK 0xffffffff 643 644 /* Description TX_MSDU_EXTENSION_7_BUF0_PTR_39_32 645 646 Upper 8 bits of the first buffer pointer <legal all> 647 */ 648 #define TX_MSDU_EXTENSION_7_BUF0_PTR_39_32_OFFSET 0x0000001c 649 #define TX_MSDU_EXTENSION_7_BUF0_PTR_39_32_LSB 0 650 #define TX_MSDU_EXTENSION_7_BUF0_PTR_39_32_MASK 0x000000ff 651 652 /* Description TX_MSDU_EXTENSION_7_RESERVED_7A 653 654 <Legal 0> 655 */ 656 #define TX_MSDU_EXTENSION_7_RESERVED_7A_OFFSET 0x0000001c 657 #define TX_MSDU_EXTENSION_7_RESERVED_7A_LSB 8 658 #define TX_MSDU_EXTENSION_7_RESERVED_7A_MASK 0x0000ff00 659 660 /* Description TX_MSDU_EXTENSION_7_BUF0_LEN 661 662 Length of the first buffer <legal all> 663 */ 664 #define TX_MSDU_EXTENSION_7_BUF0_LEN_OFFSET 0x0000001c 665 #define TX_MSDU_EXTENSION_7_BUF0_LEN_LSB 16 666 #define TX_MSDU_EXTENSION_7_BUF0_LEN_MASK 0xffff0000 667 668 /* Description TX_MSDU_EXTENSION_8_BUF1_PTR_31_0 669 670 Lower 32 bits of the second buffer pointer 671 672 673 674 NOTE: SW/FW manages the 'cookie' info related to this 675 buffer together with the 'cookie' info for this 676 MSDU_EXTENSION descriptor 677 678 <legal all> 679 */ 680 #define TX_MSDU_EXTENSION_8_BUF1_PTR_31_0_OFFSET 0x00000020 681 #define TX_MSDU_EXTENSION_8_BUF1_PTR_31_0_LSB 0 682 #define TX_MSDU_EXTENSION_8_BUF1_PTR_31_0_MASK 0xffffffff 683 684 /* Description TX_MSDU_EXTENSION_9_BUF1_PTR_39_32 685 686 Upper 8 bits of the second buffer pointer <legal all> 687 */ 688 #define TX_MSDU_EXTENSION_9_BUF1_PTR_39_32_OFFSET 0x00000024 689 #define TX_MSDU_EXTENSION_9_BUF1_PTR_39_32_LSB 0 690 #define TX_MSDU_EXTENSION_9_BUF1_PTR_39_32_MASK 0x000000ff 691 692 /* Description TX_MSDU_EXTENSION_9_RESERVED_9A 693 694 <Legal 0> 695 */ 696 #define TX_MSDU_EXTENSION_9_RESERVED_9A_OFFSET 0x00000024 697 #define TX_MSDU_EXTENSION_9_RESERVED_9A_LSB 8 698 #define TX_MSDU_EXTENSION_9_RESERVED_9A_MASK 0x0000ff00 699 700 /* Description TX_MSDU_EXTENSION_9_BUF1_LEN 701 702 Length of the second buffer <legal all> 703 */ 704 #define TX_MSDU_EXTENSION_9_BUF1_LEN_OFFSET 0x00000024 705 #define TX_MSDU_EXTENSION_9_BUF1_LEN_LSB 16 706 #define TX_MSDU_EXTENSION_9_BUF1_LEN_MASK 0xffff0000 707 708 /* Description TX_MSDU_EXTENSION_10_BUF2_PTR_31_0 709 710 Lower 32 bits of the third buffer pointer 711 712 NOTE: SW/FW manages the 'cookie' info related to this 713 buffer together with the 'cookie' info for this 714 MSDU_EXTENSION descriptor 715 716 <legal all> 717 */ 718 #define TX_MSDU_EXTENSION_10_BUF2_PTR_31_0_OFFSET 0x00000028 719 #define TX_MSDU_EXTENSION_10_BUF2_PTR_31_0_LSB 0 720 #define TX_MSDU_EXTENSION_10_BUF2_PTR_31_0_MASK 0xffffffff 721 722 /* Description TX_MSDU_EXTENSION_11_BUF2_PTR_39_32 723 724 Upper 8 bits of the third buffer pointer <legal all> 725 */ 726 #define TX_MSDU_EXTENSION_11_BUF2_PTR_39_32_OFFSET 0x0000002c 727 #define TX_MSDU_EXTENSION_11_BUF2_PTR_39_32_LSB 0 728 #define TX_MSDU_EXTENSION_11_BUF2_PTR_39_32_MASK 0x000000ff 729 730 /* Description TX_MSDU_EXTENSION_11_RESERVED_11A 731 732 <Legal 0> 733 */ 734 #define TX_MSDU_EXTENSION_11_RESERVED_11A_OFFSET 0x0000002c 735 #define TX_MSDU_EXTENSION_11_RESERVED_11A_LSB 8 736 #define TX_MSDU_EXTENSION_11_RESERVED_11A_MASK 0x0000ff00 737 738 /* Description TX_MSDU_EXTENSION_11_BUF2_LEN 739 740 Length of the third buffer <legal all> 741 */ 742 #define TX_MSDU_EXTENSION_11_BUF2_LEN_OFFSET 0x0000002c 743 #define TX_MSDU_EXTENSION_11_BUF2_LEN_LSB 16 744 #define TX_MSDU_EXTENSION_11_BUF2_LEN_MASK 0xffff0000 745 746 /* Description TX_MSDU_EXTENSION_12_BUF3_PTR_31_0 747 748 Lower 32 bits of the fourth buffer pointer 749 750 751 752 NOTE: SW/FW manages the 'cookie' info related to this 753 buffer together with the 'cookie' info for this 754 MSDU_EXTENSION descriptor 755 756 <legal all> 757 */ 758 #define TX_MSDU_EXTENSION_12_BUF3_PTR_31_0_OFFSET 0x00000030 759 #define TX_MSDU_EXTENSION_12_BUF3_PTR_31_0_LSB 0 760 #define TX_MSDU_EXTENSION_12_BUF3_PTR_31_0_MASK 0xffffffff 761 762 /* Description TX_MSDU_EXTENSION_13_BUF3_PTR_39_32 763 764 Upper 8 bits of the fourth buffer pointer <legal all> 765 */ 766 #define TX_MSDU_EXTENSION_13_BUF3_PTR_39_32_OFFSET 0x00000034 767 #define TX_MSDU_EXTENSION_13_BUF3_PTR_39_32_LSB 0 768 #define TX_MSDU_EXTENSION_13_BUF3_PTR_39_32_MASK 0x000000ff 769 770 /* Description TX_MSDU_EXTENSION_13_RESERVED_13A 771 772 <Legal 0> 773 */ 774 #define TX_MSDU_EXTENSION_13_RESERVED_13A_OFFSET 0x00000034 775 #define TX_MSDU_EXTENSION_13_RESERVED_13A_LSB 8 776 #define TX_MSDU_EXTENSION_13_RESERVED_13A_MASK 0x0000ff00 777 778 /* Description TX_MSDU_EXTENSION_13_BUF3_LEN 779 780 Length of the fourth buffer <legal all> 781 */ 782 #define TX_MSDU_EXTENSION_13_BUF3_LEN_OFFSET 0x00000034 783 #define TX_MSDU_EXTENSION_13_BUF3_LEN_LSB 16 784 #define TX_MSDU_EXTENSION_13_BUF3_LEN_MASK 0xffff0000 785 786 /* Description TX_MSDU_EXTENSION_14_BUF4_PTR_31_0 787 788 Lower 32 bits of the fifth buffer pointer 789 790 791 792 NOTE: SW/FW manages the 'cookie' info related to this 793 buffer together with the 'cookie' info for this 794 MSDU_EXTENSION descriptor 795 796 <legal all> 797 */ 798 #define TX_MSDU_EXTENSION_14_BUF4_PTR_31_0_OFFSET 0x00000038 799 #define TX_MSDU_EXTENSION_14_BUF4_PTR_31_0_LSB 0 800 #define TX_MSDU_EXTENSION_14_BUF4_PTR_31_0_MASK 0xffffffff 801 802 /* Description TX_MSDU_EXTENSION_15_BUF4_PTR_39_32 803 804 Upper 8 bits of the fifth buffer pointer <legal all> 805 */ 806 #define TX_MSDU_EXTENSION_15_BUF4_PTR_39_32_OFFSET 0x0000003c 807 #define TX_MSDU_EXTENSION_15_BUF4_PTR_39_32_LSB 0 808 #define TX_MSDU_EXTENSION_15_BUF4_PTR_39_32_MASK 0x000000ff 809 810 /* Description TX_MSDU_EXTENSION_15_RESERVED_15A 811 812 <Legal 0> 813 */ 814 #define TX_MSDU_EXTENSION_15_RESERVED_15A_OFFSET 0x0000003c 815 #define TX_MSDU_EXTENSION_15_RESERVED_15A_LSB 8 816 #define TX_MSDU_EXTENSION_15_RESERVED_15A_MASK 0x0000ff00 817 818 /* Description TX_MSDU_EXTENSION_15_BUF4_LEN 819 820 Length of the fifth buffer <legal all> 821 */ 822 #define TX_MSDU_EXTENSION_15_BUF4_LEN_OFFSET 0x0000003c 823 #define TX_MSDU_EXTENSION_15_BUF4_LEN_LSB 16 824 #define TX_MSDU_EXTENSION_15_BUF4_LEN_MASK 0xffff0000 825 826 /* Description TX_MSDU_EXTENSION_16_BUF5_PTR_31_0 827 828 Lower 32 bits of the sixth buffer pointer 829 830 831 832 NOTE: SW/FW manages the 'cookie' info related to this 833 buffer together with the 'cookie' info for this 834 MSDU_EXTENSION descriptor 835 836 <legal all> 837 */ 838 #define TX_MSDU_EXTENSION_16_BUF5_PTR_31_0_OFFSET 0x00000040 839 #define TX_MSDU_EXTENSION_16_BUF5_PTR_31_0_LSB 0 840 #define TX_MSDU_EXTENSION_16_BUF5_PTR_31_0_MASK 0xffffffff 841 842 /* Description TX_MSDU_EXTENSION_17_BUF5_PTR_39_32 843 844 Upper 8 bits of the sixth buffer pointer <legal all> 845 */ 846 #define TX_MSDU_EXTENSION_17_BUF5_PTR_39_32_OFFSET 0x00000044 847 #define TX_MSDU_EXTENSION_17_BUF5_PTR_39_32_LSB 0 848 #define TX_MSDU_EXTENSION_17_BUF5_PTR_39_32_MASK 0x000000ff 849 850 /* Description TX_MSDU_EXTENSION_17_RESERVED_17A 851 852 <Legal 0> 853 */ 854 #define TX_MSDU_EXTENSION_17_RESERVED_17A_OFFSET 0x00000044 855 #define TX_MSDU_EXTENSION_17_RESERVED_17A_LSB 8 856 #define TX_MSDU_EXTENSION_17_RESERVED_17A_MASK 0x0000ff00 857 858 /* Description TX_MSDU_EXTENSION_17_BUF5_LEN 859 860 Length of the sixth buffer <legal all> 861 */ 862 #define TX_MSDU_EXTENSION_17_BUF5_LEN_OFFSET 0x00000044 863 #define TX_MSDU_EXTENSION_17_BUF5_LEN_LSB 16 864 #define TX_MSDU_EXTENSION_17_BUF5_LEN_MASK 0xffff0000 865 866 867 #endif // _TX_MSDU_EXTENSION_H_ 868