1 /*
2  * Copyright (c) 2016-2017 The Linux Foundation. All rights reserved.
3  *
4  * Permission to use, copy, modify, and/or distribute this software for
5  * any purpose with or without fee is hereby granted, provided that the
6  * above copyright notice and this permission notice appear in all
7  * copies.
8  *
9  * THE SOFTWARE IS PROVIDED "AS IS" AND THE AUTHOR DISCLAIMS ALL
10  * WARRANTIES WITH REGARD TO THIS SOFTWARE INCLUDING ALL IMPLIED
11  * WARRANTIES OF MERCHANTABILITY AND FITNESS. IN NO EVENT SHALL THE
12  * AUTHOR BE LIABLE FOR ANY SPECIAL, DIRECT, INDIRECT, OR CONSEQUENTIAL
13  * DAMAGES OR ANY DAMAGES WHATSOEVER RESULTING FROM LOSS OF USE, DATA OR
14  * PROFITS, WHETHER IN AN ACTION OF CONTRACT, NEGLIGENCE OR OTHER
15  * TORTIOUS ACTION, ARISING OUT OF OR IN CONNECTION WITH THE USE OR
16  * PERFORMANCE OF THIS SOFTWARE.
17  */
18 
19 // $ATH_LICENSE_HW_HDR_C$
20 //
21 // DO NOT EDIT!  This file is automatically generated
22 //               These definitions are tied to a particular hardware layout
23 
24 
25 #ifndef _BUFFER_ADDR_INFO_H_
26 #define _BUFFER_ADDR_INFO_H_
27 #if !defined(__ASSEMBLER__)
28 #endif
29 
30 
31 // ################ START SUMMARY #################
32 //
33 //	Dword	Fields
34 //	0	buffer_addr_31_0[31:0]
35 //	1	buffer_addr_39_32[7:0], return_buffer_manager[10:8], sw_buffer_cookie[31:11]
36 //
37 // ################ END SUMMARY #################
38 
39 #define NUM_OF_DWORDS_BUFFER_ADDR_INFO 2
40 
41 struct buffer_addr_info {
42              uint32_t buffer_addr_31_0                : 32; //[31:0]
43              uint32_t buffer_addr_39_32               :  8, //[7:0]
44                       return_buffer_manager           :  3, //[10:8]
45                       sw_buffer_cookie                : 21; //[31:11]
46 };
47 
48 /*
49 
50 buffer_addr_31_0
51 
52 			Address (lower 32 bits) of the MSDU buffer OR
53 			MSDU_EXTENSION descriptor OR Link Descriptor
54 
55 
56 
57 			In case of 'NULL' pointer, this field is set to 0
58 
59 			<legal all>
60 
61 buffer_addr_39_32
62 
63 			Address (upper 8 bits) of the MSDU buffer OR
64 			MSDU_EXTENSION descriptor OR Link Descriptor
65 
66 
67 
68 			In case of 'NULL' pointer, this field is set to 0
69 
70 			<legal all>
71 
72 return_buffer_manager
73 
74 			Consumer: WBM
75 
76 			Producer: SW/FW
77 
78 
79 
80 			In case of 'NULL' pointer, this field is set to 0
81 
82 
83 
84 			Indicates to which buffer manager the buffer OR
85 			MSDU_EXTENSION descriptor OR link descriptor that is being
86 			pointed to shall be returned after the frame has been
87 			processed. It is used by WBM for routing purposes.
88 
89 
90 
91 			<enum 0 WBM_IDLE_BUF_LIST> This buffer shall be returned
92 			to the WMB buffer idle list
93 
94 			<enum 1 WBM_IDLE_DESC_LIST> This buffer shall be
95 			returned to the WMB idle link descriptor idle list
96 
97 			<enum 2 FW_BM> This buffer shall be returned to the FW
98 
99 			<enum 3 SW0_BM> This buffer shall be returned to the SW,
100 			ring 0
101 
102 			<enum 4 SW1_BM> This buffer shall be returned to the SW,
103 			ring 1
104 
105 			<enum 5 SW2_BM> This buffer shall be returned to the SW,
106 			ring 2
107 
108 			<enum 6 SW3_BM> This buffer shall be returned to the SW,
109 			ring 3
110 
111 
112 
113 			<legal 0-6>
114 
115 sw_buffer_cookie
116 
117 			Cookie field exclusively used by SW.
118 
119 
120 
121 			In case of 'NULL' pointer, this field is set to 0
122 
123 
124 
125 			HW ignores the contents, accept that it passes the
126 			programmed value on to other descriptors together with the
127 			physical address
128 
129 
130 
131 			Field can be used by SW to for example associate the
132 			buffers physical address with the virtual address
133 
134 			The bit definitions as used by SW are within SW HLD
135 			specification
136 
137 
138 
139 			NOTE:
140 
141 			The two most significant bits can have a special meaning
142 			in case this struct is embedded in a TX_MPDU_DETAILS STRUCT,
143 			and field transmit_bw_restriction is set
144 
145 			Sw_buffer_cookie[20:19] = 2'b00: 20 MHz TX only
146 
147 			Sw_buffer_cookie[20:19] = 2'b01: 40 MHz TX only
148 
149 			Sw_buffer_cookie[20:19] = 2'b10: 80 MHz TX only
150 
151 			Sw_buffer_cookie[20:19] = 2'b11: 160 MHz TX only
152 
153 
154 
155 			<legal all>
156 */
157 
158 
159 /* Description		BUFFER_ADDR_INFO_0_BUFFER_ADDR_31_0
160 
161 			Address (lower 32 bits) of the MSDU buffer OR
162 			MSDU_EXTENSION descriptor OR Link Descriptor
163 
164 
165 
166 			In case of 'NULL' pointer, this field is set to 0
167 
168 			<legal all>
169 */
170 #define BUFFER_ADDR_INFO_0_BUFFER_ADDR_31_0_OFFSET                   0x00000000
171 #define BUFFER_ADDR_INFO_0_BUFFER_ADDR_31_0_LSB                      0
172 #define BUFFER_ADDR_INFO_0_BUFFER_ADDR_31_0_MASK                     0xffffffff
173 
174 /* Description		BUFFER_ADDR_INFO_1_BUFFER_ADDR_39_32
175 
176 			Address (upper 8 bits) of the MSDU buffer OR
177 			MSDU_EXTENSION descriptor OR Link Descriptor
178 
179 
180 
181 			In case of 'NULL' pointer, this field is set to 0
182 
183 			<legal all>
184 */
185 #define BUFFER_ADDR_INFO_1_BUFFER_ADDR_39_32_OFFSET                  0x00000004
186 #define BUFFER_ADDR_INFO_1_BUFFER_ADDR_39_32_LSB                     0
187 #define BUFFER_ADDR_INFO_1_BUFFER_ADDR_39_32_MASK                    0x000000ff
188 
189 /* Description		BUFFER_ADDR_INFO_1_RETURN_BUFFER_MANAGER
190 
191 			Consumer: WBM
192 
193 			Producer: SW/FW
194 
195 
196 
197 			In case of 'NULL' pointer, this field is set to 0
198 
199 
200 
201 			Indicates to which buffer manager the buffer OR
202 			MSDU_EXTENSION descriptor OR link descriptor that is being
203 			pointed to shall be returned after the frame has been
204 			processed. It is used by WBM for routing purposes.
205 
206 
207 
208 			<enum 0 WBM_IDLE_BUF_LIST> This buffer shall be returned
209 			to the WMB buffer idle list
210 
211 			<enum 1 WBM_IDLE_DESC_LIST> This buffer shall be
212 			returned to the WMB idle link descriptor idle list
213 
214 			<enum 2 FW_BM> This buffer shall be returned to the FW
215 
216 			<enum 3 SW0_BM> This buffer shall be returned to the SW,
217 			ring 0
218 
219 			<enum 4 SW1_BM> This buffer shall be returned to the SW,
220 			ring 1
221 
222 			<enum 5 SW2_BM> This buffer shall be returned to the SW,
223 			ring 2
224 
225 			<enum 6 SW3_BM> This buffer shall be returned to the SW,
226 			ring 3
227 
228 
229 
230 			<legal 0-6>
231 */
232 #define BUFFER_ADDR_INFO_1_RETURN_BUFFER_MANAGER_OFFSET              0x00000004
233 #define BUFFER_ADDR_INFO_1_RETURN_BUFFER_MANAGER_LSB                 8
234 #define BUFFER_ADDR_INFO_1_RETURN_BUFFER_MANAGER_MASK                0x00000700
235 
236 /* Description		BUFFER_ADDR_INFO_1_SW_BUFFER_COOKIE
237 
238 			Cookie field exclusively used by SW.
239 
240 
241 
242 			In case of 'NULL' pointer, this field is set to 0
243 
244 
245 
246 			HW ignores the contents, accept that it passes the
247 			programmed value on to other descriptors together with the
248 			physical address
249 
250 
251 
252 			Field can be used by SW to for example associate the
253 			buffers physical address with the virtual address
254 
255 			The bit definitions as used by SW are within SW HLD
256 			specification
257 
258 
259 
260 			NOTE:
261 
262 			The two most significant bits can have a special meaning
263 			in case this struct is embedded in a TX_MPDU_DETAILS STRUCT,
264 			and field transmit_bw_restriction is set
265 
266 			Sw_buffer_cookie[20:19] = 2'b00: 20 MHz TX only
267 
268 			Sw_buffer_cookie[20:19] = 2'b01: 40 MHz TX only
269 
270 			Sw_buffer_cookie[20:19] = 2'b10: 80 MHz TX only
271 
272 			Sw_buffer_cookie[20:19] = 2'b11: 160 MHz TX only
273 
274 
275 
276 			<legal all>
277 */
278 #define BUFFER_ADDR_INFO_1_SW_BUFFER_COOKIE_OFFSET                   0x00000004
279 #define BUFFER_ADDR_INFO_1_SW_BUFFER_COOKIE_LSB                      11
280 #define BUFFER_ADDR_INFO_1_SW_BUFFER_COOKIE_MASK                     0xfffff800
281 
282 
283 #endif // _BUFFER_ADDR_INFO_H_
284