1 /* 2 * Copyright (c) 2016-2018 The Linux Foundation. All rights reserved. 3 * 4 * Permission to use, copy, modify, and/or distribute this software for 5 * any purpose with or without fee is hereby granted, provided that the 6 * above copyright notice and this permission notice appear in all 7 * copies. 8 * 9 * THE SOFTWARE IS PROVIDED "AS IS" AND THE AUTHOR DISCLAIMS ALL 10 * WARRANTIES WITH REGARD TO THIS SOFTWARE INCLUDING ALL IMPLIED 11 * WARRANTIES OF MERCHANTABILITY AND FITNESS. IN NO EVENT SHALL THE 12 * AUTHOR BE LIABLE FOR ANY SPECIAL, DIRECT, INDIRECT, OR CONSEQUENTIAL 13 * DAMAGES OR ANY DAMAGES WHATSOEVER RESULTING FROM LOSS OF USE, DATA OR 14 * PROFITS, WHETHER IN AN ACTION OF CONTRACT, NEGLIGENCE OR OTHER 15 * TORTIOUS ACTION, ARISING OUT OF OR IN CONNECTION WITH THE USE OR 16 * PERFORMANCE OF THIS SOFTWARE. 17 */ 18 19 #ifndef _RX_PPDU_END_USER_STATS_H_ 20 #define _RX_PPDU_END_USER_STATS_H_ 21 #if !defined(__ASSEMBLER__) 22 #endif 23 24 #include "rx_rxpcu_classification_overview.h" 25 26 // ################ START SUMMARY ################# 27 // 28 // Dword Fields 29 // 0 struct rx_rxpcu_classification_overview rxpcu_classification_details; 30 // 1 sta_full_aid[12:0], mcs[16:13], nss[19:17], ofdma_info_valid[20], dl_ofdma_ru_start_index[27:21], reserved_1a[31:28] 31 // 2 dl_ofdma_ru_width[6:0], reserved_2a[7], user_receive_quality[15:8], mpdu_cnt_fcs_err[25:16], wbm2rxdma_buf_source_used[26], fw2rxdma_buf_source_used[27], sw2rxdma_buf_source_used[28], reserved_2b[31:29] 32 // 3 mpdu_cnt_fcs_ok[8:0], frame_control_info_valid[9], qos_control_info_valid[10], ht_control_info_valid[11], data_sequence_control_info_valid[12], ht_control_info_null_valid[13], reserved_3a[15:14], rxdma2reo_ring_used[16], rxdma2fw_ring_used[17], rxdma2sw_ring_used[18], rxdma_release_ring_used[19], ht_control_field_pkt_type[23:20], reserved_3b[31:24] 33 // 4 ast_index[15:0], frame_control_field[31:16] 34 // 5 first_data_seq_ctrl[15:0], qos_control_field[31:16] 35 // 6 ht_control_field[31:0] 36 // 7 fcs_ok_bitmap_31_0[31:0] 37 // 8 fcs_ok_bitmap_63_32[31:0] 38 // 9 udp_msdu_count[15:0], tcp_msdu_count[31:16] 39 // 10 other_msdu_count[15:0], tcp_ack_msdu_count[31:16] 40 // 11 sw_response_reference_ptr[31:0] 41 // 12 received_qos_data_tid_bitmap[15:0], received_qos_data_tid_eosp_bitmap[31:16] 42 // 13 qosctrl_15_8_tid0[7:0], qosctrl_15_8_tid1[15:8], qosctrl_15_8_tid2[23:16], qosctrl_15_8_tid3[31:24] 43 // 14 qosctrl_15_8_tid4[7:0], qosctrl_15_8_tid5[15:8], qosctrl_15_8_tid6[23:16], qosctrl_15_8_tid7[31:24] 44 // 15 qosctrl_15_8_tid8[7:0], qosctrl_15_8_tid9[15:8], qosctrl_15_8_tid10[23:16], qosctrl_15_8_tid11[31:24] 45 // 16 qosctrl_15_8_tid12[7:0], qosctrl_15_8_tid13[15:8], qosctrl_15_8_tid14[23:16], qosctrl_15_8_tid15[31:24] 46 // 17 mpdu_ok_byte_count[24:0], ampdu_delim_ok_count_6_0[31:25] 47 // 18 ampdu_delim_err_count[24:0], ampdu_delim_ok_count_13_7[31:25] 48 // 19 mpdu_err_byte_count[24:0], ampdu_delim_ok_count_20_14[31:25] 49 // 20 non_consecutive_delimiter_err[15:0], reserved_20a[31:16] 50 // 21 ht_control_null_field[31:0] 51 // 52 // ################ END SUMMARY ################# 53 54 #define NUM_OF_DWORDS_RX_PPDU_END_USER_STATS 22 55 56 struct rx_ppdu_end_user_stats { 57 struct rx_rxpcu_classification_overview rxpcu_classification_details; 58 uint32_t sta_full_aid : 13, //[12:0] 59 mcs : 4, //[16:13] 60 nss : 3, //[19:17] 61 ofdma_info_valid : 1, //[20] 62 dl_ofdma_ru_start_index : 7, //[27:21] 63 reserved_1a : 4; //[31:28] 64 uint32_t dl_ofdma_ru_width : 7, //[6:0] 65 reserved_2a : 1, //[7] 66 user_receive_quality : 8, //[15:8] 67 mpdu_cnt_fcs_err : 10, //[25:16] 68 wbm2rxdma_buf_source_used : 1, //[26] 69 fw2rxdma_buf_source_used : 1, //[27] 70 sw2rxdma_buf_source_used : 1, //[28] 71 reserved_2b : 3; //[31:29] 72 uint32_t mpdu_cnt_fcs_ok : 9, //[8:0] 73 frame_control_info_valid : 1, //[9] 74 qos_control_info_valid : 1, //[10] 75 ht_control_info_valid : 1, //[11] 76 data_sequence_control_info_valid: 1, //[12] 77 ht_control_info_null_valid : 1, //[13] 78 reserved_3a : 2, //[15:14] 79 rxdma2reo_ring_used : 1, //[16] 80 rxdma2fw_ring_used : 1, //[17] 81 rxdma2sw_ring_used : 1, //[18] 82 rxdma_release_ring_used : 1, //[19] 83 ht_control_field_pkt_type : 4, //[23:20] 84 reserved_3b : 8; //[31:24] 85 uint32_t ast_index : 16, //[15:0] 86 frame_control_field : 16; //[31:16] 87 uint32_t first_data_seq_ctrl : 16, //[15:0] 88 qos_control_field : 16; //[31:16] 89 uint32_t ht_control_field : 32; //[31:0] 90 uint32_t fcs_ok_bitmap_31_0 : 32; //[31:0] 91 uint32_t fcs_ok_bitmap_63_32 : 32; //[31:0] 92 uint32_t udp_msdu_count : 16, //[15:0] 93 tcp_msdu_count : 16; //[31:16] 94 uint32_t other_msdu_count : 16, //[15:0] 95 tcp_ack_msdu_count : 16; //[31:16] 96 uint32_t sw_response_reference_ptr : 32; //[31:0] 97 uint32_t received_qos_data_tid_bitmap : 16, //[15:0] 98 received_qos_data_tid_eosp_bitmap: 16; //[31:16] 99 uint32_t qosctrl_15_8_tid0 : 8, //[7:0] 100 qosctrl_15_8_tid1 : 8, //[15:8] 101 qosctrl_15_8_tid2 : 8, //[23:16] 102 qosctrl_15_8_tid3 : 8; //[31:24] 103 uint32_t qosctrl_15_8_tid4 : 8, //[7:0] 104 qosctrl_15_8_tid5 : 8, //[15:8] 105 qosctrl_15_8_tid6 : 8, //[23:16] 106 qosctrl_15_8_tid7 : 8; //[31:24] 107 uint32_t qosctrl_15_8_tid8 : 8, //[7:0] 108 qosctrl_15_8_tid9 : 8, //[15:8] 109 qosctrl_15_8_tid10 : 8, //[23:16] 110 qosctrl_15_8_tid11 : 8; //[31:24] 111 uint32_t qosctrl_15_8_tid12 : 8, //[7:0] 112 qosctrl_15_8_tid13 : 8, //[15:8] 113 qosctrl_15_8_tid14 : 8, //[23:16] 114 qosctrl_15_8_tid15 : 8; //[31:24] 115 uint32_t mpdu_ok_byte_count : 25, //[24:0] 116 ampdu_delim_ok_count_6_0 : 7; //[31:25] 117 uint32_t ampdu_delim_err_count : 25, //[24:0] 118 ampdu_delim_ok_count_13_7 : 7; //[31:25] 119 uint32_t mpdu_err_byte_count : 25, //[24:0] 120 ampdu_delim_ok_count_20_14 : 7; //[31:25] 121 uint32_t non_consecutive_delimiter_err : 16, //[15:0] 122 reserved_20a : 16; //[31:16] 123 uint32_t ht_control_null_field : 32; //[31:0] 124 }; 125 126 /* 127 128 struct rx_rxpcu_classification_overview rxpcu_classification_details 129 130 Details related to what RXPCU classification types of 131 MPDUs have been received 132 133 sta_full_aid 134 135 Consumer: FW 136 137 Producer: RXPCU 138 139 140 141 The full AID of this station. 142 143 144 145 <legal all> 146 147 mcs 148 149 MCS of the received frame 150 151 152 153 For details, refer to MCS_TYPE description 154 155 Note: This is rate in case of 11a/11b 156 157 158 159 <legal all> 160 161 nss 162 163 Number of spatial streams. 164 165 166 167 NOTE: RXPCU derives this from the 'Mimo_ss_bitmap' 168 169 170 171 <enum 0 1_spatial_stream>Single spatial stream 172 173 <enum 1 2_spatial_streams>2 spatial streams 174 175 <enum 2 3_spatial_streams>3 spatial streams 176 177 <enum 3 4_spatial_streams>4 spatial streams 178 179 <enum 4 5_spatial_streams>5 spatial streams 180 181 <enum 5 6_spatial_streams>6 spatial streams 182 183 <enum 6 7_spatial_streams>7 spatial streams 184 185 <enum 7 8_spatial_streams>8 spatial streams 186 187 ofdma_info_valid 188 189 When set, ofdma RU related info in the following fields 190 is valid 191 192 <legal all> 193 194 dl_ofdma_ru_start_index 195 196 Field only valid when Ofdma_info_valid is set 197 198 199 200 RU index number to which User is assigned 201 202 RU numbering is over the entire BW, starting from 0 203 204 <legal 0-73> 205 206 reserved_1a 207 208 <legal 0> 209 210 dl_ofdma_ru_width 211 212 The size of the RU for this user. 213 214 In units of 1 (26 tone) RU 215 216 <legal 1-74> 217 218 reserved_2a 219 220 <legal 0> 221 222 user_receive_quality 223 224 RSSI / EVM for this user ??? 225 226 227 228 Details TBD 229 230 <legal all> 231 232 mpdu_cnt_fcs_err 233 234 The number of MPDUs received from this STA in this PPDU 235 with FCS errors 236 237 <legal all> 238 239 wbm2rxdma_buf_source_used 240 241 Field filled in by RXDMA 242 243 244 245 When set, RXDMA has used the wbm2rxdma_buf ring as 246 source for at least one of the frames in this PPDU. 247 248 fw2rxdma_buf_source_used 249 250 Field filled in by RXDMA 251 252 253 254 When set, RXDMA has used the fw2rxdma_buf ring as source 255 for at least one of the frames in this PPDU. 256 257 sw2rxdma_buf_source_used 258 259 Field filled in by RXDMA 260 261 262 263 When set, RXDMA has used the sw2rxdma_buf ring as source 264 for at least one of the frames in this PPDU. 265 266 reserved_2b 267 268 <legal 0> 269 270 mpdu_cnt_fcs_ok 271 272 The number of MPDUs received from this STA in this PPDU 273 with correct FCS 274 275 <legal all> 276 277 frame_control_info_valid 278 279 When set, the frame_control_info field contains valid 280 information 281 282 <legal all> 283 284 qos_control_info_valid 285 286 When set, the QoS_control_info field contains valid 287 information 288 289 <legal all> 290 291 ht_control_info_valid 292 293 When set, the HT_control_field contains valid 294 information 295 296 <legal all> 297 298 data_sequence_control_info_valid 299 300 When set, the First_data_seq_ctrl field contains valid 301 information 302 303 <legal all> 304 305 ht_control_info_null_valid 306 307 When set, the HT_control_NULL_field contains valid 308 information 309 310 <legal all> 311 312 reserved_3a 313 314 <legal 0> 315 316 rxdma2reo_ring_used 317 318 Field filled in by RXDMA 319 320 321 322 Set when at least one frame during this PPDU got pushed 323 to this ring by RXDMA 324 325 rxdma2fw_ring_used 326 327 Field filled in by RXDMA 328 329 330 331 Set when at least one frame during this PPDU got pushed 332 to this ring by RXDMA 333 334 rxdma2sw_ring_used 335 336 Field filled in by RXDMA 337 338 339 340 Set when at least one frame during this PPDU got pushed 341 to this ring by RXDMA 342 343 rxdma_release_ring_used 344 345 Field filled in by RXDMA 346 347 348 349 Set when at least one frame during this PPDU got pushed 350 to this ring by RXDMA 351 352 ht_control_field_pkt_type 353 354 Field only valid when HT_control_info_valid or 355 HT_control_info_NULL_valid is set. 356 357 358 359 Indicates what the PHY receive type was for receiving 360 this frame. Can help determine if the HT_CONTROL field shall 361 be interpreted as HT/VHT or HE. 362 363 364 365 NOTE: later on in the 11ax IEEE spec a bit within the HT 366 control field was introduced that explicitly indicated how 367 to interpret the HT control field.... As HT, VHT, or HE. 368 369 370 371 <enum 0 dot11a>802.11a PPDU type 372 373 <enum 1 dot11b>802.11b PPDU type 374 375 <enum 2 dot11n_mm>802.11n Mixed Mode PPDU type 376 377 <enum 3 dot11ac>802.11ac PPDU type 378 379 <enum 4 dot11ax>802.11ax PPDU type 380 381 reserved_3b 382 383 <legal 0> 384 385 ast_index 386 387 This field indicates the index of the AST entry 388 corresponding to this MPDU. It is provided by the GSE module 389 instantiated in RXPCU. 390 391 A value of 0xFFFF indicates an invalid AST index, 392 meaning that No AST entry was found or NO AST search was 393 performed 394 395 <legal all> 396 397 frame_control_field 398 399 Field only valid when Frame_control_info_valid is set. 400 401 402 403 Last successfully received Frame_control field of data 404 frame (excluding Data NULL/ QoS Null) for this user 405 406 Mainly used to track the PM state of the transmitted 407 device 408 409 410 411 NOTE: only data frame info is needed, as control and 412 management frames are already routed to the FW. 413 414 <legal all> 415 416 first_data_seq_ctrl 417 418 Field only valid when Data_sequence_control_info_valid 419 is set. 420 421 422 423 Sequence control field of the first data frame 424 (excluding Data NULL or QoS Data null) received for this 425 user with correct FCS 426 427 428 429 NOTE: only data frame info is needed, as control and 430 management frames are already routed to the FW. 431 432 <legal all> 433 434 qos_control_field 435 436 Field only valid when QoS_control_info_valid is set. 437 438 439 440 Last successfully received QoS_control field of data 441 frame (excluding Data NULL/ QoS Null) for this user 442 443 444 445 Note that in case of multi TID, this field can only 446 reflect the last properly received MPDU, and thus can not 447 indicate all potentially different TIDs that had been 448 received earlier. 449 450 451 452 There are however per TID fields, that will contain 453 among other things all buffer status info: See 454 455 QoSCtrl_15_8_tid??? 456 457 <legal all> 458 459 ht_control_field 460 461 Field only valid when HT_control_info_valid is set. 462 463 464 465 Last successfully received 466 HT_CONTROL/VHT_CONTROL/HE_CONTROL field of data frames, 467 excluding QoS Null frames for this user. 468 469 470 471 NOTE: HT control fields from QoS Null frames are 472 captured in field HT_control_NULL_field 473 474 <legal all> 475 476 fcs_ok_bitmap_31_0 477 478 Bitmap indicates in order of received MPDUs, which MPDUs 479 had an passing FCS or had an error. 480 481 1: FCS OK 482 483 0: FCS error 484 485 <legal all> 486 487 fcs_ok_bitmap_63_32 488 489 Bitmap indicates in order of received MPDUs, which MPDUs 490 had an passing FCS or had an error. 491 492 1: FCS OK 493 494 0: FCS error 495 496 497 498 NOTE: for users 0, 1, 2 and 3, additional bitmap info 499 (up to 256 bitmap window) is provided in 500 RX_PPDU_END_USER_STATS_EXT TLV 501 502 <legal all> 503 504 udp_msdu_count 505 506 Field filled in by RX OLE 507 508 Set to 0 by RXPCU 509 510 511 512 The number of MSDUs that are part of MPDUs without FCS 513 error, that contain UDP frames. 514 515 <legal all> 516 517 tcp_msdu_count 518 519 Field filled in by RX OLE 520 521 Set to 0 by RXPCU 522 523 524 525 The number of MSDUs that are part of MPDUs without FCS 526 error, that contain TCP frames. 527 528 529 530 (Note: This does NOT include TCP-ACK) 531 532 <legal all> 533 534 other_msdu_count 535 536 Field filled in by RX OLE 537 538 Set to 0 by RXPCU 539 540 541 542 The number of MSDUs that are part of MPDUs without FCS 543 error, that contain neither UDP or TCP frames. 544 545 546 547 Includes Management and control frames. 548 549 550 551 <legal all> 552 553 tcp_ack_msdu_count 554 555 Field filled in by RX OLE 556 557 Set to 0 by RXPCU 558 559 560 561 The number of MSDUs that are part of MPDUs without FCS 562 error, that contain TCP ack frames. 563 564 <legal all> 565 566 sw_response_reference_ptr 567 568 Pointer that SW uses to refer back to an expected 569 response reception. Used for Rate adaptation purposes. 570 571 When a reception occurrs that is not tied to an expected 572 response, this field is set to 0x0 573 574 <legal all> 575 576 received_qos_data_tid_bitmap 577 578 Whenever a frame is received that contains a QoS control 579 field (that includes QoS Data and/or QoS Null), the bit in 580 this field that corresponds to the received TID shall be 581 set. 582 583 ...Bitmap[0] = TID0 584 585 ...Bitmap[1] = TID1 586 587 Etc. 588 589 <legal all> 590 591 received_qos_data_tid_eosp_bitmap 592 593 Field initialized to 0 594 595 For every QoS Data frame that is correctly received, the 596 EOSP bit of that frame is copied over into the corresponding 597 TID related field. 598 599 Note that this implies that the bits here represent the 600 EOSP bit status for each TID of the last MPDU received for 601 that TID. 602 603 604 605 received TID shall be set. 606 607 ...eosp_bitmap[0] = eosp of TID0 608 609 ...eosp_bitmap[1] = eosp of TID1 610 611 Etc. 612 613 <legal all> 614 615 qosctrl_15_8_tid0 616 617 Field only valid when Received_qos_data_tid_bitmap[0] is 618 set 619 620 621 622 QoS control field bits 15-8 of the last properly 623 received MPDU with a QoS control field embedded, with TID 624 == 0 625 626 qosctrl_15_8_tid1 627 628 Field only valid when Received_qos_data_tid_bitmap[1] is 629 set 630 631 632 633 QoS control field bits 15-8 of the last properly 634 received MPDU with a QoS control field embedded, with TID 635 == 1 636 637 qosctrl_15_8_tid2 638 639 Field only valid when Received_qos_data_tid_bitmap[2] is 640 set 641 642 643 644 QoS control field bits 15-8 of the last properly 645 received MPDU with a QoS control field embedded, with TID 646 == 2 647 648 qosctrl_15_8_tid3 649 650 Field only valid when Received_qos_data_tid_bitmap[3] is 651 set 652 653 654 655 QoS control field bits 15-8 of the last properly 656 received MPDU with a QoS control field embedded, with TID 657 == 3 658 659 qosctrl_15_8_tid4 660 661 Field only valid when Received_qos_data_tid_bitmap[4] is 662 set 663 664 665 666 QoS control field bits 15-8 of the last properly 667 received MPDU with a QoS control field embedded, with TID 668 == 4 669 670 qosctrl_15_8_tid5 671 672 Field only valid when Received_qos_data_tid_bitmap[5] is 673 set 674 675 676 677 QoS control field bits 15-8 of the last properly 678 received MPDU with a QoS control field embedded, with TID 679 == 5 680 681 qosctrl_15_8_tid6 682 683 Field only valid when Received_qos_data_tid_bitmap[6] is 684 set 685 686 687 688 QoS control field bits 15-8 of the last properly 689 received MPDU with a QoS control field embedded, with TID 690 == 6 691 692 qosctrl_15_8_tid7 693 694 Field only valid when Received_qos_data_tid_bitmap[7] is 695 set 696 697 698 699 QoS control field bits 15-8 of the last properly 700 received MPDU with a QoS control field embedded, with TID 701 == 7 702 703 qosctrl_15_8_tid8 704 705 Field only valid when Received_qos_data_tid_bitmap[8] is 706 set 707 708 709 710 QoS control field bits 15-8 of the last properly 711 received MPDU with a QoS control field embedded, with TID 712 == 8 713 714 qosctrl_15_8_tid9 715 716 Field only valid when Received_qos_data_tid_bitmap[9] is 717 set 718 719 720 721 QoS control field bits 15-8 of the last properly 722 received MPDU with a QoS control field embedded, with TID 723 == 9 724 725 qosctrl_15_8_tid10 726 727 Field only valid when Received_qos_data_tid_bitmap[10] 728 is set 729 730 731 732 QoS control field bits 15-8 of the last properly 733 received MPDU with a QoS control field embedded, with TID 734 == 10 735 736 qosctrl_15_8_tid11 737 738 Field only valid when Received_qos_data_tid_bitmap[11] 739 is set 740 741 742 743 QoS control field bits 15-8 of the last properly 744 received MPDU with a QoS control field embedded, with TID 745 == 11 746 747 qosctrl_15_8_tid12 748 749 Field only valid when Received_qos_data_tid_bitmap[12] 750 is set 751 752 753 754 QoS control field bits 15-8 of the last properly 755 received MPDU with a QoS control field embedded, with TID 756 == 12 757 758 qosctrl_15_8_tid13 759 760 Field only valid when Received_qos_data_tid_bitmap[13] 761 is set 762 763 764 765 QoS control field bits 15-8 of the last properly 766 received MPDU with a QoS control field embedded, with TID 767 == 13 768 769 qosctrl_15_8_tid14 770 771 Field only valid when Received_qos_data_tid_bitmap[14] 772 is set 773 774 775 776 QoS control field bits 15-8 of the last properly 777 received MPDU with a QoS control field embedded, with TID 778 == 14 779 780 qosctrl_15_8_tid15 781 782 Field only valid when Received_qos_data_tid_bitmap[15] 783 is set 784 785 786 787 QoS control field bits 15-8 of the last properly 788 received MPDU with a QoS control field embedded, with TID 789 == 15 790 791 mpdu_ok_byte_count 792 793 The number of bytes received within an MPDU for this 794 user with correct FCS. This includes the FCS field 795 796 797 798 NOTE: 799 800 The sum of the four fields..... 801 802 Mpdu_ok_byte_count + 803 804 mpdu_err_byte_count + 805 806 807 .....is the total number of bytes that were received for 808 this user from the PHY. 809 810 811 812 <legal all> 813 814 ampdu_delim_ok_count_6_0 815 816 Number of AMPDU delimiter received with correct 817 structure 818 819 LSB 7 bits from this counter 820 821 822 823 Note that this is a delimiter count and not byte count. 824 To get to the number of bytes occupied by these delimiters, 825 multiply this number by 4 826 827 828 829 <legal all> 830 831 ampdu_delim_err_count 832 833 The number of MPDU delimiter errors counted for this 834 user. 835 836 837 838 Note that this is a delimiter count and not byte count. 839 To get to the number of bytes occupied by these delimiters, 840 multiply this number by 4 841 842 <legal all> 843 844 ampdu_delim_ok_count_13_7 845 846 Number of AMPDU delimiters received with correct 847 structure 848 849 Bits 13-7 from this counter 850 851 852 853 Note that this is a delimiter count and not byte count. 854 To get to the number of bytes occupied by these delimiters, 855 multiply this number by 4 856 857 <legal all> 858 859 mpdu_err_byte_count 860 861 The number of bytes belonging to MPDUs with an FCS 862 error. This includes the FCS field. 863 864 865 866 <legal all> 867 868 ampdu_delim_ok_count_20_14 869 870 Number of AMPDU delimiters received with correct 871 structure 872 873 Bits 20-14 from this counter 874 875 876 877 Note that this is a delimiter count and not byte count. 878 To get to the number of bytes occupied by these delimiters, 879 multiply this number by 4 880 881 882 883 <legal all> 884 885 non_consecutive_delimiter_err 886 887 The number of times an MPDU delimiter error is detected 888 that is not immediately preceded by another MPDU delimiter 889 also with FCS error. 890 891 892 893 The counter saturates at 0xFFFF 894 895 896 897 <legal all> 898 899 reserved_20a 900 901 <legal 0> 902 903 ht_control_null_field 904 905 906 907 908 Last successfully received 909 HT_CONTROL/VHT_CONTROL/HE_CONTROL field from QoS Null frame 910 for this user. 911 912 <legal all> 913 */ 914 915 #define RX_PPDU_END_USER_STATS_0_RX_RXPCU_CLASSIFICATION_OVERVIEW_RXPCU_CLASSIFICATION_DETAILS_OFFSET 0x00000000 916 #define RX_PPDU_END_USER_STATS_0_RX_RXPCU_CLASSIFICATION_OVERVIEW_RXPCU_CLASSIFICATION_DETAILS_LSB 0 917 #define RX_PPDU_END_USER_STATS_0_RX_RXPCU_CLASSIFICATION_OVERVIEW_RXPCU_CLASSIFICATION_DETAILS_MASK 0xffffffff 918 919 /* Description RX_PPDU_END_USER_STATS_1_STA_FULL_AID 920 921 Consumer: FW 922 923 Producer: RXPCU 924 925 926 927 The full AID of this station. 928 929 930 931 <legal all> 932 */ 933 #define RX_PPDU_END_USER_STATS_1_STA_FULL_AID_OFFSET 0x00000004 934 #define RX_PPDU_END_USER_STATS_1_STA_FULL_AID_LSB 0 935 #define RX_PPDU_END_USER_STATS_1_STA_FULL_AID_MASK 0x00001fff 936 937 /* Description RX_PPDU_END_USER_STATS_1_MCS 938 939 MCS of the received frame 940 941 942 943 For details, refer to MCS_TYPE description 944 945 Note: This is rate in case of 11a/11b 946 947 948 949 <legal all> 950 */ 951 #define RX_PPDU_END_USER_STATS_1_MCS_OFFSET 0x00000004 952 #define RX_PPDU_END_USER_STATS_1_MCS_LSB 13 953 #define RX_PPDU_END_USER_STATS_1_MCS_MASK 0x0001e000 954 955 /* Description RX_PPDU_END_USER_STATS_1_NSS 956 957 Number of spatial streams. 958 959 960 961 NOTE: RXPCU derives this from the 'Mimo_ss_bitmap' 962 963 964 965 <enum 0 1_spatial_stream>Single spatial stream 966 967 <enum 1 2_spatial_streams>2 spatial streams 968 969 <enum 2 3_spatial_streams>3 spatial streams 970 971 <enum 3 4_spatial_streams>4 spatial streams 972 973 <enum 4 5_spatial_streams>5 spatial streams 974 975 <enum 5 6_spatial_streams>6 spatial streams 976 977 <enum 6 7_spatial_streams>7 spatial streams 978 979 <enum 7 8_spatial_streams>8 spatial streams 980 */ 981 #define RX_PPDU_END_USER_STATS_1_NSS_OFFSET 0x00000004 982 #define RX_PPDU_END_USER_STATS_1_NSS_LSB 17 983 #define RX_PPDU_END_USER_STATS_1_NSS_MASK 0x000e0000 984 985 /* Description RX_PPDU_END_USER_STATS_1_OFDMA_INFO_VALID 986 987 When set, ofdma RU related info in the following fields 988 is valid 989 990 <legal all> 991 */ 992 #define RX_PPDU_END_USER_STATS_1_OFDMA_INFO_VALID_OFFSET 0x00000004 993 #define RX_PPDU_END_USER_STATS_1_OFDMA_INFO_VALID_LSB 20 994 #define RX_PPDU_END_USER_STATS_1_OFDMA_INFO_VALID_MASK 0x00100000 995 996 /* Description RX_PPDU_END_USER_STATS_1_DL_OFDMA_RU_START_INDEX 997 998 Field only valid when Ofdma_info_valid is set 999 1000 1001 1002 RU index number to which User is assigned 1003 1004 RU numbering is over the entire BW, starting from 0 1005 1006 <legal 0-73> 1007 */ 1008 #define RX_PPDU_END_USER_STATS_1_DL_OFDMA_RU_START_INDEX_OFFSET 0x00000004 1009 #define RX_PPDU_END_USER_STATS_1_DL_OFDMA_RU_START_INDEX_LSB 21 1010 #define RX_PPDU_END_USER_STATS_1_DL_OFDMA_RU_START_INDEX_MASK 0x0fe00000 1011 1012 /* Description RX_PPDU_END_USER_STATS_1_RESERVED_1A 1013 1014 <legal 0> 1015 */ 1016 #define RX_PPDU_END_USER_STATS_1_RESERVED_1A_OFFSET 0x00000004 1017 #define RX_PPDU_END_USER_STATS_1_RESERVED_1A_LSB 28 1018 #define RX_PPDU_END_USER_STATS_1_RESERVED_1A_MASK 0xf0000000 1019 1020 /* Description RX_PPDU_END_USER_STATS_2_DL_OFDMA_RU_WIDTH 1021 1022 The size of the RU for this user. 1023 1024 In units of 1 (26 tone) RU 1025 1026 <legal 1-74> 1027 */ 1028 #define RX_PPDU_END_USER_STATS_2_DL_OFDMA_RU_WIDTH_OFFSET 0x00000008 1029 #define RX_PPDU_END_USER_STATS_2_DL_OFDMA_RU_WIDTH_LSB 0 1030 #define RX_PPDU_END_USER_STATS_2_DL_OFDMA_RU_WIDTH_MASK 0x0000007f 1031 1032 /* Description RX_PPDU_END_USER_STATS_2_RESERVED_2A 1033 1034 <legal 0> 1035 */ 1036 #define RX_PPDU_END_USER_STATS_2_RESERVED_2A_OFFSET 0x00000008 1037 #define RX_PPDU_END_USER_STATS_2_RESERVED_2A_LSB 7 1038 #define RX_PPDU_END_USER_STATS_2_RESERVED_2A_MASK 0x00000080 1039 1040 /* Description RX_PPDU_END_USER_STATS_2_USER_RECEIVE_QUALITY 1041 1042 RSSI / EVM for this user ??? 1043 1044 1045 1046 Details TBD 1047 1048 <legal all> 1049 */ 1050 #define RX_PPDU_END_USER_STATS_2_USER_RECEIVE_QUALITY_OFFSET 0x00000008 1051 #define RX_PPDU_END_USER_STATS_2_USER_RECEIVE_QUALITY_LSB 8 1052 #define RX_PPDU_END_USER_STATS_2_USER_RECEIVE_QUALITY_MASK 0x0000ff00 1053 1054 /* Description RX_PPDU_END_USER_STATS_2_MPDU_CNT_FCS_ERR 1055 1056 The number of MPDUs received from this STA in this PPDU 1057 with FCS errors 1058 1059 <legal all> 1060 */ 1061 #define RX_PPDU_END_USER_STATS_2_MPDU_CNT_FCS_ERR_OFFSET 0x00000008 1062 #define RX_PPDU_END_USER_STATS_2_MPDU_CNT_FCS_ERR_LSB 16 1063 #define RX_PPDU_END_USER_STATS_2_MPDU_CNT_FCS_ERR_MASK 0x03ff0000 1064 1065 /* Description RX_PPDU_END_USER_STATS_2_WBM2RXDMA_BUF_SOURCE_USED 1066 1067 Field filled in by RXDMA 1068 1069 1070 1071 When set, RXDMA has used the wbm2rxdma_buf ring as 1072 source for at least one of the frames in this PPDU. 1073 */ 1074 #define RX_PPDU_END_USER_STATS_2_WBM2RXDMA_BUF_SOURCE_USED_OFFSET 0x00000008 1075 #define RX_PPDU_END_USER_STATS_2_WBM2RXDMA_BUF_SOURCE_USED_LSB 26 1076 #define RX_PPDU_END_USER_STATS_2_WBM2RXDMA_BUF_SOURCE_USED_MASK 0x04000000 1077 1078 /* Description RX_PPDU_END_USER_STATS_2_FW2RXDMA_BUF_SOURCE_USED 1079 1080 Field filled in by RXDMA 1081 1082 1083 1084 When set, RXDMA has used the fw2rxdma_buf ring as source 1085 for at least one of the frames in this PPDU. 1086 */ 1087 #define RX_PPDU_END_USER_STATS_2_FW2RXDMA_BUF_SOURCE_USED_OFFSET 0x00000008 1088 #define RX_PPDU_END_USER_STATS_2_FW2RXDMA_BUF_SOURCE_USED_LSB 27 1089 #define RX_PPDU_END_USER_STATS_2_FW2RXDMA_BUF_SOURCE_USED_MASK 0x08000000 1090 1091 /* Description RX_PPDU_END_USER_STATS_2_SW2RXDMA_BUF_SOURCE_USED 1092 1093 Field filled in by RXDMA 1094 1095 1096 1097 When set, RXDMA has used the sw2rxdma_buf ring as source 1098 for at least one of the frames in this PPDU. 1099 */ 1100 #define RX_PPDU_END_USER_STATS_2_SW2RXDMA_BUF_SOURCE_USED_OFFSET 0x00000008 1101 #define RX_PPDU_END_USER_STATS_2_SW2RXDMA_BUF_SOURCE_USED_LSB 28 1102 #define RX_PPDU_END_USER_STATS_2_SW2RXDMA_BUF_SOURCE_USED_MASK 0x10000000 1103 1104 /* Description RX_PPDU_END_USER_STATS_2_RESERVED_2B 1105 1106 <legal 0> 1107 */ 1108 #define RX_PPDU_END_USER_STATS_2_RESERVED_2B_OFFSET 0x00000008 1109 #define RX_PPDU_END_USER_STATS_2_RESERVED_2B_LSB 29 1110 #define RX_PPDU_END_USER_STATS_2_RESERVED_2B_MASK 0xe0000000 1111 1112 /* Description RX_PPDU_END_USER_STATS_3_MPDU_CNT_FCS_OK 1113 1114 The number of MPDUs received from this STA in this PPDU 1115 with correct FCS 1116 1117 <legal all> 1118 */ 1119 #define RX_PPDU_END_USER_STATS_3_MPDU_CNT_FCS_OK_OFFSET 0x0000000c 1120 #define RX_PPDU_END_USER_STATS_3_MPDU_CNT_FCS_OK_LSB 0 1121 #define RX_PPDU_END_USER_STATS_3_MPDU_CNT_FCS_OK_MASK 0x000001ff 1122 1123 /* Description RX_PPDU_END_USER_STATS_3_FRAME_CONTROL_INFO_VALID 1124 1125 When set, the frame_control_info field contains valid 1126 information 1127 1128 <legal all> 1129 */ 1130 #define RX_PPDU_END_USER_STATS_3_FRAME_CONTROL_INFO_VALID_OFFSET 0x0000000c 1131 #define RX_PPDU_END_USER_STATS_3_FRAME_CONTROL_INFO_VALID_LSB 9 1132 #define RX_PPDU_END_USER_STATS_3_FRAME_CONTROL_INFO_VALID_MASK 0x00000200 1133 1134 /* Description RX_PPDU_END_USER_STATS_3_QOS_CONTROL_INFO_VALID 1135 1136 When set, the QoS_control_info field contains valid 1137 information 1138 1139 <legal all> 1140 */ 1141 #define RX_PPDU_END_USER_STATS_3_QOS_CONTROL_INFO_VALID_OFFSET 0x0000000c 1142 #define RX_PPDU_END_USER_STATS_3_QOS_CONTROL_INFO_VALID_LSB 10 1143 #define RX_PPDU_END_USER_STATS_3_QOS_CONTROL_INFO_VALID_MASK 0x00000400 1144 1145 /* Description RX_PPDU_END_USER_STATS_3_HT_CONTROL_INFO_VALID 1146 1147 When set, the HT_control_field contains valid 1148 information 1149 1150 <legal all> 1151 */ 1152 #define RX_PPDU_END_USER_STATS_3_HT_CONTROL_INFO_VALID_OFFSET 0x0000000c 1153 #define RX_PPDU_END_USER_STATS_3_HT_CONTROL_INFO_VALID_LSB 11 1154 #define RX_PPDU_END_USER_STATS_3_HT_CONTROL_INFO_VALID_MASK 0x00000800 1155 1156 /* Description RX_PPDU_END_USER_STATS_3_DATA_SEQUENCE_CONTROL_INFO_VALID 1157 1158 When set, the First_data_seq_ctrl field contains valid 1159 information 1160 1161 <legal all> 1162 */ 1163 #define RX_PPDU_END_USER_STATS_3_DATA_SEQUENCE_CONTROL_INFO_VALID_OFFSET 0x0000000c 1164 #define RX_PPDU_END_USER_STATS_3_DATA_SEQUENCE_CONTROL_INFO_VALID_LSB 12 1165 #define RX_PPDU_END_USER_STATS_3_DATA_SEQUENCE_CONTROL_INFO_VALID_MASK 0x00001000 1166 1167 /* Description RX_PPDU_END_USER_STATS_3_HT_CONTROL_INFO_NULL_VALID 1168 1169 When set, the HT_control_NULL_field contains valid 1170 information 1171 1172 <legal all> 1173 */ 1174 #define RX_PPDU_END_USER_STATS_3_HT_CONTROL_INFO_NULL_VALID_OFFSET 0x0000000c 1175 #define RX_PPDU_END_USER_STATS_3_HT_CONTROL_INFO_NULL_VALID_LSB 13 1176 #define RX_PPDU_END_USER_STATS_3_HT_CONTROL_INFO_NULL_VALID_MASK 0x00002000 1177 1178 /* Description RX_PPDU_END_USER_STATS_3_RESERVED_3A 1179 1180 <legal 0> 1181 */ 1182 #define RX_PPDU_END_USER_STATS_3_RESERVED_3A_OFFSET 0x0000000c 1183 #define RX_PPDU_END_USER_STATS_3_RESERVED_3A_LSB 14 1184 #define RX_PPDU_END_USER_STATS_3_RESERVED_3A_MASK 0x0000c000 1185 1186 /* Description RX_PPDU_END_USER_STATS_3_RXDMA2REO_RING_USED 1187 1188 Field filled in by RXDMA 1189 1190 1191 1192 Set when at least one frame during this PPDU got pushed 1193 to this ring by RXDMA 1194 */ 1195 #define RX_PPDU_END_USER_STATS_3_RXDMA2REO_RING_USED_OFFSET 0x0000000c 1196 #define RX_PPDU_END_USER_STATS_3_RXDMA2REO_RING_USED_LSB 16 1197 #define RX_PPDU_END_USER_STATS_3_RXDMA2REO_RING_USED_MASK 0x00010000 1198 1199 /* Description RX_PPDU_END_USER_STATS_3_RXDMA2FW_RING_USED 1200 1201 Field filled in by RXDMA 1202 1203 1204 1205 Set when at least one frame during this PPDU got pushed 1206 to this ring by RXDMA 1207 */ 1208 #define RX_PPDU_END_USER_STATS_3_RXDMA2FW_RING_USED_OFFSET 0x0000000c 1209 #define RX_PPDU_END_USER_STATS_3_RXDMA2FW_RING_USED_LSB 17 1210 #define RX_PPDU_END_USER_STATS_3_RXDMA2FW_RING_USED_MASK 0x00020000 1211 1212 /* Description RX_PPDU_END_USER_STATS_3_RXDMA2SW_RING_USED 1213 1214 Field filled in by RXDMA 1215 1216 1217 1218 Set when at least one frame during this PPDU got pushed 1219 to this ring by RXDMA 1220 */ 1221 #define RX_PPDU_END_USER_STATS_3_RXDMA2SW_RING_USED_OFFSET 0x0000000c 1222 #define RX_PPDU_END_USER_STATS_3_RXDMA2SW_RING_USED_LSB 18 1223 #define RX_PPDU_END_USER_STATS_3_RXDMA2SW_RING_USED_MASK 0x00040000 1224 1225 /* Description RX_PPDU_END_USER_STATS_3_RXDMA_RELEASE_RING_USED 1226 1227 Field filled in by RXDMA 1228 1229 1230 1231 Set when at least one frame during this PPDU got pushed 1232 to this ring by RXDMA 1233 */ 1234 #define RX_PPDU_END_USER_STATS_3_RXDMA_RELEASE_RING_USED_OFFSET 0x0000000c 1235 #define RX_PPDU_END_USER_STATS_3_RXDMA_RELEASE_RING_USED_LSB 19 1236 #define RX_PPDU_END_USER_STATS_3_RXDMA_RELEASE_RING_USED_MASK 0x00080000 1237 1238 /* Description RX_PPDU_END_USER_STATS_3_HT_CONTROL_FIELD_PKT_TYPE 1239 1240 Field only valid when HT_control_info_valid or 1241 HT_control_info_NULL_valid is set. 1242 1243 1244 1245 Indicates what the PHY receive type was for receiving 1246 this frame. Can help determine if the HT_CONTROL field shall 1247 be interpreted as HT/VHT or HE. 1248 1249 1250 1251 NOTE: later on in the 11ax IEEE spec a bit within the HT 1252 control field was introduced that explicitly indicated how 1253 to interpret the HT control field.... As HT, VHT, or HE. 1254 1255 1256 1257 <enum 0 dot11a>802.11a PPDU type 1258 1259 <enum 1 dot11b>802.11b PPDU type 1260 1261 <enum 2 dot11n_mm>802.11n Mixed Mode PPDU type 1262 1263 <enum 3 dot11ac>802.11ac PPDU type 1264 1265 <enum 4 dot11ax>802.11ax PPDU type 1266 */ 1267 #define RX_PPDU_END_USER_STATS_3_HT_CONTROL_FIELD_PKT_TYPE_OFFSET 0x0000000c 1268 #define RX_PPDU_END_USER_STATS_3_HT_CONTROL_FIELD_PKT_TYPE_LSB 20 1269 #define RX_PPDU_END_USER_STATS_3_HT_CONTROL_FIELD_PKT_TYPE_MASK 0x00f00000 1270 1271 /* Description RX_PPDU_END_USER_STATS_3_RESERVED_3B 1272 1273 <legal 0> 1274 */ 1275 #define RX_PPDU_END_USER_STATS_3_RESERVED_3B_OFFSET 0x0000000c 1276 #define RX_PPDU_END_USER_STATS_3_RESERVED_3B_LSB 24 1277 #define RX_PPDU_END_USER_STATS_3_RESERVED_3B_MASK 0xff000000 1278 1279 /* Description RX_PPDU_END_USER_STATS_4_AST_INDEX 1280 1281 This field indicates the index of the AST entry 1282 corresponding to this MPDU. It is provided by the GSE module 1283 instantiated in RXPCU. 1284 1285 A value of 0xFFFF indicates an invalid AST index, 1286 meaning that No AST entry was found or NO AST search was 1287 performed 1288 1289 <legal all> 1290 */ 1291 #define RX_PPDU_END_USER_STATS_4_AST_INDEX_OFFSET 0x00000010 1292 #define RX_PPDU_END_USER_STATS_4_AST_INDEX_LSB 0 1293 #define RX_PPDU_END_USER_STATS_4_AST_INDEX_MASK 0x0000ffff 1294 1295 /* Description RX_PPDU_END_USER_STATS_4_FRAME_CONTROL_FIELD 1296 1297 Field only valid when Frame_control_info_valid is set. 1298 1299 1300 1301 Last successfully received Frame_control field of data 1302 frame (excluding Data NULL/ QoS Null) for this user 1303 1304 Mainly used to track the PM state of the transmitted 1305 device 1306 1307 1308 1309 NOTE: only data frame info is needed, as control and 1310 management frames are already routed to the FW. 1311 1312 <legal all> 1313 */ 1314 #define RX_PPDU_END_USER_STATS_4_FRAME_CONTROL_FIELD_OFFSET 0x00000010 1315 #define RX_PPDU_END_USER_STATS_4_FRAME_CONTROL_FIELD_LSB 16 1316 #define RX_PPDU_END_USER_STATS_4_FRAME_CONTROL_FIELD_MASK 0xffff0000 1317 1318 /* Description RX_PPDU_END_USER_STATS_5_FIRST_DATA_SEQ_CTRL 1319 1320 Field only valid when Data_sequence_control_info_valid 1321 is set. 1322 1323 1324 1325 Sequence control field of the first data frame 1326 (excluding Data NULL or QoS Data null) received for this 1327 user with correct FCS 1328 1329 1330 1331 NOTE: only data frame info is needed, as control and 1332 management frames are already routed to the FW. 1333 1334 <legal all> 1335 */ 1336 #define RX_PPDU_END_USER_STATS_5_FIRST_DATA_SEQ_CTRL_OFFSET 0x00000014 1337 #define RX_PPDU_END_USER_STATS_5_FIRST_DATA_SEQ_CTRL_LSB 0 1338 #define RX_PPDU_END_USER_STATS_5_FIRST_DATA_SEQ_CTRL_MASK 0x0000ffff 1339 1340 /* Description RX_PPDU_END_USER_STATS_5_QOS_CONTROL_FIELD 1341 1342 Field only valid when QoS_control_info_valid is set. 1343 1344 1345 1346 Last successfully received QoS_control field of data 1347 frame (excluding Data NULL/ QoS Null) for this user 1348 1349 1350 1351 Note that in case of multi TID, this field can only 1352 reflect the last properly received MPDU, and thus can not 1353 indicate all potentially different TIDs that had been 1354 received earlier. 1355 1356 1357 1358 There are however per TID fields, that will contain 1359 among other things all buffer status info: See 1360 1361 QoSCtrl_15_8_tid??? 1362 1363 <legal all> 1364 */ 1365 #define RX_PPDU_END_USER_STATS_5_QOS_CONTROL_FIELD_OFFSET 0x00000014 1366 #define RX_PPDU_END_USER_STATS_5_QOS_CONTROL_FIELD_LSB 16 1367 #define RX_PPDU_END_USER_STATS_5_QOS_CONTROL_FIELD_MASK 0xffff0000 1368 1369 /* Description RX_PPDU_END_USER_STATS_6_HT_CONTROL_FIELD 1370 1371 Field only valid when HT_control_info_valid is set. 1372 1373 1374 1375 Last successfully received 1376 HT_CONTROL/VHT_CONTROL/HE_CONTROL field of data frames, 1377 excluding QoS Null frames for this user. 1378 1379 1380 1381 NOTE: HT control fields from QoS Null frames are 1382 captured in field HT_control_NULL_field 1383 1384 <legal all> 1385 */ 1386 #define RX_PPDU_END_USER_STATS_6_HT_CONTROL_FIELD_OFFSET 0x00000018 1387 #define RX_PPDU_END_USER_STATS_6_HT_CONTROL_FIELD_LSB 0 1388 #define RX_PPDU_END_USER_STATS_6_HT_CONTROL_FIELD_MASK 0xffffffff 1389 1390 /* Description RX_PPDU_END_USER_STATS_7_FCS_OK_BITMAP_31_0 1391 1392 Bitmap indicates in order of received MPDUs, which MPDUs 1393 had an passing FCS or had an error. 1394 1395 1: FCS OK 1396 1397 0: FCS error 1398 1399 <legal all> 1400 */ 1401 #define RX_PPDU_END_USER_STATS_7_FCS_OK_BITMAP_31_0_OFFSET 0x0000001c 1402 #define RX_PPDU_END_USER_STATS_7_FCS_OK_BITMAP_31_0_LSB 0 1403 #define RX_PPDU_END_USER_STATS_7_FCS_OK_BITMAP_31_0_MASK 0xffffffff 1404 1405 /* Description RX_PPDU_END_USER_STATS_8_FCS_OK_BITMAP_63_32 1406 1407 Bitmap indicates in order of received MPDUs, which MPDUs 1408 had an passing FCS or had an error. 1409 1410 1: FCS OK 1411 1412 0: FCS error 1413 1414 1415 1416 NOTE: for users 0, 1, 2 and 3, additional bitmap info 1417 (up to 256 bitmap window) is provided in 1418 RX_PPDU_END_USER_STATS_EXT TLV 1419 1420 <legal all> 1421 */ 1422 #define RX_PPDU_END_USER_STATS_8_FCS_OK_BITMAP_63_32_OFFSET 0x00000020 1423 #define RX_PPDU_END_USER_STATS_8_FCS_OK_BITMAP_63_32_LSB 0 1424 #define RX_PPDU_END_USER_STATS_8_FCS_OK_BITMAP_63_32_MASK 0xffffffff 1425 1426 /* Description RX_PPDU_END_USER_STATS_9_UDP_MSDU_COUNT 1427 1428 Field filled in by RX OLE 1429 1430 Set to 0 by RXPCU 1431 1432 1433 1434 The number of MSDUs that are part of MPDUs without FCS 1435 error, that contain UDP frames. 1436 1437 <legal all> 1438 */ 1439 #define RX_PPDU_END_USER_STATS_9_UDP_MSDU_COUNT_OFFSET 0x00000024 1440 #define RX_PPDU_END_USER_STATS_9_UDP_MSDU_COUNT_LSB 0 1441 #define RX_PPDU_END_USER_STATS_9_UDP_MSDU_COUNT_MASK 0x0000ffff 1442 1443 /* Description RX_PPDU_END_USER_STATS_9_TCP_MSDU_COUNT 1444 1445 Field filled in by RX OLE 1446 1447 Set to 0 by RXPCU 1448 1449 1450 1451 The number of MSDUs that are part of MPDUs without FCS 1452 error, that contain TCP frames. 1453 1454 1455 1456 (Note: This does NOT include TCP-ACK) 1457 1458 <legal all> 1459 */ 1460 #define RX_PPDU_END_USER_STATS_9_TCP_MSDU_COUNT_OFFSET 0x00000024 1461 #define RX_PPDU_END_USER_STATS_9_TCP_MSDU_COUNT_LSB 16 1462 #define RX_PPDU_END_USER_STATS_9_TCP_MSDU_COUNT_MASK 0xffff0000 1463 1464 /* Description RX_PPDU_END_USER_STATS_10_OTHER_MSDU_COUNT 1465 1466 Field filled in by RX OLE 1467 1468 Set to 0 by RXPCU 1469 1470 1471 1472 The number of MSDUs that are part of MPDUs without FCS 1473 error, that contain neither UDP or TCP frames. 1474 1475 1476 1477 Includes Management and control frames. 1478 1479 1480 1481 <legal all> 1482 */ 1483 #define RX_PPDU_END_USER_STATS_10_OTHER_MSDU_COUNT_OFFSET 0x00000028 1484 #define RX_PPDU_END_USER_STATS_10_OTHER_MSDU_COUNT_LSB 0 1485 #define RX_PPDU_END_USER_STATS_10_OTHER_MSDU_COUNT_MASK 0x0000ffff 1486 1487 /* Description RX_PPDU_END_USER_STATS_10_TCP_ACK_MSDU_COUNT 1488 1489 Field filled in by RX OLE 1490 1491 Set to 0 by RXPCU 1492 1493 1494 1495 The number of MSDUs that are part of MPDUs without FCS 1496 error, that contain TCP ack frames. 1497 1498 <legal all> 1499 */ 1500 #define RX_PPDU_END_USER_STATS_10_TCP_ACK_MSDU_COUNT_OFFSET 0x00000028 1501 #define RX_PPDU_END_USER_STATS_10_TCP_ACK_MSDU_COUNT_LSB 16 1502 #define RX_PPDU_END_USER_STATS_10_TCP_ACK_MSDU_COUNT_MASK 0xffff0000 1503 1504 /* Description RX_PPDU_END_USER_STATS_11_SW_RESPONSE_REFERENCE_PTR 1505 1506 Pointer that SW uses to refer back to an expected 1507 response reception. Used for Rate adaptation purposes. 1508 1509 When a reception occurrs that is not tied to an expected 1510 response, this field is set to 0x0 1511 1512 <legal all> 1513 */ 1514 #define RX_PPDU_END_USER_STATS_11_SW_RESPONSE_REFERENCE_PTR_OFFSET 0x0000002c 1515 #define RX_PPDU_END_USER_STATS_11_SW_RESPONSE_REFERENCE_PTR_LSB 0 1516 #define RX_PPDU_END_USER_STATS_11_SW_RESPONSE_REFERENCE_PTR_MASK 0xffffffff 1517 1518 /* Description RX_PPDU_END_USER_STATS_12_RECEIVED_QOS_DATA_TID_BITMAP 1519 1520 Whenever a frame is received that contains a QoS control 1521 field (that includes QoS Data and/or QoS Null), the bit in 1522 this field that corresponds to the received TID shall be 1523 set. 1524 1525 ...Bitmap[0] = TID0 1526 1527 ...Bitmap[1] = TID1 1528 1529 Etc. 1530 1531 <legal all> 1532 */ 1533 #define RX_PPDU_END_USER_STATS_12_RECEIVED_QOS_DATA_TID_BITMAP_OFFSET 0x00000030 1534 #define RX_PPDU_END_USER_STATS_12_RECEIVED_QOS_DATA_TID_BITMAP_LSB 0 1535 #define RX_PPDU_END_USER_STATS_12_RECEIVED_QOS_DATA_TID_BITMAP_MASK 0x0000ffff 1536 1537 /* Description RX_PPDU_END_USER_STATS_12_RECEIVED_QOS_DATA_TID_EOSP_BITMAP 1538 1539 Field initialized to 0 1540 1541 For every QoS Data frame that is correctly received, the 1542 EOSP bit of that frame is copied over into the corresponding 1543 TID related field. 1544 1545 Note that this implies that the bits here represent the 1546 EOSP bit status for each TID of the last MPDU received for 1547 that TID. 1548 1549 1550 1551 received TID shall be set. 1552 1553 ...eosp_bitmap[0] = eosp of TID0 1554 1555 ...eosp_bitmap[1] = eosp of TID1 1556 1557 Etc. 1558 1559 <legal all> 1560 */ 1561 #define RX_PPDU_END_USER_STATS_12_RECEIVED_QOS_DATA_TID_EOSP_BITMAP_OFFSET 0x00000030 1562 #define RX_PPDU_END_USER_STATS_12_RECEIVED_QOS_DATA_TID_EOSP_BITMAP_LSB 16 1563 #define RX_PPDU_END_USER_STATS_12_RECEIVED_QOS_DATA_TID_EOSP_BITMAP_MASK 0xffff0000 1564 1565 /* Description RX_PPDU_END_USER_STATS_13_QOSCTRL_15_8_TID0 1566 1567 Field only valid when Received_qos_data_tid_bitmap[0] is 1568 set 1569 1570 1571 1572 QoS control field bits 15-8 of the last properly 1573 received MPDU with a QoS control field embedded, with TID 1574 == 0 1575 */ 1576 #define RX_PPDU_END_USER_STATS_13_QOSCTRL_15_8_TID0_OFFSET 0x00000034 1577 #define RX_PPDU_END_USER_STATS_13_QOSCTRL_15_8_TID0_LSB 0 1578 #define RX_PPDU_END_USER_STATS_13_QOSCTRL_15_8_TID0_MASK 0x000000ff 1579 1580 /* Description RX_PPDU_END_USER_STATS_13_QOSCTRL_15_8_TID1 1581 1582 Field only valid when Received_qos_data_tid_bitmap[1] is 1583 set 1584 1585 1586 1587 QoS control field bits 15-8 of the last properly 1588 received MPDU with a QoS control field embedded, with TID 1589 == 1 1590 */ 1591 #define RX_PPDU_END_USER_STATS_13_QOSCTRL_15_8_TID1_OFFSET 0x00000034 1592 #define RX_PPDU_END_USER_STATS_13_QOSCTRL_15_8_TID1_LSB 8 1593 #define RX_PPDU_END_USER_STATS_13_QOSCTRL_15_8_TID1_MASK 0x0000ff00 1594 1595 /* Description RX_PPDU_END_USER_STATS_13_QOSCTRL_15_8_TID2 1596 1597 Field only valid when Received_qos_data_tid_bitmap[2] is 1598 set 1599 1600 1601 1602 QoS control field bits 15-8 of the last properly 1603 received MPDU with a QoS control field embedded, with TID 1604 == 2 1605 */ 1606 #define RX_PPDU_END_USER_STATS_13_QOSCTRL_15_8_TID2_OFFSET 0x00000034 1607 #define RX_PPDU_END_USER_STATS_13_QOSCTRL_15_8_TID2_LSB 16 1608 #define RX_PPDU_END_USER_STATS_13_QOSCTRL_15_8_TID2_MASK 0x00ff0000 1609 1610 /* Description RX_PPDU_END_USER_STATS_13_QOSCTRL_15_8_TID3 1611 1612 Field only valid when Received_qos_data_tid_bitmap[3] is 1613 set 1614 1615 1616 1617 QoS control field bits 15-8 of the last properly 1618 received MPDU with a QoS control field embedded, with TID 1619 == 3 1620 */ 1621 #define RX_PPDU_END_USER_STATS_13_QOSCTRL_15_8_TID3_OFFSET 0x00000034 1622 #define RX_PPDU_END_USER_STATS_13_QOSCTRL_15_8_TID3_LSB 24 1623 #define RX_PPDU_END_USER_STATS_13_QOSCTRL_15_8_TID3_MASK 0xff000000 1624 1625 /* Description RX_PPDU_END_USER_STATS_14_QOSCTRL_15_8_TID4 1626 1627 Field only valid when Received_qos_data_tid_bitmap[4] is 1628 set 1629 1630 1631 1632 QoS control field bits 15-8 of the last properly 1633 received MPDU with a QoS control field embedded, with TID 1634 == 4 1635 */ 1636 #define RX_PPDU_END_USER_STATS_14_QOSCTRL_15_8_TID4_OFFSET 0x00000038 1637 #define RX_PPDU_END_USER_STATS_14_QOSCTRL_15_8_TID4_LSB 0 1638 #define RX_PPDU_END_USER_STATS_14_QOSCTRL_15_8_TID4_MASK 0x000000ff 1639 1640 /* Description RX_PPDU_END_USER_STATS_14_QOSCTRL_15_8_TID5 1641 1642 Field only valid when Received_qos_data_tid_bitmap[5] is 1643 set 1644 1645 1646 1647 QoS control field bits 15-8 of the last properly 1648 received MPDU with a QoS control field embedded, with TID 1649 == 5 1650 */ 1651 #define RX_PPDU_END_USER_STATS_14_QOSCTRL_15_8_TID5_OFFSET 0x00000038 1652 #define RX_PPDU_END_USER_STATS_14_QOSCTRL_15_8_TID5_LSB 8 1653 #define RX_PPDU_END_USER_STATS_14_QOSCTRL_15_8_TID5_MASK 0x0000ff00 1654 1655 /* Description RX_PPDU_END_USER_STATS_14_QOSCTRL_15_8_TID6 1656 1657 Field only valid when Received_qos_data_tid_bitmap[6] is 1658 set 1659 1660 1661 1662 QoS control field bits 15-8 of the last properly 1663 received MPDU with a QoS control field embedded, with TID 1664 == 6 1665 */ 1666 #define RX_PPDU_END_USER_STATS_14_QOSCTRL_15_8_TID6_OFFSET 0x00000038 1667 #define RX_PPDU_END_USER_STATS_14_QOSCTRL_15_8_TID6_LSB 16 1668 #define RX_PPDU_END_USER_STATS_14_QOSCTRL_15_8_TID6_MASK 0x00ff0000 1669 1670 /* Description RX_PPDU_END_USER_STATS_14_QOSCTRL_15_8_TID7 1671 1672 Field only valid when Received_qos_data_tid_bitmap[7] is 1673 set 1674 1675 1676 1677 QoS control field bits 15-8 of the last properly 1678 received MPDU with a QoS control field embedded, with TID 1679 == 7 1680 */ 1681 #define RX_PPDU_END_USER_STATS_14_QOSCTRL_15_8_TID7_OFFSET 0x00000038 1682 #define RX_PPDU_END_USER_STATS_14_QOSCTRL_15_8_TID7_LSB 24 1683 #define RX_PPDU_END_USER_STATS_14_QOSCTRL_15_8_TID7_MASK 0xff000000 1684 1685 /* Description RX_PPDU_END_USER_STATS_15_QOSCTRL_15_8_TID8 1686 1687 Field only valid when Received_qos_data_tid_bitmap[8] is 1688 set 1689 1690 1691 1692 QoS control field bits 15-8 of the last properly 1693 received MPDU with a QoS control field embedded, with TID 1694 == 8 1695 */ 1696 #define RX_PPDU_END_USER_STATS_15_QOSCTRL_15_8_TID8_OFFSET 0x0000003c 1697 #define RX_PPDU_END_USER_STATS_15_QOSCTRL_15_8_TID8_LSB 0 1698 #define RX_PPDU_END_USER_STATS_15_QOSCTRL_15_8_TID8_MASK 0x000000ff 1699 1700 /* Description RX_PPDU_END_USER_STATS_15_QOSCTRL_15_8_TID9 1701 1702 Field only valid when Received_qos_data_tid_bitmap[9] is 1703 set 1704 1705 1706 1707 QoS control field bits 15-8 of the last properly 1708 received MPDU with a QoS control field embedded, with TID 1709 == 9 1710 */ 1711 #define RX_PPDU_END_USER_STATS_15_QOSCTRL_15_8_TID9_OFFSET 0x0000003c 1712 #define RX_PPDU_END_USER_STATS_15_QOSCTRL_15_8_TID9_LSB 8 1713 #define RX_PPDU_END_USER_STATS_15_QOSCTRL_15_8_TID9_MASK 0x0000ff00 1714 1715 /* Description RX_PPDU_END_USER_STATS_15_QOSCTRL_15_8_TID10 1716 1717 Field only valid when Received_qos_data_tid_bitmap[10] 1718 is set 1719 1720 1721 1722 QoS control field bits 15-8 of the last properly 1723 received MPDU with a QoS control field embedded, with TID 1724 == 10 1725 */ 1726 #define RX_PPDU_END_USER_STATS_15_QOSCTRL_15_8_TID10_OFFSET 0x0000003c 1727 #define RX_PPDU_END_USER_STATS_15_QOSCTRL_15_8_TID10_LSB 16 1728 #define RX_PPDU_END_USER_STATS_15_QOSCTRL_15_8_TID10_MASK 0x00ff0000 1729 1730 /* Description RX_PPDU_END_USER_STATS_15_QOSCTRL_15_8_TID11 1731 1732 Field only valid when Received_qos_data_tid_bitmap[11] 1733 is set 1734 1735 1736 1737 QoS control field bits 15-8 of the last properly 1738 received MPDU with a QoS control field embedded, with TID 1739 == 11 1740 */ 1741 #define RX_PPDU_END_USER_STATS_15_QOSCTRL_15_8_TID11_OFFSET 0x0000003c 1742 #define RX_PPDU_END_USER_STATS_15_QOSCTRL_15_8_TID11_LSB 24 1743 #define RX_PPDU_END_USER_STATS_15_QOSCTRL_15_8_TID11_MASK 0xff000000 1744 1745 /* Description RX_PPDU_END_USER_STATS_16_QOSCTRL_15_8_TID12 1746 1747 Field only valid when Received_qos_data_tid_bitmap[12] 1748 is set 1749 1750 1751 1752 QoS control field bits 15-8 of the last properly 1753 received MPDU with a QoS control field embedded, with TID 1754 == 12 1755 */ 1756 #define RX_PPDU_END_USER_STATS_16_QOSCTRL_15_8_TID12_OFFSET 0x00000040 1757 #define RX_PPDU_END_USER_STATS_16_QOSCTRL_15_8_TID12_LSB 0 1758 #define RX_PPDU_END_USER_STATS_16_QOSCTRL_15_8_TID12_MASK 0x000000ff 1759 1760 /* Description RX_PPDU_END_USER_STATS_16_QOSCTRL_15_8_TID13 1761 1762 Field only valid when Received_qos_data_tid_bitmap[13] 1763 is set 1764 1765 1766 1767 QoS control field bits 15-8 of the last properly 1768 received MPDU with a QoS control field embedded, with TID 1769 == 13 1770 */ 1771 #define RX_PPDU_END_USER_STATS_16_QOSCTRL_15_8_TID13_OFFSET 0x00000040 1772 #define RX_PPDU_END_USER_STATS_16_QOSCTRL_15_8_TID13_LSB 8 1773 #define RX_PPDU_END_USER_STATS_16_QOSCTRL_15_8_TID13_MASK 0x0000ff00 1774 1775 /* Description RX_PPDU_END_USER_STATS_16_QOSCTRL_15_8_TID14 1776 1777 Field only valid when Received_qos_data_tid_bitmap[14] 1778 is set 1779 1780 1781 1782 QoS control field bits 15-8 of the last properly 1783 received MPDU with a QoS control field embedded, with TID 1784 == 14 1785 */ 1786 #define RX_PPDU_END_USER_STATS_16_QOSCTRL_15_8_TID14_OFFSET 0x00000040 1787 #define RX_PPDU_END_USER_STATS_16_QOSCTRL_15_8_TID14_LSB 16 1788 #define RX_PPDU_END_USER_STATS_16_QOSCTRL_15_8_TID14_MASK 0x00ff0000 1789 1790 /* Description RX_PPDU_END_USER_STATS_16_QOSCTRL_15_8_TID15 1791 1792 Field only valid when Received_qos_data_tid_bitmap[15] 1793 is set 1794 1795 1796 1797 QoS control field bits 15-8 of the last properly 1798 received MPDU with a QoS control field embedded, with TID 1799 == 15 1800 */ 1801 #define RX_PPDU_END_USER_STATS_16_QOSCTRL_15_8_TID15_OFFSET 0x00000040 1802 #define RX_PPDU_END_USER_STATS_16_QOSCTRL_15_8_TID15_LSB 24 1803 #define RX_PPDU_END_USER_STATS_16_QOSCTRL_15_8_TID15_MASK 0xff000000 1804 1805 /* Description RX_PPDU_END_USER_STATS_17_MPDU_OK_BYTE_COUNT 1806 1807 The number of bytes received within an MPDU for this 1808 user with correct FCS. This includes the FCS field 1809 1810 1811 1812 NOTE: 1813 1814 The sum of the four fields..... 1815 1816 Mpdu_ok_byte_count + 1817 1818 mpdu_err_byte_count + 1819 1820 1821 .....is the total number of bytes that were received for 1822 this user from the PHY. 1823 1824 1825 1826 <legal all> 1827 */ 1828 #define RX_PPDU_END_USER_STATS_17_MPDU_OK_BYTE_COUNT_OFFSET 0x00000044 1829 #define RX_PPDU_END_USER_STATS_17_MPDU_OK_BYTE_COUNT_LSB 0 1830 #define RX_PPDU_END_USER_STATS_17_MPDU_OK_BYTE_COUNT_MASK 0x01ffffff 1831 1832 /* Description RX_PPDU_END_USER_STATS_17_AMPDU_DELIM_OK_COUNT_6_0 1833 1834 Number of AMPDU delimiter received with correct 1835 structure 1836 1837 LSB 7 bits from this counter 1838 1839 1840 1841 Note that this is a delimiter count and not byte count. 1842 To get to the number of bytes occupied by these delimiters, 1843 multiply this number by 4 1844 1845 1846 1847 <legal all> 1848 */ 1849 #define RX_PPDU_END_USER_STATS_17_AMPDU_DELIM_OK_COUNT_6_0_OFFSET 0x00000044 1850 #define RX_PPDU_END_USER_STATS_17_AMPDU_DELIM_OK_COUNT_6_0_LSB 25 1851 #define RX_PPDU_END_USER_STATS_17_AMPDU_DELIM_OK_COUNT_6_0_MASK 0xfe000000 1852 1853 /* Description RX_PPDU_END_USER_STATS_18_AMPDU_DELIM_ERR_COUNT 1854 1855 The number of MPDU delimiter errors counted for this 1856 user. 1857 1858 1859 1860 Note that this is a delimiter count and not byte count. 1861 To get to the number of bytes occupied by these delimiters, 1862 multiply this number by 4 1863 1864 <legal all> 1865 */ 1866 #define RX_PPDU_END_USER_STATS_18_AMPDU_DELIM_ERR_COUNT_OFFSET 0x00000048 1867 #define RX_PPDU_END_USER_STATS_18_AMPDU_DELIM_ERR_COUNT_LSB 0 1868 #define RX_PPDU_END_USER_STATS_18_AMPDU_DELIM_ERR_COUNT_MASK 0x01ffffff 1869 1870 /* Description RX_PPDU_END_USER_STATS_18_AMPDU_DELIM_OK_COUNT_13_7 1871 1872 Number of AMPDU delimiters received with correct 1873 structure 1874 1875 Bits 13-7 from this counter 1876 1877 1878 1879 Note that this is a delimiter count and not byte count. 1880 To get to the number of bytes occupied by these delimiters, 1881 multiply this number by 4 1882 1883 <legal all> 1884 */ 1885 #define RX_PPDU_END_USER_STATS_18_AMPDU_DELIM_OK_COUNT_13_7_OFFSET 0x00000048 1886 #define RX_PPDU_END_USER_STATS_18_AMPDU_DELIM_OK_COUNT_13_7_LSB 25 1887 #define RX_PPDU_END_USER_STATS_18_AMPDU_DELIM_OK_COUNT_13_7_MASK 0xfe000000 1888 1889 /* Description RX_PPDU_END_USER_STATS_19_MPDU_ERR_BYTE_COUNT 1890 1891 The number of bytes belonging to MPDUs with an FCS 1892 error. This includes the FCS field. 1893 1894 1895 1896 <legal all> 1897 */ 1898 #define RX_PPDU_END_USER_STATS_19_MPDU_ERR_BYTE_COUNT_OFFSET 0x0000004c 1899 #define RX_PPDU_END_USER_STATS_19_MPDU_ERR_BYTE_COUNT_LSB 0 1900 #define RX_PPDU_END_USER_STATS_19_MPDU_ERR_BYTE_COUNT_MASK 0x01ffffff 1901 1902 /* Description RX_PPDU_END_USER_STATS_19_AMPDU_DELIM_OK_COUNT_20_14 1903 1904 Number of AMPDU delimiters received with correct 1905 structure 1906 1907 Bits 20-14 from this counter 1908 1909 1910 1911 Note that this is a delimiter count and not byte count. 1912 To get to the number of bytes occupied by these delimiters, 1913 multiply this number by 4 1914 1915 1916 1917 <legal all> 1918 */ 1919 #define RX_PPDU_END_USER_STATS_19_AMPDU_DELIM_OK_COUNT_20_14_OFFSET 0x0000004c 1920 #define RX_PPDU_END_USER_STATS_19_AMPDU_DELIM_OK_COUNT_20_14_LSB 25 1921 #define RX_PPDU_END_USER_STATS_19_AMPDU_DELIM_OK_COUNT_20_14_MASK 0xfe000000 1922 1923 /* Description RX_PPDU_END_USER_STATS_20_NON_CONSECUTIVE_DELIMITER_ERR 1924 1925 The number of times an MPDU delimiter error is detected 1926 that is not immediately preceded by another MPDU delimiter 1927 also with FCS error. 1928 1929 1930 1931 The counter saturates at 0xFFFF 1932 1933 1934 1935 <legal all> 1936 */ 1937 #define RX_PPDU_END_USER_STATS_20_NON_CONSECUTIVE_DELIMITER_ERR_OFFSET 0x00000050 1938 #define RX_PPDU_END_USER_STATS_20_NON_CONSECUTIVE_DELIMITER_ERR_LSB 0 1939 #define RX_PPDU_END_USER_STATS_20_NON_CONSECUTIVE_DELIMITER_ERR_MASK 0x0000ffff 1940 1941 /* Description RX_PPDU_END_USER_STATS_20_RESERVED_20A 1942 1943 <legal 0> 1944 */ 1945 #define RX_PPDU_END_USER_STATS_20_RESERVED_20A_OFFSET 0x00000050 1946 #define RX_PPDU_END_USER_STATS_20_RESERVED_20A_LSB 16 1947 #define RX_PPDU_END_USER_STATS_20_RESERVED_20A_MASK 0xffff0000 1948 1949 /* Description RX_PPDU_END_USER_STATS_21_HT_CONTROL_NULL_FIELD 1950 1951 1952 1953 1954 Last successfully received 1955 HT_CONTROL/VHT_CONTROL/HE_CONTROL field from QoS Null frame 1956 for this user. 1957 1958 <legal all> 1959 */ 1960 #define RX_PPDU_END_USER_STATS_21_HT_CONTROL_NULL_FIELD_OFFSET 0x00000054 1961 #define RX_PPDU_END_USER_STATS_21_HT_CONTROL_NULL_FIELD_LSB 0 1962 #define RX_PPDU_END_USER_STATS_21_HT_CONTROL_NULL_FIELD_MASK 0xffffffff 1963 1964 1965 #endif // _RX_PPDU_END_USER_STATS_H_ 1966