1 /*
2  * Copyright (c) 2016-2018 The Linux Foundation. All rights reserved.
3  *
4  * Permission to use, copy, modify, and/or distribute this software for
5  * any purpose with or without fee is hereby granted, provided that the
6  * above copyright notice and this permission notice appear in all
7  * copies.
8  *
9  * THE SOFTWARE IS PROVIDED "AS IS" AND THE AUTHOR DISCLAIMS ALL
10  * WARRANTIES WITH REGARD TO THIS SOFTWARE INCLUDING ALL IMPLIED
11  * WARRANTIES OF MERCHANTABILITY AND FITNESS. IN NO EVENT SHALL THE
12  * AUTHOR BE LIABLE FOR ANY SPECIAL, DIRECT, INDIRECT, OR CONSEQUENTIAL
13  * DAMAGES OR ANY DAMAGES WHATSOEVER RESULTING FROM LOSS OF USE, DATA OR
14  * PROFITS, WHETHER IN AN ACTION OF CONTRACT, NEGLIGENCE OR OTHER
15  * TORTIOUS ACTION, ARISING OUT OF OR IN CONNECTION WITH THE USE OR
16  * PERFORMANCE OF THIS SOFTWARE.
17  */
18 
19 #ifndef _BUFFER_ADDR_INFO_H_
20 #define _BUFFER_ADDR_INFO_H_
21 #if !defined(__ASSEMBLER__)
22 #endif
23 
24 
25 // ################ START SUMMARY #################
26 //
27 //	Dword	Fields
28 //	0	buffer_addr_31_0[31:0]
29 //	1	buffer_addr_39_32[7:0], return_buffer_manager[10:8], sw_buffer_cookie[31:11]
30 //
31 // ################ END SUMMARY #################
32 
33 #define NUM_OF_DWORDS_BUFFER_ADDR_INFO 2
34 
35 struct buffer_addr_info {
36              uint32_t buffer_addr_31_0                : 32; //[31:0]
37              uint32_t buffer_addr_39_32               :  8, //[7:0]
38                       return_buffer_manager           :  3, //[10:8]
39                       sw_buffer_cookie                : 21; //[31:11]
40 };
41 
42 /*
43 
44 buffer_addr_31_0
45 
46 			Address (lower 32 bits) of the MSDU buffer OR
47 			MSDU_EXTENSION descriptor OR Link Descriptor
48 
49 
50 
51 			In case of 'NULL' pointer, this field is set to 0
52 
53 			<legal all>
54 
55 buffer_addr_39_32
56 
57 			Address (upper 8 bits) of the MSDU buffer OR
58 			MSDU_EXTENSION descriptor OR Link Descriptor
59 
60 
61 
62 			In case of 'NULL' pointer, this field is set to 0
63 
64 			<legal all>
65 
66 return_buffer_manager
67 
68 			Consumer: WBM
69 
70 			Producer: SW/FW
71 
72 
73 
74 			In case of 'NULL' pointer, this field is set to 0
75 
76 
77 
78 			Indicates to which buffer manager the buffer OR
79 			MSDU_EXTENSION descriptor OR link descriptor that is being
80 			pointed to shall be returned after the frame has been
81 			processed. It is used by WBM for routing purposes.
82 
83 
84 
85 			<enum 0 WBM_IDLE_BUF_LIST> This buffer shall be returned
86 			to the WMB buffer idle list
87 
88 			<enum 1 WBM_IDLE_DESC_LIST> This buffer shall be
89 			returned to the WMB idle link descriptor idle list
90 
91 			<enum 2 FW_BM> This buffer shall be returned to the FW
92 
93 			<enum 3 SW0_BM> This buffer shall be returned to the SW,
94 			ring 0
95 
96 			<enum 4 SW1_BM> This buffer shall be returned to the SW,
97 			ring 1
98 
99 			<enum 5 SW2_BM> This buffer shall be returned to the SW,
100 			ring 2
101 
102 			<enum 6 SW3_BM> This buffer shall be returned to the SW,
103 			ring 3
104 
105 
106 
107 			<legal 0-6>
108 
109 sw_buffer_cookie
110 
111 			Cookie field exclusively used by SW.
112 
113 
114 
115 			In case of 'NULL' pointer, this field is set to 0
116 
117 
118 
119 			HW ignores the contents, accept that it passes the
120 			programmed value on to other descriptors together with the
121 			physical address
122 
123 
124 
125 			Field can be used by SW to for example associate the
126 			buffers physical address with the virtual address
127 
128 			The bit definitions as used by SW are within SW HLD
129 			specification
130 
131 
132 
133 			NOTE:
134 
135 			The two most significant bits can have a special meaning
136 			in case this struct is embedded in a TX_MPDU_DETAILS STRUCT,
137 			and field transmit_bw_restriction is set
138 
139 			Sw_buffer_cookie[20:19] = 2'b00: 20 MHz TX only
140 
141 			Sw_buffer_cookie[20:19] = 2'b01: 40 MHz TX only
142 
143 			Sw_buffer_cookie[20:19] = 2'b10: 80 MHz TX only
144 
145 			Sw_buffer_cookie[20:19] = 2'b11: 160 MHz TX only
146 
147 
148 
149 			<legal all>
150 */
151 
152 
153 /* Description		BUFFER_ADDR_INFO_0_BUFFER_ADDR_31_0
154 
155 			Address (lower 32 bits) of the MSDU buffer OR
156 			MSDU_EXTENSION descriptor OR Link Descriptor
157 
158 
159 
160 			In case of 'NULL' pointer, this field is set to 0
161 
162 			<legal all>
163 */
164 #define BUFFER_ADDR_INFO_0_BUFFER_ADDR_31_0_OFFSET                   0x00000000
165 #define BUFFER_ADDR_INFO_0_BUFFER_ADDR_31_0_LSB                      0
166 #define BUFFER_ADDR_INFO_0_BUFFER_ADDR_31_0_MASK                     0xffffffff
167 
168 /* Description		BUFFER_ADDR_INFO_1_BUFFER_ADDR_39_32
169 
170 			Address (upper 8 bits) of the MSDU buffer OR
171 			MSDU_EXTENSION descriptor OR Link Descriptor
172 
173 
174 
175 			In case of 'NULL' pointer, this field is set to 0
176 
177 			<legal all>
178 */
179 #define BUFFER_ADDR_INFO_1_BUFFER_ADDR_39_32_OFFSET                  0x00000004
180 #define BUFFER_ADDR_INFO_1_BUFFER_ADDR_39_32_LSB                     0
181 #define BUFFER_ADDR_INFO_1_BUFFER_ADDR_39_32_MASK                    0x000000ff
182 
183 /* Description		BUFFER_ADDR_INFO_1_RETURN_BUFFER_MANAGER
184 
185 			Consumer: WBM
186 
187 			Producer: SW/FW
188 
189 
190 
191 			In case of 'NULL' pointer, this field is set to 0
192 
193 
194 
195 			Indicates to which buffer manager the buffer OR
196 			MSDU_EXTENSION descriptor OR link descriptor that is being
197 			pointed to shall be returned after the frame has been
198 			processed. It is used by WBM for routing purposes.
199 
200 
201 
202 			<enum 0 WBM_IDLE_BUF_LIST> This buffer shall be returned
203 			to the WMB buffer idle list
204 
205 			<enum 1 WBM_IDLE_DESC_LIST> This buffer shall be
206 			returned to the WMB idle link descriptor idle list
207 
208 			<enum 2 FW_BM> This buffer shall be returned to the FW
209 
210 			<enum 3 SW0_BM> This buffer shall be returned to the SW,
211 			ring 0
212 
213 			<enum 4 SW1_BM> This buffer shall be returned to the SW,
214 			ring 1
215 
216 			<enum 5 SW2_BM> This buffer shall be returned to the SW,
217 			ring 2
218 
219 			<enum 6 SW3_BM> This buffer shall be returned to the SW,
220 			ring 3
221 
222 
223 
224 			<legal 0-6>
225 */
226 #define BUFFER_ADDR_INFO_1_RETURN_BUFFER_MANAGER_OFFSET              0x00000004
227 #define BUFFER_ADDR_INFO_1_RETURN_BUFFER_MANAGER_LSB                 8
228 #define BUFFER_ADDR_INFO_1_RETURN_BUFFER_MANAGER_MASK                0x00000700
229 
230 /* Description		BUFFER_ADDR_INFO_1_SW_BUFFER_COOKIE
231 
232 			Cookie field exclusively used by SW.
233 
234 
235 
236 			In case of 'NULL' pointer, this field is set to 0
237 
238 
239 
240 			HW ignores the contents, accept that it passes the
241 			programmed value on to other descriptors together with the
242 			physical address
243 
244 
245 
246 			Field can be used by SW to for example associate the
247 			buffers physical address with the virtual address
248 
249 			The bit definitions as used by SW are within SW HLD
250 			specification
251 
252 
253 
254 			NOTE:
255 
256 			The two most significant bits can have a special meaning
257 			in case this struct is embedded in a TX_MPDU_DETAILS STRUCT,
258 			and field transmit_bw_restriction is set
259 
260 			Sw_buffer_cookie[20:19] = 2'b00: 20 MHz TX only
261 
262 			Sw_buffer_cookie[20:19] = 2'b01: 40 MHz TX only
263 
264 			Sw_buffer_cookie[20:19] = 2'b10: 80 MHz TX only
265 
266 			Sw_buffer_cookie[20:19] = 2'b11: 160 MHz TX only
267 
268 
269 
270 			<legal all>
271 */
272 #define BUFFER_ADDR_INFO_1_SW_BUFFER_COOKIE_OFFSET                   0x00000004
273 #define BUFFER_ADDR_INFO_1_SW_BUFFER_COOKIE_LSB                      11
274 #define BUFFER_ADDR_INFO_1_SW_BUFFER_COOKIE_MASK                     0xfffff800
275 
276 
277 #endif // _BUFFER_ADDR_INFO_H_
278