1 
2 /*
3  * Copyright (c) 2024, Qualcomm Innovation Center, Inc. All rights reserved.
4  * SPDX-License-Identifier: ISC
5  */
6 
7 
8 
9 
10 
11 
12 
13 
14 
15 
16 
17 
18 
19 #ifndef _UNIFORM_REO_STATUS_HEADER_H_
20 #define _UNIFORM_REO_STATUS_HEADER_H_
21 #if !defined(__ASSEMBLER__)
22 #endif
23 
24 #define NUM_OF_DWORDS_UNIFORM_REO_STATUS_HEADER 2
25 
26 
27 struct uniform_reo_status_header {
28 #ifndef WIFI_BIT_ORDER_BIG_ENDIAN
29              uint32_t reo_status_number                                       : 16,
30                       cmd_execution_time                                      : 10,
31                       reo_cmd_execution_status                                :  2,
32                       reserved_0a                                             :  4;
33              uint32_t timestamp                                               : 32;
34 #else
35              uint32_t reserved_0a                                             :  4,
36                       reo_cmd_execution_status                                :  2,
37                       cmd_execution_time                                      : 10,
38                       reo_status_number                                       : 16;
39              uint32_t timestamp                                               : 32;
40 #endif
41 };
42 
43 
44 
45 
46 #define UNIFORM_REO_STATUS_HEADER_REO_STATUS_NUMBER_OFFSET                          0x00000000
47 #define UNIFORM_REO_STATUS_HEADER_REO_STATUS_NUMBER_LSB                             0
48 #define UNIFORM_REO_STATUS_HEADER_REO_STATUS_NUMBER_MSB                             15
49 #define UNIFORM_REO_STATUS_HEADER_REO_STATUS_NUMBER_MASK                            0x0000ffff
50 
51 
52 
53 
54 #define UNIFORM_REO_STATUS_HEADER_CMD_EXECUTION_TIME_OFFSET                         0x00000000
55 #define UNIFORM_REO_STATUS_HEADER_CMD_EXECUTION_TIME_LSB                            16
56 #define UNIFORM_REO_STATUS_HEADER_CMD_EXECUTION_TIME_MSB                            25
57 #define UNIFORM_REO_STATUS_HEADER_CMD_EXECUTION_TIME_MASK                           0x03ff0000
58 
59 
60 
61 
62 #define UNIFORM_REO_STATUS_HEADER_REO_CMD_EXECUTION_STATUS_OFFSET                   0x00000000
63 #define UNIFORM_REO_STATUS_HEADER_REO_CMD_EXECUTION_STATUS_LSB                      26
64 #define UNIFORM_REO_STATUS_HEADER_REO_CMD_EXECUTION_STATUS_MSB                      27
65 #define UNIFORM_REO_STATUS_HEADER_REO_CMD_EXECUTION_STATUS_MASK                     0x0c000000
66 
67 
68 
69 
70 #define UNIFORM_REO_STATUS_HEADER_RESERVED_0A_OFFSET                                0x00000000
71 #define UNIFORM_REO_STATUS_HEADER_RESERVED_0A_LSB                                   28
72 #define UNIFORM_REO_STATUS_HEADER_RESERVED_0A_MSB                                   31
73 #define UNIFORM_REO_STATUS_HEADER_RESERVED_0A_MASK                                  0xf0000000
74 
75 
76 
77 
78 #define UNIFORM_REO_STATUS_HEADER_TIMESTAMP_OFFSET                                  0x00000004
79 #define UNIFORM_REO_STATUS_HEADER_TIMESTAMP_LSB                                     0
80 #define UNIFORM_REO_STATUS_HEADER_TIMESTAMP_MSB                                     31
81 #define UNIFORM_REO_STATUS_HEADER_TIMESTAMP_MASK                                    0xffffffff
82 
83 
84 
85 #endif
86