1 
2 /*
3  * Copyright (c) 2024, Qualcomm Innovation Center, Inc. All rights reserved.
4  * SPDX-License-Identifier: ISC
5  */
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19 #ifndef _RX_TIMING_OFFSET_INFO_H_
20 #define _RX_TIMING_OFFSET_INFO_H_
21 #if !defined(__ASSEMBLER__)
22 #endif
23 
24 #define NUM_OF_DWORDS_RX_TIMING_OFFSET_INFO 1
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26 
27 struct rx_timing_offset_info {
28 #ifndef WIFI_BIT_ORDER_BIG_ENDIAN
29              uint32_t residual_phase_offset                                   : 12,
30                       reserved                                                : 20;
31 #else
32              uint32_t reserved                                                : 20,
33                       residual_phase_offset                                   : 12;
34 #endif
35 };
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40 #define RX_TIMING_OFFSET_INFO_RESIDUAL_PHASE_OFFSET_OFFSET                          0x00000000
41 #define RX_TIMING_OFFSET_INFO_RESIDUAL_PHASE_OFFSET_LSB                             0
42 #define RX_TIMING_OFFSET_INFO_RESIDUAL_PHASE_OFFSET_MSB                             11
43 #define RX_TIMING_OFFSET_INFO_RESIDUAL_PHASE_OFFSET_MASK                            0x00000fff
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48 #define RX_TIMING_OFFSET_INFO_RESERVED_OFFSET                                       0x00000000
49 #define RX_TIMING_OFFSET_INFO_RESERVED_LSB                                          12
50 #define RX_TIMING_OFFSET_INFO_RESERVED_MSB                                          31
51 #define RX_TIMING_OFFSET_INFO_RESERVED_MASK                                         0xfffff000
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55 #endif
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