1 2 /* 3 * Copyright (c) 2024, Qualcomm Innovation Center, Inc. All rights reserved. 4 * SPDX-License-Identifier: ISC 5 */ 6 7 8 9 10 11 12 13 14 15 16 17 18 19 #ifndef _RECEIVE_USER_INFO_H_ 20 #define _RECEIVE_USER_INFO_H_ 21 #if !defined(__ASSEMBLER__) 22 #endif 23 24 #define NUM_OF_DWORDS_RECEIVE_USER_INFO 8 25 26 27 struct receive_user_info { 28 #ifndef WIFI_BIT_ORDER_BIG_ENDIAN 29 uint32_t phy_ppdu_id : 16, 30 user_rssi : 8, 31 pkt_type : 4, 32 stbc : 1, 33 reception_type : 3; 34 uint32_t rate_mcs : 4, 35 sgi : 2, 36 he_ranging_ndp : 1, 37 reserved_1a : 1, 38 mimo_ss_bitmap : 8, 39 receive_bandwidth : 3, 40 reserved_1b : 5, 41 dl_ofdma_user_index : 8; 42 uint32_t dl_ofdma_content_channel : 1, 43 reserved_2a : 7, 44 nss : 3, 45 stream_offset : 3, 46 sta_dcm : 1, 47 ldpc : 1, 48 ru_type_80_0 : 4, 49 ru_type_80_1 : 4, 50 ru_type_80_2 : 4, 51 ru_type_80_3 : 4; 52 uint32_t ru_start_index_80_0 : 6, 53 reserved_3a : 2, 54 ru_start_index_80_1 : 6, 55 reserved_3b : 2, 56 ru_start_index_80_2 : 6, 57 reserved_3c : 2, 58 ru_start_index_80_3 : 6, 59 reserved_3d : 2; 60 uint32_t user_fd_rssi_seg0 : 32; 61 uint32_t user_fd_rssi_seg1 : 32; 62 uint32_t user_fd_rssi_seg2 : 32; 63 uint32_t user_fd_rssi_seg3 : 32; 64 #else 65 uint32_t reception_type : 3, 66 stbc : 1, 67 pkt_type : 4, 68 user_rssi : 8, 69 phy_ppdu_id : 16; 70 uint32_t dl_ofdma_user_index : 8, 71 reserved_1b : 5, 72 receive_bandwidth : 3, 73 mimo_ss_bitmap : 8, 74 reserved_1a : 1, 75 he_ranging_ndp : 1, 76 sgi : 2, 77 rate_mcs : 4; 78 uint32_t ru_type_80_3 : 4, 79 ru_type_80_2 : 4, 80 ru_type_80_1 : 4, 81 ru_type_80_0 : 4, 82 ldpc : 1, 83 sta_dcm : 1, 84 stream_offset : 3, 85 nss : 3, 86 reserved_2a : 7, 87 dl_ofdma_content_channel : 1; 88 uint32_t reserved_3d : 2, 89 ru_start_index_80_3 : 6, 90 reserved_3c : 2, 91 ru_start_index_80_2 : 6, 92 reserved_3b : 2, 93 ru_start_index_80_1 : 6, 94 reserved_3a : 2, 95 ru_start_index_80_0 : 6; 96 uint32_t user_fd_rssi_seg0 : 32; 97 uint32_t user_fd_rssi_seg1 : 32; 98 uint32_t user_fd_rssi_seg2 : 32; 99 uint32_t user_fd_rssi_seg3 : 32; 100 #endif 101 }; 102 103 104 105 106 #define RECEIVE_USER_INFO_PHY_PPDU_ID_OFFSET 0x00000000 107 #define RECEIVE_USER_INFO_PHY_PPDU_ID_LSB 0 108 #define RECEIVE_USER_INFO_PHY_PPDU_ID_MSB 15 109 #define RECEIVE_USER_INFO_PHY_PPDU_ID_MASK 0x0000ffff 110 111 112 113 114 #define RECEIVE_USER_INFO_USER_RSSI_OFFSET 0x00000000 115 #define RECEIVE_USER_INFO_USER_RSSI_LSB 16 116 #define RECEIVE_USER_INFO_USER_RSSI_MSB 23 117 #define RECEIVE_USER_INFO_USER_RSSI_MASK 0x00ff0000 118 119 120 121 122 #define RECEIVE_USER_INFO_PKT_TYPE_OFFSET 0x00000000 123 #define RECEIVE_USER_INFO_PKT_TYPE_LSB 24 124 #define RECEIVE_USER_INFO_PKT_TYPE_MSB 27 125 #define RECEIVE_USER_INFO_PKT_TYPE_MASK 0x0f000000 126 127 128 129 130 #define RECEIVE_USER_INFO_STBC_OFFSET 0x00000000 131 #define RECEIVE_USER_INFO_STBC_LSB 28 132 #define RECEIVE_USER_INFO_STBC_MSB 28 133 #define RECEIVE_USER_INFO_STBC_MASK 0x10000000 134 135 136 137 138 #define RECEIVE_USER_INFO_RECEPTION_TYPE_OFFSET 0x00000000 139 #define RECEIVE_USER_INFO_RECEPTION_TYPE_LSB 29 140 #define RECEIVE_USER_INFO_RECEPTION_TYPE_MSB 31 141 #define RECEIVE_USER_INFO_RECEPTION_TYPE_MASK 0xe0000000 142 143 144 145 146 #define RECEIVE_USER_INFO_RATE_MCS_OFFSET 0x00000004 147 #define RECEIVE_USER_INFO_RATE_MCS_LSB 0 148 #define RECEIVE_USER_INFO_RATE_MCS_MSB 3 149 #define RECEIVE_USER_INFO_RATE_MCS_MASK 0x0000000f 150 151 152 153 154 #define RECEIVE_USER_INFO_SGI_OFFSET 0x00000004 155 #define RECEIVE_USER_INFO_SGI_LSB 4 156 #define RECEIVE_USER_INFO_SGI_MSB 5 157 #define RECEIVE_USER_INFO_SGI_MASK 0x00000030 158 159 160 161 162 #define RECEIVE_USER_INFO_HE_RANGING_NDP_OFFSET 0x00000004 163 #define RECEIVE_USER_INFO_HE_RANGING_NDP_LSB 6 164 #define RECEIVE_USER_INFO_HE_RANGING_NDP_MSB 6 165 #define RECEIVE_USER_INFO_HE_RANGING_NDP_MASK 0x00000040 166 167 168 169 170 #define RECEIVE_USER_INFO_RESERVED_1A_OFFSET 0x00000004 171 #define RECEIVE_USER_INFO_RESERVED_1A_LSB 7 172 #define RECEIVE_USER_INFO_RESERVED_1A_MSB 7 173 #define RECEIVE_USER_INFO_RESERVED_1A_MASK 0x00000080 174 175 176 177 178 #define RECEIVE_USER_INFO_MIMO_SS_BITMAP_OFFSET 0x00000004 179 #define RECEIVE_USER_INFO_MIMO_SS_BITMAP_LSB 8 180 #define RECEIVE_USER_INFO_MIMO_SS_BITMAP_MSB 15 181 #define RECEIVE_USER_INFO_MIMO_SS_BITMAP_MASK 0x0000ff00 182 183 184 185 186 #define RECEIVE_USER_INFO_RECEIVE_BANDWIDTH_OFFSET 0x00000004 187 #define RECEIVE_USER_INFO_RECEIVE_BANDWIDTH_LSB 16 188 #define RECEIVE_USER_INFO_RECEIVE_BANDWIDTH_MSB 18 189 #define RECEIVE_USER_INFO_RECEIVE_BANDWIDTH_MASK 0x00070000 190 191 192 193 194 #define RECEIVE_USER_INFO_RESERVED_1B_OFFSET 0x00000004 195 #define RECEIVE_USER_INFO_RESERVED_1B_LSB 19 196 #define RECEIVE_USER_INFO_RESERVED_1B_MSB 23 197 #define RECEIVE_USER_INFO_RESERVED_1B_MASK 0x00f80000 198 199 200 201 202 #define RECEIVE_USER_INFO_DL_OFDMA_USER_INDEX_OFFSET 0x00000004 203 #define RECEIVE_USER_INFO_DL_OFDMA_USER_INDEX_LSB 24 204 #define RECEIVE_USER_INFO_DL_OFDMA_USER_INDEX_MSB 31 205 #define RECEIVE_USER_INFO_DL_OFDMA_USER_INDEX_MASK 0xff000000 206 207 208 209 210 #define RECEIVE_USER_INFO_DL_OFDMA_CONTENT_CHANNEL_OFFSET 0x00000008 211 #define RECEIVE_USER_INFO_DL_OFDMA_CONTENT_CHANNEL_LSB 0 212 #define RECEIVE_USER_INFO_DL_OFDMA_CONTENT_CHANNEL_MSB 0 213 #define RECEIVE_USER_INFO_DL_OFDMA_CONTENT_CHANNEL_MASK 0x00000001 214 215 216 217 218 #define RECEIVE_USER_INFO_RESERVED_2A_OFFSET 0x00000008 219 #define RECEIVE_USER_INFO_RESERVED_2A_LSB 1 220 #define RECEIVE_USER_INFO_RESERVED_2A_MSB 7 221 #define RECEIVE_USER_INFO_RESERVED_2A_MASK 0x000000fe 222 223 224 225 226 #define RECEIVE_USER_INFO_NSS_OFFSET 0x00000008 227 #define RECEIVE_USER_INFO_NSS_LSB 8 228 #define RECEIVE_USER_INFO_NSS_MSB 10 229 #define RECEIVE_USER_INFO_NSS_MASK 0x00000700 230 231 232 233 234 #define RECEIVE_USER_INFO_STREAM_OFFSET_OFFSET 0x00000008 235 #define RECEIVE_USER_INFO_STREAM_OFFSET_LSB 11 236 #define RECEIVE_USER_INFO_STREAM_OFFSET_MSB 13 237 #define RECEIVE_USER_INFO_STREAM_OFFSET_MASK 0x00003800 238 239 240 241 242 #define RECEIVE_USER_INFO_STA_DCM_OFFSET 0x00000008 243 #define RECEIVE_USER_INFO_STA_DCM_LSB 14 244 #define RECEIVE_USER_INFO_STA_DCM_MSB 14 245 #define RECEIVE_USER_INFO_STA_DCM_MASK 0x00004000 246 247 248 249 250 #define RECEIVE_USER_INFO_LDPC_OFFSET 0x00000008 251 #define RECEIVE_USER_INFO_LDPC_LSB 15 252 #define RECEIVE_USER_INFO_LDPC_MSB 15 253 #define RECEIVE_USER_INFO_LDPC_MASK 0x00008000 254 255 256 257 258 #define RECEIVE_USER_INFO_RU_TYPE_80_0_OFFSET 0x00000008 259 #define RECEIVE_USER_INFO_RU_TYPE_80_0_LSB 16 260 #define RECEIVE_USER_INFO_RU_TYPE_80_0_MSB 19 261 #define RECEIVE_USER_INFO_RU_TYPE_80_0_MASK 0x000f0000 262 263 264 265 266 #define RECEIVE_USER_INFO_RU_TYPE_80_1_OFFSET 0x00000008 267 #define RECEIVE_USER_INFO_RU_TYPE_80_1_LSB 20 268 #define RECEIVE_USER_INFO_RU_TYPE_80_1_MSB 23 269 #define RECEIVE_USER_INFO_RU_TYPE_80_1_MASK 0x00f00000 270 271 272 273 274 #define RECEIVE_USER_INFO_RU_TYPE_80_2_OFFSET 0x00000008 275 #define RECEIVE_USER_INFO_RU_TYPE_80_2_LSB 24 276 #define RECEIVE_USER_INFO_RU_TYPE_80_2_MSB 27 277 #define RECEIVE_USER_INFO_RU_TYPE_80_2_MASK 0x0f000000 278 279 280 281 282 #define RECEIVE_USER_INFO_RU_TYPE_80_3_OFFSET 0x00000008 283 #define RECEIVE_USER_INFO_RU_TYPE_80_3_LSB 28 284 #define RECEIVE_USER_INFO_RU_TYPE_80_3_MSB 31 285 #define RECEIVE_USER_INFO_RU_TYPE_80_3_MASK 0xf0000000 286 287 288 289 290 #define RECEIVE_USER_INFO_RU_START_INDEX_80_0_OFFSET 0x0000000c 291 #define RECEIVE_USER_INFO_RU_START_INDEX_80_0_LSB 0 292 #define RECEIVE_USER_INFO_RU_START_INDEX_80_0_MSB 5 293 #define RECEIVE_USER_INFO_RU_START_INDEX_80_0_MASK 0x0000003f 294 295 296 297 298 #define RECEIVE_USER_INFO_RESERVED_3A_OFFSET 0x0000000c 299 #define RECEIVE_USER_INFO_RESERVED_3A_LSB 6 300 #define RECEIVE_USER_INFO_RESERVED_3A_MSB 7 301 #define RECEIVE_USER_INFO_RESERVED_3A_MASK 0x000000c0 302 303 304 305 306 #define RECEIVE_USER_INFO_RU_START_INDEX_80_1_OFFSET 0x0000000c 307 #define RECEIVE_USER_INFO_RU_START_INDEX_80_1_LSB 8 308 #define RECEIVE_USER_INFO_RU_START_INDEX_80_1_MSB 13 309 #define RECEIVE_USER_INFO_RU_START_INDEX_80_1_MASK 0x00003f00 310 311 312 313 314 #define RECEIVE_USER_INFO_RESERVED_3B_OFFSET 0x0000000c 315 #define RECEIVE_USER_INFO_RESERVED_3B_LSB 14 316 #define RECEIVE_USER_INFO_RESERVED_3B_MSB 15 317 #define RECEIVE_USER_INFO_RESERVED_3B_MASK 0x0000c000 318 319 320 321 322 #define RECEIVE_USER_INFO_RU_START_INDEX_80_2_OFFSET 0x0000000c 323 #define RECEIVE_USER_INFO_RU_START_INDEX_80_2_LSB 16 324 #define RECEIVE_USER_INFO_RU_START_INDEX_80_2_MSB 21 325 #define RECEIVE_USER_INFO_RU_START_INDEX_80_2_MASK 0x003f0000 326 327 328 329 330 #define RECEIVE_USER_INFO_RESERVED_3C_OFFSET 0x0000000c 331 #define RECEIVE_USER_INFO_RESERVED_3C_LSB 22 332 #define RECEIVE_USER_INFO_RESERVED_3C_MSB 23 333 #define RECEIVE_USER_INFO_RESERVED_3C_MASK 0x00c00000 334 335 336 337 338 #define RECEIVE_USER_INFO_RU_START_INDEX_80_3_OFFSET 0x0000000c 339 #define RECEIVE_USER_INFO_RU_START_INDEX_80_3_LSB 24 340 #define RECEIVE_USER_INFO_RU_START_INDEX_80_3_MSB 29 341 #define RECEIVE_USER_INFO_RU_START_INDEX_80_3_MASK 0x3f000000 342 343 344 345 346 #define RECEIVE_USER_INFO_RESERVED_3D_OFFSET 0x0000000c 347 #define RECEIVE_USER_INFO_RESERVED_3D_LSB 30 348 #define RECEIVE_USER_INFO_RESERVED_3D_MSB 31 349 #define RECEIVE_USER_INFO_RESERVED_3D_MASK 0xc0000000 350 351 352 353 354 #define RECEIVE_USER_INFO_USER_FD_RSSI_SEG0_OFFSET 0x00000010 355 #define RECEIVE_USER_INFO_USER_FD_RSSI_SEG0_LSB 0 356 #define RECEIVE_USER_INFO_USER_FD_RSSI_SEG0_MSB 31 357 #define RECEIVE_USER_INFO_USER_FD_RSSI_SEG0_MASK 0xffffffff 358 359 360 361 362 #define RECEIVE_USER_INFO_USER_FD_RSSI_SEG1_OFFSET 0x00000014 363 #define RECEIVE_USER_INFO_USER_FD_RSSI_SEG1_LSB 0 364 #define RECEIVE_USER_INFO_USER_FD_RSSI_SEG1_MSB 31 365 #define RECEIVE_USER_INFO_USER_FD_RSSI_SEG1_MASK 0xffffffff 366 367 368 369 370 #define RECEIVE_USER_INFO_USER_FD_RSSI_SEG2_OFFSET 0x00000018 371 #define RECEIVE_USER_INFO_USER_FD_RSSI_SEG2_LSB 0 372 #define RECEIVE_USER_INFO_USER_FD_RSSI_SEG2_MSB 31 373 #define RECEIVE_USER_INFO_USER_FD_RSSI_SEG2_MASK 0xffffffff 374 375 376 377 378 #define RECEIVE_USER_INFO_USER_FD_RSSI_SEG3_OFFSET 0x0000001c 379 #define RECEIVE_USER_INFO_USER_FD_RSSI_SEG3_LSB 0 380 #define RECEIVE_USER_INFO_USER_FD_RSSI_SEG3_MSB 31 381 #define RECEIVE_USER_INFO_USER_FD_RSSI_SEG3_MASK 0xffffffff 382 383 384 385 #endif 386