1 
2 /* Copyright (c) 2022, Qualcomm Innovation Center, Inc. All rights reserved.
3  *
4  * Permission to use, copy, modify, and/or distribute this software for any
5  * purpose with or without fee is hereby granted, provided that the above
6  * copyright notice and this permission notice appear in all copies.
7  *
8  * THE SOFTWARE IS PROVIDED "AS IS" AND THE AUTHOR DISCLAIMS ALL WARRANTIES
9  * WITH REGARD TO THIS SOFTWARE INCLUDING ALL IMPLIED WARRANTIES OF
10  * MERCHANTABILITY AND FITNESS. IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR
11  * ANY SPECIAL, DIRECT, INDIRECT, OR CONSEQUENTIAL DAMAGES OR ANY DAMAGES
12  * WHATSOEVER RESULTING FROM LOSS OF USE, DATA OR PROFITS, WHETHER IN AN
13  * ACTION OF CONTRACT, NEGLIGENCE OR OTHER TORTIOUS ACTION, ARISING OUT OF
14  * OR IN CONNECTION WITH THE USE OR PERFORMANCE OF THIS SOFTWARE.
15  */
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24 
25 
26 #ifndef _RX_TIMING_OFFSET_INFO_H_
27 #define _RX_TIMING_OFFSET_INFO_H_
28 #if !defined(__ASSEMBLER__)
29 #endif
30 
31 #define NUM_OF_DWORDS_RX_TIMING_OFFSET_INFO 1
32 
33 
34 struct rx_timing_offset_info {
35 #ifndef WIFI_BIT_ORDER_BIG_ENDIAN
36              uint32_t residual_phase_offset                                   : 12, // [11:0]
37                       reserved                                                : 20; // [31:12]
38 #else
39              uint32_t reserved                                                : 20, // [31:12]
40                       residual_phase_offset                                   : 12; // [11:0]
41 #endif
42 };
43 
44 
45 /* Description		RESIDUAL_PHASE_OFFSET
46 
47 			Cumulative reference frequency error at end of RX packet,
48 			expressed as the phase offset measured over 0.8us.
49 			<legal all>
50 */
51 
52 #define RX_TIMING_OFFSET_INFO_RESIDUAL_PHASE_OFFSET_OFFSET                          0x00000000
53 #define RX_TIMING_OFFSET_INFO_RESIDUAL_PHASE_OFFSET_LSB                             0
54 #define RX_TIMING_OFFSET_INFO_RESIDUAL_PHASE_OFFSET_MSB                             11
55 #define RX_TIMING_OFFSET_INFO_RESIDUAL_PHASE_OFFSET_MASK                            0x00000fff
56 
57 
58 /* Description		RESERVED
59 
60 			<legal 0>
61 */
62 
63 #define RX_TIMING_OFFSET_INFO_RESERVED_OFFSET                                       0x00000000
64 #define RX_TIMING_OFFSET_INFO_RESERVED_LSB                                          12
65 #define RX_TIMING_OFFSET_INFO_RESERVED_MSB                                          31
66 #define RX_TIMING_OFFSET_INFO_RESERVED_MASK                                         0xfffff000
67 
68 
69 
70 #endif   // RX_TIMING_OFFSET_INFO
71