1 
2 /* Copyright (c) 2022, Qualcomm Innovation Center, Inc. All rights reserved.
3  *
4  * Permission to use, copy, modify, and/or distribute this software for any
5  * purpose with or without fee is hereby granted, provided that the above
6  * copyright notice and this permission notice appear in all copies.
7  *
8  * THE SOFTWARE IS PROVIDED "AS IS" AND THE AUTHOR DISCLAIMS ALL WARRANTIES
9  * WITH REGARD TO THIS SOFTWARE INCLUDING ALL IMPLIED WARRANTIES OF
10  * MERCHANTABILITY AND FITNESS. IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR
11  * ANY SPECIAL, DIRECT, INDIRECT, OR CONSEQUENTIAL DAMAGES OR ANY DAMAGES
12  * WHATSOEVER RESULTING FROM LOSS OF USE, DATA OR PROFITS, WHETHER IN AN
13  * ACTION OF CONTRACT, NEGLIGENCE OR OTHER TORTIOUS ACTION, ARISING OUT OF
14  * OR IN CONNECTION WITH THE USE OR PERFORMANCE OF THIS SOFTWARE.
15  */
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23 
24 
25 
26 #ifndef _PHYTX_PPDU_HEADER_INFO_REQUEST_H_
27 #define _PHYTX_PPDU_HEADER_INFO_REQUEST_H_
28 #if !defined(__ASSEMBLER__)
29 #endif
30 
31 #define NUM_OF_WORDS_PHYTX_PPDU_HEADER_INFO_REQUEST 2
32 
33 #define NUM_OF_DWORDS_PHYTX_PPDU_HEADER_INFO_REQUEST 1
34 
35 
36 struct phytx_ppdu_header_info_request {
37 #ifndef WIFI_BIT_ORDER_BIG_ENDIAN
38              uint16_t request_type                                            :  5, // [4:0]
39                       reserved                                                : 11; // [15:5]
40              uint16_t tlv32_padding                                           : 16; // [15:0]
41 #else
42              uint16_t reserved                                                : 11, // [15:5]
43                       request_type                                            :  5; // [4:0]
44              uint16_t tlv32_padding                                           : 16; // [15:0]
45 #endif
46 };
47 
48 
49 /* Description		REQUEST_TYPE
50 
51 			Reason for the request by PHY
52 			<enum 0 request_L_SIG_B>
53 			<enum 1  request_L_SIG_A>
54 			<enum 2 request_USER_DESC>
55 			<enum 3  request_HT_SIG>
56 			<enum 4  request_VHT_SIG_A>
57 			<enum 5  request_VHT_SIG_B >
58 			<enum 6 request_TX_SERVICE>
59 			<enum 7 request_HE_SIG_A>
60 			<enum 8 request_HE_SIG_B>
61 			<enum 9 request_U_SIG>
62 			<enum 10 request_EHT_SIG>
63 
64 			<legal 0-10>
65 */
66 
67 #define PHYTX_PPDU_HEADER_INFO_REQUEST_REQUEST_TYPE_OFFSET                          0x00000000
68 #define PHYTX_PPDU_HEADER_INFO_REQUEST_REQUEST_TYPE_LSB                             0
69 #define PHYTX_PPDU_HEADER_INFO_REQUEST_REQUEST_TYPE_MSB                             4
70 #define PHYTX_PPDU_HEADER_INFO_REQUEST_REQUEST_TYPE_MASK                            0x0000001f
71 
72 
73 /* Description		RESERVED
74 
75 			<legal 0>
76 */
77 
78 #define PHYTX_PPDU_HEADER_INFO_REQUEST_RESERVED_OFFSET                              0x00000000
79 #define PHYTX_PPDU_HEADER_INFO_REQUEST_RESERVED_LSB                                 5
80 #define PHYTX_PPDU_HEADER_INFO_REQUEST_RESERVED_MSB                                 15
81 #define PHYTX_PPDU_HEADER_INFO_REQUEST_RESERVED_MASK                                0x0000ffe0
82 
83 
84 /* Description		TLV32_PADDING
85 
86 			Automatic WORD padding inserted while converting TLV16 to
87 			 TLV32 for 64 bit ARCH
88 			<legal 0>
89 */
90 
91 #define PHYTX_PPDU_HEADER_INFO_REQUEST_TLV32_PADDING_OFFSET                         0x00000002
92 #define PHYTX_PPDU_HEADER_INFO_REQUEST_TLV32_PADDING_LSB                            0
93 #define PHYTX_PPDU_HEADER_INFO_REQUEST_TLV32_PADDING_MSB                            15
94 #define PHYTX_PPDU_HEADER_INFO_REQUEST_TLV32_PADDING_MASK                           0x0000ffff
95 
96 
97 
98 #endif   // PHYTX_PPDU_HEADER_INFO_REQUEST
99