1 
2 /* Copyright (c) 2022, Qualcomm Innovation Center, Inc. All rights reserved.
3  *
4  * Permission to use, copy, modify, and/or distribute this software for any
5  * purpose with or without fee is hereby granted, provided that the above
6  * copyright notice and this permission notice appear in all copies.
7  *
8  * THE SOFTWARE IS PROVIDED "AS IS" AND THE AUTHOR DISCLAIMS ALL WARRANTIES
9  * WITH REGARD TO THIS SOFTWARE INCLUDING ALL IMPLIED WARRANTIES OF
10  * MERCHANTABILITY AND FITNESS. IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR
11  * ANY SPECIAL, DIRECT, INDIRECT, OR CONSEQUENTIAL DAMAGES OR ANY DAMAGES
12  * WHATSOEVER RESULTING FROM LOSS OF USE, DATA OR PROFITS, WHETHER IN AN
13  * ACTION OF CONTRACT, NEGLIGENCE OR OTHER TORTIOUS ACTION, ARISING OUT OF
14  * OR IN CONNECTION WITH THE USE OR PERFORMANCE OF THIS SOFTWARE.
15  */
16 
17 
18 
19 
20 
21 
22 
23 
24 
25 
26 #ifndef _PHYRX_HE_SIG_A_MU_DL_H_
27 #define _PHYRX_HE_SIG_A_MU_DL_H_
28 #if !defined(__ASSEMBLER__)
29 #endif
30 
31 #include "he_sig_a_mu_dl_info.h"
32 #define NUM_OF_DWORDS_PHYRX_HE_SIG_A_MU_DL 2
33 
34 #define NUM_OF_QWORDS_PHYRX_HE_SIG_A_MU_DL 1
35 
36 
37 struct phyrx_he_sig_a_mu_dl {
38 #ifndef WIFI_BIT_ORDER_BIG_ENDIAN
39              struct   he_sig_a_mu_dl_info                                       phyrx_he_sig_a_mu_dl_info_details;
40 #else
41              struct   he_sig_a_mu_dl_info                                       phyrx_he_sig_a_mu_dl_info_details;
42 #endif
43 };
44 
45 
46 /* Description		PHYRX_HE_SIG_A_MU_DL_INFO_DETAILS
47 
48 			See detailed description of the STRUCT
49 */
50 
51 
52 /* Description		DL_UL_FLAG
53 
54 			Differentiates between DL and UL transmission
55 
56 			<enum 0 DL_UL_FLAG_IS_DL_OR_TDLS>
57 			<enum 1 DL_UL_FLAG_IS_UL>
58 			NOTE: This is unsupported for "HE MU" format (including "MU_SU")
59 			Tx in Napier and Hastings80.
60 			<legal all>
61 */
62 
63 #define PHYRX_HE_SIG_A_MU_DL_PHYRX_HE_SIG_A_MU_DL_INFO_DETAILS_DL_UL_FLAG_OFFSET    0x0000000000000000
64 #define PHYRX_HE_SIG_A_MU_DL_PHYRX_HE_SIG_A_MU_DL_INFO_DETAILS_DL_UL_FLAG_LSB       0
65 #define PHYRX_HE_SIG_A_MU_DL_PHYRX_HE_SIG_A_MU_DL_INFO_DETAILS_DL_UL_FLAG_MSB       0
66 #define PHYRX_HE_SIG_A_MU_DL_PHYRX_HE_SIG_A_MU_DL_INFO_DETAILS_DL_UL_FLAG_MASK      0x0000000000000001
67 
68 
69 /* Description		MCS_OF_SIG_B
70 
71 			Indicates the MCS of HE-SIG-B
72 			<legal 0-5>
73 */
74 
75 #define PHYRX_HE_SIG_A_MU_DL_PHYRX_HE_SIG_A_MU_DL_INFO_DETAILS_MCS_OF_SIG_B_OFFSET  0x0000000000000000
76 #define PHYRX_HE_SIG_A_MU_DL_PHYRX_HE_SIG_A_MU_DL_INFO_DETAILS_MCS_OF_SIG_B_LSB     1
77 #define PHYRX_HE_SIG_A_MU_DL_PHYRX_HE_SIG_A_MU_DL_INFO_DETAILS_MCS_OF_SIG_B_MSB     3
78 #define PHYRX_HE_SIG_A_MU_DL_PHYRX_HE_SIG_A_MU_DL_INFO_DETAILS_MCS_OF_SIG_B_MASK    0x000000000000000e
79 
80 
81 /* Description		DCM_OF_SIG_B
82 
83 			Indicates whether dual sub-carrier modulation is applied
84 			 to HE-SIG-B
85 
86 			0: No DCM for HE_SIG_B
87 			1: DCM for HE_SIG_B
88 			<legal all>
89 */
90 
91 #define PHYRX_HE_SIG_A_MU_DL_PHYRX_HE_SIG_A_MU_DL_INFO_DETAILS_DCM_OF_SIG_B_OFFSET  0x0000000000000000
92 #define PHYRX_HE_SIG_A_MU_DL_PHYRX_HE_SIG_A_MU_DL_INFO_DETAILS_DCM_OF_SIG_B_LSB     4
93 #define PHYRX_HE_SIG_A_MU_DL_PHYRX_HE_SIG_A_MU_DL_INFO_DETAILS_DCM_OF_SIG_B_MSB     4
94 #define PHYRX_HE_SIG_A_MU_DL_PHYRX_HE_SIG_A_MU_DL_INFO_DETAILS_DCM_OF_SIG_B_MASK    0x0000000000000010
95 
96 
97 /* Description		BSS_COLOR_ID
98 
99 			BSS color ID
100 
101 			Field Used by MAC HW
102 			<legal all>
103 */
104 
105 #define PHYRX_HE_SIG_A_MU_DL_PHYRX_HE_SIG_A_MU_DL_INFO_DETAILS_BSS_COLOR_ID_OFFSET  0x0000000000000000
106 #define PHYRX_HE_SIG_A_MU_DL_PHYRX_HE_SIG_A_MU_DL_INFO_DETAILS_BSS_COLOR_ID_LSB     5
107 #define PHYRX_HE_SIG_A_MU_DL_PHYRX_HE_SIG_A_MU_DL_INFO_DETAILS_BSS_COLOR_ID_MSB     10
108 #define PHYRX_HE_SIG_A_MU_DL_PHYRX_HE_SIG_A_MU_DL_INFO_DETAILS_BSS_COLOR_ID_MASK    0x00000000000007e0
109 
110 
111 /* Description		SPATIAL_REUSE
112 
113 			Spatial reuse
114 
115 			For 20MHz one SR field corresponding to entire 20MHz (other
116 			 3 fields indicate identical values)
117 			For 40MHz two SR fields for each 20MHz (other 2 fields indicate
118 			 identical values)
119 			For 80MHz four SR fields for each 20MHz
120 			For 160MHz four SR fields for each 40MHz
121 			<legal all>
122 */
123 
124 #define PHYRX_HE_SIG_A_MU_DL_PHYRX_HE_SIG_A_MU_DL_INFO_DETAILS_SPATIAL_REUSE_OFFSET 0x0000000000000000
125 #define PHYRX_HE_SIG_A_MU_DL_PHYRX_HE_SIG_A_MU_DL_INFO_DETAILS_SPATIAL_REUSE_LSB    11
126 #define PHYRX_HE_SIG_A_MU_DL_PHYRX_HE_SIG_A_MU_DL_INFO_DETAILS_SPATIAL_REUSE_MSB    14
127 #define PHYRX_HE_SIG_A_MU_DL_PHYRX_HE_SIG_A_MU_DL_INFO_DETAILS_SPATIAL_REUSE_MASK   0x0000000000007800
128 
129 
130 /* Description		TRANSMIT_BW
131 
132 			Bandwidth of the PPDU.
133 
134 			<enum 0 HE_SIG_A_MU_DL_BW20> 20 Mhz
135 			<enum 1 HE_SIG_A_MU_DL_BW40> 40 Mhz
136 			<enum 2 HE_SIG_A_MU_DL_BW80> 80 MHz non-preamble puncturing
137 			 mode
138 			<enum 3 HE_SIG_A_MU_DL_BW160> 160 MHz and 80+80 MHz non-preamble
139 			 puncturing mode
140 			<enum 4 HE_SIG_A_MU_DL_BW80_SEC_20_PUNC> for preamble puncturing
141 			 in 80 MHz, where in the preamble only the secondary 20
142 			MHz is punctured
143 			<enum 5 HE_SIG_A_MU_DL_BW80_20_PUNC_IN_SEC_40> for preamble
144 			 puncturing in 80 MHz, where in the preamble only one of
145 			 the two 20 MHz sub-channels in secondary 40 MHz is punctured.
146 
147 			<enum 6 HE_SIG_A_MU_DL_BW160_SEC_20_PUNC> for preamble puncturing
148 			 in 160 MHz or 80+80 MHz, where in the primary 80 MHz of
149 			 the preamble only the secondary 20 MHz is punctured.
150 			<enum 7 HE_SIG_A_MU_DL_BW160_SEC_40_80_PUNC> for preamble
151 			 puncturing in 160 MHz or 80+80 MHz, where in the primary
152 			 80 MHz of the preamble the primary 40 MHz is present.
153 
154 			On RX side, Field Used by MAC HW
155 			<legal 0-7>
156 */
157 
158 #define PHYRX_HE_SIG_A_MU_DL_PHYRX_HE_SIG_A_MU_DL_INFO_DETAILS_TRANSMIT_BW_OFFSET   0x0000000000000000
159 #define PHYRX_HE_SIG_A_MU_DL_PHYRX_HE_SIG_A_MU_DL_INFO_DETAILS_TRANSMIT_BW_LSB      15
160 #define PHYRX_HE_SIG_A_MU_DL_PHYRX_HE_SIG_A_MU_DL_INFO_DETAILS_TRANSMIT_BW_MSB      17
161 #define PHYRX_HE_SIG_A_MU_DL_PHYRX_HE_SIG_A_MU_DL_INFO_DETAILS_TRANSMIT_BW_MASK     0x0000000000038000
162 
163 
164 /* Description		NUM_SIG_B_SYMBOLS
165 
166 			Number of symbols
167 
168 			For OFDMA, the actual number of symbols is 1 larger then
169 			 indicated in this field.
170 
171 			For MU-MIMO this is equal to the number of users - 1: the
172 			 following encoding is used:
173 			1 => 2 users
174 			2 => 3 users
175 			Etc.
176 
177 			<legal all>
178 */
179 
180 #define PHYRX_HE_SIG_A_MU_DL_PHYRX_HE_SIG_A_MU_DL_INFO_DETAILS_NUM_SIG_B_SYMBOLS_OFFSET 0x0000000000000000
181 #define PHYRX_HE_SIG_A_MU_DL_PHYRX_HE_SIG_A_MU_DL_INFO_DETAILS_NUM_SIG_B_SYMBOLS_LSB 18
182 #define PHYRX_HE_SIG_A_MU_DL_PHYRX_HE_SIG_A_MU_DL_INFO_DETAILS_NUM_SIG_B_SYMBOLS_MSB 21
183 #define PHYRX_HE_SIG_A_MU_DL_PHYRX_HE_SIG_A_MU_DL_INFO_DETAILS_NUM_SIG_B_SYMBOLS_MASK 0x00000000003c0000
184 
185 
186 /* Description		COMP_MODE_SIG_B
187 
188 			Indicates the compression mode of HE-SIG-B
189 
190 			0: Regular [uncomp mode]
191 			1: compressed mode (full-BW MU-MIMO only)
192 			<legal all>
193 */
194 
195 #define PHYRX_HE_SIG_A_MU_DL_PHYRX_HE_SIG_A_MU_DL_INFO_DETAILS_COMP_MODE_SIG_B_OFFSET 0x0000000000000000
196 #define PHYRX_HE_SIG_A_MU_DL_PHYRX_HE_SIG_A_MU_DL_INFO_DETAILS_COMP_MODE_SIG_B_LSB  22
197 #define PHYRX_HE_SIG_A_MU_DL_PHYRX_HE_SIG_A_MU_DL_INFO_DETAILS_COMP_MODE_SIG_B_MSB  22
198 #define PHYRX_HE_SIG_A_MU_DL_PHYRX_HE_SIG_A_MU_DL_INFO_DETAILS_COMP_MODE_SIG_B_MASK 0x0000000000400000
199 
200 
201 /* Description		CP_LTF_SIZE
202 
203 			Indicates the CP and HE-LTF type
204 
205 			<enum 0 MU_FourX_LTF_0_8CP> 4xLTF + 0.8 us CP
206 			<enum 1 MU_TwoX_LTF_0_8CP> 2x LTF + 0.8 µs CP
207 			<enum 2 MU_TwoX_LTF_1_6CP> 2x LTF + 1.6 µs CP
208 			<enum 3 MU_FourX_LTF_3_2CP> 4x LTF + 3.2 µs CP
209 
210 			<legal all>
211 */
212 
213 #define PHYRX_HE_SIG_A_MU_DL_PHYRX_HE_SIG_A_MU_DL_INFO_DETAILS_CP_LTF_SIZE_OFFSET   0x0000000000000000
214 #define PHYRX_HE_SIG_A_MU_DL_PHYRX_HE_SIG_A_MU_DL_INFO_DETAILS_CP_LTF_SIZE_LSB      23
215 #define PHYRX_HE_SIG_A_MU_DL_PHYRX_HE_SIG_A_MU_DL_INFO_DETAILS_CP_LTF_SIZE_MSB      24
216 #define PHYRX_HE_SIG_A_MU_DL_PHYRX_HE_SIG_A_MU_DL_INFO_DETAILS_CP_LTF_SIZE_MASK     0x0000000001800000
217 
218 
219 /* Description		DOPPLER_INDICATION
220 
221 			0: No Doppler support
222 			1: Doppler support
223 			<legal all>
224 */
225 
226 #define PHYRX_HE_SIG_A_MU_DL_PHYRX_HE_SIG_A_MU_DL_INFO_DETAILS_DOPPLER_INDICATION_OFFSET 0x0000000000000000
227 #define PHYRX_HE_SIG_A_MU_DL_PHYRX_HE_SIG_A_MU_DL_INFO_DETAILS_DOPPLER_INDICATION_LSB 25
228 #define PHYRX_HE_SIG_A_MU_DL_PHYRX_HE_SIG_A_MU_DL_INFO_DETAILS_DOPPLER_INDICATION_MSB 25
229 #define PHYRX_HE_SIG_A_MU_DL_PHYRX_HE_SIG_A_MU_DL_INFO_DETAILS_DOPPLER_INDICATION_MASK 0x0000000002000000
230 
231 
232 /* Description		RESERVED_0A
233 
234 			<legal 0>
235 */
236 
237 #define PHYRX_HE_SIG_A_MU_DL_PHYRX_HE_SIG_A_MU_DL_INFO_DETAILS_RESERVED_0A_OFFSET   0x0000000000000000
238 #define PHYRX_HE_SIG_A_MU_DL_PHYRX_HE_SIG_A_MU_DL_INFO_DETAILS_RESERVED_0A_LSB      26
239 #define PHYRX_HE_SIG_A_MU_DL_PHYRX_HE_SIG_A_MU_DL_INFO_DETAILS_RESERVED_0A_MSB      31
240 #define PHYRX_HE_SIG_A_MU_DL_PHYRX_HE_SIG_A_MU_DL_INFO_DETAILS_RESERVED_0A_MASK     0x00000000fc000000
241 
242 
243 /* Description		TXOP_DURATION
244 
245 			Indicates the remaining time in the current TXOP
246 
247 			Field Used by MAC HW
248 			 <legal all>
249 */
250 
251 #define PHYRX_HE_SIG_A_MU_DL_PHYRX_HE_SIG_A_MU_DL_INFO_DETAILS_TXOP_DURATION_OFFSET 0x0000000000000000
252 #define PHYRX_HE_SIG_A_MU_DL_PHYRX_HE_SIG_A_MU_DL_INFO_DETAILS_TXOP_DURATION_LSB    32
253 #define PHYRX_HE_SIG_A_MU_DL_PHYRX_HE_SIG_A_MU_DL_INFO_DETAILS_TXOP_DURATION_MSB    38
254 #define PHYRX_HE_SIG_A_MU_DL_PHYRX_HE_SIG_A_MU_DL_INFO_DETAILS_TXOP_DURATION_MASK   0x0000007f00000000
255 
256 
257 /* Description		RESERVED_1A
258 
259 			Note: spec indicates this shall be set to 1
260 			<legal 1>
261 */
262 
263 #define PHYRX_HE_SIG_A_MU_DL_PHYRX_HE_SIG_A_MU_DL_INFO_DETAILS_RESERVED_1A_OFFSET   0x0000000000000000
264 #define PHYRX_HE_SIG_A_MU_DL_PHYRX_HE_SIG_A_MU_DL_INFO_DETAILS_RESERVED_1A_LSB      39
265 #define PHYRX_HE_SIG_A_MU_DL_PHYRX_HE_SIG_A_MU_DL_INFO_DETAILS_RESERVED_1A_MSB      39
266 #define PHYRX_HE_SIG_A_MU_DL_PHYRX_HE_SIG_A_MU_DL_INFO_DETAILS_RESERVED_1A_MASK     0x0000008000000000
267 
268 
269 /* Description		NUM_LTF_SYMBOLS
270 
271 			Indicates the number of HE-LTF symbols
272 
273 			0: 1 LTF
274 			1: 2 LTFs
275 			2: 4 LTFs
276 			3: 6 LTFs
277 			4: 8 LTFs
278 
279 			<legal all>
280 */
281 
282 #define PHYRX_HE_SIG_A_MU_DL_PHYRX_HE_SIG_A_MU_DL_INFO_DETAILS_NUM_LTF_SYMBOLS_OFFSET 0x0000000000000000
283 #define PHYRX_HE_SIG_A_MU_DL_PHYRX_HE_SIG_A_MU_DL_INFO_DETAILS_NUM_LTF_SYMBOLS_LSB  40
284 #define PHYRX_HE_SIG_A_MU_DL_PHYRX_HE_SIG_A_MU_DL_INFO_DETAILS_NUM_LTF_SYMBOLS_MSB  42
285 #define PHYRX_HE_SIG_A_MU_DL_PHYRX_HE_SIG_A_MU_DL_INFO_DETAILS_NUM_LTF_SYMBOLS_MASK 0x0000070000000000
286 
287 
288 /* Description		LDPC_EXTRA_SYMBOL
289 
290 			If LDPC,
291 			  0: LDPC extra symbol not present
292 			  1: LDPC extra symbol present
293 			Else
294 			  Set to 1
295 			<legal all>
296 */
297 
298 #define PHYRX_HE_SIG_A_MU_DL_PHYRX_HE_SIG_A_MU_DL_INFO_DETAILS_LDPC_EXTRA_SYMBOL_OFFSET 0x0000000000000000
299 #define PHYRX_HE_SIG_A_MU_DL_PHYRX_HE_SIG_A_MU_DL_INFO_DETAILS_LDPC_EXTRA_SYMBOL_LSB 43
300 #define PHYRX_HE_SIG_A_MU_DL_PHYRX_HE_SIG_A_MU_DL_INFO_DETAILS_LDPC_EXTRA_SYMBOL_MSB 43
301 #define PHYRX_HE_SIG_A_MU_DL_PHYRX_HE_SIG_A_MU_DL_INFO_DETAILS_LDPC_EXTRA_SYMBOL_MASK 0x0000080000000000
302 
303 
304 /* Description		STBC
305 
306 			Indicates whether STBC is applied
307 			0: No STBC
308 			1: STBC
309 			<legal all>
310 */
311 
312 #define PHYRX_HE_SIG_A_MU_DL_PHYRX_HE_SIG_A_MU_DL_INFO_DETAILS_STBC_OFFSET          0x0000000000000000
313 #define PHYRX_HE_SIG_A_MU_DL_PHYRX_HE_SIG_A_MU_DL_INFO_DETAILS_STBC_LSB             44
314 #define PHYRX_HE_SIG_A_MU_DL_PHYRX_HE_SIG_A_MU_DL_INFO_DETAILS_STBC_MSB             44
315 #define PHYRX_HE_SIG_A_MU_DL_PHYRX_HE_SIG_A_MU_DL_INFO_DETAILS_STBC_MASK            0x0000100000000000
316 
317 
318 /* Description		PACKET_EXTENSION_A_FACTOR
319 
320 			the packet extension duration of the trigger-based PPDU
321 			response with these two bits indicating the "a-factor"
322 
323 			<enum 0 a_factor_4>
324 			<enum 1 a_factor_1>
325 			<enum 2 a_factor_2>
326 			<enum 3 a_factor_3>
327 
328 			<legal all>
329 */
330 
331 #define PHYRX_HE_SIG_A_MU_DL_PHYRX_HE_SIG_A_MU_DL_INFO_DETAILS_PACKET_EXTENSION_A_FACTOR_OFFSET 0x0000000000000000
332 #define PHYRX_HE_SIG_A_MU_DL_PHYRX_HE_SIG_A_MU_DL_INFO_DETAILS_PACKET_EXTENSION_A_FACTOR_LSB 45
333 #define PHYRX_HE_SIG_A_MU_DL_PHYRX_HE_SIG_A_MU_DL_INFO_DETAILS_PACKET_EXTENSION_A_FACTOR_MSB 46
334 #define PHYRX_HE_SIG_A_MU_DL_PHYRX_HE_SIG_A_MU_DL_INFO_DETAILS_PACKET_EXTENSION_A_FACTOR_MASK 0x0000600000000000
335 
336 
337 /* Description		PACKET_EXTENSION_PE_DISAMBIGUITY
338 
339 			the packet extension duration of the trigger-based PPDU
340 			response with this bit indicating the PE-Disambiguity
341 			<legal all>
342 */
343 
344 #define PHYRX_HE_SIG_A_MU_DL_PHYRX_HE_SIG_A_MU_DL_INFO_DETAILS_PACKET_EXTENSION_PE_DISAMBIGUITY_OFFSET 0x0000000000000000
345 #define PHYRX_HE_SIG_A_MU_DL_PHYRX_HE_SIG_A_MU_DL_INFO_DETAILS_PACKET_EXTENSION_PE_DISAMBIGUITY_LSB 47
346 #define PHYRX_HE_SIG_A_MU_DL_PHYRX_HE_SIG_A_MU_DL_INFO_DETAILS_PACKET_EXTENSION_PE_DISAMBIGUITY_MSB 47
347 #define PHYRX_HE_SIG_A_MU_DL_PHYRX_HE_SIG_A_MU_DL_INFO_DETAILS_PACKET_EXTENSION_PE_DISAMBIGUITY_MASK 0x0000800000000000
348 
349 
350 /* Description		CRC
351 
352 			CRC for HE-SIG-A contents.
353 			<legal all>
354 */
355 
356 #define PHYRX_HE_SIG_A_MU_DL_PHYRX_HE_SIG_A_MU_DL_INFO_DETAILS_CRC_OFFSET           0x0000000000000000
357 #define PHYRX_HE_SIG_A_MU_DL_PHYRX_HE_SIG_A_MU_DL_INFO_DETAILS_CRC_LSB              48
358 #define PHYRX_HE_SIG_A_MU_DL_PHYRX_HE_SIG_A_MU_DL_INFO_DETAILS_CRC_MSB              51
359 #define PHYRX_HE_SIG_A_MU_DL_PHYRX_HE_SIG_A_MU_DL_INFO_DETAILS_CRC_MASK             0x000f000000000000
360 
361 
362 /* Description		TAIL
363 
364 			<legal 0>
365 */
366 
367 #define PHYRX_HE_SIG_A_MU_DL_PHYRX_HE_SIG_A_MU_DL_INFO_DETAILS_TAIL_OFFSET          0x0000000000000000
368 #define PHYRX_HE_SIG_A_MU_DL_PHYRX_HE_SIG_A_MU_DL_INFO_DETAILS_TAIL_LSB             52
369 #define PHYRX_HE_SIG_A_MU_DL_PHYRX_HE_SIG_A_MU_DL_INFO_DETAILS_TAIL_MSB             57
370 #define PHYRX_HE_SIG_A_MU_DL_PHYRX_HE_SIG_A_MU_DL_INFO_DETAILS_TAIL_MASK            0x03f0000000000000
371 
372 
373 /* Description		RESERVED_1B
374 
375 			<legal 0>
376 */
377 
378 #define PHYRX_HE_SIG_A_MU_DL_PHYRX_HE_SIG_A_MU_DL_INFO_DETAILS_RESERVED_1B_OFFSET   0x0000000000000000
379 #define PHYRX_HE_SIG_A_MU_DL_PHYRX_HE_SIG_A_MU_DL_INFO_DETAILS_RESERVED_1B_LSB      58
380 #define PHYRX_HE_SIG_A_MU_DL_PHYRX_HE_SIG_A_MU_DL_INFO_DETAILS_RESERVED_1B_MSB      62
381 #define PHYRX_HE_SIG_A_MU_DL_PHYRX_HE_SIG_A_MU_DL_INFO_DETAILS_RESERVED_1B_MASK     0x7c00000000000000
382 
383 
384 /* Description		RX_INTEGRITY_CHECK_PASSED
385 
386 			TX side: Set to 0
387 			RX side: Set to 1 if PHY determines the HE-SIG-A CRC check
388 			 has passed, else set to 0
389 
390 			<legal all>
391 */
392 
393 #define PHYRX_HE_SIG_A_MU_DL_PHYRX_HE_SIG_A_MU_DL_INFO_DETAILS_RX_INTEGRITY_CHECK_PASSED_OFFSET 0x0000000000000000
394 #define PHYRX_HE_SIG_A_MU_DL_PHYRX_HE_SIG_A_MU_DL_INFO_DETAILS_RX_INTEGRITY_CHECK_PASSED_LSB 63
395 #define PHYRX_HE_SIG_A_MU_DL_PHYRX_HE_SIG_A_MU_DL_INFO_DETAILS_RX_INTEGRITY_CHECK_PASSED_MSB 63
396 #define PHYRX_HE_SIG_A_MU_DL_PHYRX_HE_SIG_A_MU_DL_INFO_DETAILS_RX_INTEGRITY_CHECK_PASSED_MASK 0x8000000000000000
397 
398 
399 
400 #endif   // PHYRX_HE_SIG_A_MU_DL
401