1 
2 /* Copyright (c) 2022-2023, Qualcomm Innovation Center, Inc. All rights reserved.
3  *
4  * Permission to use, copy, modify, and/or distribute this software for any
5  * purpose with or without fee is hereby granted, provided that the above
6  * copyright notice and this permission notice appear in all copies.
7  *
8  * THE SOFTWARE IS PROVIDED "AS IS" AND THE AUTHOR DISCLAIMS ALL WARRANTIES
9  * WITH REGARD TO THIS SOFTWARE INCLUDING ALL IMPLIED WARRANTIES OF
10  * MERCHANTABILITY AND FITNESS. IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR
11  * ANY SPECIAL, DIRECT, INDIRECT, OR CONSEQUENTIAL DAMAGES OR ANY DAMAGES
12  * WHATSOEVER RESULTING FROM LOSS OF USE, DATA OR PROFITS, WHETHER IN AN
13  * ACTION OF CONTRACT, NEGLIGENCE OR OTHER TORTIOUS ACTION, ARISING OUT OF
14  * OR IN CONNECTION WITH THE USE OR PERFORMANCE OF THIS SOFTWARE.
15  */
16 
17 
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22 
23 
24 
25 
26 #ifndef _MON_DESTINATION_RING_H_
27 #define _MON_DESTINATION_RING_H_
28 #if !defined(__ASSEMBLER__)
29 #endif
30 
31 #define NUM_OF_DWORDS_MON_DESTINATION_RING 4
32 
33 
34 struct mon_destination_ring {
35 #ifndef BIG_ENDIAN_HOST
36              uint32_t stat_buf_virt_addr_31_0                                 : 32; // [31:0]
37              uint32_t stat_buf_virt_addr_63_32                                : 32; // [31:0]
38              uint32_t ppdu_id                                                 : 32; // [31:0]
39              uint32_t end_offset                                              : 12, // [11:0]
40                       reserved_3a                                             :  4, // [15:12]
41                       end_reason                                              :  2, // [17:16]
42                       initiator                                               :  1, // [18:18]
43                       empty_descriptor                                        :  1, // [19:19]
44                       ring_id                                                 :  8, // [27:20]
45                       looping_count                                           :  4; // [31:28]
46 #else
47              uint32_t stat_buf_virt_addr_31_0                                 : 32; // [31:0]
48              uint32_t stat_buf_virt_addr_63_32                                : 32; // [31:0]
49              uint32_t ppdu_id                                                 : 32; // [31:0]
50              uint32_t looping_count                                           :  4, // [31:28]
51                       ring_id                                                 :  8, // [27:20]
52                       empty_descriptor                                        :  1, // [19:19]
53                       initiator                                               :  1, // [18:18]
54                       end_reason                                              :  2, // [17:16]
55                       reserved_3a                                             :  4, // [15:12]
56                       end_offset                                              : 12; // [11:0]
57 #endif
58 };
59 
60 
61 /* Description		STAT_BUF_VIRT_ADDR_31_0
62 
63 			Lower 32 bits of the 64-bit virtual address of the status
64 			 buffer
65 			<legal all>
66 */
67 
68 #define MON_DESTINATION_RING_STAT_BUF_VIRT_ADDR_31_0_OFFSET                         0x00000000
69 #define MON_DESTINATION_RING_STAT_BUF_VIRT_ADDR_31_0_LSB                            0
70 #define MON_DESTINATION_RING_STAT_BUF_VIRT_ADDR_31_0_MSB                            31
71 #define MON_DESTINATION_RING_STAT_BUF_VIRT_ADDR_31_0_MASK                           0xffffffff
72 
73 
74 /* Description		STAT_BUF_VIRT_ADDR_63_32
75 
76 			Upper 32 bits of the 64-bit virtual address of the status
77 			 buffer
78 			<legal all>
79 */
80 
81 #define MON_DESTINATION_RING_STAT_BUF_VIRT_ADDR_63_32_OFFSET                        0x00000004
82 #define MON_DESTINATION_RING_STAT_BUF_VIRT_ADDR_63_32_LSB                           0
83 #define MON_DESTINATION_RING_STAT_BUF_VIRT_ADDR_63_32_MSB                           31
84 #define MON_DESTINATION_RING_STAT_BUF_VIRT_ADDR_63_32_MASK                          0xffffffff
85 
86 
87 /* Description		PPDU_ID
88 
89 			TXMON fills this with the schedule_id from 'TX_FES_SETUP'
90 			when Initiator = 1.
91 			TXMON fills this with the Phy_ppdu_id from 'RX_RESPONSE_REQUIRED_INFO'
92 			when Initiator = 0.
93 			RXMON fills this with the Phy_ppdu_id from 'RX_PPDU_START.'
94 
95 			<legal all>
96 */
97 
98 #define MON_DESTINATION_RING_PPDU_ID_OFFSET                                         0x00000008
99 #define MON_DESTINATION_RING_PPDU_ID_LSB                                            0
100 #define MON_DESTINATION_RING_PPDU_ID_MSB                                            31
101 #define MON_DESTINATION_RING_PPDU_ID_MASK                                           0xffffffff
102 
103 
104 /* Description		END_OFFSET
105 
106 			The offset (in units of 4 bytes) into the status buffer
107 			where DMA ended, i.e. offset to the last TLV + last TLV
108 			size MINUS 1.
109 
110 			In case of a 'TX_FLUSH' or 'RX_FLUSH,' this reflects the
111 			 offset at which flush occurred.
112 			<legal all>
113 */
114 
115 #define MON_DESTINATION_RING_END_OFFSET_OFFSET                                      0x0000000c
116 #define MON_DESTINATION_RING_END_OFFSET_LSB                                         0
117 #define MON_DESTINATION_RING_END_OFFSET_MSB                                         11
118 #define MON_DESTINATION_RING_END_OFFSET_MASK                                        0x00000fff
119 
120 
121 /* Description		RESERVED_3A
122 
123 			<legal 0>
124 */
125 
126 #define MON_DESTINATION_RING_RESERVED_3A_OFFSET                                     0x0000000c
127 #define MON_DESTINATION_RING_RESERVED_3A_LSB                                        12
128 #define MON_DESTINATION_RING_RESERVED_3A_MSB                                        15
129 #define MON_DESTINATION_RING_RESERVED_3A_MASK                                       0x0000f000
130 
131 
132 /* Description		END_REASON
133 
134 			<enum 0 MON_status_buffer_full> The status buffer was fully
135 			 written.
136 			<enum 1 MON_flush_detected> A 'TX_FLUSH' or 'RX_FLUSH' was
137 			 received. This is implicitly the end of the Tx FES or Rx
138 			 PPDU. The status buffer data can be discarded by SW.
139 			<enum 2 MON_end_of_PPDU> A 'TX_FES_STATUS_END' or 'RX_PPDU_END'
140 			was received indicating the end of the Tx FES or Rx PPDU.
141 
142 			<enum 3 MON_PPDU_truncated> The PPDU got truncated due to
143 			 a system-level error.
144 			<legal all>
145 */
146 
147 #define MON_DESTINATION_RING_END_REASON_OFFSET                                      0x0000000c
148 #define MON_DESTINATION_RING_END_REASON_LSB                                         16
149 #define MON_DESTINATION_RING_END_REASON_MSB                                         17
150 #define MON_DESTINATION_RING_END_REASON_MASK                                        0x00030000
151 
152 
153 /* Description		INITIATOR
154 
155 			1: This descriptor belongs to a TX FES (TXOP initiator)
156 			0: This descriptor belongs to a response TX (TXOP responder)
157 
158 			<legal all>
159 */
160 
161 #define MON_DESTINATION_RING_INITIATOR_OFFSET                                       0x0000000c
162 #define MON_DESTINATION_RING_INITIATOR_LSB                                          18
163 #define MON_DESTINATION_RING_INITIATOR_MSB                                          18
164 #define MON_DESTINATION_RING_INITIATOR_MASK                                         0x00040000
165 
166 
167 /* Description		EMPTY_DESCRIPTOR
168 
169 			0: This descriptor is written on a flush or the end of a
170 			 PPDU or the end of status buffer
171 			1: This descriptor is written to indicate drop information
172 			 (see 'MON_DESTINATION_RING_WITH_DROP' structure)
173 			<legal 0>
174 */
175 
176 #define MON_DESTINATION_RING_EMPTY_DESCRIPTOR_OFFSET                                0x0000000c
177 #define MON_DESTINATION_RING_EMPTY_DESCRIPTOR_LSB                                   19
178 #define MON_DESTINATION_RING_EMPTY_DESCRIPTOR_MSB                                   19
179 #define MON_DESTINATION_RING_EMPTY_DESCRIPTOR_MASK                                  0x00080000
180 
181 
182 /* Description		RING_ID
183 
184 			Consumer: SW/REO/DEBUG
185 			Producer: SRNG (of TXMON/RXMON)
186 
187 			For debugging.
188 			This field is filled in by the SRNG module.
189 			It help to identify the ring that is being looked
190 			<legal 0>
191 */
192 
193 #define MON_DESTINATION_RING_RING_ID_OFFSET                                         0x0000000c
194 #define MON_DESTINATION_RING_RING_ID_LSB                                            20
195 #define MON_DESTINATION_RING_RING_ID_MSB                                            27
196 #define MON_DESTINATION_RING_RING_ID_MASK                                           0x0ff00000
197 
198 
199 /* Description		LOOPING_COUNT
200 
201 			Consumer: SW/DEBUG
202 			Producer: SRNG (of TXMON/RXMON)
203 
204 			For debugging.
205 			This field is filled in by the SRNG module.
206 
207 			A count value that indicates the number of times the producer
208 			 of entries into this Ring has looped around the ring.
209 			At initialization time, this value is set to 0. On the first
210 			 loop, this value is set to 1. After the max value is reached
211 			 allowed by the number of bits for this field, the count
212 			 value continues with 0 again.
213 
214 			In case SW is the consumer of the ring entries, it can use
215 			 this field to figure out up to where the producer of entries
216 			 has created new entries. This eliminates the need to check
217 			 where the "head pointer' of the ring is located once the
218 			 SW starts processing an interrupt indicating that new entries
219 			 have been put into this ring...
220 
221 			Also note that SW if it wants only needs to look at the
222 			LSB bit of this count value.
223 			<legal all>
224 */
225 
226 #define MON_DESTINATION_RING_LOOPING_COUNT_OFFSET                                   0x0000000c
227 #define MON_DESTINATION_RING_LOOPING_COUNT_LSB                                      28
228 #define MON_DESTINATION_RING_LOOPING_COUNT_MSB                                      31
229 #define MON_DESTINATION_RING_LOOPING_COUNT_MASK                                     0xf0000000
230 
231 
232 
233 #endif   // MON_DESTINATION_RING
234