1 2 /* Copyright (c) 2022-2023, Qualcomm Innovation Center, Inc. All rights reserved. 3 * 4 * Permission to use, copy, modify, and/or distribute this software for any 5 * purpose with or without fee is hereby granted, provided that the above 6 * copyright notice and this permission notice appear in all copies. 7 * 8 * THE SOFTWARE IS PROVIDED "AS IS" AND THE AUTHOR DISCLAIMS ALL WARRANTIES 9 * WITH REGARD TO THIS SOFTWARE INCLUDING ALL IMPLIED WARRANTIES OF 10 * MERCHANTABILITY AND FITNESS. IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR 11 * ANY SPECIAL, DIRECT, INDIRECT, OR CONSEQUENTIAL DAMAGES OR ANY DAMAGES 12 * WHATSOEVER RESULTING FROM LOSS OF USE, DATA OR PROFITS, WHETHER IN AN 13 * ACTION OF CONTRACT, NEGLIGENCE OR OTHER TORTIOUS ACTION, ARISING OUT OF 14 * OR IN CONNECTION WITH THE USE OR PERFORMANCE OF THIS SOFTWARE. 15 */ 16 17 18 19 20 21 22 23 24 25 26 #ifndef _MON_BUFFER_ADDR_H_ 27 #define _MON_BUFFER_ADDR_H_ 28 #if !defined(__ASSEMBLER__) 29 #endif 30 31 #define NUM_OF_DWORDS_MON_BUFFER_ADDR 4 32 33 #define NUM_OF_QWORDS_MON_BUFFER_ADDR 2 34 35 36 struct mon_buffer_addr { 37 #ifndef BIG_ENDIAN_HOST 38 uint32_t buffer_virt_addr_31_0 : 32; // [31:0] 39 uint32_t buffer_virt_addr_63_32 : 32; // [31:0] 40 uint32_t dma_length : 12, // [11:0] 41 reserved_2a : 4, // [15:12] 42 msdu_continuation : 1, // [16:16] 43 truncated : 1, // [17:17] 44 reserved_2b : 14; // [31:18] 45 uint32_t tlv64_padding : 32; // [31:0] 46 #else 47 uint32_t buffer_virt_addr_31_0 : 32; // [31:0] 48 uint32_t buffer_virt_addr_63_32 : 32; // [31:0] 49 uint32_t reserved_2b : 14, // [31:18] 50 truncated : 1, // [17:17] 51 msdu_continuation : 1, // [16:16] 52 reserved_2a : 4, // [15:12] 53 dma_length : 12; // [11:0] 54 uint32_t tlv64_padding : 32; // [31:0] 55 #endif 56 }; 57 58 59 /* Description BUFFER_VIRT_ADDR_31_0 60 61 Lower 32 bits of the 64-bit virtual address of the packet 62 buffer 63 <legal all> 64 */ 65 66 #define MON_BUFFER_ADDR_BUFFER_VIRT_ADDR_31_0_OFFSET 0x0000000000000000 67 #define MON_BUFFER_ADDR_BUFFER_VIRT_ADDR_31_0_LSB 0 68 #define MON_BUFFER_ADDR_BUFFER_VIRT_ADDR_31_0_MSB 31 69 #define MON_BUFFER_ADDR_BUFFER_VIRT_ADDR_31_0_MASK 0x00000000ffffffff 70 71 72 /* Description BUFFER_VIRT_ADDR_63_32 73 74 Upper 32 bits of the 64-bit virtual address of the packet 75 buffer 76 <legal all> 77 */ 78 79 #define MON_BUFFER_ADDR_BUFFER_VIRT_ADDR_63_32_OFFSET 0x0000000000000000 80 #define MON_BUFFER_ADDR_BUFFER_VIRT_ADDR_63_32_LSB 32 81 #define MON_BUFFER_ADDR_BUFFER_VIRT_ADDR_63_32_MSB 63 82 #define MON_BUFFER_ADDR_BUFFER_VIRT_ADDR_63_32_MASK 0xffffffff00000000 83 84 85 /* Description DMA_LENGTH 86 87 The number of bytes DMA'd into the packet buffer MINUS 1. 88 89 90 The packet could be truncated in case of a 'TX_FLUSH' or 91 'RX_FLUSH,' or in case of drops due to back-pressure. 92 <legal all> 93 */ 94 95 #define MON_BUFFER_ADDR_DMA_LENGTH_OFFSET 0x0000000000000008 96 #define MON_BUFFER_ADDR_DMA_LENGTH_LSB 0 97 #define MON_BUFFER_ADDR_DMA_LENGTH_MSB 11 98 #define MON_BUFFER_ADDR_DMA_LENGTH_MASK 0x0000000000000fff 99 100 101 /* Description RESERVED_2A 102 103 <legal 0> 104 */ 105 106 #define MON_BUFFER_ADDR_RESERVED_2A_OFFSET 0x0000000000000008 107 #define MON_BUFFER_ADDR_RESERVED_2A_LSB 12 108 #define MON_BUFFER_ADDR_RESERVED_2A_MSB 15 109 #define MON_BUFFER_ADDR_RESERVED_2A_MASK 0x000000000000f000 110 111 112 /* Description MSDU_CONTINUATION 113 114 When set, this packet buffer was not able to hold the entire 115 MSDU. The next buffer will therefore contain additional 116 packet bytes. 117 <legal all> 118 */ 119 120 #define MON_BUFFER_ADDR_MSDU_CONTINUATION_OFFSET 0x0000000000000008 121 #define MON_BUFFER_ADDR_MSDU_CONTINUATION_LSB 16 122 #define MON_BUFFER_ADDR_MSDU_CONTINUATION_MSB 16 123 #define MON_BUFFER_ADDR_MSDU_CONTINUATION_MASK 0x0000000000010000 124 125 126 /* Description TRUNCATED 127 128 When set, this TLV belongs to a previously truncated MPDU. 129 130 <legal all> 131 */ 132 133 #define MON_BUFFER_ADDR_TRUNCATED_OFFSET 0x0000000000000008 134 #define MON_BUFFER_ADDR_TRUNCATED_LSB 17 135 #define MON_BUFFER_ADDR_TRUNCATED_MSB 17 136 #define MON_BUFFER_ADDR_TRUNCATED_MASK 0x0000000000020000 137 138 139 /* Description RESERVED_2B 140 141 <legal 0> 142 */ 143 144 #define MON_BUFFER_ADDR_RESERVED_2B_OFFSET 0x0000000000000008 145 #define MON_BUFFER_ADDR_RESERVED_2B_LSB 18 146 #define MON_BUFFER_ADDR_RESERVED_2B_MSB 31 147 #define MON_BUFFER_ADDR_RESERVED_2B_MASK 0x00000000fffc0000 148 149 150 /* Description TLV64_PADDING 151 152 Automatic DWORD padding inserted while converting TLV32 153 to TLV64 for 64 bit ARCH 154 <legal 0> 155 */ 156 157 #define MON_BUFFER_ADDR_TLV64_PADDING_OFFSET 0x0000000000000008 158 #define MON_BUFFER_ADDR_TLV64_PADDING_LSB 32 159 #define MON_BUFFER_ADDR_TLV64_PADDING_MSB 63 160 #define MON_BUFFER_ADDR_TLV64_PADDING_MASK 0xffffffff00000000 161 162 163 164 #endif // MON_BUFFER_ADDR 165