1 2 /* Copyright (c) 2022, Qualcomm Innovation Center, Inc. All rights reserved. 3 * 4 * Permission to use, copy, modify, and/or distribute this software for any 5 * purpose with or without fee is hereby granted, provided that the above 6 * copyright notice and this permission notice appear in all copies. 7 * 8 * THE SOFTWARE IS PROVIDED "AS IS" AND THE AUTHOR DISCLAIMS ALL WARRANTIES 9 * WITH REGARD TO THIS SOFTWARE INCLUDING ALL IMPLIED WARRANTIES OF 10 * MERCHANTABILITY AND FITNESS. IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR 11 * ANY SPECIAL, DIRECT, INDIRECT, OR CONSEQUENTIAL DAMAGES OR ANY DAMAGES 12 * WHATSOEVER RESULTING FROM LOSS OF USE, DATA OR PROFITS, WHETHER IN AN 13 * ACTION OF CONTRACT, NEGLIGENCE OR OTHER TORTIOUS ACTION, ARISING OUT OF 14 * OR IN CONNECTION WITH THE USE OR PERFORMANCE OF THIS SOFTWARE. 15 */ 16 17 18 19 20 21 22 23 24 25 26 #ifndef _MLO_STA_ID_DETAILS_H_ 27 #define _MLO_STA_ID_DETAILS_H_ 28 #if !defined(__ASSEMBLER__) 29 #endif 30 31 #define NUM_OF_WORDS_MLO_STA_ID_DETAILS 1 32 33 34 struct mlo_sta_id_details { 35 #ifndef WIFI_BIT_ORDER_BIG_ENDIAN 36 uint16_t nstr_mlo_sta_id : 10, // [9:0] 37 block_self_ml_sync : 1, // [10:10] 38 block_partner_ml_sync : 1, // [11:11] 39 nstr_mlo_sta_id_valid : 1, // [12:12] 40 reserved_0a : 3; // [15:13] 41 #else 42 uint16_t reserved_0a : 3, // [15:13] 43 nstr_mlo_sta_id_valid : 1, // [12:12] 44 block_partner_ml_sync : 1, // [11:11] 45 block_self_ml_sync : 1, // [10:10] 46 nstr_mlo_sta_id : 10; // [9:0] 47 #endif 48 }; 49 50 51 /* Description NSTR_MLO_STA_ID 52 53 ID of peer participating in non-STR MLO 54 */ 55 56 #define MLO_STA_ID_DETAILS_NSTR_MLO_STA_ID_OFFSET 0x00000000 57 #define MLO_STA_ID_DETAILS_NSTR_MLO_STA_ID_LSB 0 58 #define MLO_STA_ID_DETAILS_NSTR_MLO_STA_ID_MSB 9 59 #define MLO_STA_ID_DETAILS_NSTR_MLO_STA_ID_MASK 0x000003ff 60 61 62 /* Description BLOCK_SELF_ML_SYNC 63 64 Only valid for TX 65 66 When set, this provides an indication to block the peer 67 for self-link. 68 */ 69 70 #define MLO_STA_ID_DETAILS_BLOCK_SELF_ML_SYNC_OFFSET 0x00000000 71 #define MLO_STA_ID_DETAILS_BLOCK_SELF_ML_SYNC_LSB 10 72 #define MLO_STA_ID_DETAILS_BLOCK_SELF_ML_SYNC_MSB 10 73 #define MLO_STA_ID_DETAILS_BLOCK_SELF_ML_SYNC_MASK 0x00000400 74 75 76 /* Description BLOCK_PARTNER_ML_SYNC 77 78 Only valid for TX 79 80 When set, this provides an indication to block the peer 81 for partner links. 82 */ 83 84 #define MLO_STA_ID_DETAILS_BLOCK_PARTNER_ML_SYNC_OFFSET 0x00000000 85 #define MLO_STA_ID_DETAILS_BLOCK_PARTNER_ML_SYNC_LSB 11 86 #define MLO_STA_ID_DETAILS_BLOCK_PARTNER_ML_SYNC_MSB 11 87 #define MLO_STA_ID_DETAILS_BLOCK_PARTNER_ML_SYNC_MASK 0x00000800 88 89 90 /* Description NSTR_MLO_STA_ID_VALID 91 92 All the fields in this TLV are valid only if this bit is 93 set. 94 */ 95 96 #define MLO_STA_ID_DETAILS_NSTR_MLO_STA_ID_VALID_OFFSET 0x00000000 97 #define MLO_STA_ID_DETAILS_NSTR_MLO_STA_ID_VALID_LSB 12 98 #define MLO_STA_ID_DETAILS_NSTR_MLO_STA_ID_VALID_MSB 12 99 #define MLO_STA_ID_DETAILS_NSTR_MLO_STA_ID_VALID_MASK 0x00001000 100 101 102 /* Description RESERVED_0A 103 104 <legal 0> 105 */ 106 107 #define MLO_STA_ID_DETAILS_RESERVED_0A_OFFSET 0x00000000 108 #define MLO_STA_ID_DETAILS_RESERVED_0A_LSB 13 109 #define MLO_STA_ID_DETAILS_RESERVED_0A_MSB 15 110 #define MLO_STA_ID_DETAILS_RESERVED_0A_MASK 0x0000e000 111 112 113 114 #endif // MLO_STA_ID_DETAILS 115