1 
2 /* Copyright (c) 2022, Qualcomm Innovation Center, Inc. All rights reserved.
3  *
4  * Permission to use, copy, modify, and/or distribute this software for any
5  * purpose with or without fee is hereby granted, provided that the above
6  * copyright notice and this permission notice appear in all copies.
7  *
8  * THE SOFTWARE IS PROVIDED "AS IS" AND THE AUTHOR DISCLAIMS ALL WARRANTIES
9  * WITH REGARD TO THIS SOFTWARE INCLUDING ALL IMPLIED WARRANTIES OF
10  * MERCHANTABILITY AND FITNESS. IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR
11  * ANY SPECIAL, DIRECT, INDIRECT, OR CONSEQUENTIAL DAMAGES OR ANY DAMAGES
12  * WHATSOEVER RESULTING FROM LOSS OF USE, DATA OR PROFITS, WHETHER IN AN
13  * ACTION OF CONTRACT, NEGLIGENCE OR OTHER TORTIOUS ACTION, ARISING OUT OF
14  * OR IN CONNECTION WITH THE USE OR PERFORMANCE OF THIS SOFTWARE.
15  */
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23 
24 
25 
26 #ifndef _L_SIG_B_INFO_H_
27 #define _L_SIG_B_INFO_H_
28 #if !defined(__ASSEMBLER__)
29 #endif
30 
31 #define NUM_OF_DWORDS_L_SIG_B_INFO 1
32 
33 
34 struct l_sig_b_info {
35 #ifndef WIFI_BIT_ORDER_BIG_ENDIAN
36              uint32_t rate                                                    :  4, // [3:0]
37                       length                                                  : 12, // [15:4]
38                       reserved                                                : 15, // [30:16]
39                       rx_integrity_check_passed                               :  1; // [31:31]
40 #else
41              uint32_t rx_integrity_check_passed                               :  1, // [31:31]
42                       reserved                                                : 15, // [30:16]
43                       length                                                  : 12, // [15:4]
44                       rate                                                    :  4; // [3:0]
45 #endif
46 };
47 
48 
49 /* Description		RATE
50 
51 			<enum 1    dsss_1_mpbs_long> DSSS 1 Mbps long
52 			<enum 2    dsss_2_mbps_long> DSSS 2 Mbps long
53 			<enum 3    cck_5_5_mbps_long> CCK 5.5 Mbps long
54 			<enum 4    cck_11_mbps_long> CCK 11 Mbps long
55 			<enum 5    dsss_2_mbps_short> DSSS 2 Mbps short
56 			<enum 6    cck_5_5_mbps_short> CCK 5.5 Mbps short
57 			<enum 7    cck_11_mbps_short> CCK 11 Mbps short
58 			<legal 1-7>
59 */
60 
61 #define L_SIG_B_INFO_RATE_OFFSET                                                    0x00000000
62 #define L_SIG_B_INFO_RATE_LSB                                                       0
63 #define L_SIG_B_INFO_RATE_MSB                                                       3
64 #define L_SIG_B_INFO_RATE_MASK                                                      0x0000000f
65 
66 
67 /* Description		LENGTH
68 
69 			The length indicates the number of octets in this MPDU.
70 			<legal all>
71 */
72 
73 #define L_SIG_B_INFO_LENGTH_OFFSET                                                  0x00000000
74 #define L_SIG_B_INFO_LENGTH_LSB                                                     4
75 #define L_SIG_B_INFO_LENGTH_MSB                                                     15
76 #define L_SIG_B_INFO_LENGTH_MASK                                                    0x0000fff0
77 
78 
79 /* Description		RESERVED
80 
81 			Reserved: Should be set to 0 by the transmitting MAC and
82 			 ignored by the PHY <legal 0>
83 */
84 
85 #define L_SIG_B_INFO_RESERVED_OFFSET                                                0x00000000
86 #define L_SIG_B_INFO_RESERVED_LSB                                                   16
87 #define L_SIG_B_INFO_RESERVED_MSB                                                   30
88 #define L_SIG_B_INFO_RESERVED_MASK                                                  0x7fff0000
89 
90 
91 /* Description		RX_INTEGRITY_CHECK_PASSED
92 
93 			TX side: Set to 0
94 			RX side: Set to 1 if PHY determines the .11b PHY header
95 			CRC check has passed, else set to 0
96 
97 			<legal all>
98 */
99 
100 #define L_SIG_B_INFO_RX_INTEGRITY_CHECK_PASSED_OFFSET                               0x00000000
101 #define L_SIG_B_INFO_RX_INTEGRITY_CHECK_PASSED_LSB                                  31
102 #define L_SIG_B_INFO_RX_INTEGRITY_CHECK_PASSED_MSB                                  31
103 #define L_SIG_B_INFO_RX_INTEGRITY_CHECK_PASSED_MASK                                 0x80000000
104 
105 
106 
107 #endif   // L_SIG_B_INFO
108