1 /* 2 * Copyright (c) 2023-2024 Qualcomm Innovation Center, Inc. All rights reserved. 3 * 4 * Permission to use, copy, modify, and/or distribute this software for any 5 * purpose with or without fee is hereby granted, provided that the above 6 * copyright notice and this permission notice appear in all copies. 7 * 8 * THE SOFTWARE IS PROVIDED "AS IS" AND THE AUTHOR DISCLAIMS ALL WARRANTIES 9 * WITH REGARD TO THIS SOFTWARE INCLUDING ALL IMPLIED WARRANTIES OF 10 * MERCHANTABILITY AND FITNESS. IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR 11 * ANY SPECIAL, DIRECT, INDIRECT, OR CONSEQUENTIAL DAMAGES OR ANY DAMAGES 12 * WHATSOEVER RESULTING FROM LOSS OF USE, DATA OR PROFITS, WHETHER IN AN 13 * ACTION OF CONTRACT, NEGLIGENCE OR OTHER TORTIOUS ACTION, ARISING OUT OF 14 * OR IN CONNECTION WITH THE USE OR PERFORMANCE OF THIS SOFTWARE. 15 */ 16 17 18 #ifndef _PDG_RESPONSE_RATE_SETTING_H_ 19 #define _PDG_RESPONSE_RATE_SETTING_H_ 20 21 #include "mlo_sta_id_details.h" 22 #define NUM_OF_DWORDS_PDG_RESPONSE_RATE_SETTING 7 23 24 struct pdg_response_rate_setting { 25 #ifndef WIFI_BIT_ORDER_BIG_ENDIAN 26 uint32_t reserved_0a : 1, 27 tx_antenna_sector_ctrl : 24, 28 pkt_type : 4, 29 smoothing : 1, 30 ldpc : 1, 31 stbc : 1; 32 uint32_t alt_tx_pwr : 8, 33 alt_min_tx_pwr : 8, 34 alt_nss : 3, 35 alt_tx_chain_mask : 8, 36 alt_bw : 3, 37 stf_ltf_3db_boost : 1, 38 force_extra_symbol : 1; 39 uint32_t alt_rate_mcs : 4, 40 nss : 3, 41 dpd_enable : 1, 42 tx_pwr : 8, 43 min_tx_pwr : 8, 44 tx_chain_mask : 8; 45 uint32_t reserved_3a : 8, 46 sgi : 2, 47 rate_mcs : 4, 48 reserved_3b : 2, 49 tx_pwr_1 : 8, 50 alt_tx_pwr_1 : 8; 51 uint32_t aggregation : 1, 52 dot11ax_bss_color_id : 6, 53 dot11ax_spatial_reuse : 4, 54 dot11ax_cp_ltf_size : 2, 55 dot11ax_dcm : 1, 56 dot11ax_doppler_indication : 1, 57 dot11ax_su_extended : 1, 58 dot11ax_min_packet_extension : 2, 59 dot11ax_pe_nss : 3, 60 dot11ax_pe_content : 1, 61 dot11ax_pe_ltf_size : 2, 62 dot11ax_chain_csd_en : 1, 63 dot11ax_pe_chain_csd_en : 1, 64 dot11ax_dl_ul_flag : 1, 65 reserved_4a : 5; 66 uint32_t dot11ax_ext_ru_start_index : 4, 67 dot11ax_ext_ru_size : 4, 68 eht_duplicate_mode : 2, 69 he_sigb_dcm : 1, 70 he_sigb_0_mcs : 3, 71 num_he_sigb_sym : 5, 72 required_response_time_source : 1, 73 reserved_5a : 6, 74 u_sig_puncture_pattern_encoding : 6; 75 struct mlo_sta_id_details mlo_sta_id_details_rx; 76 uint16_t required_response_time : 12, 77 dot11be_params_placeholder : 4; 78 #else 79 uint32_t stbc : 1, 80 ldpc : 1, 81 smoothing : 1, 82 pkt_type : 4, 83 tx_antenna_sector_ctrl : 24, 84 reserved_0a : 1; 85 uint32_t force_extra_symbol : 1, 86 stf_ltf_3db_boost : 1, 87 alt_bw : 3, 88 alt_tx_chain_mask : 8, 89 alt_nss : 3, 90 alt_min_tx_pwr : 8, 91 alt_tx_pwr : 8; 92 uint32_t tx_chain_mask : 8, 93 min_tx_pwr : 8, 94 tx_pwr : 8, 95 dpd_enable : 1, 96 nss : 3, 97 alt_rate_mcs : 4; 98 uint32_t alt_tx_pwr_1 : 8, 99 tx_pwr_1 : 8, 100 reserved_3b : 2, 101 rate_mcs : 4, 102 sgi : 2, 103 reserved_3a : 8; 104 uint32_t reserved_4a : 5, 105 dot11ax_dl_ul_flag : 1, 106 dot11ax_pe_chain_csd_en : 1, 107 dot11ax_chain_csd_en : 1, 108 dot11ax_pe_ltf_size : 2, 109 dot11ax_pe_content : 1, 110 dot11ax_pe_nss : 3, 111 dot11ax_min_packet_extension : 2, 112 dot11ax_su_extended : 1, 113 dot11ax_doppler_indication : 1, 114 dot11ax_dcm : 1, 115 dot11ax_cp_ltf_size : 2, 116 dot11ax_spatial_reuse : 4, 117 dot11ax_bss_color_id : 6, 118 aggregation : 1; 119 uint32_t u_sig_puncture_pattern_encoding : 6, 120 reserved_5a : 6, 121 required_response_time_source : 1, 122 num_he_sigb_sym : 5, 123 he_sigb_0_mcs : 3, 124 he_sigb_dcm : 1, 125 eht_duplicate_mode : 2, 126 dot11ax_ext_ru_size : 4, 127 dot11ax_ext_ru_start_index : 4; 128 uint32_t dot11be_params_placeholder : 4, 129 required_response_time : 12; 130 struct mlo_sta_id_details mlo_sta_id_details_rx; 131 #endif 132 }; 133 134 #define PDG_RESPONSE_RATE_SETTING_RESERVED_0A_OFFSET 0x00000000 135 #define PDG_RESPONSE_RATE_SETTING_RESERVED_0A_LSB 0 136 #define PDG_RESPONSE_RATE_SETTING_RESERVED_0A_MSB 0 137 #define PDG_RESPONSE_RATE_SETTING_RESERVED_0A_MASK 0x00000001 138 139 #define PDG_RESPONSE_RATE_SETTING_TX_ANTENNA_SECTOR_CTRL_OFFSET 0x00000000 140 #define PDG_RESPONSE_RATE_SETTING_TX_ANTENNA_SECTOR_CTRL_LSB 1 141 #define PDG_RESPONSE_RATE_SETTING_TX_ANTENNA_SECTOR_CTRL_MSB 24 142 #define PDG_RESPONSE_RATE_SETTING_TX_ANTENNA_SECTOR_CTRL_MASK 0x01fffffe 143 144 #define PDG_RESPONSE_RATE_SETTING_PKT_TYPE_OFFSET 0x00000000 145 #define PDG_RESPONSE_RATE_SETTING_PKT_TYPE_LSB 25 146 #define PDG_RESPONSE_RATE_SETTING_PKT_TYPE_MSB 28 147 #define PDG_RESPONSE_RATE_SETTING_PKT_TYPE_MASK 0x1e000000 148 149 #define PDG_RESPONSE_RATE_SETTING_SMOOTHING_OFFSET 0x00000000 150 #define PDG_RESPONSE_RATE_SETTING_SMOOTHING_LSB 29 151 #define PDG_RESPONSE_RATE_SETTING_SMOOTHING_MSB 29 152 #define PDG_RESPONSE_RATE_SETTING_SMOOTHING_MASK 0x20000000 153 154 #define PDG_RESPONSE_RATE_SETTING_LDPC_OFFSET 0x00000000 155 #define PDG_RESPONSE_RATE_SETTING_LDPC_LSB 30 156 #define PDG_RESPONSE_RATE_SETTING_LDPC_MSB 30 157 #define PDG_RESPONSE_RATE_SETTING_LDPC_MASK 0x40000000 158 159 #define PDG_RESPONSE_RATE_SETTING_STBC_OFFSET 0x00000000 160 #define PDG_RESPONSE_RATE_SETTING_STBC_LSB 31 161 #define PDG_RESPONSE_RATE_SETTING_STBC_MSB 31 162 #define PDG_RESPONSE_RATE_SETTING_STBC_MASK 0x80000000 163 164 #define PDG_RESPONSE_RATE_SETTING_ALT_TX_PWR_OFFSET 0x00000004 165 #define PDG_RESPONSE_RATE_SETTING_ALT_TX_PWR_LSB 0 166 #define PDG_RESPONSE_RATE_SETTING_ALT_TX_PWR_MSB 7 167 #define PDG_RESPONSE_RATE_SETTING_ALT_TX_PWR_MASK 0x000000ff 168 169 #define PDG_RESPONSE_RATE_SETTING_ALT_MIN_TX_PWR_OFFSET 0x00000004 170 #define PDG_RESPONSE_RATE_SETTING_ALT_MIN_TX_PWR_LSB 8 171 #define PDG_RESPONSE_RATE_SETTING_ALT_MIN_TX_PWR_MSB 15 172 #define PDG_RESPONSE_RATE_SETTING_ALT_MIN_TX_PWR_MASK 0x0000ff00 173 174 #define PDG_RESPONSE_RATE_SETTING_ALT_NSS_OFFSET 0x00000004 175 #define PDG_RESPONSE_RATE_SETTING_ALT_NSS_LSB 16 176 #define PDG_RESPONSE_RATE_SETTING_ALT_NSS_MSB 18 177 #define PDG_RESPONSE_RATE_SETTING_ALT_NSS_MASK 0x00070000 178 179 #define PDG_RESPONSE_RATE_SETTING_ALT_TX_CHAIN_MASK_OFFSET 0x00000004 180 #define PDG_RESPONSE_RATE_SETTING_ALT_TX_CHAIN_MASK_LSB 19 181 #define PDG_RESPONSE_RATE_SETTING_ALT_TX_CHAIN_MASK_MSB 26 182 #define PDG_RESPONSE_RATE_SETTING_ALT_TX_CHAIN_MASK_MASK 0x07f80000 183 184 #define PDG_RESPONSE_RATE_SETTING_ALT_BW_OFFSET 0x00000004 185 #define PDG_RESPONSE_RATE_SETTING_ALT_BW_LSB 27 186 #define PDG_RESPONSE_RATE_SETTING_ALT_BW_MSB 29 187 #define PDG_RESPONSE_RATE_SETTING_ALT_BW_MASK 0x38000000 188 189 #define PDG_RESPONSE_RATE_SETTING_STF_LTF_3DB_BOOST_OFFSET 0x00000004 190 #define PDG_RESPONSE_RATE_SETTING_STF_LTF_3DB_BOOST_LSB 30 191 #define PDG_RESPONSE_RATE_SETTING_STF_LTF_3DB_BOOST_MSB 30 192 #define PDG_RESPONSE_RATE_SETTING_STF_LTF_3DB_BOOST_MASK 0x40000000 193 194 #define PDG_RESPONSE_RATE_SETTING_FORCE_EXTRA_SYMBOL_OFFSET 0x00000004 195 #define PDG_RESPONSE_RATE_SETTING_FORCE_EXTRA_SYMBOL_LSB 31 196 #define PDG_RESPONSE_RATE_SETTING_FORCE_EXTRA_SYMBOL_MSB 31 197 #define PDG_RESPONSE_RATE_SETTING_FORCE_EXTRA_SYMBOL_MASK 0x80000000 198 199 #define PDG_RESPONSE_RATE_SETTING_ALT_RATE_MCS_OFFSET 0x00000008 200 #define PDG_RESPONSE_RATE_SETTING_ALT_RATE_MCS_LSB 0 201 #define PDG_RESPONSE_RATE_SETTING_ALT_RATE_MCS_MSB 3 202 #define PDG_RESPONSE_RATE_SETTING_ALT_RATE_MCS_MASK 0x0000000f 203 204 #define PDG_RESPONSE_RATE_SETTING_NSS_OFFSET 0x00000008 205 #define PDG_RESPONSE_RATE_SETTING_NSS_LSB 4 206 #define PDG_RESPONSE_RATE_SETTING_NSS_MSB 6 207 #define PDG_RESPONSE_RATE_SETTING_NSS_MASK 0x00000070 208 209 #define PDG_RESPONSE_RATE_SETTING_DPD_ENABLE_OFFSET 0x00000008 210 #define PDG_RESPONSE_RATE_SETTING_DPD_ENABLE_LSB 7 211 #define PDG_RESPONSE_RATE_SETTING_DPD_ENABLE_MSB 7 212 #define PDG_RESPONSE_RATE_SETTING_DPD_ENABLE_MASK 0x00000080 213 214 #define PDG_RESPONSE_RATE_SETTING_TX_PWR_OFFSET 0x00000008 215 #define PDG_RESPONSE_RATE_SETTING_TX_PWR_LSB 8 216 #define PDG_RESPONSE_RATE_SETTING_TX_PWR_MSB 15 217 #define PDG_RESPONSE_RATE_SETTING_TX_PWR_MASK 0x0000ff00 218 219 #define PDG_RESPONSE_RATE_SETTING_MIN_TX_PWR_OFFSET 0x00000008 220 #define PDG_RESPONSE_RATE_SETTING_MIN_TX_PWR_LSB 16 221 #define PDG_RESPONSE_RATE_SETTING_MIN_TX_PWR_MSB 23 222 #define PDG_RESPONSE_RATE_SETTING_MIN_TX_PWR_MASK 0x00ff0000 223 224 #define PDG_RESPONSE_RATE_SETTING_TX_CHAIN_MASK_OFFSET 0x00000008 225 #define PDG_RESPONSE_RATE_SETTING_TX_CHAIN_MASK_LSB 24 226 #define PDG_RESPONSE_RATE_SETTING_TX_CHAIN_MASK_MSB 31 227 #define PDG_RESPONSE_RATE_SETTING_TX_CHAIN_MASK_MASK 0xff000000 228 229 #define PDG_RESPONSE_RATE_SETTING_RESERVED_3A_OFFSET 0x0000000c 230 #define PDG_RESPONSE_RATE_SETTING_RESERVED_3A_LSB 0 231 #define PDG_RESPONSE_RATE_SETTING_RESERVED_3A_MSB 7 232 #define PDG_RESPONSE_RATE_SETTING_RESERVED_3A_MASK 0x000000ff 233 234 #define PDG_RESPONSE_RATE_SETTING_SGI_OFFSET 0x0000000c 235 #define PDG_RESPONSE_RATE_SETTING_SGI_LSB 8 236 #define PDG_RESPONSE_RATE_SETTING_SGI_MSB 9 237 #define PDG_RESPONSE_RATE_SETTING_SGI_MASK 0x00000300 238 239 #define PDG_RESPONSE_RATE_SETTING_RATE_MCS_OFFSET 0x0000000c 240 #define PDG_RESPONSE_RATE_SETTING_RATE_MCS_LSB 10 241 #define PDG_RESPONSE_RATE_SETTING_RATE_MCS_MSB 13 242 #define PDG_RESPONSE_RATE_SETTING_RATE_MCS_MASK 0x00003c00 243 244 #define PDG_RESPONSE_RATE_SETTING_RESERVED_3B_OFFSET 0x0000000c 245 #define PDG_RESPONSE_RATE_SETTING_RESERVED_3B_LSB 14 246 #define PDG_RESPONSE_RATE_SETTING_RESERVED_3B_MSB 15 247 #define PDG_RESPONSE_RATE_SETTING_RESERVED_3B_MASK 0x0000c000 248 249 #define PDG_RESPONSE_RATE_SETTING_TX_PWR_1_OFFSET 0x0000000c 250 #define PDG_RESPONSE_RATE_SETTING_TX_PWR_1_LSB 16 251 #define PDG_RESPONSE_RATE_SETTING_TX_PWR_1_MSB 23 252 #define PDG_RESPONSE_RATE_SETTING_TX_PWR_1_MASK 0x00ff0000 253 254 #define PDG_RESPONSE_RATE_SETTING_ALT_TX_PWR_1_OFFSET 0x0000000c 255 #define PDG_RESPONSE_RATE_SETTING_ALT_TX_PWR_1_LSB 24 256 #define PDG_RESPONSE_RATE_SETTING_ALT_TX_PWR_1_MSB 31 257 #define PDG_RESPONSE_RATE_SETTING_ALT_TX_PWR_1_MASK 0xff000000 258 259 #define PDG_RESPONSE_RATE_SETTING_AGGREGATION_OFFSET 0x00000010 260 #define PDG_RESPONSE_RATE_SETTING_AGGREGATION_LSB 0 261 #define PDG_RESPONSE_RATE_SETTING_AGGREGATION_MSB 0 262 #define PDG_RESPONSE_RATE_SETTING_AGGREGATION_MASK 0x00000001 263 264 #define PDG_RESPONSE_RATE_SETTING_DOT11AX_BSS_COLOR_ID_OFFSET 0x00000010 265 #define PDG_RESPONSE_RATE_SETTING_DOT11AX_BSS_COLOR_ID_LSB 1 266 #define PDG_RESPONSE_RATE_SETTING_DOT11AX_BSS_COLOR_ID_MSB 6 267 #define PDG_RESPONSE_RATE_SETTING_DOT11AX_BSS_COLOR_ID_MASK 0x0000007e 268 269 #define PDG_RESPONSE_RATE_SETTING_DOT11AX_SPATIAL_REUSE_OFFSET 0x00000010 270 #define PDG_RESPONSE_RATE_SETTING_DOT11AX_SPATIAL_REUSE_LSB 7 271 #define PDG_RESPONSE_RATE_SETTING_DOT11AX_SPATIAL_REUSE_MSB 10 272 #define PDG_RESPONSE_RATE_SETTING_DOT11AX_SPATIAL_REUSE_MASK 0x00000780 273 274 #define PDG_RESPONSE_RATE_SETTING_DOT11AX_CP_LTF_SIZE_OFFSET 0x00000010 275 #define PDG_RESPONSE_RATE_SETTING_DOT11AX_CP_LTF_SIZE_LSB 11 276 #define PDG_RESPONSE_RATE_SETTING_DOT11AX_CP_LTF_SIZE_MSB 12 277 #define PDG_RESPONSE_RATE_SETTING_DOT11AX_CP_LTF_SIZE_MASK 0x00001800 278 279 #define PDG_RESPONSE_RATE_SETTING_DOT11AX_DCM_OFFSET 0x00000010 280 #define PDG_RESPONSE_RATE_SETTING_DOT11AX_DCM_LSB 13 281 #define PDG_RESPONSE_RATE_SETTING_DOT11AX_DCM_MSB 13 282 #define PDG_RESPONSE_RATE_SETTING_DOT11AX_DCM_MASK 0x00002000 283 284 #define PDG_RESPONSE_RATE_SETTING_DOT11AX_DOPPLER_INDICATION_OFFSET 0x00000010 285 #define PDG_RESPONSE_RATE_SETTING_DOT11AX_DOPPLER_INDICATION_LSB 14 286 #define PDG_RESPONSE_RATE_SETTING_DOT11AX_DOPPLER_INDICATION_MSB 14 287 #define PDG_RESPONSE_RATE_SETTING_DOT11AX_DOPPLER_INDICATION_MASK 0x00004000 288 289 #define PDG_RESPONSE_RATE_SETTING_DOT11AX_SU_EXTENDED_OFFSET 0x00000010 290 #define PDG_RESPONSE_RATE_SETTING_DOT11AX_SU_EXTENDED_LSB 15 291 #define PDG_RESPONSE_RATE_SETTING_DOT11AX_SU_EXTENDED_MSB 15 292 #define PDG_RESPONSE_RATE_SETTING_DOT11AX_SU_EXTENDED_MASK 0x00008000 293 294 #define PDG_RESPONSE_RATE_SETTING_DOT11AX_MIN_PACKET_EXTENSION_OFFSET 0x00000010 295 #define PDG_RESPONSE_RATE_SETTING_DOT11AX_MIN_PACKET_EXTENSION_LSB 16 296 #define PDG_RESPONSE_RATE_SETTING_DOT11AX_MIN_PACKET_EXTENSION_MSB 17 297 #define PDG_RESPONSE_RATE_SETTING_DOT11AX_MIN_PACKET_EXTENSION_MASK 0x00030000 298 299 #define PDG_RESPONSE_RATE_SETTING_DOT11AX_PE_NSS_OFFSET 0x00000010 300 #define PDG_RESPONSE_RATE_SETTING_DOT11AX_PE_NSS_LSB 18 301 #define PDG_RESPONSE_RATE_SETTING_DOT11AX_PE_NSS_MSB 20 302 #define PDG_RESPONSE_RATE_SETTING_DOT11AX_PE_NSS_MASK 0x001c0000 303 304 #define PDG_RESPONSE_RATE_SETTING_DOT11AX_PE_CONTENT_OFFSET 0x00000010 305 #define PDG_RESPONSE_RATE_SETTING_DOT11AX_PE_CONTENT_LSB 21 306 #define PDG_RESPONSE_RATE_SETTING_DOT11AX_PE_CONTENT_MSB 21 307 #define PDG_RESPONSE_RATE_SETTING_DOT11AX_PE_CONTENT_MASK 0x00200000 308 309 #define PDG_RESPONSE_RATE_SETTING_DOT11AX_PE_LTF_SIZE_OFFSET 0x00000010 310 #define PDG_RESPONSE_RATE_SETTING_DOT11AX_PE_LTF_SIZE_LSB 22 311 #define PDG_RESPONSE_RATE_SETTING_DOT11AX_PE_LTF_SIZE_MSB 23 312 #define PDG_RESPONSE_RATE_SETTING_DOT11AX_PE_LTF_SIZE_MASK 0x00c00000 313 314 #define PDG_RESPONSE_RATE_SETTING_DOT11AX_CHAIN_CSD_EN_OFFSET 0x00000010 315 #define PDG_RESPONSE_RATE_SETTING_DOT11AX_CHAIN_CSD_EN_LSB 24 316 #define PDG_RESPONSE_RATE_SETTING_DOT11AX_CHAIN_CSD_EN_MSB 24 317 #define PDG_RESPONSE_RATE_SETTING_DOT11AX_CHAIN_CSD_EN_MASK 0x01000000 318 319 #define PDG_RESPONSE_RATE_SETTING_DOT11AX_PE_CHAIN_CSD_EN_OFFSET 0x00000010 320 #define PDG_RESPONSE_RATE_SETTING_DOT11AX_PE_CHAIN_CSD_EN_LSB 25 321 #define PDG_RESPONSE_RATE_SETTING_DOT11AX_PE_CHAIN_CSD_EN_MSB 25 322 #define PDG_RESPONSE_RATE_SETTING_DOT11AX_PE_CHAIN_CSD_EN_MASK 0x02000000 323 324 #define PDG_RESPONSE_RATE_SETTING_DOT11AX_DL_UL_FLAG_OFFSET 0x00000010 325 #define PDG_RESPONSE_RATE_SETTING_DOT11AX_DL_UL_FLAG_LSB 26 326 #define PDG_RESPONSE_RATE_SETTING_DOT11AX_DL_UL_FLAG_MSB 26 327 #define PDG_RESPONSE_RATE_SETTING_DOT11AX_DL_UL_FLAG_MASK 0x04000000 328 329 #define PDG_RESPONSE_RATE_SETTING_RESERVED_4A_OFFSET 0x00000010 330 #define PDG_RESPONSE_RATE_SETTING_RESERVED_4A_LSB 27 331 #define PDG_RESPONSE_RATE_SETTING_RESERVED_4A_MSB 31 332 #define PDG_RESPONSE_RATE_SETTING_RESERVED_4A_MASK 0xf8000000 333 334 #define PDG_RESPONSE_RATE_SETTING_DOT11AX_EXT_RU_START_INDEX_OFFSET 0x00000014 335 #define PDG_RESPONSE_RATE_SETTING_DOT11AX_EXT_RU_START_INDEX_LSB 0 336 #define PDG_RESPONSE_RATE_SETTING_DOT11AX_EXT_RU_START_INDEX_MSB 3 337 #define PDG_RESPONSE_RATE_SETTING_DOT11AX_EXT_RU_START_INDEX_MASK 0x0000000f 338 339 #define PDG_RESPONSE_RATE_SETTING_DOT11AX_EXT_RU_SIZE_OFFSET 0x00000014 340 #define PDG_RESPONSE_RATE_SETTING_DOT11AX_EXT_RU_SIZE_LSB 4 341 #define PDG_RESPONSE_RATE_SETTING_DOT11AX_EXT_RU_SIZE_MSB 7 342 #define PDG_RESPONSE_RATE_SETTING_DOT11AX_EXT_RU_SIZE_MASK 0x000000f0 343 344 #define PDG_RESPONSE_RATE_SETTING_EHT_DUPLICATE_MODE_OFFSET 0x00000014 345 #define PDG_RESPONSE_RATE_SETTING_EHT_DUPLICATE_MODE_LSB 8 346 #define PDG_RESPONSE_RATE_SETTING_EHT_DUPLICATE_MODE_MSB 9 347 #define PDG_RESPONSE_RATE_SETTING_EHT_DUPLICATE_MODE_MASK 0x00000300 348 349 #define PDG_RESPONSE_RATE_SETTING_HE_SIGB_DCM_OFFSET 0x00000014 350 #define PDG_RESPONSE_RATE_SETTING_HE_SIGB_DCM_LSB 10 351 #define PDG_RESPONSE_RATE_SETTING_HE_SIGB_DCM_MSB 10 352 #define PDG_RESPONSE_RATE_SETTING_HE_SIGB_DCM_MASK 0x00000400 353 354 #define PDG_RESPONSE_RATE_SETTING_HE_SIGB_0_MCS_OFFSET 0x00000014 355 #define PDG_RESPONSE_RATE_SETTING_HE_SIGB_0_MCS_LSB 11 356 #define PDG_RESPONSE_RATE_SETTING_HE_SIGB_0_MCS_MSB 13 357 #define PDG_RESPONSE_RATE_SETTING_HE_SIGB_0_MCS_MASK 0x00003800 358 359 #define PDG_RESPONSE_RATE_SETTING_NUM_HE_SIGB_SYM_OFFSET 0x00000014 360 #define PDG_RESPONSE_RATE_SETTING_NUM_HE_SIGB_SYM_LSB 14 361 #define PDG_RESPONSE_RATE_SETTING_NUM_HE_SIGB_SYM_MSB 18 362 #define PDG_RESPONSE_RATE_SETTING_NUM_HE_SIGB_SYM_MASK 0x0007c000 363 364 #define PDG_RESPONSE_RATE_SETTING_REQUIRED_RESPONSE_TIME_SOURCE_OFFSET 0x00000014 365 #define PDG_RESPONSE_RATE_SETTING_REQUIRED_RESPONSE_TIME_SOURCE_LSB 19 366 #define PDG_RESPONSE_RATE_SETTING_REQUIRED_RESPONSE_TIME_SOURCE_MSB 19 367 #define PDG_RESPONSE_RATE_SETTING_REQUIRED_RESPONSE_TIME_SOURCE_MASK 0x00080000 368 369 #define PDG_RESPONSE_RATE_SETTING_RESERVED_5A_OFFSET 0x00000014 370 #define PDG_RESPONSE_RATE_SETTING_RESERVED_5A_LSB 20 371 #define PDG_RESPONSE_RATE_SETTING_RESERVED_5A_MSB 25 372 #define PDG_RESPONSE_RATE_SETTING_RESERVED_5A_MASK 0x03f00000 373 374 #define PDG_RESPONSE_RATE_SETTING_U_SIG_PUNCTURE_PATTERN_ENCODING_OFFSET 0x00000014 375 #define PDG_RESPONSE_RATE_SETTING_U_SIG_PUNCTURE_PATTERN_ENCODING_LSB 26 376 #define PDG_RESPONSE_RATE_SETTING_U_SIG_PUNCTURE_PATTERN_ENCODING_MSB 31 377 #define PDG_RESPONSE_RATE_SETTING_U_SIG_PUNCTURE_PATTERN_ENCODING_MASK 0xfc000000 378 379 #define PDG_RESPONSE_RATE_SETTING_MLO_STA_ID_DETAILS_RX_NSTR_MLO_STA_ID_OFFSET 0x00000018 380 #define PDG_RESPONSE_RATE_SETTING_MLO_STA_ID_DETAILS_RX_NSTR_MLO_STA_ID_LSB 0 381 #define PDG_RESPONSE_RATE_SETTING_MLO_STA_ID_DETAILS_RX_NSTR_MLO_STA_ID_MSB 9 382 #define PDG_RESPONSE_RATE_SETTING_MLO_STA_ID_DETAILS_RX_NSTR_MLO_STA_ID_MASK 0x000003ff 383 384 #define PDG_RESPONSE_RATE_SETTING_MLO_STA_ID_DETAILS_RX_BLOCK_SELF_ML_SYNC_OFFSET 0x00000018 385 #define PDG_RESPONSE_RATE_SETTING_MLO_STA_ID_DETAILS_RX_BLOCK_SELF_ML_SYNC_LSB 10 386 #define PDG_RESPONSE_RATE_SETTING_MLO_STA_ID_DETAILS_RX_BLOCK_SELF_ML_SYNC_MSB 10 387 #define PDG_RESPONSE_RATE_SETTING_MLO_STA_ID_DETAILS_RX_BLOCK_SELF_ML_SYNC_MASK 0x00000400 388 389 #define PDG_RESPONSE_RATE_SETTING_MLO_STA_ID_DETAILS_RX_BLOCK_PARTNER_ML_SYNC_OFFSET 0x00000018 390 #define PDG_RESPONSE_RATE_SETTING_MLO_STA_ID_DETAILS_RX_BLOCK_PARTNER_ML_SYNC_LSB 11 391 #define PDG_RESPONSE_RATE_SETTING_MLO_STA_ID_DETAILS_RX_BLOCK_PARTNER_ML_SYNC_MSB 11 392 #define PDG_RESPONSE_RATE_SETTING_MLO_STA_ID_DETAILS_RX_BLOCK_PARTNER_ML_SYNC_MASK 0x00000800 393 394 #define PDG_RESPONSE_RATE_SETTING_MLO_STA_ID_DETAILS_RX_NSTR_MLO_STA_ID_VALID_OFFSET 0x00000018 395 #define PDG_RESPONSE_RATE_SETTING_MLO_STA_ID_DETAILS_RX_NSTR_MLO_STA_ID_VALID_LSB 12 396 #define PDG_RESPONSE_RATE_SETTING_MLO_STA_ID_DETAILS_RX_NSTR_MLO_STA_ID_VALID_MSB 12 397 #define PDG_RESPONSE_RATE_SETTING_MLO_STA_ID_DETAILS_RX_NSTR_MLO_STA_ID_VALID_MASK 0x00001000 398 399 #define PDG_RESPONSE_RATE_SETTING_MLO_STA_ID_DETAILS_RX_RESERVED_0A_OFFSET 0x00000018 400 #define PDG_RESPONSE_RATE_SETTING_MLO_STA_ID_DETAILS_RX_RESERVED_0A_LSB 13 401 #define PDG_RESPONSE_RATE_SETTING_MLO_STA_ID_DETAILS_RX_RESERVED_0A_MSB 15 402 #define PDG_RESPONSE_RATE_SETTING_MLO_STA_ID_DETAILS_RX_RESERVED_0A_MASK 0x0000e000 403 404 #define PDG_RESPONSE_RATE_SETTING_REQUIRED_RESPONSE_TIME_OFFSET 0x00000018 405 #define PDG_RESPONSE_RATE_SETTING_REQUIRED_RESPONSE_TIME_LSB 16 406 #define PDG_RESPONSE_RATE_SETTING_REQUIRED_RESPONSE_TIME_MSB 27 407 #define PDG_RESPONSE_RATE_SETTING_REQUIRED_RESPONSE_TIME_MASK 0x0fff0000 408 409 #define PDG_RESPONSE_RATE_SETTING_DOT11BE_PARAMS_PLACEHOLDER_OFFSET 0x00000018 410 #define PDG_RESPONSE_RATE_SETTING_DOT11BE_PARAMS_PLACEHOLDER_LSB 28 411 #define PDG_RESPONSE_RATE_SETTING_DOT11BE_PARAMS_PLACEHOLDER_MSB 31 412 #define PDG_RESPONSE_RATE_SETTING_DOT11BE_PARAMS_PLACEHOLDER_MASK 0xf0000000 413 414 #endif 415