1 /*
2  * Copyright (c) 2023 Qualcomm Innovation Center, Inc. All rights reserved.
3  *
4  * Permission to use, copy, modify, and/or distribute this software for any
5  * purpose with or without fee is hereby granted, provided that the above
6  * copyright notice and this permission notice appear in all copies.
7  *
8  * THE SOFTWARE IS PROVIDED "AS IS" AND THE AUTHOR DISCLAIMS ALL WARRANTIES
9  * WITH REGARD TO THIS SOFTWARE INCLUDING ALL IMPLIED WARRANTIES OF
10  * MERCHANTABILITY AND FITNESS. IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR
11  * ANY SPECIAL, DIRECT, INDIRECT, OR CONSEQUENTIAL DAMAGES OR ANY DAMAGES
12  * WHATSOEVER RESULTING FROM LOSS OF USE, DATA OR PROFITS, WHETHER IN AN
13  * ACTION OF CONTRACT, NEGLIGENCE OR OTHER TORTIOUS ACTION, ARISING OUT OF
14  * OR IN CONNECTION WITH THE USE OR PERFORMANCE OF THIS SOFTWARE.
15  */
16 
17 
18 #ifndef _TX_PEER_ENTRY_H_
19 #define _TX_PEER_ENTRY_H_
20 
21 #define NUM_OF_DWORDS_TX_PEER_ENTRY 18
22 
23 struct tx_peer_entry {
24 #ifndef WIFI_BIT_ORDER_BIG_ENDIAN
25              uint32_t mac_addr_a_31_0                                         : 32;
26              uint32_t mac_addr_a_47_32                                        : 16,
27                       mac_addr_b_15_0                                         : 16;
28              uint32_t mac_addr_b_47_16                                        : 32;
29              uint32_t use_ad_b                                                :  1,
30                       strip_insert_vlan_inner                                 :  1,
31                       strip_insert_vlan_outer                                 :  1,
32                       vlan_llc_mode                                           :  1,
33                       key_type                                                :  4,
34                       a_msdu_wds_ad3_ad4                                      :  3,
35                       ignore_hard_filters                                     :  1,
36                       ignore_soft_filters                                     :  1,
37                       epd_output                                              :  1,
38                       wds                                                     :  1,
39                       insert_or_strip                                         :  1,
40                       sw_filter_id                                            : 16;
41              uint32_t temporal_key_31_0                                       : 32;
42              uint32_t temporal_key_63_32                                      : 32;
43              uint32_t temporal_key_95_64                                      : 32;
44              uint32_t temporal_key_127_96                                     : 32;
45              uint32_t temporal_key_159_128                                    : 32;
46              uint32_t temporal_key_191_160                                    : 32;
47              uint32_t temporal_key_223_192                                    : 32;
48              uint32_t temporal_key_255_224                                    : 32;
49              uint32_t sta_partial_aid                                         : 11,
50                       transmit_vif                                            :  4,
51                       block_this_user                                         :  1,
52                       mesh_amsdu_mode                                         :  2,
53                       use_qos_alt_mute_mask                                   :  1,
54                       dl_ul_direction                                         :  1,
55                       reserved_12                                             : 12;
56              uint32_t insert_vlan_outer_tci                                   : 16,
57                       insert_vlan_inner_tci                                   : 16;
58              uint32_t __reserved_g_0007                                       : 32;
59              uint32_t __reserved_g_0008                                       : 16,
60                       __reserved_g_0009                                       : 16;
61              uint32_t __reserved_g_0010                                       : 32;
62              uint32_t multi_link_addr_crypto_enable                           :  1,
63                       reserved_17a                                            : 15,
64                       sw_peer_id                                              : 16;
65 #else
66              uint32_t mac_addr_a_31_0                                         : 32;
67              uint32_t mac_addr_b_15_0                                         : 16,
68                       mac_addr_a_47_32                                        : 16;
69              uint32_t mac_addr_b_47_16                                        : 32;
70              uint32_t sw_filter_id                                            : 16,
71                       insert_or_strip                                         :  1,
72                       wds                                                     :  1,
73                       epd_output                                              :  1,
74                       ignore_soft_filters                                     :  1,
75                       ignore_hard_filters                                     :  1,
76                       a_msdu_wds_ad3_ad4                                      :  3,
77                       key_type                                                :  4,
78                       vlan_llc_mode                                           :  1,
79                       strip_insert_vlan_outer                                 :  1,
80                       strip_insert_vlan_inner                                 :  1,
81                       use_ad_b                                                :  1;
82              uint32_t temporal_key_31_0                                       : 32;
83              uint32_t temporal_key_63_32                                      : 32;
84              uint32_t temporal_key_95_64                                      : 32;
85              uint32_t temporal_key_127_96                                     : 32;
86              uint32_t temporal_key_159_128                                    : 32;
87              uint32_t temporal_key_191_160                                    : 32;
88              uint32_t temporal_key_223_192                                    : 32;
89              uint32_t temporal_key_255_224                                    : 32;
90              uint32_t reserved_12                                             : 12,
91                       dl_ul_direction                                         :  1,
92                       use_qos_alt_mute_mask                                   :  1,
93                       mesh_amsdu_mode                                         :  2,
94                       block_this_user                                         :  1,
95                       transmit_vif                                            :  4,
96                       sta_partial_aid                                         : 11;
97              uint32_t insert_vlan_inner_tci                                   : 16,
98                       insert_vlan_outer_tci                                   : 16;
99              uint32_t __reserved_g_0007                                       : 32;
100              uint32_t __reserved_g_0009                                       : 16,
101                       __reserved_g_0008                                       : 16;
102              uint32_t __reserved_g_0010                                       : 32;
103              uint32_t sw_peer_id                                              : 16,
104                       reserved_17a                                            : 15,
105                       multi_link_addr_crypto_enable                           :  1;
106 #endif
107 };
108 
109 #define TX_PEER_ENTRY_MAC_ADDR_A_31_0_OFFSET                                        0x00000000
110 #define TX_PEER_ENTRY_MAC_ADDR_A_31_0_LSB                                           0
111 #define TX_PEER_ENTRY_MAC_ADDR_A_31_0_MSB                                           31
112 #define TX_PEER_ENTRY_MAC_ADDR_A_31_0_MASK                                          0xffffffff
113 
114 #define TX_PEER_ENTRY_MAC_ADDR_A_47_32_OFFSET                                       0x00000004
115 #define TX_PEER_ENTRY_MAC_ADDR_A_47_32_LSB                                          0
116 #define TX_PEER_ENTRY_MAC_ADDR_A_47_32_MSB                                          15
117 #define TX_PEER_ENTRY_MAC_ADDR_A_47_32_MASK                                         0x0000ffff
118 
119 #define TX_PEER_ENTRY_MAC_ADDR_B_15_0_OFFSET                                        0x00000004
120 #define TX_PEER_ENTRY_MAC_ADDR_B_15_0_LSB                                           16
121 #define TX_PEER_ENTRY_MAC_ADDR_B_15_0_MSB                                           31
122 #define TX_PEER_ENTRY_MAC_ADDR_B_15_0_MASK                                          0xffff0000
123 
124 #define TX_PEER_ENTRY_MAC_ADDR_B_47_16_OFFSET                                       0x00000008
125 #define TX_PEER_ENTRY_MAC_ADDR_B_47_16_LSB                                          0
126 #define TX_PEER_ENTRY_MAC_ADDR_B_47_16_MSB                                          31
127 #define TX_PEER_ENTRY_MAC_ADDR_B_47_16_MASK                                         0xffffffff
128 
129 #define TX_PEER_ENTRY_USE_AD_B_OFFSET                                               0x0000000c
130 #define TX_PEER_ENTRY_USE_AD_B_LSB                                                  0
131 #define TX_PEER_ENTRY_USE_AD_B_MSB                                                  0
132 #define TX_PEER_ENTRY_USE_AD_B_MASK                                                 0x00000001
133 
134 #define TX_PEER_ENTRY_STRIP_INSERT_VLAN_INNER_OFFSET                                0x0000000c
135 #define TX_PEER_ENTRY_STRIP_INSERT_VLAN_INNER_LSB                                   1
136 #define TX_PEER_ENTRY_STRIP_INSERT_VLAN_INNER_MSB                                   1
137 #define TX_PEER_ENTRY_STRIP_INSERT_VLAN_INNER_MASK                                  0x00000002
138 
139 #define TX_PEER_ENTRY_STRIP_INSERT_VLAN_OUTER_OFFSET                                0x0000000c
140 #define TX_PEER_ENTRY_STRIP_INSERT_VLAN_OUTER_LSB                                   2
141 #define TX_PEER_ENTRY_STRIP_INSERT_VLAN_OUTER_MSB                                   2
142 #define TX_PEER_ENTRY_STRIP_INSERT_VLAN_OUTER_MASK                                  0x00000004
143 
144 #define TX_PEER_ENTRY_VLAN_LLC_MODE_OFFSET                                          0x0000000c
145 #define TX_PEER_ENTRY_VLAN_LLC_MODE_LSB                                             3
146 #define TX_PEER_ENTRY_VLAN_LLC_MODE_MSB                                             3
147 #define TX_PEER_ENTRY_VLAN_LLC_MODE_MASK                                            0x00000008
148 
149 #define TX_PEER_ENTRY_KEY_TYPE_OFFSET                                               0x0000000c
150 #define TX_PEER_ENTRY_KEY_TYPE_LSB                                                  4
151 #define TX_PEER_ENTRY_KEY_TYPE_MSB                                                  7
152 #define TX_PEER_ENTRY_KEY_TYPE_MASK                                                 0x000000f0
153 
154 #define TX_PEER_ENTRY_A_MSDU_WDS_AD3_AD4_OFFSET                                     0x0000000c
155 #define TX_PEER_ENTRY_A_MSDU_WDS_AD3_AD4_LSB                                        8
156 #define TX_PEER_ENTRY_A_MSDU_WDS_AD3_AD4_MSB                                        10
157 #define TX_PEER_ENTRY_A_MSDU_WDS_AD3_AD4_MASK                                       0x00000700
158 
159 #define TX_PEER_ENTRY_IGNORE_HARD_FILTERS_OFFSET                                    0x0000000c
160 #define TX_PEER_ENTRY_IGNORE_HARD_FILTERS_LSB                                       11
161 #define TX_PEER_ENTRY_IGNORE_HARD_FILTERS_MSB                                       11
162 #define TX_PEER_ENTRY_IGNORE_HARD_FILTERS_MASK                                      0x00000800
163 
164 #define TX_PEER_ENTRY_IGNORE_SOFT_FILTERS_OFFSET                                    0x0000000c
165 #define TX_PEER_ENTRY_IGNORE_SOFT_FILTERS_LSB                                       12
166 #define TX_PEER_ENTRY_IGNORE_SOFT_FILTERS_MSB                                       12
167 #define TX_PEER_ENTRY_IGNORE_SOFT_FILTERS_MASK                                      0x00001000
168 
169 #define TX_PEER_ENTRY_EPD_OUTPUT_OFFSET                                             0x0000000c
170 #define TX_PEER_ENTRY_EPD_OUTPUT_LSB                                                13
171 #define TX_PEER_ENTRY_EPD_OUTPUT_MSB                                                13
172 #define TX_PEER_ENTRY_EPD_OUTPUT_MASK                                               0x00002000
173 
174 #define TX_PEER_ENTRY_WDS_OFFSET                                                    0x0000000c
175 #define TX_PEER_ENTRY_WDS_LSB                                                       14
176 #define TX_PEER_ENTRY_WDS_MSB                                                       14
177 #define TX_PEER_ENTRY_WDS_MASK                                                      0x00004000
178 
179 #define TX_PEER_ENTRY_INSERT_OR_STRIP_OFFSET                                        0x0000000c
180 #define TX_PEER_ENTRY_INSERT_OR_STRIP_LSB                                           15
181 #define TX_PEER_ENTRY_INSERT_OR_STRIP_MSB                                           15
182 #define TX_PEER_ENTRY_INSERT_OR_STRIP_MASK                                          0x00008000
183 
184 #define TX_PEER_ENTRY_SW_FILTER_ID_OFFSET                                           0x0000000c
185 #define TX_PEER_ENTRY_SW_FILTER_ID_LSB                                              16
186 #define TX_PEER_ENTRY_SW_FILTER_ID_MSB                                              31
187 #define TX_PEER_ENTRY_SW_FILTER_ID_MASK                                             0xffff0000
188 
189 #define TX_PEER_ENTRY_TEMPORAL_KEY_31_0_OFFSET                                      0x00000010
190 #define TX_PEER_ENTRY_TEMPORAL_KEY_31_0_LSB                                         0
191 #define TX_PEER_ENTRY_TEMPORAL_KEY_31_0_MSB                                         31
192 #define TX_PEER_ENTRY_TEMPORAL_KEY_31_0_MASK                                        0xffffffff
193 
194 #define TX_PEER_ENTRY_TEMPORAL_KEY_63_32_OFFSET                                     0x00000014
195 #define TX_PEER_ENTRY_TEMPORAL_KEY_63_32_LSB                                        0
196 #define TX_PEER_ENTRY_TEMPORAL_KEY_63_32_MSB                                        31
197 #define TX_PEER_ENTRY_TEMPORAL_KEY_63_32_MASK                                       0xffffffff
198 
199 #define TX_PEER_ENTRY_TEMPORAL_KEY_95_64_OFFSET                                     0x00000018
200 #define TX_PEER_ENTRY_TEMPORAL_KEY_95_64_LSB                                        0
201 #define TX_PEER_ENTRY_TEMPORAL_KEY_95_64_MSB                                        31
202 #define TX_PEER_ENTRY_TEMPORAL_KEY_95_64_MASK                                       0xffffffff
203 
204 #define TX_PEER_ENTRY_TEMPORAL_KEY_127_96_OFFSET                                    0x0000001c
205 #define TX_PEER_ENTRY_TEMPORAL_KEY_127_96_LSB                                       0
206 #define TX_PEER_ENTRY_TEMPORAL_KEY_127_96_MSB                                       31
207 #define TX_PEER_ENTRY_TEMPORAL_KEY_127_96_MASK                                      0xffffffff
208 
209 #define TX_PEER_ENTRY_TEMPORAL_KEY_159_128_OFFSET                                   0x00000020
210 #define TX_PEER_ENTRY_TEMPORAL_KEY_159_128_LSB                                      0
211 #define TX_PEER_ENTRY_TEMPORAL_KEY_159_128_MSB                                      31
212 #define TX_PEER_ENTRY_TEMPORAL_KEY_159_128_MASK                                     0xffffffff
213 
214 #define TX_PEER_ENTRY_TEMPORAL_KEY_191_160_OFFSET                                   0x00000024
215 #define TX_PEER_ENTRY_TEMPORAL_KEY_191_160_LSB                                      0
216 #define TX_PEER_ENTRY_TEMPORAL_KEY_191_160_MSB                                      31
217 #define TX_PEER_ENTRY_TEMPORAL_KEY_191_160_MASK                                     0xffffffff
218 
219 #define TX_PEER_ENTRY_TEMPORAL_KEY_223_192_OFFSET                                   0x00000028
220 #define TX_PEER_ENTRY_TEMPORAL_KEY_223_192_LSB                                      0
221 #define TX_PEER_ENTRY_TEMPORAL_KEY_223_192_MSB                                      31
222 #define TX_PEER_ENTRY_TEMPORAL_KEY_223_192_MASK                                     0xffffffff
223 
224 #define TX_PEER_ENTRY_TEMPORAL_KEY_255_224_OFFSET                                   0x0000002c
225 #define TX_PEER_ENTRY_TEMPORAL_KEY_255_224_LSB                                      0
226 #define TX_PEER_ENTRY_TEMPORAL_KEY_255_224_MSB                                      31
227 #define TX_PEER_ENTRY_TEMPORAL_KEY_255_224_MASK                                     0xffffffff
228 
229 #define TX_PEER_ENTRY_STA_PARTIAL_AID_OFFSET                                        0x00000030
230 #define TX_PEER_ENTRY_STA_PARTIAL_AID_LSB                                           0
231 #define TX_PEER_ENTRY_STA_PARTIAL_AID_MSB                                           10
232 #define TX_PEER_ENTRY_STA_PARTIAL_AID_MASK                                          0x000007ff
233 
234 #define TX_PEER_ENTRY_TRANSMIT_VIF_OFFSET                                           0x00000030
235 #define TX_PEER_ENTRY_TRANSMIT_VIF_LSB                                              11
236 #define TX_PEER_ENTRY_TRANSMIT_VIF_MSB                                              14
237 #define TX_PEER_ENTRY_TRANSMIT_VIF_MASK                                             0x00007800
238 
239 #define TX_PEER_ENTRY_BLOCK_THIS_USER_OFFSET                                        0x00000030
240 #define TX_PEER_ENTRY_BLOCK_THIS_USER_LSB                                           15
241 #define TX_PEER_ENTRY_BLOCK_THIS_USER_MSB                                           15
242 #define TX_PEER_ENTRY_BLOCK_THIS_USER_MASK                                          0x00008000
243 
244 #define TX_PEER_ENTRY_MESH_AMSDU_MODE_OFFSET                                        0x00000030
245 #define TX_PEER_ENTRY_MESH_AMSDU_MODE_LSB                                           16
246 #define TX_PEER_ENTRY_MESH_AMSDU_MODE_MSB                                           17
247 #define TX_PEER_ENTRY_MESH_AMSDU_MODE_MASK                                          0x00030000
248 
249 #define TX_PEER_ENTRY_USE_QOS_ALT_MUTE_MASK_OFFSET                                  0x00000030
250 #define TX_PEER_ENTRY_USE_QOS_ALT_MUTE_MASK_LSB                                     18
251 #define TX_PEER_ENTRY_USE_QOS_ALT_MUTE_MASK_MSB                                     18
252 #define TX_PEER_ENTRY_USE_QOS_ALT_MUTE_MASK_MASK                                    0x00040000
253 
254 #define TX_PEER_ENTRY_DL_UL_DIRECTION_OFFSET                                        0x00000030
255 #define TX_PEER_ENTRY_DL_UL_DIRECTION_LSB                                           19
256 #define TX_PEER_ENTRY_DL_UL_DIRECTION_MSB                                           19
257 #define TX_PEER_ENTRY_DL_UL_DIRECTION_MASK                                          0x00080000
258 
259 #define TX_PEER_ENTRY_RESERVED_12_OFFSET                                            0x00000030
260 #define TX_PEER_ENTRY_RESERVED_12_LSB                                               20
261 #define TX_PEER_ENTRY_RESERVED_12_MSB                                               31
262 #define TX_PEER_ENTRY_RESERVED_12_MASK                                              0xfff00000
263 
264 #define TX_PEER_ENTRY_INSERT_VLAN_OUTER_TCI_OFFSET                                  0x00000034
265 #define TX_PEER_ENTRY_INSERT_VLAN_OUTER_TCI_LSB                                     0
266 #define TX_PEER_ENTRY_INSERT_VLAN_OUTER_TCI_MSB                                     15
267 #define TX_PEER_ENTRY_INSERT_VLAN_OUTER_TCI_MASK                                    0x0000ffff
268 
269 #define TX_PEER_ENTRY_INSERT_VLAN_INNER_TCI_OFFSET                                  0x00000034
270 #define TX_PEER_ENTRY_INSERT_VLAN_INNER_TCI_LSB                                     16
271 #define TX_PEER_ENTRY_INSERT_VLAN_INNER_TCI_MSB                                     31
272 #define TX_PEER_ENTRY_INSERT_VLAN_INNER_TCI_MASK                                    0xffff0000
273 
274 #define TX_PEER_ENTRY_MULTI_LINK_ADDR_CRYPTO_ENABLE_OFFSET                          0x00000044
275 #define TX_PEER_ENTRY_MULTI_LINK_ADDR_CRYPTO_ENABLE_LSB                             0
276 #define TX_PEER_ENTRY_MULTI_LINK_ADDR_CRYPTO_ENABLE_MSB                             0
277 #define TX_PEER_ENTRY_MULTI_LINK_ADDR_CRYPTO_ENABLE_MASK                            0x00000001
278 
279 #define TX_PEER_ENTRY_RESERVED_17A_OFFSET                                           0x00000044
280 #define TX_PEER_ENTRY_RESERVED_17A_LSB                                              1
281 #define TX_PEER_ENTRY_RESERVED_17A_MSB                                              15
282 #define TX_PEER_ENTRY_RESERVED_17A_MASK                                             0x0000fffe
283 
284 #define TX_PEER_ENTRY_SW_PEER_ID_OFFSET                                             0x00000044
285 #define TX_PEER_ENTRY_SW_PEER_ID_LSB                                                16
286 #define TX_PEER_ENTRY_SW_PEER_ID_MSB                                                31
287 #define TX_PEER_ENTRY_SW_PEER_ID_MASK                                               0xffff0000
288 
289 #endif
290