1 2 /* 3 * Copyright (c) 2023 Qualcomm Innovation Center, Inc. All rights reserved. 4 * 5 * Permission to use, copy, modify, and/or distribute this software for any 6 * purpose with or without fee is hereby granted, provided that the above 7 * copyright notice and this permission notice appear in all copies. 8 * 9 * THE SOFTWARE IS PROVIDED "AS IS" AND THE AUTHOR DISCLAIMS ALL WARRANTIES 10 * WITH REGARD TO THIS SOFTWARE INCLUDING ALL IMPLIED WARRANTIES OF 11 * MERCHANTABILITY AND FITNESS. IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR 12 * ANY SPECIAL, DIRECT, INDIRECT, OR CONSEQUENTIAL DAMAGES OR ANY DAMAGES 13 * WHATSOEVER RESULTING FROM LOSS OF USE, DATA OR PROFITS, WHETHER IN AN 14 * ACTION OF CONTRACT, NEGLIGENCE OR OTHER TORTIOUS ACTION, ARISING OUT OF 15 * OR IN CONNECTION WITH THE USE OR PERFORMANCE OF THIS SOFTWARE. 16 */ 17 18 19 20 #ifndef _TX_MSDU_START_H_ 21 #define _TX_MSDU_START_H_ 22 #if !defined(__ASSEMBLER__) 23 #endif 24 25 #define NUM_OF_DWORDS_TX_MSDU_START 8 26 27 #define NUM_OF_QWORDS_TX_MSDU_START 4 28 29 struct tx_msdu_start { 30 #ifndef WIFI_BIT_ORDER_BIG_ENDIAN 31 uint32_t msdu_len : 14, 32 first_msdu : 1, 33 last_msdu : 1, 34 encap_type : 2, 35 epd_en : 1, 36 da_sa_present : 2, 37 ipv4_checksum_en : 1, 38 udp_over_ipv4_checksum_en : 1, 39 udp_over_ipv6_checksum_en : 1, 40 tcp_over_ipv4_checksum_en : 1, 41 tcp_over_ipv6_checksum_en : 1, 42 dummy_msdu_delimitation : 1, 43 reserved_0a : 5; 44 uint32_t tso_enable : 1, 45 reserved_1a : 6, 46 tcp_flag : 9, 47 tcp_flag_mask : 9, 48 mesh_enable : 1, 49 reserved_1b : 6; 50 uint32_t l2_length : 16, 51 ip_length : 16; 52 uint32_t tcp_seq_number : 32; 53 uint32_t ip_identification : 16, 54 checksum_offset : 13, 55 partial_checksum_en : 1, 56 reserved_4 : 2; 57 uint32_t payload_start_offset : 14, 58 reserved_5a : 2, 59 payload_end_offset : 14, 60 reserved_5b : 2; 61 uint32_t udp_length : 16, 62 reserved_6 : 16; 63 uint32_t tlv64_padding : 32; 64 #else 65 uint32_t reserved_0a : 5, 66 dummy_msdu_delimitation : 1, 67 tcp_over_ipv6_checksum_en : 1, 68 tcp_over_ipv4_checksum_en : 1, 69 udp_over_ipv6_checksum_en : 1, 70 udp_over_ipv4_checksum_en : 1, 71 ipv4_checksum_en : 1, 72 da_sa_present : 2, 73 epd_en : 1, 74 encap_type : 2, 75 last_msdu : 1, 76 first_msdu : 1, 77 msdu_len : 14; 78 uint32_t reserved_1b : 6, 79 mesh_enable : 1, 80 tcp_flag_mask : 9, 81 tcp_flag : 9, 82 reserved_1a : 6, 83 tso_enable : 1; 84 uint32_t ip_length : 16, 85 l2_length : 16; 86 uint32_t tcp_seq_number : 32; 87 uint32_t reserved_4 : 2, 88 partial_checksum_en : 1, 89 checksum_offset : 13, 90 ip_identification : 16; 91 uint32_t reserved_5b : 2, 92 payload_end_offset : 14, 93 reserved_5a : 2, 94 payload_start_offset : 14; 95 uint32_t reserved_6 : 16, 96 udp_length : 16; 97 uint32_t tlv64_padding : 32; 98 #endif 99 }; 100 101 #define TX_MSDU_START_MSDU_LEN_OFFSET 0x0000000000000000 102 #define TX_MSDU_START_MSDU_LEN_LSB 0 103 #define TX_MSDU_START_MSDU_LEN_MSB 13 104 #define TX_MSDU_START_MSDU_LEN_MASK 0x0000000000003fff 105 106 #define TX_MSDU_START_FIRST_MSDU_OFFSET 0x0000000000000000 107 #define TX_MSDU_START_FIRST_MSDU_LSB 14 108 #define TX_MSDU_START_FIRST_MSDU_MSB 14 109 #define TX_MSDU_START_FIRST_MSDU_MASK 0x0000000000004000 110 111 #define TX_MSDU_START_LAST_MSDU_OFFSET 0x0000000000000000 112 #define TX_MSDU_START_LAST_MSDU_LSB 15 113 #define TX_MSDU_START_LAST_MSDU_MSB 15 114 #define TX_MSDU_START_LAST_MSDU_MASK 0x0000000000008000 115 116 #define TX_MSDU_START_ENCAP_TYPE_OFFSET 0x0000000000000000 117 #define TX_MSDU_START_ENCAP_TYPE_LSB 16 118 #define TX_MSDU_START_ENCAP_TYPE_MSB 17 119 #define TX_MSDU_START_ENCAP_TYPE_MASK 0x0000000000030000 120 121 #define TX_MSDU_START_EPD_EN_OFFSET 0x0000000000000000 122 #define TX_MSDU_START_EPD_EN_LSB 18 123 #define TX_MSDU_START_EPD_EN_MSB 18 124 #define TX_MSDU_START_EPD_EN_MASK 0x0000000000040000 125 126 #define TX_MSDU_START_DA_SA_PRESENT_OFFSET 0x0000000000000000 127 #define TX_MSDU_START_DA_SA_PRESENT_LSB 19 128 #define TX_MSDU_START_DA_SA_PRESENT_MSB 20 129 #define TX_MSDU_START_DA_SA_PRESENT_MASK 0x0000000000180000 130 131 #define TX_MSDU_START_IPV4_CHECKSUM_EN_OFFSET 0x0000000000000000 132 #define TX_MSDU_START_IPV4_CHECKSUM_EN_LSB 21 133 #define TX_MSDU_START_IPV4_CHECKSUM_EN_MSB 21 134 #define TX_MSDU_START_IPV4_CHECKSUM_EN_MASK 0x0000000000200000 135 136 #define TX_MSDU_START_UDP_OVER_IPV4_CHECKSUM_EN_OFFSET 0x0000000000000000 137 #define TX_MSDU_START_UDP_OVER_IPV4_CHECKSUM_EN_LSB 22 138 #define TX_MSDU_START_UDP_OVER_IPV4_CHECKSUM_EN_MSB 22 139 #define TX_MSDU_START_UDP_OVER_IPV4_CHECKSUM_EN_MASK 0x0000000000400000 140 141 #define TX_MSDU_START_UDP_OVER_IPV6_CHECKSUM_EN_OFFSET 0x0000000000000000 142 #define TX_MSDU_START_UDP_OVER_IPV6_CHECKSUM_EN_LSB 23 143 #define TX_MSDU_START_UDP_OVER_IPV6_CHECKSUM_EN_MSB 23 144 #define TX_MSDU_START_UDP_OVER_IPV6_CHECKSUM_EN_MASK 0x0000000000800000 145 146 #define TX_MSDU_START_TCP_OVER_IPV4_CHECKSUM_EN_OFFSET 0x0000000000000000 147 #define TX_MSDU_START_TCP_OVER_IPV4_CHECKSUM_EN_LSB 24 148 #define TX_MSDU_START_TCP_OVER_IPV4_CHECKSUM_EN_MSB 24 149 #define TX_MSDU_START_TCP_OVER_IPV4_CHECKSUM_EN_MASK 0x0000000001000000 150 151 #define TX_MSDU_START_TCP_OVER_IPV6_CHECKSUM_EN_OFFSET 0x0000000000000000 152 #define TX_MSDU_START_TCP_OVER_IPV6_CHECKSUM_EN_LSB 25 153 #define TX_MSDU_START_TCP_OVER_IPV6_CHECKSUM_EN_MSB 25 154 #define TX_MSDU_START_TCP_OVER_IPV6_CHECKSUM_EN_MASK 0x0000000002000000 155 156 #define TX_MSDU_START_DUMMY_MSDU_DELIMITATION_OFFSET 0x0000000000000000 157 #define TX_MSDU_START_DUMMY_MSDU_DELIMITATION_LSB 26 158 #define TX_MSDU_START_DUMMY_MSDU_DELIMITATION_MSB 26 159 #define TX_MSDU_START_DUMMY_MSDU_DELIMITATION_MASK 0x0000000004000000 160 161 #define TX_MSDU_START_RESERVED_0A_OFFSET 0x0000000000000000 162 #define TX_MSDU_START_RESERVED_0A_LSB 27 163 #define TX_MSDU_START_RESERVED_0A_MSB 31 164 #define TX_MSDU_START_RESERVED_0A_MASK 0x00000000f8000000 165 166 #define TX_MSDU_START_TSO_ENABLE_OFFSET 0x0000000000000000 167 #define TX_MSDU_START_TSO_ENABLE_LSB 32 168 #define TX_MSDU_START_TSO_ENABLE_MSB 32 169 #define TX_MSDU_START_TSO_ENABLE_MASK 0x0000000100000000 170 171 #define TX_MSDU_START_RESERVED_1A_OFFSET 0x0000000000000000 172 #define TX_MSDU_START_RESERVED_1A_LSB 33 173 #define TX_MSDU_START_RESERVED_1A_MSB 38 174 #define TX_MSDU_START_RESERVED_1A_MASK 0x0000007e00000000 175 176 #define TX_MSDU_START_TCP_FLAG_OFFSET 0x0000000000000000 177 #define TX_MSDU_START_TCP_FLAG_LSB 39 178 #define TX_MSDU_START_TCP_FLAG_MSB 47 179 #define TX_MSDU_START_TCP_FLAG_MASK 0x0000ff8000000000 180 181 #define TX_MSDU_START_TCP_FLAG_MASK_OFFSET 0x0000000000000000 182 #define TX_MSDU_START_TCP_FLAG_MASK_LSB 48 183 #define TX_MSDU_START_TCP_FLAG_MASK_MSB 56 184 #define TX_MSDU_START_TCP_FLAG_MASK_MASK 0x01ff000000000000 185 186 #define TX_MSDU_START_MESH_ENABLE_OFFSET 0x0000000000000000 187 #define TX_MSDU_START_MESH_ENABLE_LSB 57 188 #define TX_MSDU_START_MESH_ENABLE_MSB 57 189 #define TX_MSDU_START_MESH_ENABLE_MASK 0x0200000000000000 190 191 #define TX_MSDU_START_RESERVED_1B_OFFSET 0x0000000000000000 192 #define TX_MSDU_START_RESERVED_1B_LSB 58 193 #define TX_MSDU_START_RESERVED_1B_MSB 63 194 #define TX_MSDU_START_RESERVED_1B_MASK 0xfc00000000000000 195 196 #define TX_MSDU_START_L2_LENGTH_OFFSET 0x0000000000000008 197 #define TX_MSDU_START_L2_LENGTH_LSB 0 198 #define TX_MSDU_START_L2_LENGTH_MSB 15 199 #define TX_MSDU_START_L2_LENGTH_MASK 0x000000000000ffff 200 201 #define TX_MSDU_START_IP_LENGTH_OFFSET 0x0000000000000008 202 #define TX_MSDU_START_IP_LENGTH_LSB 16 203 #define TX_MSDU_START_IP_LENGTH_MSB 31 204 #define TX_MSDU_START_IP_LENGTH_MASK 0x00000000ffff0000 205 206 #define TX_MSDU_START_TCP_SEQ_NUMBER_OFFSET 0x0000000000000008 207 #define TX_MSDU_START_TCP_SEQ_NUMBER_LSB 32 208 #define TX_MSDU_START_TCP_SEQ_NUMBER_MSB 63 209 #define TX_MSDU_START_TCP_SEQ_NUMBER_MASK 0xffffffff00000000 210 211 #define TX_MSDU_START_IP_IDENTIFICATION_OFFSET 0x0000000000000010 212 #define TX_MSDU_START_IP_IDENTIFICATION_LSB 0 213 #define TX_MSDU_START_IP_IDENTIFICATION_MSB 15 214 #define TX_MSDU_START_IP_IDENTIFICATION_MASK 0x000000000000ffff 215 216 #define TX_MSDU_START_CHECKSUM_OFFSET_OFFSET 0x0000000000000010 217 #define TX_MSDU_START_CHECKSUM_OFFSET_LSB 16 218 #define TX_MSDU_START_CHECKSUM_OFFSET_MSB 28 219 #define TX_MSDU_START_CHECKSUM_OFFSET_MASK 0x000000001fff0000 220 221 #define TX_MSDU_START_PARTIAL_CHECKSUM_EN_OFFSET 0x0000000000000010 222 #define TX_MSDU_START_PARTIAL_CHECKSUM_EN_LSB 29 223 #define TX_MSDU_START_PARTIAL_CHECKSUM_EN_MSB 29 224 #define TX_MSDU_START_PARTIAL_CHECKSUM_EN_MASK 0x0000000020000000 225 226 #define TX_MSDU_START_RESERVED_4_OFFSET 0x0000000000000010 227 #define TX_MSDU_START_RESERVED_4_LSB 30 228 #define TX_MSDU_START_RESERVED_4_MSB 31 229 #define TX_MSDU_START_RESERVED_4_MASK 0x00000000c0000000 230 231 #define TX_MSDU_START_PAYLOAD_START_OFFSET_OFFSET 0x0000000000000010 232 #define TX_MSDU_START_PAYLOAD_START_OFFSET_LSB 32 233 #define TX_MSDU_START_PAYLOAD_START_OFFSET_MSB 45 234 #define TX_MSDU_START_PAYLOAD_START_OFFSET_MASK 0x00003fff00000000 235 236 #define TX_MSDU_START_RESERVED_5A_OFFSET 0x0000000000000010 237 #define TX_MSDU_START_RESERVED_5A_LSB 46 238 #define TX_MSDU_START_RESERVED_5A_MSB 47 239 #define TX_MSDU_START_RESERVED_5A_MASK 0x0000c00000000000 240 241 #define TX_MSDU_START_PAYLOAD_END_OFFSET_OFFSET 0x0000000000000010 242 #define TX_MSDU_START_PAYLOAD_END_OFFSET_LSB 48 243 #define TX_MSDU_START_PAYLOAD_END_OFFSET_MSB 61 244 #define TX_MSDU_START_PAYLOAD_END_OFFSET_MASK 0x3fff000000000000 245 246 #define TX_MSDU_START_RESERVED_5B_OFFSET 0x0000000000000010 247 #define TX_MSDU_START_RESERVED_5B_LSB 62 248 #define TX_MSDU_START_RESERVED_5B_MSB 63 249 #define TX_MSDU_START_RESERVED_5B_MASK 0xc000000000000000 250 251 #define TX_MSDU_START_UDP_LENGTH_OFFSET 0x0000000000000018 252 #define TX_MSDU_START_UDP_LENGTH_LSB 0 253 #define TX_MSDU_START_UDP_LENGTH_MSB 15 254 #define TX_MSDU_START_UDP_LENGTH_MASK 0x000000000000ffff 255 256 #define TX_MSDU_START_RESERVED_6_OFFSET 0x0000000000000018 257 #define TX_MSDU_START_RESERVED_6_LSB 16 258 #define TX_MSDU_START_RESERVED_6_MSB 31 259 #define TX_MSDU_START_RESERVED_6_MASK 0x00000000ffff0000 260 261 #define TX_MSDU_START_TLV64_PADDING_OFFSET 0x0000000000000018 262 #define TX_MSDU_START_TLV64_PADDING_LSB 32 263 #define TX_MSDU_START_TLV64_PADDING_MSB 63 264 #define TX_MSDU_START_TLV64_PADDING_MASK 0xffffffff00000000 265 266 #endif 267