1 
2 /*
3  * Copyright (c) 2022 Qualcomm Innovation Center, Inc. All rights reserved.
4  *
5  * Permission to use, copy, modify, and/or distribute this software for
6  * any purpose with or without fee is hereby granted, provided that the
7  * above copyright notice and this permission notice appear in all
8  * copies.
9  *
10  * THE SOFTWARE IS PROVIDED "AS IS" AND THE AUTHOR DISCLAIMS ALL
11  * WARRANTIES WITH REGARD TO THIS SOFTWARE INCLUDING ALL IMPLIED
12  * WARRANTIES OF MERCHANTABILITY AND FITNESS. IN NO EVENT SHALL THE
13  * AUTHOR BE LIABLE FOR ANY SPECIAL, DIRECT, INDIRECT, OR CONSEQUENTIAL
14  * DAMAGES OR ANY DAMAGES WHATSOEVER RESULTING FROM LOSS OF USE, DATA OR
15  * PROFITS, WHETHER IN AN ACTION OF CONTRACT, NEGLIGENCE OR OTHER
16  * TORTIOUS ACTION, ARISING OUT OF OR IN CONNECTION WITH THE USE OR
17  * PERFORMANCE OF THIS SOFTWARE.
18  */
19 
20 
21 
22 #ifndef _TX_MSDU_EXTENSION_H_
23 #define _TX_MSDU_EXTENSION_H_
24 #if !defined(__ASSEMBLER__)
25 #endif
26 
27 #define NUM_OF_DWORDS_TX_MSDU_EXTENSION 18
28 
29 struct tx_msdu_extension {
30 #ifndef WIFI_BIT_ORDER_BIG_ENDIAN
31              uint32_t tso_enable                                              :  1,
32                       reserved_0a                                             :  6,
33                       tcp_flag                                                :  9,
34                       tcp_flag_mask                                           :  9,
35                       reserved_0b                                             :  7;
36              uint32_t l2_length                                               : 16,
37                       ip_length                                               : 16;
38              uint32_t tcp_seq_number                                          : 32;
39              uint32_t ip_identification                                       : 16,
40                       udp_length                                              : 16;
41              uint32_t checksum_offset                                         : 14,
42                       partial_checksum_en                                     :  1,
43                       reserved_4a                                             :  1,
44                       payload_start_offset                                    : 14,
45                       reserved_4b                                             :  2;
46              uint32_t payload_end_offset                                      : 14,
47                       reserved_5a                                             :  2,
48                       wds                                                     :  1,
49                       reserved_5b                                             : 15;
50              uint32_t buf0_ptr_31_0                                           : 32;
51              uint32_t buf0_ptr_39_32                                          :  8,
52                       extn_override                                           :  1,
53                       encap_type                                              :  2,
54                       encrypt_type                                            :  4,
55                       tqm_no_drop                                             :  1,
56                       buf0_len                                                : 16;
57              uint32_t buf1_ptr_31_0                                           : 32;
58              uint32_t buf1_ptr_39_32                                          :  8,
59                       epd                                                     :  1,
60                       mesh_enable                                             :  2,
61                       reserved_9a                                             :  5,
62                       buf1_len                                                : 16;
63              uint32_t buf2_ptr_31_0                                           : 32;
64              uint32_t buf2_ptr_39_32                                          :  8,
65                       dscp_tid_table_num                                      :  6,
66                       reserved_11a                                            :  2,
67                       buf2_len                                                : 16;
68              uint32_t buf3_ptr_31_0                                           : 32;
69              uint32_t buf3_ptr_39_32                                          :  8,
70                       reserved_13a                                            :  8,
71                       buf3_len                                                : 16;
72              uint32_t buf4_ptr_31_0                                           : 32;
73              uint32_t buf4_ptr_39_32                                          :  8,
74                       reserved_15a                                            :  8,
75                       buf4_len                                                : 16;
76              uint32_t buf5_ptr_31_0                                           : 32;
77              uint32_t buf5_ptr_39_32                                          :  8,
78                       reserved_17a                                            :  8,
79                       buf5_len                                                : 16;
80 #else
81              uint32_t reserved_0b                                             :  7,
82                       tcp_flag_mask                                           :  9,
83                       tcp_flag                                                :  9,
84                       reserved_0a                                             :  6,
85                       tso_enable                                              :  1;
86              uint32_t ip_length                                               : 16,
87                       l2_length                                               : 16;
88              uint32_t tcp_seq_number                                          : 32;
89              uint32_t udp_length                                              : 16,
90                       ip_identification                                       : 16;
91              uint32_t reserved_4b                                             :  2,
92                       payload_start_offset                                    : 14,
93                       reserved_4a                                             :  1,
94                       partial_checksum_en                                     :  1,
95                       checksum_offset                                         : 14;
96              uint32_t reserved_5b                                             : 15,
97                       wds                                                     :  1,
98                       reserved_5a                                             :  2,
99                       payload_end_offset                                      : 14;
100              uint32_t buf0_ptr_31_0                                           : 32;
101              uint32_t buf0_len                                                : 16,
102                       tqm_no_drop                                             :  1,
103                       encrypt_type                                            :  4,
104                       encap_type                                              :  2,
105                       extn_override                                           :  1,
106                       buf0_ptr_39_32                                          :  8;
107              uint32_t buf1_ptr_31_0                                           : 32;
108              uint32_t buf1_len                                                : 16,
109                       reserved_9a                                             :  5,
110                       mesh_enable                                             :  2,
111                       epd                                                     :  1,
112                       buf1_ptr_39_32                                          :  8;
113              uint32_t buf2_ptr_31_0                                           : 32;
114              uint32_t buf2_len                                                : 16,
115                       reserved_11a                                            :  2,
116                       dscp_tid_table_num                                      :  6,
117                       buf2_ptr_39_32                                          :  8;
118              uint32_t buf3_ptr_31_0                                           : 32;
119              uint32_t buf3_len                                                : 16,
120                       reserved_13a                                            :  8,
121                       buf3_ptr_39_32                                          :  8;
122              uint32_t buf4_ptr_31_0                                           : 32;
123              uint32_t buf4_len                                                : 16,
124                       reserved_15a                                            :  8,
125                       buf4_ptr_39_32                                          :  8;
126              uint32_t buf5_ptr_31_0                                           : 32;
127              uint32_t buf5_len                                                : 16,
128                       reserved_17a                                            :  8,
129                       buf5_ptr_39_32                                          :  8;
130 #endif
131 };
132 
133 #define TX_MSDU_EXTENSION_TSO_ENABLE_OFFSET                                         0x00000000
134 #define TX_MSDU_EXTENSION_TSO_ENABLE_LSB                                            0
135 #define TX_MSDU_EXTENSION_TSO_ENABLE_MSB                                            0
136 #define TX_MSDU_EXTENSION_TSO_ENABLE_MASK                                           0x00000001
137 
138 #define TX_MSDU_EXTENSION_RESERVED_0A_OFFSET                                        0x00000000
139 #define TX_MSDU_EXTENSION_RESERVED_0A_LSB                                           1
140 #define TX_MSDU_EXTENSION_RESERVED_0A_MSB                                           6
141 #define TX_MSDU_EXTENSION_RESERVED_0A_MASK                                          0x0000007e
142 
143 #define TX_MSDU_EXTENSION_TCP_FLAG_OFFSET                                           0x00000000
144 #define TX_MSDU_EXTENSION_TCP_FLAG_LSB                                              7
145 #define TX_MSDU_EXTENSION_TCP_FLAG_MSB                                              15
146 #define TX_MSDU_EXTENSION_TCP_FLAG_MASK                                             0x0000ff80
147 
148 #define TX_MSDU_EXTENSION_TCP_FLAG_MASK_OFFSET                                      0x00000000
149 #define TX_MSDU_EXTENSION_TCP_FLAG_MASK_LSB                                         16
150 #define TX_MSDU_EXTENSION_TCP_FLAG_MASK_MSB                                         24
151 #define TX_MSDU_EXTENSION_TCP_FLAG_MASK_MASK                                        0x01ff0000
152 
153 #define TX_MSDU_EXTENSION_RESERVED_0B_OFFSET                                        0x00000000
154 #define TX_MSDU_EXTENSION_RESERVED_0B_LSB                                           25
155 #define TX_MSDU_EXTENSION_RESERVED_0B_MSB                                           31
156 #define TX_MSDU_EXTENSION_RESERVED_0B_MASK                                          0xfe000000
157 
158 #define TX_MSDU_EXTENSION_L2_LENGTH_OFFSET                                          0x00000004
159 #define TX_MSDU_EXTENSION_L2_LENGTH_LSB                                             0
160 #define TX_MSDU_EXTENSION_L2_LENGTH_MSB                                             15
161 #define TX_MSDU_EXTENSION_L2_LENGTH_MASK                                            0x0000ffff
162 
163 #define TX_MSDU_EXTENSION_IP_LENGTH_OFFSET                                          0x00000004
164 #define TX_MSDU_EXTENSION_IP_LENGTH_LSB                                             16
165 #define TX_MSDU_EXTENSION_IP_LENGTH_MSB                                             31
166 #define TX_MSDU_EXTENSION_IP_LENGTH_MASK                                            0xffff0000
167 
168 #define TX_MSDU_EXTENSION_TCP_SEQ_NUMBER_OFFSET                                     0x00000008
169 #define TX_MSDU_EXTENSION_TCP_SEQ_NUMBER_LSB                                        0
170 #define TX_MSDU_EXTENSION_TCP_SEQ_NUMBER_MSB                                        31
171 #define TX_MSDU_EXTENSION_TCP_SEQ_NUMBER_MASK                                       0xffffffff
172 
173 #define TX_MSDU_EXTENSION_IP_IDENTIFICATION_OFFSET                                  0x0000000c
174 #define TX_MSDU_EXTENSION_IP_IDENTIFICATION_LSB                                     0
175 #define TX_MSDU_EXTENSION_IP_IDENTIFICATION_MSB                                     15
176 #define TX_MSDU_EXTENSION_IP_IDENTIFICATION_MASK                                    0x0000ffff
177 
178 #define TX_MSDU_EXTENSION_UDP_LENGTH_OFFSET                                         0x0000000c
179 #define TX_MSDU_EXTENSION_UDP_LENGTH_LSB                                            16
180 #define TX_MSDU_EXTENSION_UDP_LENGTH_MSB                                            31
181 #define TX_MSDU_EXTENSION_UDP_LENGTH_MASK                                           0xffff0000
182 
183 #define TX_MSDU_EXTENSION_CHECKSUM_OFFSET_OFFSET                                    0x00000010
184 #define TX_MSDU_EXTENSION_CHECKSUM_OFFSET_LSB                                       0
185 #define TX_MSDU_EXTENSION_CHECKSUM_OFFSET_MSB                                       13
186 #define TX_MSDU_EXTENSION_CHECKSUM_OFFSET_MASK                                      0x00003fff
187 
188 #define TX_MSDU_EXTENSION_PARTIAL_CHECKSUM_EN_OFFSET                                0x00000010
189 #define TX_MSDU_EXTENSION_PARTIAL_CHECKSUM_EN_LSB                                   14
190 #define TX_MSDU_EXTENSION_PARTIAL_CHECKSUM_EN_MSB                                   14
191 #define TX_MSDU_EXTENSION_PARTIAL_CHECKSUM_EN_MASK                                  0x00004000
192 
193 #define TX_MSDU_EXTENSION_RESERVED_4A_OFFSET                                        0x00000010
194 #define TX_MSDU_EXTENSION_RESERVED_4A_LSB                                           15
195 #define TX_MSDU_EXTENSION_RESERVED_4A_MSB                                           15
196 #define TX_MSDU_EXTENSION_RESERVED_4A_MASK                                          0x00008000
197 
198 #define TX_MSDU_EXTENSION_PAYLOAD_START_OFFSET_OFFSET                               0x00000010
199 #define TX_MSDU_EXTENSION_PAYLOAD_START_OFFSET_LSB                                  16
200 #define TX_MSDU_EXTENSION_PAYLOAD_START_OFFSET_MSB                                  29
201 #define TX_MSDU_EXTENSION_PAYLOAD_START_OFFSET_MASK                                 0x3fff0000
202 
203 #define TX_MSDU_EXTENSION_RESERVED_4B_OFFSET                                        0x00000010
204 #define TX_MSDU_EXTENSION_RESERVED_4B_LSB                                           30
205 #define TX_MSDU_EXTENSION_RESERVED_4B_MSB                                           31
206 #define TX_MSDU_EXTENSION_RESERVED_4B_MASK                                          0xc0000000
207 
208 #define TX_MSDU_EXTENSION_PAYLOAD_END_OFFSET_OFFSET                                 0x00000014
209 #define TX_MSDU_EXTENSION_PAYLOAD_END_OFFSET_LSB                                    0
210 #define TX_MSDU_EXTENSION_PAYLOAD_END_OFFSET_MSB                                    13
211 #define TX_MSDU_EXTENSION_PAYLOAD_END_OFFSET_MASK                                   0x00003fff
212 
213 #define TX_MSDU_EXTENSION_RESERVED_5A_OFFSET                                        0x00000014
214 #define TX_MSDU_EXTENSION_RESERVED_5A_LSB                                           14
215 #define TX_MSDU_EXTENSION_RESERVED_5A_MSB                                           15
216 #define TX_MSDU_EXTENSION_RESERVED_5A_MASK                                          0x0000c000
217 
218 #define TX_MSDU_EXTENSION_WDS_OFFSET                                                0x00000014
219 #define TX_MSDU_EXTENSION_WDS_LSB                                                   16
220 #define TX_MSDU_EXTENSION_WDS_MSB                                                   16
221 #define TX_MSDU_EXTENSION_WDS_MASK                                                  0x00010000
222 
223 #define TX_MSDU_EXTENSION_RESERVED_5B_OFFSET                                        0x00000014
224 #define TX_MSDU_EXTENSION_RESERVED_5B_LSB                                           17
225 #define TX_MSDU_EXTENSION_RESERVED_5B_MSB                                           31
226 #define TX_MSDU_EXTENSION_RESERVED_5B_MASK                                          0xfffe0000
227 
228 #define TX_MSDU_EXTENSION_BUF0_PTR_31_0_OFFSET                                      0x00000018
229 #define TX_MSDU_EXTENSION_BUF0_PTR_31_0_LSB                                         0
230 #define TX_MSDU_EXTENSION_BUF0_PTR_31_0_MSB                                         31
231 #define TX_MSDU_EXTENSION_BUF0_PTR_31_0_MASK                                        0xffffffff
232 
233 #define TX_MSDU_EXTENSION_BUF0_PTR_39_32_OFFSET                                     0x0000001c
234 #define TX_MSDU_EXTENSION_BUF0_PTR_39_32_LSB                                        0
235 #define TX_MSDU_EXTENSION_BUF0_PTR_39_32_MSB                                        7
236 #define TX_MSDU_EXTENSION_BUF0_PTR_39_32_MASK                                       0x000000ff
237 
238 #define TX_MSDU_EXTENSION_EXTN_OVERRIDE_OFFSET                                      0x0000001c
239 #define TX_MSDU_EXTENSION_EXTN_OVERRIDE_LSB                                         8
240 #define TX_MSDU_EXTENSION_EXTN_OVERRIDE_MSB                                         8
241 #define TX_MSDU_EXTENSION_EXTN_OVERRIDE_MASK                                        0x00000100
242 
243 #define TX_MSDU_EXTENSION_ENCAP_TYPE_OFFSET                                         0x0000001c
244 #define TX_MSDU_EXTENSION_ENCAP_TYPE_LSB                                            9
245 #define TX_MSDU_EXTENSION_ENCAP_TYPE_MSB                                            10
246 #define TX_MSDU_EXTENSION_ENCAP_TYPE_MASK                                           0x00000600
247 
248 #define TX_MSDU_EXTENSION_ENCRYPT_TYPE_OFFSET                                       0x0000001c
249 #define TX_MSDU_EXTENSION_ENCRYPT_TYPE_LSB                                          11
250 #define TX_MSDU_EXTENSION_ENCRYPT_TYPE_MSB                                          14
251 #define TX_MSDU_EXTENSION_ENCRYPT_TYPE_MASK                                         0x00007800
252 
253 #define TX_MSDU_EXTENSION_TQM_NO_DROP_OFFSET                                        0x0000001c
254 #define TX_MSDU_EXTENSION_TQM_NO_DROP_LSB                                           15
255 #define TX_MSDU_EXTENSION_TQM_NO_DROP_MSB                                           15
256 #define TX_MSDU_EXTENSION_TQM_NO_DROP_MASK                                          0x00008000
257 
258 #define TX_MSDU_EXTENSION_BUF0_LEN_OFFSET                                           0x0000001c
259 #define TX_MSDU_EXTENSION_BUF0_LEN_LSB                                              16
260 #define TX_MSDU_EXTENSION_BUF0_LEN_MSB                                              31
261 #define TX_MSDU_EXTENSION_BUF0_LEN_MASK                                             0xffff0000
262 
263 #define TX_MSDU_EXTENSION_BUF1_PTR_31_0_OFFSET                                      0x00000020
264 #define TX_MSDU_EXTENSION_BUF1_PTR_31_0_LSB                                         0
265 #define TX_MSDU_EXTENSION_BUF1_PTR_31_0_MSB                                         31
266 #define TX_MSDU_EXTENSION_BUF1_PTR_31_0_MASK                                        0xffffffff
267 
268 #define TX_MSDU_EXTENSION_BUF1_PTR_39_32_OFFSET                                     0x00000024
269 #define TX_MSDU_EXTENSION_BUF1_PTR_39_32_LSB                                        0
270 #define TX_MSDU_EXTENSION_BUF1_PTR_39_32_MSB                                        7
271 #define TX_MSDU_EXTENSION_BUF1_PTR_39_32_MASK                                       0x000000ff
272 
273 #define TX_MSDU_EXTENSION_EPD_OFFSET                                                0x00000024
274 #define TX_MSDU_EXTENSION_EPD_LSB                                                   8
275 #define TX_MSDU_EXTENSION_EPD_MSB                                                   8
276 #define TX_MSDU_EXTENSION_EPD_MASK                                                  0x00000100
277 
278 #define TX_MSDU_EXTENSION_MESH_ENABLE_OFFSET                                        0x00000024
279 #define TX_MSDU_EXTENSION_MESH_ENABLE_LSB                                           9
280 #define TX_MSDU_EXTENSION_MESH_ENABLE_MSB                                           10
281 #define TX_MSDU_EXTENSION_MESH_ENABLE_MASK                                          0x00000600
282 
283 #define TX_MSDU_EXTENSION_RESERVED_9A_OFFSET                                        0x00000024
284 #define TX_MSDU_EXTENSION_RESERVED_9A_LSB                                           11
285 #define TX_MSDU_EXTENSION_RESERVED_9A_MSB                                           15
286 #define TX_MSDU_EXTENSION_RESERVED_9A_MASK                                          0x0000f800
287 
288 #define TX_MSDU_EXTENSION_BUF1_LEN_OFFSET                                           0x00000024
289 #define TX_MSDU_EXTENSION_BUF1_LEN_LSB                                              16
290 #define TX_MSDU_EXTENSION_BUF1_LEN_MSB                                              31
291 #define TX_MSDU_EXTENSION_BUF1_LEN_MASK                                             0xffff0000
292 
293 #define TX_MSDU_EXTENSION_BUF2_PTR_31_0_OFFSET                                      0x00000028
294 #define TX_MSDU_EXTENSION_BUF2_PTR_31_0_LSB                                         0
295 #define TX_MSDU_EXTENSION_BUF2_PTR_31_0_MSB                                         31
296 #define TX_MSDU_EXTENSION_BUF2_PTR_31_0_MASK                                        0xffffffff
297 
298 #define TX_MSDU_EXTENSION_BUF2_PTR_39_32_OFFSET                                     0x0000002c
299 #define TX_MSDU_EXTENSION_BUF2_PTR_39_32_LSB                                        0
300 #define TX_MSDU_EXTENSION_BUF2_PTR_39_32_MSB                                        7
301 #define TX_MSDU_EXTENSION_BUF2_PTR_39_32_MASK                                       0x000000ff
302 
303 #define TX_MSDU_EXTENSION_DSCP_TID_TABLE_NUM_OFFSET                                 0x0000002c
304 #define TX_MSDU_EXTENSION_DSCP_TID_TABLE_NUM_LSB                                    8
305 #define TX_MSDU_EXTENSION_DSCP_TID_TABLE_NUM_MSB                                    13
306 #define TX_MSDU_EXTENSION_DSCP_TID_TABLE_NUM_MASK                                   0x00003f00
307 
308 #define TX_MSDU_EXTENSION_RESERVED_11A_OFFSET                                       0x0000002c
309 #define TX_MSDU_EXTENSION_RESERVED_11A_LSB                                          14
310 #define TX_MSDU_EXTENSION_RESERVED_11A_MSB                                          15
311 #define TX_MSDU_EXTENSION_RESERVED_11A_MASK                                         0x0000c000
312 
313 #define TX_MSDU_EXTENSION_BUF2_LEN_OFFSET                                           0x0000002c
314 #define TX_MSDU_EXTENSION_BUF2_LEN_LSB                                              16
315 #define TX_MSDU_EXTENSION_BUF2_LEN_MSB                                              31
316 #define TX_MSDU_EXTENSION_BUF2_LEN_MASK                                             0xffff0000
317 
318 #define TX_MSDU_EXTENSION_BUF3_PTR_31_0_OFFSET                                      0x00000030
319 #define TX_MSDU_EXTENSION_BUF3_PTR_31_0_LSB                                         0
320 #define TX_MSDU_EXTENSION_BUF3_PTR_31_0_MSB                                         31
321 #define TX_MSDU_EXTENSION_BUF3_PTR_31_0_MASK                                        0xffffffff
322 
323 #define TX_MSDU_EXTENSION_BUF3_PTR_39_32_OFFSET                                     0x00000034
324 #define TX_MSDU_EXTENSION_BUF3_PTR_39_32_LSB                                        0
325 #define TX_MSDU_EXTENSION_BUF3_PTR_39_32_MSB                                        7
326 #define TX_MSDU_EXTENSION_BUF3_PTR_39_32_MASK                                       0x000000ff
327 
328 #define TX_MSDU_EXTENSION_RESERVED_13A_OFFSET                                       0x00000034
329 #define TX_MSDU_EXTENSION_RESERVED_13A_LSB                                          8
330 #define TX_MSDU_EXTENSION_RESERVED_13A_MSB                                          15
331 #define TX_MSDU_EXTENSION_RESERVED_13A_MASK                                         0x0000ff00
332 
333 #define TX_MSDU_EXTENSION_BUF3_LEN_OFFSET                                           0x00000034
334 #define TX_MSDU_EXTENSION_BUF3_LEN_LSB                                              16
335 #define TX_MSDU_EXTENSION_BUF3_LEN_MSB                                              31
336 #define TX_MSDU_EXTENSION_BUF3_LEN_MASK                                             0xffff0000
337 
338 #define TX_MSDU_EXTENSION_BUF4_PTR_31_0_OFFSET                                      0x00000038
339 #define TX_MSDU_EXTENSION_BUF4_PTR_31_0_LSB                                         0
340 #define TX_MSDU_EXTENSION_BUF4_PTR_31_0_MSB                                         31
341 #define TX_MSDU_EXTENSION_BUF4_PTR_31_0_MASK                                        0xffffffff
342 
343 #define TX_MSDU_EXTENSION_BUF4_PTR_39_32_OFFSET                                     0x0000003c
344 #define TX_MSDU_EXTENSION_BUF4_PTR_39_32_LSB                                        0
345 #define TX_MSDU_EXTENSION_BUF4_PTR_39_32_MSB                                        7
346 #define TX_MSDU_EXTENSION_BUF4_PTR_39_32_MASK                                       0x000000ff
347 
348 #define TX_MSDU_EXTENSION_RESERVED_15A_OFFSET                                       0x0000003c
349 #define TX_MSDU_EXTENSION_RESERVED_15A_LSB                                          8
350 #define TX_MSDU_EXTENSION_RESERVED_15A_MSB                                          15
351 #define TX_MSDU_EXTENSION_RESERVED_15A_MASK                                         0x0000ff00
352 
353 #define TX_MSDU_EXTENSION_BUF4_LEN_OFFSET                                           0x0000003c
354 #define TX_MSDU_EXTENSION_BUF4_LEN_LSB                                              16
355 #define TX_MSDU_EXTENSION_BUF4_LEN_MSB                                              31
356 #define TX_MSDU_EXTENSION_BUF4_LEN_MASK                                             0xffff0000
357 
358 #define TX_MSDU_EXTENSION_BUF5_PTR_31_0_OFFSET                                      0x00000040
359 #define TX_MSDU_EXTENSION_BUF5_PTR_31_0_LSB                                         0
360 #define TX_MSDU_EXTENSION_BUF5_PTR_31_0_MSB                                         31
361 #define TX_MSDU_EXTENSION_BUF5_PTR_31_0_MASK                                        0xffffffff
362 
363 #define TX_MSDU_EXTENSION_BUF5_PTR_39_32_OFFSET                                     0x00000044
364 #define TX_MSDU_EXTENSION_BUF5_PTR_39_32_LSB                                        0
365 #define TX_MSDU_EXTENSION_BUF5_PTR_39_32_MSB                                        7
366 #define TX_MSDU_EXTENSION_BUF5_PTR_39_32_MASK                                       0x000000ff
367 
368 #define TX_MSDU_EXTENSION_RESERVED_17A_OFFSET                                       0x00000044
369 #define TX_MSDU_EXTENSION_RESERVED_17A_LSB                                          8
370 #define TX_MSDU_EXTENSION_RESERVED_17A_MSB                                          15
371 #define TX_MSDU_EXTENSION_RESERVED_17A_MASK                                         0x0000ff00
372 
373 #define TX_MSDU_EXTENSION_BUF5_LEN_OFFSET                                           0x00000044
374 #define TX_MSDU_EXTENSION_BUF5_LEN_LSB                                              16
375 #define TX_MSDU_EXTENSION_BUF5_LEN_MSB                                              31
376 #define TX_MSDU_EXTENSION_BUF5_LEN_MASK                                             0xffff0000
377 
378 #endif
379