1 
2 /*
3  * Copyright (c) 2022 Qualcomm Innovation Center, Inc. All rights reserved.
4  *
5  * Permission to use, copy, modify, and/or distribute this software for
6  * any purpose with or without fee is hereby granted, provided that the
7  * above copyright notice and this permission notice appear in all
8  * copies.
9  *
10  * THE SOFTWARE IS PROVIDED "AS IS" AND THE AUTHOR DISCLAIMS ALL
11  * WARRANTIES WITH REGARD TO THIS SOFTWARE INCLUDING ALL IMPLIED
12  * WARRANTIES OF MERCHANTABILITY AND FITNESS. IN NO EVENT SHALL THE
13  * AUTHOR BE LIABLE FOR ANY SPECIAL, DIRECT, INDIRECT, OR CONSEQUENTIAL
14  * DAMAGES OR ANY DAMAGES WHATSOEVER RESULTING FROM LOSS OF USE, DATA OR
15  * PROFITS, WHETHER IN AN ACTION OF CONTRACT, NEGLIGENCE OR OTHER
16  * TORTIOUS ACTION, ARISING OUT OF OR IN CONNECTION WITH THE USE OR
17  * PERFORMANCE OF THIS SOFTWARE.
18  */
19 
20 
21 
22 #ifndef _TCL_DATA_CMD_H_
23 #define _TCL_DATA_CMD_H_
24 #if !defined(__ASSEMBLER__)
25 #endif
26 
27 #include "buffer_addr_info.h"
28 #define NUM_OF_DWORDS_TCL_DATA_CMD 8
29 
30 struct tcl_data_cmd {
31 #ifndef WIFI_BIT_ORDER_BIG_ENDIAN
32              struct   buffer_addr_info                                          buf_addr_info;
33              uint32_t tcl_cmd_type                                            :  1,
34                       buf_or_ext_desc_type                                    :  1,
35                       bank_id                                                 :  6,
36                       tx_notify_frame                                         :  3,
37                       header_length_read_sel                                  :  1,
38                       buffer_timestamp                                        : 19,
39                       buffer_timestamp_valid                                  :  1;
40              uint32_t reserved_3a                                             : 16,
41                       tcl_cmd_number                                          : 16;
42              uint32_t data_length                                             : 16,
43                       ipv4_checksum_en                                        :  1,
44                       udp_over_ipv4_checksum_en                               :  1,
45                       udp_over_ipv6_checksum_en                               :  1,
46                       tcp_over_ipv4_checksum_en                               :  1,
47                       tcp_over_ipv6_checksum_en                               :  1,
48                       to_fw                                                   :  1,
49                       reserved_4a                                             :  1,
50                       packet_offset                                           :  9;
51              uint32_t hlos_tid_overwrite                                      :  1,
52                       flow_override_enable                                    :  1,
53                       who_classify_info_sel                                   :  2,
54                       hlos_tid                                                :  4,
55                       flow_override                                           :  1,
56                       pmac_id                                                 :  2,
57                       msdu_color                                              :  2,
58                       reserved_5a                                             : 11,
59                       vdev_id                                                 :  8;
60              uint32_t search_index                                            : 20,
61                       cache_set_num                                           :  4,
62                       index_lookup_override                                   :  1,
63                       reserved_6a                                             :  7;
64              uint32_t reserved_7a                                             : 20,
65                       ring_id                                                 :  8,
66                       looping_count                                           :  4;
67 #else
68              struct   buffer_addr_info                                          buf_addr_info;
69              uint32_t buffer_timestamp_valid                                  :  1,
70                       buffer_timestamp                                        : 19,
71                       header_length_read_sel                                  :  1,
72                       tx_notify_frame                                         :  3,
73                       bank_id                                                 :  6,
74                       buf_or_ext_desc_type                                    :  1,
75                       tcl_cmd_type                                            :  1;
76              uint32_t tcl_cmd_number                                          : 16,
77                       reserved_3a                                             : 16;
78              uint32_t packet_offset                                           :  9,
79                       reserved_4a                                             :  1,
80                       to_fw                                                   :  1,
81                       tcp_over_ipv6_checksum_en                               :  1,
82                       tcp_over_ipv4_checksum_en                               :  1,
83                       udp_over_ipv6_checksum_en                               :  1,
84                       udp_over_ipv4_checksum_en                               :  1,
85                       ipv4_checksum_en                                        :  1,
86                       data_length                                             : 16;
87              uint32_t vdev_id                                                 :  8,
88                       reserved_5a                                             : 11,
89                       msdu_color                                              :  2,
90                       pmac_id                                                 :  2,
91                       flow_override                                           :  1,
92                       hlos_tid                                                :  4,
93                       who_classify_info_sel                                   :  2,
94                       flow_override_enable                                    :  1,
95                       hlos_tid_overwrite                                      :  1;
96              uint32_t reserved_6a                                             :  7,
97                       index_lookup_override                                   :  1,
98                       cache_set_num                                           :  4,
99                       search_index                                            : 20;
100              uint32_t looping_count                                           :  4,
101                       ring_id                                                 :  8,
102                       reserved_7a                                             : 20;
103 #endif
104 };
105 
106 #define TCL_DATA_CMD_BUF_ADDR_INFO_BUFFER_ADDR_31_0_OFFSET                          0x00000000
107 #define TCL_DATA_CMD_BUF_ADDR_INFO_BUFFER_ADDR_31_0_LSB                             0
108 #define TCL_DATA_CMD_BUF_ADDR_INFO_BUFFER_ADDR_31_0_MSB                             31
109 #define TCL_DATA_CMD_BUF_ADDR_INFO_BUFFER_ADDR_31_0_MASK                            0xffffffff
110 
111 #define TCL_DATA_CMD_BUF_ADDR_INFO_BUFFER_ADDR_39_32_OFFSET                         0x00000004
112 #define TCL_DATA_CMD_BUF_ADDR_INFO_BUFFER_ADDR_39_32_LSB                            0
113 #define TCL_DATA_CMD_BUF_ADDR_INFO_BUFFER_ADDR_39_32_MSB                            7
114 #define TCL_DATA_CMD_BUF_ADDR_INFO_BUFFER_ADDR_39_32_MASK                           0x000000ff
115 
116 #define TCL_DATA_CMD_BUF_ADDR_INFO_RETURN_BUFFER_MANAGER_OFFSET                     0x00000004
117 #define TCL_DATA_CMD_BUF_ADDR_INFO_RETURN_BUFFER_MANAGER_LSB                        8
118 #define TCL_DATA_CMD_BUF_ADDR_INFO_RETURN_BUFFER_MANAGER_MSB                        11
119 #define TCL_DATA_CMD_BUF_ADDR_INFO_RETURN_BUFFER_MANAGER_MASK                       0x00000f00
120 
121 #define TCL_DATA_CMD_BUF_ADDR_INFO_SW_BUFFER_COOKIE_OFFSET                          0x00000004
122 #define TCL_DATA_CMD_BUF_ADDR_INFO_SW_BUFFER_COOKIE_LSB                             12
123 #define TCL_DATA_CMD_BUF_ADDR_INFO_SW_BUFFER_COOKIE_MSB                             31
124 #define TCL_DATA_CMD_BUF_ADDR_INFO_SW_BUFFER_COOKIE_MASK                            0xfffff000
125 
126 #define TCL_DATA_CMD_TCL_CMD_TYPE_OFFSET                                            0x00000008
127 #define TCL_DATA_CMD_TCL_CMD_TYPE_LSB                                               0
128 #define TCL_DATA_CMD_TCL_CMD_TYPE_MSB                                               0
129 #define TCL_DATA_CMD_TCL_CMD_TYPE_MASK                                              0x00000001
130 
131 #define TCL_DATA_CMD_BUF_OR_EXT_DESC_TYPE_OFFSET                                    0x00000008
132 #define TCL_DATA_CMD_BUF_OR_EXT_DESC_TYPE_LSB                                       1
133 #define TCL_DATA_CMD_BUF_OR_EXT_DESC_TYPE_MSB                                       1
134 #define TCL_DATA_CMD_BUF_OR_EXT_DESC_TYPE_MASK                                      0x00000002
135 
136 #define TCL_DATA_CMD_BANK_ID_OFFSET                                                 0x00000008
137 #define TCL_DATA_CMD_BANK_ID_LSB                                                    2
138 #define TCL_DATA_CMD_BANK_ID_MSB                                                    7
139 #define TCL_DATA_CMD_BANK_ID_MASK                                                   0x000000fc
140 
141 #define TCL_DATA_CMD_TX_NOTIFY_FRAME_OFFSET                                         0x00000008
142 #define TCL_DATA_CMD_TX_NOTIFY_FRAME_LSB                                            8
143 #define TCL_DATA_CMD_TX_NOTIFY_FRAME_MSB                                            10
144 #define TCL_DATA_CMD_TX_NOTIFY_FRAME_MASK                                           0x00000700
145 
146 #define TCL_DATA_CMD_HEADER_LENGTH_READ_SEL_OFFSET                                  0x00000008
147 #define TCL_DATA_CMD_HEADER_LENGTH_READ_SEL_LSB                                     11
148 #define TCL_DATA_CMD_HEADER_LENGTH_READ_SEL_MSB                                     11
149 #define TCL_DATA_CMD_HEADER_LENGTH_READ_SEL_MASK                                    0x00000800
150 
151 #define TCL_DATA_CMD_BUFFER_TIMESTAMP_OFFSET                                        0x00000008
152 #define TCL_DATA_CMD_BUFFER_TIMESTAMP_LSB                                           12
153 #define TCL_DATA_CMD_BUFFER_TIMESTAMP_MSB                                           30
154 #define TCL_DATA_CMD_BUFFER_TIMESTAMP_MASK                                          0x7ffff000
155 
156 #define TCL_DATA_CMD_BUFFER_TIMESTAMP_VALID_OFFSET                                  0x00000008
157 #define TCL_DATA_CMD_BUFFER_TIMESTAMP_VALID_LSB                                     31
158 #define TCL_DATA_CMD_BUFFER_TIMESTAMP_VALID_MSB                                     31
159 #define TCL_DATA_CMD_BUFFER_TIMESTAMP_VALID_MASK                                    0x80000000
160 
161 #define TCL_DATA_CMD_RESERVED_3A_OFFSET                                             0x0000000c
162 #define TCL_DATA_CMD_RESERVED_3A_LSB                                                0
163 #define TCL_DATA_CMD_RESERVED_3A_MSB                                                15
164 #define TCL_DATA_CMD_RESERVED_3A_MASK                                               0x0000ffff
165 
166 #define TCL_DATA_CMD_TCL_CMD_NUMBER_OFFSET                                          0x0000000c
167 #define TCL_DATA_CMD_TCL_CMD_NUMBER_LSB                                             16
168 #define TCL_DATA_CMD_TCL_CMD_NUMBER_MSB                                             31
169 #define TCL_DATA_CMD_TCL_CMD_NUMBER_MASK                                            0xffff0000
170 
171 #define TCL_DATA_CMD_DATA_LENGTH_OFFSET                                             0x00000010
172 #define TCL_DATA_CMD_DATA_LENGTH_LSB                                                0
173 #define TCL_DATA_CMD_DATA_LENGTH_MSB                                                15
174 #define TCL_DATA_CMD_DATA_LENGTH_MASK                                               0x0000ffff
175 
176 #define TCL_DATA_CMD_IPV4_CHECKSUM_EN_OFFSET                                        0x00000010
177 #define TCL_DATA_CMD_IPV4_CHECKSUM_EN_LSB                                           16
178 #define TCL_DATA_CMD_IPV4_CHECKSUM_EN_MSB                                           16
179 #define TCL_DATA_CMD_IPV4_CHECKSUM_EN_MASK                                          0x00010000
180 
181 #define TCL_DATA_CMD_UDP_OVER_IPV4_CHECKSUM_EN_OFFSET                               0x00000010
182 #define TCL_DATA_CMD_UDP_OVER_IPV4_CHECKSUM_EN_LSB                                  17
183 #define TCL_DATA_CMD_UDP_OVER_IPV4_CHECKSUM_EN_MSB                                  17
184 #define TCL_DATA_CMD_UDP_OVER_IPV4_CHECKSUM_EN_MASK                                 0x00020000
185 
186 #define TCL_DATA_CMD_UDP_OVER_IPV6_CHECKSUM_EN_OFFSET                               0x00000010
187 #define TCL_DATA_CMD_UDP_OVER_IPV6_CHECKSUM_EN_LSB                                  18
188 #define TCL_DATA_CMD_UDP_OVER_IPV6_CHECKSUM_EN_MSB                                  18
189 #define TCL_DATA_CMD_UDP_OVER_IPV6_CHECKSUM_EN_MASK                                 0x00040000
190 
191 #define TCL_DATA_CMD_TCP_OVER_IPV4_CHECKSUM_EN_OFFSET                               0x00000010
192 #define TCL_DATA_CMD_TCP_OVER_IPV4_CHECKSUM_EN_LSB                                  19
193 #define TCL_DATA_CMD_TCP_OVER_IPV4_CHECKSUM_EN_MSB                                  19
194 #define TCL_DATA_CMD_TCP_OVER_IPV4_CHECKSUM_EN_MASK                                 0x00080000
195 
196 #define TCL_DATA_CMD_TCP_OVER_IPV6_CHECKSUM_EN_OFFSET                               0x00000010
197 #define TCL_DATA_CMD_TCP_OVER_IPV6_CHECKSUM_EN_LSB                                  20
198 #define TCL_DATA_CMD_TCP_OVER_IPV6_CHECKSUM_EN_MSB                                  20
199 #define TCL_DATA_CMD_TCP_OVER_IPV6_CHECKSUM_EN_MASK                                 0x00100000
200 
201 #define TCL_DATA_CMD_TO_FW_OFFSET                                                   0x00000010
202 #define TCL_DATA_CMD_TO_FW_LSB                                                      21
203 #define TCL_DATA_CMD_TO_FW_MSB                                                      21
204 #define TCL_DATA_CMD_TO_FW_MASK                                                     0x00200000
205 
206 #define TCL_DATA_CMD_RESERVED_4A_OFFSET                                             0x00000010
207 #define TCL_DATA_CMD_RESERVED_4A_LSB                                                22
208 #define TCL_DATA_CMD_RESERVED_4A_MSB                                                22
209 #define TCL_DATA_CMD_RESERVED_4A_MASK                                               0x00400000
210 
211 #define TCL_DATA_CMD_PACKET_OFFSET_OFFSET                                           0x00000010
212 #define TCL_DATA_CMD_PACKET_OFFSET_LSB                                              23
213 #define TCL_DATA_CMD_PACKET_OFFSET_MSB                                              31
214 #define TCL_DATA_CMD_PACKET_OFFSET_MASK                                             0xff800000
215 
216 #define TCL_DATA_CMD_HLOS_TID_OVERWRITE_OFFSET                                      0x00000014
217 #define TCL_DATA_CMD_HLOS_TID_OVERWRITE_LSB                                         0
218 #define TCL_DATA_CMD_HLOS_TID_OVERWRITE_MSB                                         0
219 #define TCL_DATA_CMD_HLOS_TID_OVERWRITE_MASK                                        0x00000001
220 
221 #define TCL_DATA_CMD_FLOW_OVERRIDE_ENABLE_OFFSET                                    0x00000014
222 #define TCL_DATA_CMD_FLOW_OVERRIDE_ENABLE_LSB                                       1
223 #define TCL_DATA_CMD_FLOW_OVERRIDE_ENABLE_MSB                                       1
224 #define TCL_DATA_CMD_FLOW_OVERRIDE_ENABLE_MASK                                      0x00000002
225 
226 #define TCL_DATA_CMD_WHO_CLASSIFY_INFO_SEL_OFFSET                                   0x00000014
227 #define TCL_DATA_CMD_WHO_CLASSIFY_INFO_SEL_LSB                                      2
228 #define TCL_DATA_CMD_WHO_CLASSIFY_INFO_SEL_MSB                                      3
229 #define TCL_DATA_CMD_WHO_CLASSIFY_INFO_SEL_MASK                                     0x0000000c
230 
231 #define TCL_DATA_CMD_HLOS_TID_OFFSET                                                0x00000014
232 #define TCL_DATA_CMD_HLOS_TID_LSB                                                   4
233 #define TCL_DATA_CMD_HLOS_TID_MSB                                                   7
234 #define TCL_DATA_CMD_HLOS_TID_MASK                                                  0x000000f0
235 
236 #define TCL_DATA_CMD_FLOW_OVERRIDE_OFFSET                                           0x00000014
237 #define TCL_DATA_CMD_FLOW_OVERRIDE_LSB                                              8
238 #define TCL_DATA_CMD_FLOW_OVERRIDE_MSB                                              8
239 #define TCL_DATA_CMD_FLOW_OVERRIDE_MASK                                             0x00000100
240 
241 #define TCL_DATA_CMD_PMAC_ID_OFFSET                                                 0x00000014
242 #define TCL_DATA_CMD_PMAC_ID_LSB                                                    9
243 #define TCL_DATA_CMD_PMAC_ID_MSB                                                    10
244 #define TCL_DATA_CMD_PMAC_ID_MASK                                                   0x00000600
245 
246 #define TCL_DATA_CMD_MSDU_COLOR_OFFSET                                              0x00000014
247 #define TCL_DATA_CMD_MSDU_COLOR_LSB                                                 11
248 #define TCL_DATA_CMD_MSDU_COLOR_MSB                                                 12
249 #define TCL_DATA_CMD_MSDU_COLOR_MASK                                                0x00001800
250 
251 #define TCL_DATA_CMD_RESERVED_5A_OFFSET                                             0x00000014
252 #define TCL_DATA_CMD_RESERVED_5A_LSB                                                13
253 #define TCL_DATA_CMD_RESERVED_5A_MSB                                                23
254 #define TCL_DATA_CMD_RESERVED_5A_MASK                                               0x00ffe000
255 
256 #define TCL_DATA_CMD_VDEV_ID_OFFSET                                                 0x00000014
257 #define TCL_DATA_CMD_VDEV_ID_LSB                                                    24
258 #define TCL_DATA_CMD_VDEV_ID_MSB                                                    31
259 #define TCL_DATA_CMD_VDEV_ID_MASK                                                   0xff000000
260 
261 #define TCL_DATA_CMD_SEARCH_INDEX_OFFSET                                            0x00000018
262 #define TCL_DATA_CMD_SEARCH_INDEX_LSB                                               0
263 #define TCL_DATA_CMD_SEARCH_INDEX_MSB                                               19
264 #define TCL_DATA_CMD_SEARCH_INDEX_MASK                                              0x000fffff
265 
266 #define TCL_DATA_CMD_CACHE_SET_NUM_OFFSET                                           0x00000018
267 #define TCL_DATA_CMD_CACHE_SET_NUM_LSB                                              20
268 #define TCL_DATA_CMD_CACHE_SET_NUM_MSB                                              23
269 #define TCL_DATA_CMD_CACHE_SET_NUM_MASK                                             0x00f00000
270 
271 #define TCL_DATA_CMD_INDEX_LOOKUP_OVERRIDE_OFFSET                                   0x00000018
272 #define TCL_DATA_CMD_INDEX_LOOKUP_OVERRIDE_LSB                                      24
273 #define TCL_DATA_CMD_INDEX_LOOKUP_OVERRIDE_MSB                                      24
274 #define TCL_DATA_CMD_INDEX_LOOKUP_OVERRIDE_MASK                                     0x01000000
275 
276 #define TCL_DATA_CMD_RESERVED_6A_OFFSET                                             0x00000018
277 #define TCL_DATA_CMD_RESERVED_6A_LSB                                                25
278 #define TCL_DATA_CMD_RESERVED_6A_MSB                                                31
279 #define TCL_DATA_CMD_RESERVED_6A_MASK                                               0xfe000000
280 
281 #define TCL_DATA_CMD_RESERVED_7A_OFFSET                                             0x0000001c
282 #define TCL_DATA_CMD_RESERVED_7A_LSB                                                0
283 #define TCL_DATA_CMD_RESERVED_7A_MSB                                                19
284 #define TCL_DATA_CMD_RESERVED_7A_MASK                                               0x000fffff
285 
286 #define TCL_DATA_CMD_RING_ID_OFFSET                                                 0x0000001c
287 #define TCL_DATA_CMD_RING_ID_LSB                                                    20
288 #define TCL_DATA_CMD_RING_ID_MSB                                                    27
289 #define TCL_DATA_CMD_RING_ID_MASK                                                   0x0ff00000
290 
291 #define TCL_DATA_CMD_LOOPING_COUNT_OFFSET                                           0x0000001c
292 #define TCL_DATA_CMD_LOOPING_COUNT_LSB                                              28
293 #define TCL_DATA_CMD_LOOPING_COUNT_MSB                                              31
294 #define TCL_DATA_CMD_LOOPING_COUNT_MASK                                             0xf0000000
295 
296 #endif
297