1 2 /* 3 * Copyright (c) 2022 Qualcomm Innovation Center, Inc. All rights reserved. 4 * 5 * Permission to use, copy, modify, and/or distribute this software for 6 * any purpose with or without fee is hereby granted, provided that the 7 * above copyright notice and this permission notice appear in all 8 * copies. 9 * 10 * THE SOFTWARE IS PROVIDED "AS IS" AND THE AUTHOR DISCLAIMS ALL 11 * WARRANTIES WITH REGARD TO THIS SOFTWARE INCLUDING ALL IMPLIED 12 * WARRANTIES OF MERCHANTABILITY AND FITNESS. IN NO EVENT SHALL THE 13 * AUTHOR BE LIABLE FOR ANY SPECIAL, DIRECT, INDIRECT, OR CONSEQUENTIAL 14 * DAMAGES OR ANY DAMAGES WHATSOEVER RESULTING FROM LOSS OF USE, DATA OR 15 * PROFITS, WHETHER IN AN ACTION OF CONTRACT, NEGLIGENCE OR OTHER 16 * TORTIOUS ACTION, ARISING OUT OF OR IN CONNECTION WITH THE USE OR 17 * PERFORMANCE OF THIS SOFTWARE. 18 */ 19 20 21 22 #ifndef _RX_MSDU_START_H_ 23 #define _RX_MSDU_START_H_ 24 #if !defined(__ASSEMBLER__) 25 #endif 26 27 #define NUM_OF_DWORDS_RX_MSDU_START 10 28 29 #define NUM_OF_QWORDS_RX_MSDU_START 5 30 31 struct rx_msdu_start { 32 #ifndef WIFI_BIT_ORDER_BIG_ENDIAN 33 uint32_t rxpcu_mpdu_filter_in_category : 2, 34 sw_frame_group_id : 7, 35 reserved_0 : 7, 36 phy_ppdu_id : 16; 37 uint32_t msdu_length : 14, 38 stbc : 1, 39 ipsec_esp : 1, 40 l3_offset : 7, 41 ipsec_ah : 1, 42 l4_offset : 8; 43 uint32_t msdu_number : 8, 44 decap_format : 2, 45 ipv4_proto : 1, 46 ipv6_proto : 1, 47 tcp_proto : 1, 48 udp_proto : 1, 49 ip_frag : 1, 50 tcp_only_ack : 1, 51 da_is_bcast_mcast : 1, 52 toeplitz_hash_sel : 2, 53 ip_fixed_header_valid : 1, 54 ip_extn_header_valid : 1, 55 tcp_udp_header_valid : 1, 56 mesh_control_present : 1, 57 ldpc : 1, 58 ip4_protocol_ip6_next_header : 8; 59 uint32_t toeplitz_hash_2_or_4 : 32; 60 uint32_t flow_id_toeplitz : 32; 61 uint32_t user_rssi : 8, 62 pkt_type : 4, 63 sgi : 2, 64 rate_mcs : 4, 65 receive_bandwidth : 3, 66 reception_type : 3, 67 mimo_ss_bitmap : 8; 68 uint32_t ppdu_start_timestamp_31_0 : 32; 69 uint32_t ppdu_start_timestamp_63_32 : 32; 70 uint32_t sw_phy_meta_data : 32; 71 uint32_t vlan_ctag_ci : 16, 72 vlan_stag_ci : 16; 73 #else 74 uint32_t phy_ppdu_id : 16, 75 reserved_0 : 7, 76 sw_frame_group_id : 7, 77 rxpcu_mpdu_filter_in_category : 2; 78 uint32_t l4_offset : 8, 79 ipsec_ah : 1, 80 l3_offset : 7, 81 ipsec_esp : 1, 82 stbc : 1, 83 msdu_length : 14; 84 uint32_t ip4_protocol_ip6_next_header : 8, 85 ldpc : 1, 86 mesh_control_present : 1, 87 tcp_udp_header_valid : 1, 88 ip_extn_header_valid : 1, 89 ip_fixed_header_valid : 1, 90 toeplitz_hash_sel : 2, 91 da_is_bcast_mcast : 1, 92 tcp_only_ack : 1, 93 ip_frag : 1, 94 udp_proto : 1, 95 tcp_proto : 1, 96 ipv6_proto : 1, 97 ipv4_proto : 1, 98 decap_format : 2, 99 msdu_number : 8; 100 uint32_t toeplitz_hash_2_or_4 : 32; 101 uint32_t flow_id_toeplitz : 32; 102 uint32_t mimo_ss_bitmap : 8, 103 reception_type : 3, 104 receive_bandwidth : 3, 105 rate_mcs : 4, 106 sgi : 2, 107 pkt_type : 4, 108 user_rssi : 8; 109 uint32_t ppdu_start_timestamp_31_0 : 32; 110 uint32_t ppdu_start_timestamp_63_32 : 32; 111 uint32_t sw_phy_meta_data : 32; 112 uint32_t vlan_stag_ci : 16, 113 vlan_ctag_ci : 16; 114 #endif 115 }; 116 117 #define RX_MSDU_START_RXPCU_MPDU_FILTER_IN_CATEGORY_OFFSET 0x0000000000000000 118 #define RX_MSDU_START_RXPCU_MPDU_FILTER_IN_CATEGORY_LSB 0 119 #define RX_MSDU_START_RXPCU_MPDU_FILTER_IN_CATEGORY_MSB 1 120 #define RX_MSDU_START_RXPCU_MPDU_FILTER_IN_CATEGORY_MASK 0x0000000000000003 121 122 #define RX_MSDU_START_SW_FRAME_GROUP_ID_OFFSET 0x0000000000000000 123 #define RX_MSDU_START_SW_FRAME_GROUP_ID_LSB 2 124 #define RX_MSDU_START_SW_FRAME_GROUP_ID_MSB 8 125 #define RX_MSDU_START_SW_FRAME_GROUP_ID_MASK 0x00000000000001fc 126 127 #define RX_MSDU_START_RESERVED_0_OFFSET 0x0000000000000000 128 #define RX_MSDU_START_RESERVED_0_LSB 9 129 #define RX_MSDU_START_RESERVED_0_MSB 15 130 #define RX_MSDU_START_RESERVED_0_MASK 0x000000000000fe00 131 132 #define RX_MSDU_START_PHY_PPDU_ID_OFFSET 0x0000000000000000 133 #define RX_MSDU_START_PHY_PPDU_ID_LSB 16 134 #define RX_MSDU_START_PHY_PPDU_ID_MSB 31 135 #define RX_MSDU_START_PHY_PPDU_ID_MASK 0x00000000ffff0000 136 137 #define RX_MSDU_START_MSDU_LENGTH_OFFSET 0x0000000000000000 138 #define RX_MSDU_START_MSDU_LENGTH_LSB 32 139 #define RX_MSDU_START_MSDU_LENGTH_MSB 45 140 #define RX_MSDU_START_MSDU_LENGTH_MASK 0x00003fff00000000 141 142 #define RX_MSDU_START_STBC_OFFSET 0x0000000000000000 143 #define RX_MSDU_START_STBC_LSB 46 144 #define RX_MSDU_START_STBC_MSB 46 145 #define RX_MSDU_START_STBC_MASK 0x0000400000000000 146 147 #define RX_MSDU_START_IPSEC_ESP_OFFSET 0x0000000000000000 148 #define RX_MSDU_START_IPSEC_ESP_LSB 47 149 #define RX_MSDU_START_IPSEC_ESP_MSB 47 150 #define RX_MSDU_START_IPSEC_ESP_MASK 0x0000800000000000 151 152 #define RX_MSDU_START_L3_OFFSET_OFFSET 0x0000000000000000 153 #define RX_MSDU_START_L3_OFFSET_LSB 48 154 #define RX_MSDU_START_L3_OFFSET_MSB 54 155 #define RX_MSDU_START_L3_OFFSET_MASK 0x007f000000000000 156 157 #define RX_MSDU_START_IPSEC_AH_OFFSET 0x0000000000000000 158 #define RX_MSDU_START_IPSEC_AH_LSB 55 159 #define RX_MSDU_START_IPSEC_AH_MSB 55 160 #define RX_MSDU_START_IPSEC_AH_MASK 0x0080000000000000 161 162 #define RX_MSDU_START_L4_OFFSET_OFFSET 0x0000000000000000 163 #define RX_MSDU_START_L4_OFFSET_LSB 56 164 #define RX_MSDU_START_L4_OFFSET_MSB 63 165 #define RX_MSDU_START_L4_OFFSET_MASK 0xff00000000000000 166 167 #define RX_MSDU_START_MSDU_NUMBER_OFFSET 0x0000000000000008 168 #define RX_MSDU_START_MSDU_NUMBER_LSB 0 169 #define RX_MSDU_START_MSDU_NUMBER_MSB 7 170 #define RX_MSDU_START_MSDU_NUMBER_MASK 0x00000000000000ff 171 172 #define RX_MSDU_START_DECAP_FORMAT_OFFSET 0x0000000000000008 173 #define RX_MSDU_START_DECAP_FORMAT_LSB 8 174 #define RX_MSDU_START_DECAP_FORMAT_MSB 9 175 #define RX_MSDU_START_DECAP_FORMAT_MASK 0x0000000000000300 176 177 #define RX_MSDU_START_IPV4_PROTO_OFFSET 0x0000000000000008 178 #define RX_MSDU_START_IPV4_PROTO_LSB 10 179 #define RX_MSDU_START_IPV4_PROTO_MSB 10 180 #define RX_MSDU_START_IPV4_PROTO_MASK 0x0000000000000400 181 182 #define RX_MSDU_START_IPV6_PROTO_OFFSET 0x0000000000000008 183 #define RX_MSDU_START_IPV6_PROTO_LSB 11 184 #define RX_MSDU_START_IPV6_PROTO_MSB 11 185 #define RX_MSDU_START_IPV6_PROTO_MASK 0x0000000000000800 186 187 #define RX_MSDU_START_TCP_PROTO_OFFSET 0x0000000000000008 188 #define RX_MSDU_START_TCP_PROTO_LSB 12 189 #define RX_MSDU_START_TCP_PROTO_MSB 12 190 #define RX_MSDU_START_TCP_PROTO_MASK 0x0000000000001000 191 192 #define RX_MSDU_START_UDP_PROTO_OFFSET 0x0000000000000008 193 #define RX_MSDU_START_UDP_PROTO_LSB 13 194 #define RX_MSDU_START_UDP_PROTO_MSB 13 195 #define RX_MSDU_START_UDP_PROTO_MASK 0x0000000000002000 196 197 #define RX_MSDU_START_IP_FRAG_OFFSET 0x0000000000000008 198 #define RX_MSDU_START_IP_FRAG_LSB 14 199 #define RX_MSDU_START_IP_FRAG_MSB 14 200 #define RX_MSDU_START_IP_FRAG_MASK 0x0000000000004000 201 202 #define RX_MSDU_START_TCP_ONLY_ACK_OFFSET 0x0000000000000008 203 #define RX_MSDU_START_TCP_ONLY_ACK_LSB 15 204 #define RX_MSDU_START_TCP_ONLY_ACK_MSB 15 205 #define RX_MSDU_START_TCP_ONLY_ACK_MASK 0x0000000000008000 206 207 #define RX_MSDU_START_DA_IS_BCAST_MCAST_OFFSET 0x0000000000000008 208 #define RX_MSDU_START_DA_IS_BCAST_MCAST_LSB 16 209 #define RX_MSDU_START_DA_IS_BCAST_MCAST_MSB 16 210 #define RX_MSDU_START_DA_IS_BCAST_MCAST_MASK 0x0000000000010000 211 212 #define RX_MSDU_START_TOEPLITZ_HASH_SEL_OFFSET 0x0000000000000008 213 #define RX_MSDU_START_TOEPLITZ_HASH_SEL_LSB 17 214 #define RX_MSDU_START_TOEPLITZ_HASH_SEL_MSB 18 215 #define RX_MSDU_START_TOEPLITZ_HASH_SEL_MASK 0x0000000000060000 216 217 #define RX_MSDU_START_IP_FIXED_HEADER_VALID_OFFSET 0x0000000000000008 218 #define RX_MSDU_START_IP_FIXED_HEADER_VALID_LSB 19 219 #define RX_MSDU_START_IP_FIXED_HEADER_VALID_MSB 19 220 #define RX_MSDU_START_IP_FIXED_HEADER_VALID_MASK 0x0000000000080000 221 222 #define RX_MSDU_START_IP_EXTN_HEADER_VALID_OFFSET 0x0000000000000008 223 #define RX_MSDU_START_IP_EXTN_HEADER_VALID_LSB 20 224 #define RX_MSDU_START_IP_EXTN_HEADER_VALID_MSB 20 225 #define RX_MSDU_START_IP_EXTN_HEADER_VALID_MASK 0x0000000000100000 226 227 #define RX_MSDU_START_TCP_UDP_HEADER_VALID_OFFSET 0x0000000000000008 228 #define RX_MSDU_START_TCP_UDP_HEADER_VALID_LSB 21 229 #define RX_MSDU_START_TCP_UDP_HEADER_VALID_MSB 21 230 #define RX_MSDU_START_TCP_UDP_HEADER_VALID_MASK 0x0000000000200000 231 232 #define RX_MSDU_START_MESH_CONTROL_PRESENT_OFFSET 0x0000000000000008 233 #define RX_MSDU_START_MESH_CONTROL_PRESENT_LSB 22 234 #define RX_MSDU_START_MESH_CONTROL_PRESENT_MSB 22 235 #define RX_MSDU_START_MESH_CONTROL_PRESENT_MASK 0x0000000000400000 236 237 #define RX_MSDU_START_LDPC_OFFSET 0x0000000000000008 238 #define RX_MSDU_START_LDPC_LSB 23 239 #define RX_MSDU_START_LDPC_MSB 23 240 #define RX_MSDU_START_LDPC_MASK 0x0000000000800000 241 242 #define RX_MSDU_START_IP4_PROTOCOL_IP6_NEXT_HEADER_OFFSET 0x0000000000000008 243 #define RX_MSDU_START_IP4_PROTOCOL_IP6_NEXT_HEADER_LSB 24 244 #define RX_MSDU_START_IP4_PROTOCOL_IP6_NEXT_HEADER_MSB 31 245 #define RX_MSDU_START_IP4_PROTOCOL_IP6_NEXT_HEADER_MASK 0x00000000ff000000 246 247 #define RX_MSDU_START_TOEPLITZ_HASH_2_OR_4_OFFSET 0x0000000000000008 248 #define RX_MSDU_START_TOEPLITZ_HASH_2_OR_4_LSB 32 249 #define RX_MSDU_START_TOEPLITZ_HASH_2_OR_4_MSB 63 250 #define RX_MSDU_START_TOEPLITZ_HASH_2_OR_4_MASK 0xffffffff00000000 251 252 #define RX_MSDU_START_FLOW_ID_TOEPLITZ_OFFSET 0x0000000000000010 253 #define RX_MSDU_START_FLOW_ID_TOEPLITZ_LSB 0 254 #define RX_MSDU_START_FLOW_ID_TOEPLITZ_MSB 31 255 #define RX_MSDU_START_FLOW_ID_TOEPLITZ_MASK 0x00000000ffffffff 256 257 #define RX_MSDU_START_USER_RSSI_OFFSET 0x0000000000000010 258 #define RX_MSDU_START_USER_RSSI_LSB 32 259 #define RX_MSDU_START_USER_RSSI_MSB 39 260 #define RX_MSDU_START_USER_RSSI_MASK 0x000000ff00000000 261 262 #define RX_MSDU_START_PKT_TYPE_OFFSET 0x0000000000000010 263 #define RX_MSDU_START_PKT_TYPE_LSB 40 264 #define RX_MSDU_START_PKT_TYPE_MSB 43 265 #define RX_MSDU_START_PKT_TYPE_MASK 0x00000f0000000000 266 267 #define RX_MSDU_START_SGI_OFFSET 0x0000000000000010 268 #define RX_MSDU_START_SGI_LSB 44 269 #define RX_MSDU_START_SGI_MSB 45 270 #define RX_MSDU_START_SGI_MASK 0x0000300000000000 271 272 #define RX_MSDU_START_RATE_MCS_OFFSET 0x0000000000000010 273 #define RX_MSDU_START_RATE_MCS_LSB 46 274 #define RX_MSDU_START_RATE_MCS_MSB 49 275 #define RX_MSDU_START_RATE_MCS_MASK 0x0003c00000000000 276 277 #define RX_MSDU_START_RECEIVE_BANDWIDTH_OFFSET 0x0000000000000010 278 #define RX_MSDU_START_RECEIVE_BANDWIDTH_LSB 50 279 #define RX_MSDU_START_RECEIVE_BANDWIDTH_MSB 52 280 #define RX_MSDU_START_RECEIVE_BANDWIDTH_MASK 0x001c000000000000 281 282 #define RX_MSDU_START_RECEPTION_TYPE_OFFSET 0x0000000000000010 283 #define RX_MSDU_START_RECEPTION_TYPE_LSB 53 284 #define RX_MSDU_START_RECEPTION_TYPE_MSB 55 285 #define RX_MSDU_START_RECEPTION_TYPE_MASK 0x00e0000000000000 286 287 #define RX_MSDU_START_MIMO_SS_BITMAP_OFFSET 0x0000000000000010 288 #define RX_MSDU_START_MIMO_SS_BITMAP_LSB 56 289 #define RX_MSDU_START_MIMO_SS_BITMAP_MSB 63 290 #define RX_MSDU_START_MIMO_SS_BITMAP_MASK 0xff00000000000000 291 292 #define RX_MSDU_START_PPDU_START_TIMESTAMP_31_0_OFFSET 0x0000000000000018 293 #define RX_MSDU_START_PPDU_START_TIMESTAMP_31_0_LSB 0 294 #define RX_MSDU_START_PPDU_START_TIMESTAMP_31_0_MSB 31 295 #define RX_MSDU_START_PPDU_START_TIMESTAMP_31_0_MASK 0x00000000ffffffff 296 297 #define RX_MSDU_START_PPDU_START_TIMESTAMP_63_32_OFFSET 0x0000000000000018 298 #define RX_MSDU_START_PPDU_START_TIMESTAMP_63_32_LSB 32 299 #define RX_MSDU_START_PPDU_START_TIMESTAMP_63_32_MSB 63 300 #define RX_MSDU_START_PPDU_START_TIMESTAMP_63_32_MASK 0xffffffff00000000 301 302 #define RX_MSDU_START_SW_PHY_META_DATA_OFFSET 0x0000000000000020 303 #define RX_MSDU_START_SW_PHY_META_DATA_LSB 0 304 #define RX_MSDU_START_SW_PHY_META_DATA_MSB 31 305 #define RX_MSDU_START_SW_PHY_META_DATA_MASK 0x00000000ffffffff 306 307 #define RX_MSDU_START_VLAN_CTAG_CI_OFFSET 0x0000000000000020 308 #define RX_MSDU_START_VLAN_CTAG_CI_LSB 32 309 #define RX_MSDU_START_VLAN_CTAG_CI_MSB 47 310 #define RX_MSDU_START_VLAN_CTAG_CI_MASK 0x0000ffff00000000 311 312 #define RX_MSDU_START_VLAN_STAG_CI_OFFSET 0x0000000000000020 313 #define RX_MSDU_START_VLAN_STAG_CI_LSB 48 314 #define RX_MSDU_START_VLAN_STAG_CI_MSB 63 315 #define RX_MSDU_START_VLAN_STAG_CI_MASK 0xffff000000000000 316 317 #endif 318