1 
2 /*
3  * Copyright (c) 2022 Qualcomm Innovation Center, Inc. All rights reserved.
4  *
5  * Permission to use, copy, modify, and/or distribute this software for
6  * any purpose with or without fee is hereby granted, provided that the
7  * above copyright notice and this permission notice appear in all
8  * copies.
9  *
10  * THE SOFTWARE IS PROVIDED "AS IS" AND THE AUTHOR DISCLAIMS ALL
11  * WARRANTIES WITH REGARD TO THIS SOFTWARE INCLUDING ALL IMPLIED
12  * WARRANTIES OF MERCHANTABILITY AND FITNESS. IN NO EVENT SHALL THE
13  * AUTHOR BE LIABLE FOR ANY SPECIAL, DIRECT, INDIRECT, OR CONSEQUENTIAL
14  * DAMAGES OR ANY DAMAGES WHATSOEVER RESULTING FROM LOSS OF USE, DATA OR
15  * PROFITS, WHETHER IN AN ACTION OF CONTRACT, NEGLIGENCE OR OTHER
16  * TORTIOUS ACTION, ARISING OUT OF OR IN CONNECTION WITH THE USE OR
17  * PERFORMANCE OF THIS SOFTWARE.
18  */
19 
20 
21 
22 #ifndef _HE_SIG_B1_MU_INFO_H_
23 #define _HE_SIG_B1_MU_INFO_H_
24 #if !defined(__ASSEMBLER__)
25 #endif
26 
27 #define NUM_OF_DWORDS_HE_SIG_B1_MU_INFO 1
28 
29 struct he_sig_b1_mu_info {
30 #ifndef WIFI_BIT_ORDER_BIG_ENDIAN
31              uint32_t ru_allocation                                           :  8,
32                       reserved_0                                              : 23,
33                       rx_integrity_check_passed                               :  1;
34 #else
35              uint32_t rx_integrity_check_passed                               :  1,
36                       reserved_0                                              : 23,
37                       ru_allocation                                           :  8;
38 #endif
39 };
40 
41 #define HE_SIG_B1_MU_INFO_RU_ALLOCATION_OFFSET                                      0x00000000
42 #define HE_SIG_B1_MU_INFO_RU_ALLOCATION_LSB                                         0
43 #define HE_SIG_B1_MU_INFO_RU_ALLOCATION_MSB                                         7
44 #define HE_SIG_B1_MU_INFO_RU_ALLOCATION_MASK                                        0x000000ff
45 
46 #define HE_SIG_B1_MU_INFO_RESERVED_0_OFFSET                                         0x00000000
47 #define HE_SIG_B1_MU_INFO_RESERVED_0_LSB                                            8
48 #define HE_SIG_B1_MU_INFO_RESERVED_0_MSB                                            30
49 #define HE_SIG_B1_MU_INFO_RESERVED_0_MASK                                           0x7fffff00
50 
51 #define HE_SIG_B1_MU_INFO_RX_INTEGRITY_CHECK_PASSED_OFFSET                          0x00000000
52 #define HE_SIG_B1_MU_INFO_RX_INTEGRITY_CHECK_PASSED_LSB                             31
53 #define HE_SIG_B1_MU_INFO_RX_INTEGRITY_CHECK_PASSED_MSB                             31
54 #define HE_SIG_B1_MU_INFO_RX_INTEGRITY_CHECK_PASSED_MASK                            0x80000000
55 
56 #endif
57