1 
2 /*
3  * Copyright (c) 2022 Qualcomm Innovation Center, Inc. All rights reserved.
4  *
5  * Permission to use, copy, modify, and/or distribute this software for
6  * any purpose with or without fee is hereby granted, provided that the
7  * above copyright notice and this permission notice appear in all
8  * copies.
9  *
10  * THE SOFTWARE IS PROVIDED "AS IS" AND THE AUTHOR DISCLAIMS ALL
11  * WARRANTIES WITH REGARD TO THIS SOFTWARE INCLUDING ALL IMPLIED
12  * WARRANTIES OF MERCHANTABILITY AND FITNESS. IN NO EVENT SHALL THE
13  * AUTHOR BE LIABLE FOR ANY SPECIAL, DIRECT, INDIRECT, OR CONSEQUENTIAL
14  * DAMAGES OR ANY DAMAGES WHATSOEVER RESULTING FROM LOSS OF USE, DATA OR
15  * PROFITS, WHETHER IN AN ACTION OF CONTRACT, NEGLIGENCE OR OTHER
16  * TORTIOUS ACTION, ARISING OUT OF OR IN CONNECTION WITH THE USE OR
17  * PERFORMANCE OF THIS SOFTWARE.
18  */
19 
20 
21 
22 #ifndef _BUFFER_ADDR_INFO_H_
23 #define _BUFFER_ADDR_INFO_H_
24 #if !defined(__ASSEMBLER__)
25 #endif
26 
27 #define NUM_OF_DWORDS_BUFFER_ADDR_INFO 2
28 
29 struct buffer_addr_info {
30 #ifndef WIFI_BIT_ORDER_BIG_ENDIAN
31              uint32_t buffer_addr_31_0                                        : 32;
32              uint32_t buffer_addr_39_32                                       :  8,
33                       return_buffer_manager                                   :  4,
34                       sw_buffer_cookie                                        : 20;
35 #else
36              uint32_t buffer_addr_31_0                                        : 32;
37              uint32_t sw_buffer_cookie                                        : 20,
38                       return_buffer_manager                                   :  4,
39                       buffer_addr_39_32                                       :  8;
40 #endif
41 };
42 
43 #define BUFFER_ADDR_INFO_BUFFER_ADDR_31_0_OFFSET                                    0x00000000
44 #define BUFFER_ADDR_INFO_BUFFER_ADDR_31_0_LSB                                       0
45 #define BUFFER_ADDR_INFO_BUFFER_ADDR_31_0_MSB                                       31
46 #define BUFFER_ADDR_INFO_BUFFER_ADDR_31_0_MASK                                      0xffffffff
47 
48 #define BUFFER_ADDR_INFO_BUFFER_ADDR_39_32_OFFSET                                   0x00000004
49 #define BUFFER_ADDR_INFO_BUFFER_ADDR_39_32_LSB                                      0
50 #define BUFFER_ADDR_INFO_BUFFER_ADDR_39_32_MSB                                      7
51 #define BUFFER_ADDR_INFO_BUFFER_ADDR_39_32_MASK                                     0x000000ff
52 
53 #define BUFFER_ADDR_INFO_RETURN_BUFFER_MANAGER_OFFSET                               0x00000004
54 #define BUFFER_ADDR_INFO_RETURN_BUFFER_MANAGER_LSB                                  8
55 #define BUFFER_ADDR_INFO_RETURN_BUFFER_MANAGER_MSB                                  11
56 #define BUFFER_ADDR_INFO_RETURN_BUFFER_MANAGER_MASK                                 0x00000f00
57 
58 #define BUFFER_ADDR_INFO_SW_BUFFER_COOKIE_OFFSET                                    0x00000004
59 #define BUFFER_ADDR_INFO_SW_BUFFER_COOKIE_LSB                                       12
60 #define BUFFER_ADDR_INFO_SW_BUFFER_COOKIE_MSB                                       31
61 #define BUFFER_ADDR_INFO_SW_BUFFER_COOKIE_MASK                                      0xfffff000
62 
63 #endif
64