1 
2 /*
3  * Copyright (c) 2021 Qualcomm Innovation Center, Inc. All rights reserved.
4  *
5  * Permission to use, copy, modify, and/or distribute this software for
6  * any purpose with or without fee is hereby granted, provided that the
7  * above copyright notice and this permission notice appear in all
8  * copies.
9  *
10  * THE SOFTWARE IS PROVIDED "AS IS" AND THE AUTHOR DISCLAIMS ALL
11  * WARRANTIES WITH REGARD TO THIS SOFTWARE INCLUDING ALL IMPLIED
12  * WARRANTIES OF MERCHANTABILITY AND FITNESS. IN NO EVENT SHALL THE
13  * AUTHOR BE LIABLE FOR ANY SPECIAL, DIRECT, INDIRECT, OR CONSEQUENTIAL
14  * DAMAGES OR ANY DAMAGES WHATSOEVER RESULTING FROM LOSS OF USE, DATA OR
15  * PROFITS, WHETHER IN AN ACTION OF CONTRACT, NEGLIGENCE OR OTHER
16  * TORTIOUS ACTION, ARISING OUT OF OR IN CONNECTION WITH THE USE OR
17  * PERFORMANCE OF THIS SOFTWARE.
18  */
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28 
29 
30 #ifndef _WBM_RELEASE_RING_H_
31 #define _WBM_RELEASE_RING_H_
32 #if !defined(__ASSEMBLER__)
33 #endif
34 
35 #include "buffer_addr_info.h"
36 #define NUM_OF_DWORDS_WBM_RELEASE_RING 8
37 
38 
39 struct wbm_release_ring {
40 	     struct   buffer_addr_info                                          released_buff_or_desc_addr_info;
41 	     uint32_t release_source_module                                   :  3,
42 		      reserved_2a                                             :  3,
43 		      buffer_or_desc_type                                     :  3,
44 		      reserved_2b                                             : 22,
45 		      wbm_internal_error                                      :  1;
46 	     uint32_t reserved_3a                                             : 32;
47 	     uint32_t reserved_4a                                             : 32;
48 	     uint32_t reserved_5a                                             : 32;
49 	     uint32_t reserved_6a                                             : 32;
50 	     uint32_t reserved_7a                                             : 28,
51 		      looping_count                                           :  4;
52 };
53 
54 
55 
56 
57 
58 
59 
60 #define WBM_RELEASE_RING_RELEASED_BUFF_OR_DESC_ADDR_INFO_BUFFER_ADDR_31_0_OFFSET    0x00000000
61 #define WBM_RELEASE_RING_RELEASED_BUFF_OR_DESC_ADDR_INFO_BUFFER_ADDR_31_0_LSB       0
62 #define WBM_RELEASE_RING_RELEASED_BUFF_OR_DESC_ADDR_INFO_BUFFER_ADDR_31_0_MSB       31
63 #define WBM_RELEASE_RING_RELEASED_BUFF_OR_DESC_ADDR_INFO_BUFFER_ADDR_31_0_MASK      0xffffffff
64 
65 
66 
67 
68 #define WBM_RELEASE_RING_RELEASED_BUFF_OR_DESC_ADDR_INFO_BUFFER_ADDR_39_32_OFFSET   0x00000004
69 #define WBM_RELEASE_RING_RELEASED_BUFF_OR_DESC_ADDR_INFO_BUFFER_ADDR_39_32_LSB      0
70 #define WBM_RELEASE_RING_RELEASED_BUFF_OR_DESC_ADDR_INFO_BUFFER_ADDR_39_32_MSB      7
71 #define WBM_RELEASE_RING_RELEASED_BUFF_OR_DESC_ADDR_INFO_BUFFER_ADDR_39_32_MASK     0x000000ff
72 
73 
74 
75 
76 #define WBM_RELEASE_RING_RELEASED_BUFF_OR_DESC_ADDR_INFO_RETURN_BUFFER_MANAGER_OFFSET 0x00000004
77 #define WBM_RELEASE_RING_RELEASED_BUFF_OR_DESC_ADDR_INFO_RETURN_BUFFER_MANAGER_LSB  8
78 #define WBM_RELEASE_RING_RELEASED_BUFF_OR_DESC_ADDR_INFO_RETURN_BUFFER_MANAGER_MSB  11
79 #define WBM_RELEASE_RING_RELEASED_BUFF_OR_DESC_ADDR_INFO_RETURN_BUFFER_MANAGER_MASK 0x00000f00
80 
81 
82 
83 
84 #define WBM_RELEASE_RING_RELEASED_BUFF_OR_DESC_ADDR_INFO_SW_BUFFER_COOKIE_OFFSET    0x00000004
85 #define WBM_RELEASE_RING_RELEASED_BUFF_OR_DESC_ADDR_INFO_SW_BUFFER_COOKIE_LSB       12
86 #define WBM_RELEASE_RING_RELEASED_BUFF_OR_DESC_ADDR_INFO_SW_BUFFER_COOKIE_MSB       31
87 #define WBM_RELEASE_RING_RELEASED_BUFF_OR_DESC_ADDR_INFO_SW_BUFFER_COOKIE_MASK      0xfffff000
88 
89 
90 
91 
92 #define WBM_RELEASE_RING_RELEASE_SOURCE_MODULE_OFFSET                               0x00000008
93 #define WBM_RELEASE_RING_RELEASE_SOURCE_MODULE_LSB                                  0
94 #define WBM_RELEASE_RING_RELEASE_SOURCE_MODULE_MSB                                  2
95 #define WBM_RELEASE_RING_RELEASE_SOURCE_MODULE_MASK                                 0x00000007
96 
97 
98 
99 
100 #define WBM_RELEASE_RING_RESERVED_2A_OFFSET                                         0x00000008
101 #define WBM_RELEASE_RING_RESERVED_2A_LSB                                            3
102 #define WBM_RELEASE_RING_RESERVED_2A_MSB                                            5
103 #define WBM_RELEASE_RING_RESERVED_2A_MASK                                           0x00000038
104 
105 
106 
107 
108 #define WBM_RELEASE_RING_BUFFER_OR_DESC_TYPE_OFFSET                                 0x00000008
109 #define WBM_RELEASE_RING_BUFFER_OR_DESC_TYPE_LSB                                    6
110 #define WBM_RELEASE_RING_BUFFER_OR_DESC_TYPE_MSB                                    8
111 #define WBM_RELEASE_RING_BUFFER_OR_DESC_TYPE_MASK                                   0x000001c0
112 
113 
114 
115 
116 #define WBM_RELEASE_RING_RESERVED_2B_OFFSET                                         0x00000008
117 #define WBM_RELEASE_RING_RESERVED_2B_LSB                                            9
118 #define WBM_RELEASE_RING_RESERVED_2B_MSB                                            30
119 #define WBM_RELEASE_RING_RESERVED_2B_MASK                                           0x7ffffe00
120 
121 
122 
123 
124 #define WBM_RELEASE_RING_WBM_INTERNAL_ERROR_OFFSET                                  0x00000008
125 #define WBM_RELEASE_RING_WBM_INTERNAL_ERROR_LSB                                     31
126 #define WBM_RELEASE_RING_WBM_INTERNAL_ERROR_MSB                                     31
127 #define WBM_RELEASE_RING_WBM_INTERNAL_ERROR_MASK                                    0x80000000
128 
129 
130 
131 
132 #define WBM_RELEASE_RING_RESERVED_3A_OFFSET                                         0x0000000c
133 #define WBM_RELEASE_RING_RESERVED_3A_LSB                                            0
134 #define WBM_RELEASE_RING_RESERVED_3A_MSB                                            31
135 #define WBM_RELEASE_RING_RESERVED_3A_MASK                                           0xffffffff
136 
137 
138 
139 
140 #define WBM_RELEASE_RING_RESERVED_4A_OFFSET                                         0x00000010
141 #define WBM_RELEASE_RING_RESERVED_4A_LSB                                            0
142 #define WBM_RELEASE_RING_RESERVED_4A_MSB                                            31
143 #define WBM_RELEASE_RING_RESERVED_4A_MASK                                           0xffffffff
144 
145 
146 
147 
148 #define WBM_RELEASE_RING_RESERVED_5A_OFFSET                                         0x00000014
149 #define WBM_RELEASE_RING_RESERVED_5A_LSB                                            0
150 #define WBM_RELEASE_RING_RESERVED_5A_MSB                                            31
151 #define WBM_RELEASE_RING_RESERVED_5A_MASK                                           0xffffffff
152 
153 
154 
155 
156 #define WBM_RELEASE_RING_RESERVED_6A_OFFSET                                         0x00000018
157 #define WBM_RELEASE_RING_RESERVED_6A_LSB                                            0
158 #define WBM_RELEASE_RING_RESERVED_6A_MSB                                            31
159 #define WBM_RELEASE_RING_RESERVED_6A_MASK                                           0xffffffff
160 
161 
162 
163 
164 #define WBM_RELEASE_RING_RESERVED_7A_OFFSET                                         0x0000001c
165 #define WBM_RELEASE_RING_RESERVED_7A_LSB                                            0
166 #define WBM_RELEASE_RING_RESERVED_7A_MSB                                            27
167 #define WBM_RELEASE_RING_RESERVED_7A_MASK                                           0x0fffffff
168 
169 
170 
171 
172 #define WBM_RELEASE_RING_LOOPING_COUNT_OFFSET                                       0x0000001c
173 #define WBM_RELEASE_RING_LOOPING_COUNT_LSB                                          28
174 #define WBM_RELEASE_RING_LOOPING_COUNT_MSB                                          31
175 #define WBM_RELEASE_RING_LOOPING_COUNT_MASK                                         0xf0000000
176 
177 
178 
179 #endif
180