1 
2 /*
3  * Copyright (c) 2021 Qualcomm Innovation Center, Inc. All rights reserved.
4  *
5  * Permission to use, copy, modify, and/or distribute this software for
6  * any purpose with or without fee is hereby granted, provided that the
7  * above copyright notice and this permission notice appear in all
8  * copies.
9  *
10  * THE SOFTWARE IS PROVIDED "AS IS" AND THE AUTHOR DISCLAIMS ALL
11  * WARRANTIES WITH REGARD TO THIS SOFTWARE INCLUDING ALL IMPLIED
12  * WARRANTIES OF MERCHANTABILITY AND FITNESS. IN NO EVENT SHALL THE
13  * AUTHOR BE LIABLE FOR ANY SPECIAL, DIRECT, INDIRECT, OR CONSEQUENTIAL
14  * DAMAGES OR ANY DAMAGES WHATSOEVER RESULTING FROM LOSS OF USE, DATA OR
15  * PROFITS, WHETHER IN AN ACTION OF CONTRACT, NEGLIGENCE OR OTHER
16  * TORTIOUS ACTION, ARISING OUT OF OR IN CONNECTION WITH THE USE OR
17  * PERFORMANCE OF THIS SOFTWARE.
18  */
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29 
30 #ifndef _REO_UNBLOCK_CACHE_H_
31 #define _REO_UNBLOCK_CACHE_H_
32 #if !defined(__ASSEMBLER__)
33 #endif
34 
35 #include "uniform_reo_cmd_header.h"
36 #define NUM_OF_DWORDS_REO_UNBLOCK_CACHE 10
37 
38 #define NUM_OF_QWORDS_REO_UNBLOCK_CACHE 5
39 
40 
41 struct reo_unblock_cache {
42 	     struct   uniform_reo_cmd_header                                    cmd_header;
43 	     uint32_t unblock_type                                            :  1,
44 		      cache_block_resource_index                              :  2,
45 		      reserved_1a                                             : 29;
46 	     uint32_t reserved_2a                                             : 32;
47 	     uint32_t reserved_3a                                             : 32;
48 	     uint32_t reserved_4a                                             : 32;
49 	     uint32_t reserved_5a                                             : 32;
50 	     uint32_t reserved_6a                                             : 32;
51 	     uint32_t reserved_7a                                             : 32;
52 	     uint32_t reserved_8a                                             : 32;
53 	     uint32_t tlv64_padding                                           : 32;
54 };
55 
56 
57 
58 
59 
60 
61 
62 #define REO_UNBLOCK_CACHE_CMD_HEADER_REO_CMD_NUMBER_OFFSET                          0x0000000000000000
63 #define REO_UNBLOCK_CACHE_CMD_HEADER_REO_CMD_NUMBER_LSB                             0
64 #define REO_UNBLOCK_CACHE_CMD_HEADER_REO_CMD_NUMBER_MSB                             15
65 #define REO_UNBLOCK_CACHE_CMD_HEADER_REO_CMD_NUMBER_MASK                            0x000000000000ffff
66 
67 
68 
69 
70 #define REO_UNBLOCK_CACHE_CMD_HEADER_REO_STATUS_REQUIRED_OFFSET                     0x0000000000000000
71 #define REO_UNBLOCK_CACHE_CMD_HEADER_REO_STATUS_REQUIRED_LSB                        16
72 #define REO_UNBLOCK_CACHE_CMD_HEADER_REO_STATUS_REQUIRED_MSB                        16
73 #define REO_UNBLOCK_CACHE_CMD_HEADER_REO_STATUS_REQUIRED_MASK                       0x0000000000010000
74 
75 
76 
77 
78 #define REO_UNBLOCK_CACHE_CMD_HEADER_RESERVED_0A_OFFSET                             0x0000000000000000
79 #define REO_UNBLOCK_CACHE_CMD_HEADER_RESERVED_0A_LSB                                17
80 #define REO_UNBLOCK_CACHE_CMD_HEADER_RESERVED_0A_MSB                                31
81 #define REO_UNBLOCK_CACHE_CMD_HEADER_RESERVED_0A_MASK                               0x00000000fffe0000
82 
83 
84 
85 
86 #define REO_UNBLOCK_CACHE_UNBLOCK_TYPE_OFFSET                                       0x0000000000000000
87 #define REO_UNBLOCK_CACHE_UNBLOCK_TYPE_LSB                                          32
88 #define REO_UNBLOCK_CACHE_UNBLOCK_TYPE_MSB                                          32
89 #define REO_UNBLOCK_CACHE_UNBLOCK_TYPE_MASK                                         0x0000000100000000
90 
91 
92 
93 
94 #define REO_UNBLOCK_CACHE_CACHE_BLOCK_RESOURCE_INDEX_OFFSET                         0x0000000000000000
95 #define REO_UNBLOCK_CACHE_CACHE_BLOCK_RESOURCE_INDEX_LSB                            33
96 #define REO_UNBLOCK_CACHE_CACHE_BLOCK_RESOURCE_INDEX_MSB                            34
97 #define REO_UNBLOCK_CACHE_CACHE_BLOCK_RESOURCE_INDEX_MASK                           0x0000000600000000
98 
99 
100 
101 
102 #define REO_UNBLOCK_CACHE_RESERVED_1A_OFFSET                                        0x0000000000000000
103 #define REO_UNBLOCK_CACHE_RESERVED_1A_LSB                                           35
104 #define REO_UNBLOCK_CACHE_RESERVED_1A_MSB                                           63
105 #define REO_UNBLOCK_CACHE_RESERVED_1A_MASK                                          0xfffffff800000000
106 
107 
108 
109 
110 #define REO_UNBLOCK_CACHE_RESERVED_2A_OFFSET                                        0x0000000000000008
111 #define REO_UNBLOCK_CACHE_RESERVED_2A_LSB                                           0
112 #define REO_UNBLOCK_CACHE_RESERVED_2A_MSB                                           31
113 #define REO_UNBLOCK_CACHE_RESERVED_2A_MASK                                          0x00000000ffffffff
114 
115 
116 
117 
118 #define REO_UNBLOCK_CACHE_RESERVED_3A_OFFSET                                        0x0000000000000008
119 #define REO_UNBLOCK_CACHE_RESERVED_3A_LSB                                           32
120 #define REO_UNBLOCK_CACHE_RESERVED_3A_MSB                                           63
121 #define REO_UNBLOCK_CACHE_RESERVED_3A_MASK                                          0xffffffff00000000
122 
123 
124 
125 
126 #define REO_UNBLOCK_CACHE_RESERVED_4A_OFFSET                                        0x0000000000000010
127 #define REO_UNBLOCK_CACHE_RESERVED_4A_LSB                                           0
128 #define REO_UNBLOCK_CACHE_RESERVED_4A_MSB                                           31
129 #define REO_UNBLOCK_CACHE_RESERVED_4A_MASK                                          0x00000000ffffffff
130 
131 
132 
133 
134 #define REO_UNBLOCK_CACHE_RESERVED_5A_OFFSET                                        0x0000000000000010
135 #define REO_UNBLOCK_CACHE_RESERVED_5A_LSB                                           32
136 #define REO_UNBLOCK_CACHE_RESERVED_5A_MSB                                           63
137 #define REO_UNBLOCK_CACHE_RESERVED_5A_MASK                                          0xffffffff00000000
138 
139 
140 
141 
142 #define REO_UNBLOCK_CACHE_RESERVED_6A_OFFSET                                        0x0000000000000018
143 #define REO_UNBLOCK_CACHE_RESERVED_6A_LSB                                           0
144 #define REO_UNBLOCK_CACHE_RESERVED_6A_MSB                                           31
145 #define REO_UNBLOCK_CACHE_RESERVED_6A_MASK                                          0x00000000ffffffff
146 
147 
148 
149 
150 #define REO_UNBLOCK_CACHE_RESERVED_7A_OFFSET                                        0x0000000000000018
151 #define REO_UNBLOCK_CACHE_RESERVED_7A_LSB                                           32
152 #define REO_UNBLOCK_CACHE_RESERVED_7A_MSB                                           63
153 #define REO_UNBLOCK_CACHE_RESERVED_7A_MASK                                          0xffffffff00000000
154 
155 
156 
157 
158 #define REO_UNBLOCK_CACHE_RESERVED_8A_OFFSET                                        0x0000000000000020
159 #define REO_UNBLOCK_CACHE_RESERVED_8A_LSB                                           0
160 #define REO_UNBLOCK_CACHE_RESERVED_8A_MSB                                           31
161 #define REO_UNBLOCK_CACHE_RESERVED_8A_MASK                                          0x00000000ffffffff
162 
163 
164 
165 
166 #define REO_UNBLOCK_CACHE_TLV64_PADDING_OFFSET                                      0x0000000000000020
167 #define REO_UNBLOCK_CACHE_TLV64_PADDING_LSB                                         32
168 #define REO_UNBLOCK_CACHE_TLV64_PADDING_MSB                                         63
169 #define REO_UNBLOCK_CACHE_TLV64_PADDING_MASK                                        0xffffffff00000000
170 
171 
172 
173 #endif
174