1 /* 2 * Copyright (c) 2016-2021 The Linux Foundation. All rights reserved. 3 * Copyright (c) 2021 Qualcomm Innovation Center, Inc. All rights reserved. 4 * 5 * Permission to use, copy, modify, and/or distribute this software for 6 * any purpose with or without fee is hereby granted, provided that the 7 * above copyright notice and this permission notice appear in all 8 * copies. 9 * 10 * THE SOFTWARE IS PROVIDED "AS IS" AND THE AUTHOR DISCLAIMS ALL 11 * WARRANTIES WITH REGARD TO THIS SOFTWARE INCLUDING ALL IMPLIED 12 * WARRANTIES OF MERCHANTABILITY AND FITNESS. IN NO EVENT SHALL THE 13 * AUTHOR BE LIABLE FOR ANY SPECIAL, DIRECT, INDIRECT, OR CONSEQUENTIAL 14 * DAMAGES OR ANY DAMAGES WHATSOEVER RESULTING FROM LOSS OF USE, DATA OR 15 * PROFITS, WHETHER IN AN ACTION OF CONTRACT, NEGLIGENCE OR OTHER 16 * TORTIOUS ACTION, ARISING OUT OF OR IN CONNECTION WITH THE USE OR 17 * PERFORMANCE OF THIS SOFTWARE. 18 */ 19 20 #include "qdf_types.h" 21 #include "dummy.h" 22 #include "hif_debug.h" 23 24 /** 25 * hif_dummy_bus_prevent_linkdown() - prevent linkdown 26 * @hif_ctx: hif context 27 * @flag: weather to keep the bus alive or not 28 * 29 * Dummy function for busses and platforms that do not support 30 * link down. This may need to be replaced with a wakelock. 31 */ 32 void hif_dummy_bus_prevent_linkdown(struct hif_softc *scn, bool flag) 33 { 34 hif_debug("wlan: %s pcie power collapse ignored", 35 (flag ? "disable" : "enable")); 36 } 37 38 /** 39 * hif_reset_soc(): reset soc 40 * 41 * this function resets soc 42 * 43 * @hif_ctx: HIF context 44 * 45 * Return: void 46 */ 47 /* Function to reset SoC */ 48 void hif_dummy_reset_soc(struct hif_softc *hif_ctx) 49 { 50 } 51 52 /** 53 * hif_dummy_suspend() - suspend the bus 54 * @hif_ctx: hif context 55 * 56 * dummy for busses that don't need to suspend. 57 * 58 * Return: 0 for success and non-zero for failure 59 */ 60 int hif_dummy_bus_suspend(struct hif_softc *hif_ctx) 61 { 62 return 0; 63 } 64 65 /** 66 * hif_dummy_resume() - hif resume API 67 * 68 * This function resumes the bus. but snoc doesn't need to resume. 69 * Therefore do nothing. 70 * 71 * Return: 0 for success and non-zero for failure 72 */ 73 int hif_dummy_bus_resume(struct hif_softc *hif_ctx) 74 { 75 return 0; 76 } 77 78 /** 79 * hif_dummy_suspend_noirq() - suspend the bus 80 * @hif_ctx: hif context 81 * 82 * dummy for busses that don't need to synchronize 83 * with interrupt disable. 84 * 85 * Return: 0 for success and non-zero for failure 86 */ 87 int hif_dummy_bus_suspend_noirq(struct hif_softc *hif_ctx) 88 { 89 return 0; 90 } 91 92 /** 93 * hif_dummy_resume_noirq() - resume the bus 94 * @hif_ctx: hif context 95 * 96 * dummy for busses that don't need to synchronize 97 * with interrupt disable. 98 * 99 * Return: 0 for success and non-zero for failure 100 */ 101 int hif_dummy_bus_resume_noirq(struct hif_softc *hif_ctx) 102 { 103 return 0; 104 } 105 106 /** 107 * hif_dummy_target_sleep_state_adjust() - api to adjust state of target 108 * @scn: hif context 109 * @sleep_ok: allow or deny target to go to sleep 110 * @wait_for_it: ensure target has change 111 */ 112 int hif_dummy_target_sleep_state_adjust(struct hif_softc *scn, 113 bool sleep_ok, bool wait_for_it) 114 { 115 return 0; 116 } 117 118 /** 119 * hif_dummy_enable_power_management - dummy call 120 * hif_ctx: hif context 121 * is_packet_log_enabled: true if packet log is enabled 122 */ 123 void hif_dummy_enable_power_management(struct hif_softc *hif_ctx, 124 bool is_packet_log_enabled) 125 {} 126 127 /** 128 * hif_dummy_disable_power_management - dummy call 129 * hif_ctx: hif context 130 * 131 * Return: none 132 */ 133 void hif_dummy_disable_power_management(struct hif_softc *hif_ctx) 134 {} 135 136 /** 137 * hif_dummy_disable_isr - dummy call 138 * hif_ctx: hif context 139 * 140 * Return: none 141 */ 142 void hif_dummy_disable_isr(struct hif_softc *scn) 143 {} 144 145 /** 146 * hif_dummy_nointrs - dummy call 147 * hif_sc: hif context 148 * 149 * Return: none 150 */ 151 void hif_dummy_nointrs(struct hif_softc *hif_sc) 152 {} 153 154 /** 155 * hif_dummy_bus_configure - dummy call 156 * hif_ctx: hif context 157 * 158 * Return: 0 for success 159 */ 160 int hif_dummy_bus_configure(struct hif_softc *hif_sc) 161 { 162 return 0; 163 } 164 165 /** 166 * hif_dummy_get_config_item - dummy call 167 * @hif_sc: hif context 168 * @opcode: configuration type 169 * @config: configuration value to set 170 * @config_len: configuration length 171 * 172 * Return: QDF_STATUS_SUCCESS for success 173 */ 174 QDF_STATUS 175 hif_dummy_get_config_item(struct hif_softc *hif_sc, 176 int opcode, void *config, uint32_t config_len) 177 { 178 return QDF_STATUS_SUCCESS; 179 } 180 181 /** 182 * hif_dummy_set_mailbox_swap - dummy call 183 * @hif_sc: hif context 184 * 185 * Return: None 186 */ 187 void 188 hif_dummy_set_mailbox_swap(struct hif_softc *hif_sc) 189 { 190 } 191 192 /** 193 * hif_dummy_claim_device - dummy call 194 * @hif_sc: hif context 195 * 196 * Return: None 197 */ 198 void 199 hif_dummy_claim_device(struct hif_softc *hif_sc) 200 { 201 } 202 203 /** 204 * hif_dummy_cancel_deferred_target_sleep - dummy call 205 * @hif_sc: hif context 206 * 207 * Return: None 208 */ 209 void 210 hif_dummy_cancel_deferred_target_sleep(struct hif_softc *hif_sc) 211 { 212 } 213 214 /** 215 * hif_dummy_irq_enable - dummy call 216 * hif_ctx: hif context 217 * @irq_id: irq id 218 * 219 * Return: none 220 */ 221 void hif_dummy_irq_enable(struct hif_softc *hif_sc, int irq_id) 222 {} 223 224 /** 225 * hif_dummy_grp_irq_enable - dummy call 226 * hif_ctx: hif context 227 * @irq_id: grp id 228 * 229 * Return: none 230 */ 231 void hif_dummy_grp_irq_enable(struct hif_softc *hif_sc, uint32_t grp_id) 232 {} 233 234 /** 235 * hif_dummy_irq_disable - dummy call 236 * hif_ctx: hif context 237 * @irq_id: irq id 238 * 239 * Return: none 240 */ 241 void hif_dummy_irq_disable(struct hif_softc *hif_sc, int irq_id) 242 {} 243 244 /** 245 * hif_dummy_grp_irq_disable- dummy call 246 * hif_ctx: hif context 247 * @grp_id: grp id 248 * 249 * Return: none 250 */ 251 void hif_dummy_grp_irq_disable(struct hif_softc *hif_sc, uint32_t grp_id) 252 {} 253 254 /** 255 * hif_dummy_grp_irq_configure - dummy call 256 * hif_ctx: hif context 257 * 258 * Return: none 259 */ 260 int hif_dummy_grp_irq_configure(struct hif_softc *hif_sc, 261 struct hif_exec_context *exec) 262 { 263 return 0; 264 } 265 266 /** 267 * hif_dummy_grp_irq_deconfigure - dummy call 268 * hif_sc: hif context 269 * 270 * Return: none 271 */ 272 void hif_dummy_grp_irq_deconfigure(struct hif_softc *hif_sc) 273 { 274 } 275 276 /** 277 * hif_dummy_dump_registers - dummy call 278 * hif_sc: hif context 279 * 280 * Return: 0 for success 281 */ 282 int hif_dummy_dump_registers(struct hif_softc *hif_sc) 283 { 284 return 0; 285 } 286 287 /** 288 * hif_dummy_dump_target_memory - dummy call 289 * @hif_sc: hif context 290 * @ramdump_base: base 291 * @address: address 292 * @size: size 293 * 294 * Return: None 295 */ 296 void hif_dummy_dump_target_memory(struct hif_softc *hif_sc, void *ramdump_base, 297 uint32_t address, uint32_t size) 298 { 299 } 300 301 uint32_t hif_dummy_bus_reg_read32(struct hif_softc *hif_sc, 302 uint32_t offset) 303 { 304 return 0; 305 } 306 307 void hif_dummy_bus_reg_write32(struct hif_softc *hif_sc, 308 uint32_t offset, 309 uint32_t value) 310 { 311 } 312 313 /** 314 * hif_dummy_ipa_get_ce_resource - dummy call 315 * @scn: HIF context 316 * @ce_sr: copyengine source ring resource info 317 * @sr_ring_size: source ring size 318 * @reg_paddr: bus physical address 319 * 320 * Return: None 321 */ 322 void hif_dummy_ipa_get_ce_resource(struct hif_softc *hif_sc, 323 qdf_shared_mem_t **ce_sr, 324 uint32_t *sr_ring_size, 325 qdf_dma_addr_t *reg_paddr) 326 { 327 } 328 329 /** 330 * hif_dummy_mask_interrupt_call - dummy call 331 * @hif_sc: hif context 332 * 333 * Return: None 334 */ 335 void 336 hif_dummy_mask_interrupt_call(struct hif_softc *hif_sc) 337 { 338 } 339 340 /** 341 * hif_dummy_display_stats - dummy call 342 * hif_ctx: hif context 343 * 344 * Return: none 345 */ 346 void hif_dummy_display_stats(struct hif_softc *hif_ctx) 347 {} 348 349 /** 350 * hif_dummy_clear_stats - dummy call 351 * hif_ctx: hif context 352 * 353 * Return: none 354 */ 355 void hif_dummy_clear_stats(struct hif_softc *hif_ctx) 356 {} 357 /** 358 * hif_dummy_set_bundle_mode() - dummy call 359 * @hif_sc: hif context 360 * @enabled: flag to enable/disable bundling 361 * @rx_bundle_cnt: bundle count to be used for RX 362 * 363 * Return: none 364 */ 365 void hif_dummy_set_bundle_mode(struct hif_softc *hif_ctx, 366 bool enabled, int rx_bundle_cnt) 367 { 368 } 369 370 /** 371 * hif_dummy_bus_reset_resume() - dummy call 372 * @hif_sc: hif context 373 * 374 * Return: int 0 for success, non zero for failure 375 */ 376 int hif_dummy_bus_reset_resume(struct hif_softc *hif_ctx) 377 { 378 return 0; 379 } 380 381 int hif_dummy_map_ce_to_irq(struct hif_softc *scn, int ce_id) 382 { 383 hif_err("hif_map_ce_to_irq is not implemented on this platform"); 384 QDF_BUG(0); 385 return -(1); 386 } 387 388 int hif_dummy_addr_in_boundary(struct hif_softc *scn, uint32_t offset) 389 { 390 return 0; 391 } 392 393 /** 394 * hif_dummy_config_irq_affinity - dummy call 395 * @scn: hif context 396 * 397 * Return: None 398 */ 399 void hif_dummy_config_irq_affinity(struct hif_softc *scn) 400 { 401 } 402 403 /** 404 * hif_dummy_config_irq_by_ceid - dummy call 405 * @scn: hif context 406 * @ce_id : copy engine id 407 * Return: 0 408 */ 409 int hif_dummy_config_irq_by_ceid(struct hif_softc *scn, int ce_id) 410 { 411 return 0; 412 } 413 414 /** 415 * hif_config_irq_clear_affinity() - dummy call 416 * @scn: HIF handle 417 * @intr_ctxt_id: interrupt group index 418 * @cpu: CPU core to clear 419 * 420 * Return: None 421 */ 422 void hif_dummy_config_irq_clear_cpu_affinity(struct hif_softc *scn, 423 int intr_ctxt_id, int cpu) 424 { 425 } 426 427 /** 428 * hif_dummy_log_bus_info - dummy call 429 * @scn: hif context 430 * @data: hang event data buffer 431 * @offset: offset at which data needs to be written 432 * 433 * Return: bool 434 */ 435 bool hif_dummy_log_bus_info(struct hif_softc *scn, uint8_t *data, 436 unsigned int *offset) 437 { 438 return false; 439 } 440 441 /** 442 * hif_dummy_enable_grp_irqs - dummy call 443 * @scn: hif context 444 * Return: EOPNOTSUPP 445 */ 446 int hif_dummy_enable_grp_irqs(struct hif_softc *scn) 447 { 448 return -EOPNOTSUPP; 449 } 450 451 /** 452 * hif_dummy_disable_grp_irqs - dummy call 453 * @scn: hif context 454 * Return: EOPNOTSUPP 455 */ 456 int hif_dummy_disable_grp_irqs(struct hif_softc *scn) 457 { 458 return -EOPNOTSUPP; 459 } 460 461 #ifdef FEATURE_IRQ_AFFINITY 462 void hif_dummy_set_grp_intr_affinity(struct hif_softc *scn, 463 uint32_t grp_intr_bitmap, bool perf) 464 { 465 } 466 #endif 467