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8a4a8722 |
| 15-May-2023 |
Amit Mehta <quic_amitmeht@quicinc.com> |
qcacmn: Add changes to Affine away taken CPUs
Add changes to affinie away IRQ from the CPU taken by audio driver during Pro audio use case.
Change-Id: I881c42e9f951fbf965be6d6a71994fd97791ee48 CRs-
qcacmn: Add changes to Affine away taken CPUs
Add changes to affinie away IRQ from the CPU taken by audio driver during Pro audio use case.
Change-Id: I881c42e9f951fbf965be6d6a71994fd97791ee48 CRs-Fixed: 3502637
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7cbbd393 |
| 09-Jan-2023 |
Jeff Johnson <quic_jjohnson@quicinc.com> |
qcacmn: Fix hif/src documentation
The kernel-doc script identified a large number of kernel-doc issues in the hif/src folder, so fix them.
Change-Id: Ia944c6c9f1bcb6a8f5f0ff07ca0afa7bf3a40ad0 CRs-F
qcacmn: Fix hif/src documentation
The kernel-doc script identified a large number of kernel-doc issues in the hif/src folder, so fix them.
Change-Id: Ia944c6c9f1bcb6a8f5f0ff07ca0afa7bf3a40ad0 CRs-Fixed: 3375493
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299b26a3 |
| 10-Nov-2021 |
Yeshwanth Sriram Guntuka <quic_ysriramg@quicinc.com> |
qcacmn: Featurize support for grp irq affinity
Add a feature flag for grp irq affinity support changes.
Change-Id: I0a97dd85369aae66450e4869b591c7af74a66960 CRs-Fixed: 3070324
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d9eb7516 |
| 16-Oct-2021 |
Yeshwanth Sriram Guntuka <quic_ysriramg@quicinc.com> |
qcacmn: Add support to affine individual grp irqs
Add support to affine individual grp irqs to either perf or non-perf cluster.
Change-Id: I90006645acb82b71c63d2255722e2c67bb7a2f46 CRs-Fixed: 30596
qcacmn: Add support to affine individual grp irqs
Add support to affine individual grp irqs to either perf or non-perf cluster.
Change-Id: I90006645acb82b71c63d2255722e2c67bb7a2f46 CRs-Fixed: 3059676
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f2851b45 |
| 17-May-2021 |
Ananya Gupta <anangupt@codeaurora.org> |
qcacmn: Affine rx_err srng to all CPUs except 0
IPA and rx_err ring are processed in same CPU resulting in low Tput. To fix this, not allow processing of rx_err ring in CPU 0
Change-Id: Id53a03c929
qcacmn: Affine rx_err srng to all CPUs except 0
IPA and rx_err ring are processed in same CPU resulting in low Tput. To fix this, not allow processing of rx_err ring in CPU 0
Change-Id: Id53a03c9290607beb1a595c84bfb0fd8d9f5d105 CRs-Fixed: 2949569
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7d797709 |
| 24-May-2021 |
Vevek Venkatesan <vevekv@codeaurora.org> |
qcacmn: add hif_grp_irq_deconfigure bus_ops to free ext grp IRQs
As per current design, in failure path of hdd_wlan_start_modules, mem_free of hif_ext_group is done (in cds_dp_close) before free_irq
qcacmn: add hif_grp_irq_deconfigure bus_ops to free ext grp IRQs
As per current design, in failure path of hdd_wlan_start_modules, mem_free of hif_ext_group is done (in cds_dp_close) before free_irq (in hdd_hif_close), during next hdd_wlan_start_modules, request_irq adds new handler entry to the list in irq_desc, this leads to a crash on accessing older stale entry from irq handler, so adding a bus_ops hif_grp_irq_deconfigure to free ext grp IRQs.
Change-Id: I4d0a2bee1fabee388cea8a85226fae641165a8d5 CRs-Fixed: 2949400
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14d38b77 |
| 01-Mar-2021 |
Manikanta Pubbisetty <mpubbise@codeaurora.org> |
qcacmn: disable EXT grp irqs and drain TXRX during suspend
Any update to the SRNG TP/HP when the device is in low power state would result in system errors. It is recommended to disable EXT grp irqs
qcacmn: disable EXT grp irqs and drain TXRX during suspend
Any update to the SRNG TP/HP when the device is in low power state would result in system errors. It is recommended to disable EXT grp irqs and drain TXRX before sending power save enter command to the FW. This will ensure that no interrupts are received while in power save mode and as a result there wont be any HP/TP updates.
Change-Id: Ibf952bbc2c6d13fb3e4ca6b4845bc9cc887fa694 CRs-Fixed: 2883135
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3c61a1d9 |
| 01-Dec-2020 |
Arun Kumar Khandavalli <akhandav@codeaurora.org> |
qcacmn: get the data during the issue with the bus
Whenever there is a recovery triggered, if there is a failure in reading the bus id collect the bus specific registers to understand the reason for
qcacmn: get the data during the issue with the bus
Whenever there is a recovery triggered, if there is a failure in reading the bus id collect the bus specific registers to understand the reason for the failures.
Change-Id: I7387d63d9205d24fd881824b9a9fac48a7816c73 CRs-Fixed: 2833331
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34746552 |
| 03-Dec-2020 |
Tiger Yu <tfyu@codeaurora.org> |
qcacmn: Enhance athdiag to support 32bits reg address & live dump mode
Enhance athdiag to support 32bits HAL register address access. And support the live dump mode to access the HAL registers direc
qcacmn: Enhance athdiag to support 32bits reg address & live dump mode
Enhance athdiag to support 32bits HAL register address access. And support the live dump mode to access the HAL registers directly using PCIE interface.
Change-Id: I2322059e68b30ae47228e06dca01537b23ac2074 CRs-Fixed: 2831283
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4be28ba6 |
| 20-Oct-2020 |
Kai Liu <kaliu@codeaurora.org> |
qcacmn: Enhance hang info feature
Add bus related info in hif layer in order to get bus status when hang issue happened.
Change-Id: If922e0892e0f65de778b9696bbc56fc63c25c169 CRs-Fixed: 2801350
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0d5e9734 |
| 09-Oct-2020 |
Uraj Sasan <usasan@codeaurora.org> |
qcacmn: Adds dummy API's
Adds dummy API's for hif_config_irq_by_ceid.
Change-Id: I7bbb0ece4ab5f8bf648bc0e945c5a28de2a49feb
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80c1b5a6 |
| 18-Sep-2020 |
Srinivas Girigowda <sgirigow@codeaurora.org> |
qcacmn: Replace obsolete HIF_DBG() with hif_debug()
Replace obsolete HIF_DBG() with hif_debug().
Change-Id: I462d75617359fd13eafa497045ddfb70c2025595 CRs-Fixed: 2779720
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9667b145 |
| 17-Sep-2020 |
Srinivas Girigowda <sgirigow@codeaurora.org> |
qcacmn: Replace obsolete HIF_ERROR() with hif_err()
Replace obsolete HIF_ERROR() with hif_err().
Change-Id: I9260b47d11c1820bb05d9a7e2bf50d5257ba85ae CRs-Fixed: 2779720
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cb2acc0e |
| 17-Jul-2020 |
Shashikala Prabhu <pshashik@codeaurora.org> |
qcacmn: Correct the return types of functions in HIF component
A few functions in HIF component returns QDF status value with return type as non QDF STATUS and vice versa. For such functions, update
qcacmn: Correct the return types of functions in HIF component
A few functions in HIF component returns QDF status value with return type as non QDF STATUS and vice versa. For such functions, update the correct return type.
Change-Id: Ifc1068d60e62f7405a15e2b4f0738d91243bd6de CRs-Fixed: 2734818
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046f3623 |
| 30-Mar-2020 |
Nisha Menon <nmenon@codeaurora.org> |
qcacmn: Back pressure in REO2SW1 ring resulting in REO panic
Update QCA_NAPI_DEF_SCALE_BIN_SHIFT for defconfig builds to the same value as the perf build. Move the WLAN ext irqs to gold cores for de
qcacmn: Back pressure in REO2SW1 ring resulting in REO panic
Update QCA_NAPI_DEF_SCALE_BIN_SHIFT for defconfig builds to the same value as the perf build. Move the WLAN ext irqs to gold cores for defconfig builds. Disable cpu isolation before moving the IRQs to gold cores. Add the ability to move IRQs to gold cores when the cpus hotplug in.
Change-Id: I4cfecd02a1a2200dc99adee9a324b90c877c13fd CRs-Fixed: 2638820
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1002ca5e |
| 12-May-2018 |
Jeff Johnson <jjohnson@codeaurora.org> |
qcacmn: hif: Fix misspellings
Address the following issues in the hif folder: CHECK: 'controll' may be misspelled - perhaps 'control'? CHECK: 'Implemenation' may be misspelled - perhaps 'Implementat
qcacmn: hif: Fix misspellings
Address the following issues in the hif folder: CHECK: 'controll' may be misspelled - perhaps 'control'? CHECK: 'Implemenation' may be misspelled - perhaps 'Implementation'? CHECK: 'intialize' may be misspelled - perhaps 'initialize'? CHECK: 'occuring' may be misspelled - perhaps 'occurring'? CHECK: 'reseting' may be misspelled - perhaps 'resetting'? CHECK: 'stuct' may be misspelled - perhaps 'struct'? CHECK: 'substract' may be misspelled - perhaps 'subtract'? CHECK: 'successfull' may be misspelled - perhaps 'successful'? CHECK: 'syncronize' may be misspelled - perhaps 'synchronize'? CHECK: 'transfered' may be misspelled - perhaps 'transferred'? CHECK: 'untill' may be misspelled - perhaps 'until'? CHECK: 'wirte' may be misspelled - perhaps 'write'?
Change-Id: I80280ecb8ac8b0270a32add74429a8df89bedbcb CRs-Fixed: 2241576
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5fb2e3d5 |
| 25-Apr-2018 |
Jeff Johnson <jjohnson@codeaurora.org> |
qcacmn: hif: Remove legacy markings
Per current guidance remove legacy markings.
Change-Id: I5d1411d241cfed4f50759960d18e9220f6c0da39 CRs-Fixed: 2230684
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ae1b3de3 |
| 06-May-2018 |
Jeff Johnson <jjohnson@codeaurora.org> |
qcacmn: Fix typo "sucess"
Replace typo "sucess" with correct spelling "success"
Change-Id: Ieacb299890210d67848268a389a57168e2a2badd CRs-Fixed: 2238309
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58e0adfb |
| 27-Feb-2018 |
Sravan Kumar Kairam <sgoud@codeaurora.org> |
qcacmn: Add support for WLAN-IPA WDI2 with SMMU Stage 1
Update WLAN-IPA WDI-2 datapath for DMA buffer sharing with SMMU Stage 1 translation support. When SMMU Stage 1 is enabled DMA APIs return IO v
qcacmn: Add support for WLAN-IPA WDI2 with SMMU Stage 1
Update WLAN-IPA WDI-2 datapath for DMA buffer sharing with SMMU Stage 1 translation support. When SMMU Stage 1 is enabled DMA APIs return IO virtual address(IOVA) instead of physical address. This IOVA need to mapped to physical address by IPA module before accessing them.
Change-Id: I33082bc74760b0f12c348238c6f48f5ce5750172 CRS-Fixed: 2072953
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6f752b48 |
| 31-Aug-2017 |
Surabhi Vishnoi <svishnoi@codeaurora.org> |
qcacmn: Check target address boundary before access
Athdiag procfs entry does not have address sanity check, this is resulting in invalid ioread32/iowrite32 if out of PCIE BAR address is used.
Fix
qcacmn: Check target address boundary before access
Athdiag procfs entry does not have address sanity check, this is resulting in invalid ioread32/iowrite32 if out of PCIE BAR address is used.
Fix this by allowing address with in PCIE BAR range.
Change-Id: I8365eacca7ccc4f489b7d0bda6c998384d0fec7b CRs-Fixed: 2112270
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def86a36 |
| 22-Apr-2017 |
Houston Hoffman <hhoffman@codeaurora.org> |
qcacmn: Introduce hif_exec_context
hif_exec_context extends hif_ext_groups to support napi and tasklet models. Some of the rename and enahancements have been done to support merging of the execution
qcacmn: Introduce hif_exec_context
hif_exec_context extends hif_ext_groups to support napi and tasklet models. Some of the rename and enahancements have been done to support merging of the execution context management code between the CE and DP contexts, as well as supporting irq affinity for both napi & tasklet contexts.
Change-Id: I82c8abf2e906f027ec80faf7353a7685536bb79b CRs-Fixed: 2051902
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6e0cfd94 |
| 09-Mar-2017 |
Srinivas Girigowda <sgirigow@codeaurora.org> |
qcacmn: HIF: Reduce the log spam in kmsg
Move the logs to appropriate log levels to reduce the log spam in kmsg.
Change-Id: I29121bb4cc1272aa1fb88183914530dd21c64272 CRs-Fixed: 2017427
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8e031358 |
| 08-Apr-2017 |
Manikandan Mohan <manikand@codeaurora.org> |
qcacmn: Fix kernel module check patch warnings in HIF Dispatcher files
Fix kernel module check patch warnings in HIF DISPATCHER files
Change-Id: Ice22f299c075f99eacc20c7acc10fe8040139f97 CRs-fixed:
qcacmn: Fix kernel module check patch warnings in HIF Dispatcher files
Fix kernel module check patch warnings in HIF DISPATCHER files
Change-Id: Ice22f299c075f99eacc20c7acc10fe8040139f97 CRs-fixed: 2033001
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61824944 |
| 12-Apr-2017 |
Venkateswara Swamy Bandaru <vbandaru@codeaurora.org> |
qcacmn: Add API to support configuring external group interrupts
Added API to support configuring external group interrupts for AHB bus.
Change-Id: If65984183db808e68dea680c585692e1533e4c7a CRs-Fix
qcacmn: Add API to support configuring external group interrupts
Added API to support configuring external group interrupts for AHB bus.
Change-Id: If65984183db808e68dea680c585692e1533e4c7a CRs-Fixed: 2018655
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07d24be4 |
| 03-Apr-2017 |
Dustin Brown <dustinb@codeaurora.org> |
qcacmn: Implement hif_dummy_map_ce_to_irq
Implement hif_dummy_map_ce_to_irq to prevent runtime errors on new platforms that do not use hif_map_ce_to_irq.
Change-Id: I9e3da22e237c351ecc9919e69d8d68a
qcacmn: Implement hif_dummy_map_ce_to_irq
Implement hif_dummy_map_ce_to_irq to prevent runtime errors on new platforms that do not use hif_map_ce_to_irq.
Change-Id: I9e3da22e237c351ecc9919e69d8d68a656ef7cc9 CRs-Fixed: 2028145
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