1[
2    {
3        "BriefDescription": "Number of entries allocated. Account for Any type: e.g. Snoop,  etc.",
4        "Counter": "1",
5        "EventCode": "0x84",
6        "EventName": "UNC_ARB_COH_TRK_REQUESTS.ALL",
7        "PerPkg": "1",
8        "UMask": "0x1",
9        "Unit": "ARB"
10    },
11    {
12        "BriefDescription": "Each cycle counts number of any coherent requests at memory controller that were issued by any core.",
13        "Counter": "0",
14        "EventCode": "0x85",
15        "EventName": "UNC_ARB_DAT_OCCUPANCY.ALL",
16        "Experimental": "1",
17        "PerPkg": "1",
18        "UMask": "0x1",
19        "Unit": "ARB"
20    },
21    {
22        "BriefDescription": "Each cycle counts number of coherent reads pending on data return from memory controller that were issued by any core.",
23        "Counter": "0",
24        "EventCode": "0x85",
25        "EventName": "UNC_ARB_DAT_OCCUPANCY.RD",
26        "Experimental": "1",
27        "PerPkg": "1",
28        "UMask": "0x2",
29        "Unit": "ARB"
30    },
31    {
32        "BriefDescription": "Each cycle counts number of valid coherent Data Read entries. Such entry is defined as valid when it is allocated until deallocation. Does not include prefetches.",
33        "Counter": "0",
34        "EventCode": "0x80",
35        "EventName": "UNC_ARB_REQ_TRK_OCCUPANCY.DRD",
36        "Experimental": "1",
37        "PerPkg": "1",
38        "UMask": "0x2",
39        "Unit": "ARB"
40    },
41    {
42        "BriefDescription": "Number of all coherent Data Read entries. Doesn't include prefetches",
43        "Counter": "1",
44        "EventCode": "0x81",
45        "EventName": "UNC_ARB_REQ_TRK_REQUEST.DRD",
46        "Experimental": "1",
47        "PerPkg": "1",
48        "UMask": "0x2",
49        "Unit": "ARB"
50    },
51    {
52        "BriefDescription": "Each cycle counts number of all outgoing valid entries in ReqTrk. Such entry is defined as valid from its allocation in ReqTrk until deallocation. Accounts for Coherent and non-coherent traffic.",
53        "Counter": "0",
54        "EventCode": "0x80",
55        "EventName": "UNC_ARB_TRK_OCCUPANCY.ALL",
56        "Experimental": "1",
57        "PerPkg": "1",
58        "UMask": "0x1",
59        "Unit": "ARB"
60    },
61    {
62        "BriefDescription": "Each cycle counts number of valid coherent Data Read entries. Such entry is defined as valid when it is allocated until deallocation. Does not include prefetches.",
63        "Counter": "0",
64        "EventCode": "0x80",
65        "EventName": "UNC_ARB_TRK_OCCUPANCY.RD",
66        "Experimental": "1",
67        "PerPkg": "1",
68        "UMask": "0x2",
69        "Unit": "ARB"
70    },
71    {
72        "BriefDescription": "Total number of all outgoing entries allocated. Accounts for Coherent and non-coherent traffic.",
73        "Counter": "1",
74        "EventCode": "0x81",
75        "EventName": "UNC_ARB_TRK_REQUESTS.ALL",
76        "PerPkg": "1",
77        "UMask": "0x1",
78        "Unit": "ARB"
79    },
80    {
81        "BriefDescription": "Counts number of all coherent Data Read entries. Does not include prefetches.",
82        "Counter": "0,1",
83        "EventCode": "0x81",
84        "EventName": "UNC_ARB_TRK_REQUESTS.RD",
85        "Experimental": "1",
86        "PerPkg": "1",
87        "UMask": "0x2",
88        "Unit": "ARB"
89    }
90]
91