1[ 2 { 3 "BriefDescription": "Each cycle counts number of coherent reads pending on data return from memory controller that were issued by any core.", 4 "Counter": "0", 5 "EventCode": "0x85", 6 "EventName": "UNC_ARB_DAT_OCCUPANCY.RD", 7 "PerPkg": "1", 8 "UMask": "0x2", 9 "Unit": "ARB" 10 }, 11 { 12 "BriefDescription": "Number of entries allocated. Account for Any type: e.g. Snoop, etc.", 13 "Counter": "0,1", 14 "EventCode": "0x84", 15 "EventName": "UNC_HAC_ARB_COH_TRK_REQUESTS.ALL", 16 "Experimental": "1", 17 "PerPkg": "1", 18 "UMask": "0x1", 19 "Unit": "HAC_ARB" 20 }, 21 { 22 "BriefDescription": "Number of all coherent Data Read entries. Doesn't include prefetches", 23 "Counter": "0,1", 24 "EventCode": "0x81", 25 "EventName": "UNC_HAC_ARB_REQ_TRK_REQUEST.DRD", 26 "PerPkg": "1", 27 "UMask": "0x2", 28 "Unit": "HAC_ARB" 29 }, 30 { 31 "BriefDescription": "Number of all CMI transactions", 32 "Counter": "0,1", 33 "EventCode": "0x8A", 34 "EventName": "UNC_HAC_ARB_TRANSACTIONS.ALL", 35 "PerPkg": "1", 36 "UMask": "0x1", 37 "Unit": "HAC_ARB" 38 }, 39 { 40 "BriefDescription": "Number of all CMI reads", 41 "Counter": "0,1", 42 "EventCode": "0x8A", 43 "EventName": "UNC_HAC_ARB_TRANSACTIONS.READS", 44 "PerPkg": "1", 45 "UMask": "0x2", 46 "Unit": "HAC_ARB" 47 }, 48 { 49 "BriefDescription": "Number of all CMI writes not including Mflush", 50 "Counter": "0,1", 51 "EventCode": "0x8A", 52 "EventName": "UNC_HAC_ARB_TRANSACTIONS.WRITES", 53 "PerPkg": "1", 54 "UMask": "0x4", 55 "Unit": "HAC_ARB" 56 }, 57 { 58 "BriefDescription": "Total number of all outgoing entries allocated. Accounts for Coherent and non-coherent traffic.", 59 "Counter": "0,1", 60 "EventCode": "0x81", 61 "EventName": "UNC_HAC_ARB_TRK_REQUESTS.ALL", 62 "PerPkg": "1", 63 "UMask": "0x1", 64 "Unit": "HAC_ARB" 65 } 66] 67