1 // SPDX-License-Identifier: GPL-2.0-or-later
2 /*
3  * Mapping of DWARF debug register numbers into register names.
4  *
5  * Copyright (C) 2010 Ian Munsie, IBM Corporation.
6  */
7 
8 #include <stddef.h>
9 #include <errno.h>
10 #include <string.h>
11 #include <dwarf-regs.h>
12 #include <linux/ptrace.h>
13 #include <linux/kernel.h>
14 #include <linux/stringify.h>
15 
16 struct pt_regs_dwarfnum {
17 	const char *name;
18 	unsigned int dwarfnum;
19 	unsigned int ptregs_offset;
20 };
21 
22 #define REG_DWARFNUM_NAME(r, num)					\
23 		{.name = __stringify(%)__stringify(r), .dwarfnum = num,			\
24 		.ptregs_offset = offsetof(struct pt_regs, r)}
25 #define GPR_DWARFNUM_NAME(num)						\
26 		{.name = __stringify(%gpr##num), .dwarfnum = num,		\
27 		.ptregs_offset = offsetof(struct pt_regs, gpr[num])}
28 #define REG_DWARFNUM_END {.name = NULL, .dwarfnum = 0, .ptregs_offset = 0}
29 
30 /*
31  * Reference:
32  * http://refspecs.linuxfoundation.org/ELF/ppc64/PPC-elf64abi-1.9.html
33  */
34 static const struct pt_regs_dwarfnum regdwarfnum_table[] = {
35 	GPR_DWARFNUM_NAME(0),
36 	GPR_DWARFNUM_NAME(1),
37 	GPR_DWARFNUM_NAME(2),
38 	GPR_DWARFNUM_NAME(3),
39 	GPR_DWARFNUM_NAME(4),
40 	GPR_DWARFNUM_NAME(5),
41 	GPR_DWARFNUM_NAME(6),
42 	GPR_DWARFNUM_NAME(7),
43 	GPR_DWARFNUM_NAME(8),
44 	GPR_DWARFNUM_NAME(9),
45 	GPR_DWARFNUM_NAME(10),
46 	GPR_DWARFNUM_NAME(11),
47 	GPR_DWARFNUM_NAME(12),
48 	GPR_DWARFNUM_NAME(13),
49 	GPR_DWARFNUM_NAME(14),
50 	GPR_DWARFNUM_NAME(15),
51 	GPR_DWARFNUM_NAME(16),
52 	GPR_DWARFNUM_NAME(17),
53 	GPR_DWARFNUM_NAME(18),
54 	GPR_DWARFNUM_NAME(19),
55 	GPR_DWARFNUM_NAME(20),
56 	GPR_DWARFNUM_NAME(21),
57 	GPR_DWARFNUM_NAME(22),
58 	GPR_DWARFNUM_NAME(23),
59 	GPR_DWARFNUM_NAME(24),
60 	GPR_DWARFNUM_NAME(25),
61 	GPR_DWARFNUM_NAME(26),
62 	GPR_DWARFNUM_NAME(27),
63 	GPR_DWARFNUM_NAME(28),
64 	GPR_DWARFNUM_NAME(29),
65 	GPR_DWARFNUM_NAME(30),
66 	GPR_DWARFNUM_NAME(31),
67 	REG_DWARFNUM_NAME(msr,   66),
68 	REG_DWARFNUM_NAME(ctr,   109),
69 	REG_DWARFNUM_NAME(link,  108),
70 	REG_DWARFNUM_NAME(xer,   101),
71 	REG_DWARFNUM_NAME(dar,   119),
72 	REG_DWARFNUM_NAME(dsisr, 118),
73 	REG_DWARFNUM_END,
74 };
75 
76 /**
77  * get_arch_regstr() - lookup register name from it's DWARF register number
78  * @n:	the DWARF register number
79  *
80  * get_arch_regstr() returns the name of the register in struct
81  * regdwarfnum_table from it's DWARF register number. If the register is not
82  * found in the table, this returns NULL;
83  */
get_arch_regstr(unsigned int n)84 const char *get_arch_regstr(unsigned int n)
85 {
86 	const struct pt_regs_dwarfnum *roff;
87 	for (roff = regdwarfnum_table; roff->name != NULL; roff++)
88 		if (roff->dwarfnum == n)
89 			return roff->name;
90 	return NULL;
91 }
92 
regs_query_register_offset(const char * name)93 int regs_query_register_offset(const char *name)
94 {
95 	const struct pt_regs_dwarfnum *roff;
96 	for (roff = regdwarfnum_table; roff->name != NULL; roff++)
97 		if (!strcmp(roff->name, name))
98 			return roff->ptregs_offset;
99 	return -EINVAL;
100 }
101 
102 #define PPC_OP(op)	(((op) >> 26) & 0x3F)
103 #define PPC_RA(a)	(((a) >> 16) & 0x1f)
104 #define PPC_RT(t)	(((t) >> 21) & 0x1f)
105 #define PPC_RB(b)	(((b) >> 11) & 0x1f)
106 #define PPC_D(D)	((D) & 0xfffe)
107 #define PPC_DS(DS)	((DS) & 0xfffc)
108 #define OP_LD	58
109 #define OP_STD	62
110 
get_source_reg(u32 raw_insn)111 static int get_source_reg(u32 raw_insn)
112 {
113 	return PPC_RA(raw_insn);
114 }
115 
get_target_reg(u32 raw_insn)116 static int get_target_reg(u32 raw_insn)
117 {
118 	return PPC_RT(raw_insn);
119 }
120 
get_offset_opcode(u32 raw_insn)121 static int get_offset_opcode(u32 raw_insn)
122 {
123 	int opcode = PPC_OP(raw_insn);
124 
125 	/* DS- form */
126 	if ((opcode == OP_LD) || (opcode == OP_STD))
127 		return PPC_DS(raw_insn);
128 	else
129 		return PPC_D(raw_insn);
130 }
131 
132 /*
133  * Fills the required fields for op_loc depending on if it
134  * is a source or target.
135  * D form: ins RT,D(RA) -> src_reg1 = RA, offset = D, dst_reg1 = RT
136  * DS form: ins RT,DS(RA) -> src_reg1 = RA, offset = DS, dst_reg1 = RT
137  * X form: ins RT,RA,RB -> src_reg1 = RA, src_reg2 = RB, dst_reg1 = RT
138  */
get_powerpc_regs(u32 raw_insn,int is_source,struct annotated_op_loc * op_loc)139 void get_powerpc_regs(u32 raw_insn, int is_source,
140 		struct annotated_op_loc *op_loc)
141 {
142 	if (is_source)
143 		op_loc->reg1 = get_source_reg(raw_insn);
144 	else
145 		op_loc->reg1 = get_target_reg(raw_insn);
146 
147 	if (op_loc->multi_regs)
148 		op_loc->reg2 = PPC_RB(raw_insn);
149 
150 	/* TODO: Implement offset handling for X Form */
151 	if ((op_loc->mem_ref) && (PPC_OP(raw_insn) != 31))
152 		op_loc->offset = get_offset_opcode(raw_insn);
153 }
154