1 /*
2  * Copyright 2013 CompuLab Ltd.
3  * Copyright 2016 Christopher Spinrath
4  *
5  * Based on the devicetree distributed with the vendor kernel for the
6  * Utilite Pro:
7  *	Copyright 2013 CompuLab Ltd.
8  *	Author: Valentin Raevsky <valentin@compulab.co.il>
9  *
10  * This file is dual-licensed: you can use it either under the terms
11  * of the GPL or the X11 license, at your option. Note that this dual
12  * licensing only applies to this file, and not this project as a
13  * whole.
14  *
15  *  a) This file is free software; you can redistribute it and/or
16  *     modify it under the terms of the GNU General Public License as
17  *     published by the Free Software Foundation; either version 2 of the
18  *     License, or (at your option) any later version.
19  *
20  *     This file is distributed in the hope that it will be useful,
21  *     but WITHOUT ANY WARRANTY; without even the implied warranty of
22  *     MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
23  *     GNU General Public License for more details.
24  *
25  * Or, alternatively,
26  *
27  *  b) Permission is hereby granted, free of charge, to any person
28  *     obtaining a copy of this software and associated documentation
29  *     files (the "Software"), to deal in the Software without
30  *     restriction, including without limitation the rights to use,
31  *     copy, modify, merge, publish, distribute, sublicense, and/or
32  *     sell copies of the Software, and to permit persons to whom the
33  *     Software is furnished to do so, subject to the following
34  *     conditions:
35  *
36  *     The above copyright notice and this permission notice shall be
37  *     included in all copies or substantial portions of the Software.
38  *
39  *     THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND,
40  *     EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES
41  *     OF MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND
42  *     NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT
43  *     HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY,
44  *     WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING
45  *     FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR
46  *     OTHER DEALINGS IN THE SOFTWARE.
47  */
48 
49 #include <dt-bindings/input/input.h>
50 #include "imx6q-cm-fx6.dts"
51 
52 / {
53 	model = "CompuLab Utilite Pro";
54 	compatible = "compulab,utilite-pro", "compulab,cm-fx6", "fsl,imx6q";
55 
56 	aliases {
57 		ethernet1 = &eth1;
58 		rtc0 = &em3027;
59 		rtc1 = &snvs_rtc;
60 	};
61 
62 	encoder {
63 		compatible = "ti,tfp410";
64 
65 		ports {
66 			#address-cells = <1>;
67 			#size-cells = <0>;
68 
69 			port@0 {
70 				reg = <0>;
71 
72 				tfp410_in: endpoint {
73 					remote-endpoint = <&parallel_display_out>;
74 				};
75 			};
76 
77 			port@1 {
78 				reg = <1>;
79 
80 				tfp410_out: endpoint {
81 					remote-endpoint = <&hdmi_connector_in>;
82 				};
83 			};
84 		};
85 	};
86 
87 	gpio-keys {
88 		compatible = "gpio-keys";
89 		pinctrl-names = "default";
90 		pinctrl-0 = <&pinctrl_gpio_keys>;
91 
92 		key-power {
93 			label = "Power Button";
94 			gpios = <&gpio1 29 GPIO_ACTIVE_LOW>;
95 			linux,code = <KEY_POWER>;
96 			wakeup-source;
97 		};
98 	};
99 
100 	hdmi-connector {
101 		compatible = "hdmi-connector";
102 		pinctrl-names = "default";
103 		pinctrl-0 = <&pinctrl_hpd>;
104 		type = "a";
105 		ddc-i2c-bus = <&i2c_dvi_ddc>;
106 		hpd-gpios = <&gpio1 4 GPIO_ACTIVE_HIGH>;
107 
108 		port {
109 			hdmi_connector_in: endpoint {
110 				remote-endpoint = <&tfp410_out>;
111 			};
112 		};
113 	};
114 
115 	i2cmux {
116 		compatible = "i2c-mux-gpio";
117 		pinctrl-names = "default";
118 		pinctrl-0 = <&pinctrl_i2c1mux>;
119 		#address-cells = <1>;
120 		#size-cells = <0>;
121 
122 		mux-gpios = <&gpio1 2 GPIO_ACTIVE_HIGH>;
123 		i2c-parent = <&i2c1>;
124 
125 		i2c@0 {
126 			reg = <0>;
127 			#address-cells = <1>;
128 			#size-cells = <0>;
129 
130 			eeprom@50 {
131 				compatible = "atmel,24c02";
132 				reg = <0x50>;
133 				pagesize = <16>;
134 			};
135 
136 			em3027: rtc@56 {
137 				compatible = "emmicro,em3027";
138 				reg = <0x56>;
139 			};
140 		};
141 
142 		i2c_dvi_ddc: i2c@1 {
143 			reg = <1>;
144 			#address-cells = <1>;
145 			#size-cells = <0>;
146 		};
147 	};
148 
149 	parallel-display {
150 		compatible = "fsl,imx-parallel-display";
151 		#address-cells = <1>;
152 		#size-cells = <0>;
153 		pinctrl-names = "default";
154 		pinctrl-0 = <&pinctrl_ipu1>;
155 
156 		interface-pix-fmt = "rgb24";
157 
158 		port@0 {
159 			reg = <0>;
160 
161 			parallel_display_in: endpoint {
162 				remote-endpoint = <&ipu1_di0_disp0>;
163 			};
164 		};
165 
166 		port@1 {
167 			reg = <1>;
168 
169 			parallel_display_out: endpoint {
170 				remote-endpoint = <&tfp410_in>;
171 			};
172 		};
173 	};
174 };
175 
176 /*
177  * A single IPU is not able to drive both display interfaces available on the
178  * Utilite Pro at high resolution due to its bandwidth limitation. Since the
179  * tfp410 encoder is wired up to IPU1, sever the link between IPU1 and the
180  * SoC-internal Designware HDMI encoder forcing the latter to be connected to
181  * IPU2 instead of IPU1.
182  */
183 /delete-node/&ipu1_di0_hdmi;
184 /delete-node/&hdmi_mux_0;
185 /delete-node/&ipu1_di1_hdmi;
186 /delete-node/&hdmi_mux_1;
187 
188 &hdmi {
189 	pinctrl-names = "default";
190 	pinctrl-0 = <&pinctrl_hdmicec>;
191 	ddc-i2c-bus = <&i2c2>;
192 	status = "okay";
193 };
194 
195 &i2c1 {
196 	pinctrl-names = "default";
197 	pinctrl-0 = <&pinctrl_i2c1>;
198 	status = "okay";
199 };
200 
201 &i2c2 {
202 	pinctrl-names = "default";
203 	pinctrl-0 = <&pinctrl_i2c2>;
204 	status = "okay";
205 };
206 
207 &iomuxc {
208 	pinctrl_gpio_keys: gpio_keysgrp {
209 		fsl,pins = <
210 			MX6QDL_PAD_ENET_TXD1__GPIO1_IO29 0x1b0b0
211 		>;
212 	};
213 
214 	pinctrl_hdmicec: hdmicecgrp {
215 		fsl,pins = <
216 			MX6QDL_PAD_KEY_ROW2__HDMI_TX_CEC_LINE 0x1f8b0
217 		>;
218 	};
219 
220 	pinctrl_hpd: hpdgrp {
221 		fsl,pins = <
222 			MX6QDL_PAD_GPIO_4__GPIO1_IO04 0x1b0b0
223 		>;
224 	};
225 
226 	pinctrl_i2c1: i2c1grp {
227 		fsl,pins = <
228 			MX6QDL_PAD_EIM_D21__I2C1_SCL 0x4001b8b1
229 			MX6QDL_PAD_EIM_D28__I2C1_SDA 0x4001b8b1
230 		>;
231 	};
232 
233 	pinctrl_i2c1mux: i2c1muxgrp {
234 		fsl,pins = <
235 			MX6QDL_PAD_GPIO_2__GPIO1_IO02 0x1b0b0
236 		>;
237 	};
238 
239 	pinctrl_i2c2: i2c2grp {
240 		fsl,pins = <
241 			MX6QDL_PAD_KEY_COL3__I2C2_SCL 0x4001b8b1
242 			MX6QDL_PAD_KEY_ROW3__I2C2_SDA 0x4001b8b1
243 		>;
244 	};
245 
246 	pinctrl_ipu1: ipu1grp {
247 		fsl,pins = <
248 			MX6QDL_PAD_DI0_DISP_CLK__IPU1_DI0_DISP_CLK 0x38
249 			MX6QDL_PAD_DI0_PIN15__IPU1_DI0_PIN15       0x38
250 			MX6QDL_PAD_DI0_PIN2__IPU1_DI0_PIN02        0x38
251 			MX6QDL_PAD_DI0_PIN3__IPU1_DI0_PIN03        0x38
252 			MX6QDL_PAD_DISP0_DAT0__IPU1_DISP0_DATA00   0x38
253 			MX6QDL_PAD_DISP0_DAT1__IPU1_DISP0_DATA01   0x38
254 			MX6QDL_PAD_DISP0_DAT2__IPU1_DISP0_DATA02   0x38
255 			MX6QDL_PAD_DISP0_DAT3__IPU1_DISP0_DATA03   0x38
256 			MX6QDL_PAD_DISP0_DAT4__IPU1_DISP0_DATA04   0x38
257 			MX6QDL_PAD_DISP0_DAT5__IPU1_DISP0_DATA05   0x38
258 			MX6QDL_PAD_DISP0_DAT6__IPU1_DISP0_DATA06   0x38
259 			MX6QDL_PAD_DISP0_DAT7__IPU1_DISP0_DATA07   0x38
260 			MX6QDL_PAD_DISP0_DAT8__IPU1_DISP0_DATA08   0x38
261 			MX6QDL_PAD_DISP0_DAT9__IPU1_DISP0_DATA09   0x38
262 			MX6QDL_PAD_DISP0_DAT10__IPU1_DISP0_DATA10  0x38
263 			MX6QDL_PAD_DISP0_DAT11__IPU1_DISP0_DATA11  0x38
264 			MX6QDL_PAD_DISP0_DAT12__IPU1_DISP0_DATA12  0x38
265 			MX6QDL_PAD_DISP0_DAT13__IPU1_DISP0_DATA13  0x38
266 			MX6QDL_PAD_DISP0_DAT14__IPU1_DISP0_DATA14  0x38
267 			MX6QDL_PAD_DISP0_DAT15__IPU1_DISP0_DATA15  0x38
268 			MX6QDL_PAD_DISP0_DAT16__IPU1_DISP0_DATA16  0x38
269 			MX6QDL_PAD_DISP0_DAT17__IPU1_DISP0_DATA17  0x38
270 			MX6QDL_PAD_DISP0_DAT18__IPU1_DISP0_DATA18  0x38
271 			MX6QDL_PAD_DISP0_DAT19__IPU1_DISP0_DATA19  0x38
272 			MX6QDL_PAD_DISP0_DAT20__IPU1_DISP0_DATA20  0x38
273 			MX6QDL_PAD_DISP0_DAT21__IPU1_DISP0_DATA21  0x38
274 			MX6QDL_PAD_DISP0_DAT22__IPU1_DISP0_DATA22  0x38
275 			MX6QDL_PAD_DISP0_DAT23__IPU1_DISP0_DATA23  0x38
276 		>;
277 	};
278 
279 	pinctrl_uart2: uart2grp {
280 		fsl,pins = <
281 			MX6QDL_PAD_GPIO_7__UART2_TX_DATA 0x1b0b1
282 			MX6QDL_PAD_GPIO_8__UART2_RX_DATA 0x1b0b1
283 			MX6QDL_PAD_SD4_DAT5__UART2_RTS_B 0x1b0b1
284 			MX6QDL_PAD_SD4_DAT6__UART2_CTS_B 0x1b0b1
285 		>;
286 	};
287 
288 	pinctrl_usdhc3: usdhc3grp {
289 		fsl,pins = <
290 			MX6QDL_PAD_SD3_CMD__SD3_CMD	0x17059
291 			MX6QDL_PAD_SD3_CLK__SD3_CLK	0x10059
292 			MX6QDL_PAD_SD3_DAT0__SD3_DATA0	0x17059
293 			MX6QDL_PAD_SD3_DAT1__SD3_DATA1	0x17059
294 			MX6QDL_PAD_SD3_DAT2__SD3_DATA2	0x17059
295 			MX6QDL_PAD_SD3_DAT3__SD3_DATA3	0x17059
296 		>;
297 	};
298 
299 	pinctrl_usdhc3_100mhz: usdhc3grp-100mhz {
300 		fsl,pins = <
301 			MX6QDL_PAD_SD3_CMD__SD3_CMD	0x170B9
302 			MX6QDL_PAD_SD3_CLK__SD3_CLK	0x100B9
303 			MX6QDL_PAD_SD3_DAT0__SD3_DATA0	0x170B9
304 			MX6QDL_PAD_SD3_DAT1__SD3_DATA1	0x170B9
305 			MX6QDL_PAD_SD3_DAT2__SD3_DATA2	0x170B9
306 			MX6QDL_PAD_SD3_DAT3__SD3_DATA3	0x170B9
307 		>;
308 	};
309 
310 	pinctrl_usdhc3_200mhz: usdhc3grp-200mhz {
311 		fsl,pins = <
312 			MX6QDL_PAD_SD3_CMD__SD3_CMD	0x170F9
313 			MX6QDL_PAD_SD3_CLK__SD3_CLK	0x100F9
314 			MX6QDL_PAD_SD3_DAT0__SD3_DATA0	0x170F9
315 			MX6QDL_PAD_SD3_DAT1__SD3_DATA1	0x170F9
316 			MX6QDL_PAD_SD3_DAT2__SD3_DATA2	0x170F9
317 			MX6QDL_PAD_SD3_DAT3__SD3_DATA3	0x170F9
318 		>;
319 	};
320 };
321 
322 &ipu1_di0_disp0 {
323 	remote-endpoint = <&parallel_display_in>;
324 };
325 
326 &pcie {
327 	pcie@0,0 {
328 		reg = <0x000000 0 0 0 0>;
329 		#address-cells = <3>;
330 		#size-cells = <2>;
331 
332 		/* non-removable i211 ethernet card */
333 		eth1: intel,i211@pcie0,0 {
334 			reg = <0x010000 0 0 0 0>;
335 		};
336 	};
337 };
338 
339 &uart2 {
340 	pinctrl-names = "default";
341 	pinctrl-0 = <&pinctrl_uart2>;
342 	uart-has-rtscts;
343 	status = "okay";
344 };
345 
346 &usdhc3 {
347 	pinctrl-names = "default", "state_100mhz", "state_200mhz";
348 	pinctrl-0 = <&pinctrl_usdhc3>;
349 	pinctrl-1 = <&pinctrl_usdhc3_100mhz>;
350 	pinctrl-2 = <&pinctrl_usdhc3_200mhz>;
351 	no-1-8-v;
352 	broken-cd;
353 	keep-power-in-suspend;
354 	status = "okay";
355 };
356