1 // SPDX-License-Identifier: GPL-2.0
2 /dts-v1/;
3 
4 #include <dt-bindings/input/atmel-maxtouch.h>
5 #include <dt-bindings/input/gpio-keys.h>
6 #include <dt-bindings/input/input.h>
7 #include <dt-bindings/thermal/thermal.h>
8 
9 #include "tegra20.dtsi"
10 #include "tegra20-cpu-opp.dtsi"
11 #include "tegra20-cpu-opp-microvolt.dtsi"
12 
13 / {
14 	model = "ASUS EeePad Transformer TF101";
15 	compatible = "asus,tf101", "nvidia,tegra20";
16 	chassis-type = "convertible";
17 
18 	aliases {
19 		mmc0 = &sdmmc4; /* eMMC */
20 		mmc1 = &sdmmc3; /* MicroSD */
21 		mmc2 = &sdmmc1; /* WiFi */
22 
23 		rtc0 = &pmic;
24 		rtc1 = "/rtc@7000e000";
25 
26 		serial0 = &uartd;
27 		serial1 = &uartc; /* Bluetooth */
28 		serial2 = &uartb; /* GPS */
29 	};
30 
31 	/*
32 	 * The decompressor and also some bootloaders rely on a
33 	 * pre-existing /chosen node to be available to insert the
34 	 * command line and merge other ATAGS info.
35 	 */
36 	chosen {};
37 
38 	memory@0 {
39 		reg = <0x00000000 0x40000000>;
40 	};
41 
42 	reserved-memory {
43 		#address-cells = <1>;
44 		#size-cells = <1>;
45 		ranges;
46 
47 		ramoops@2ffe0000 {
48 			compatible = "ramoops";
49 			reg = <0x2ffe0000 0x10000>;	/* 64kB */
50 			console-size = <0x8000>;	/* 32kB */
51 			record-size = <0x400>;		/*  1kB */
52 			ecc-size = <16>;
53 		};
54 
55 		linux,cma@30000000 {
56 			compatible = "shared-dma-pool";
57 			alloc-ranges = <0x30000000 0x10000000>;
58 			size = <0x10000000>; /* 256MiB */
59 			linux,cma-default;
60 			reusable;
61 		};
62 	};
63 
64 	host1x@50000000 {
65 		dc@54200000 {
66 			rgb {
67 				status = "okay";
68 
69 				port {
70 					lcd_output: endpoint {
71 						remote-endpoint = <&lvds_encoder_input>;
72 						bus-width = <18>;
73 					};
74 				};
75 			};
76 		};
77 
78 		hdmi@54280000 {
79 			status = "okay";
80 
81 			vdd-supply = <&hdmi_vdd_reg>;
82 			pll-supply = <&hdmi_pll_reg>;
83 			hdmi-supply = <&vdd_hdmi_en>;
84 
85 			nvidia,ddc-i2c-bus = <&hdmi_ddc>;
86 			nvidia,hpd-gpio = <&gpio TEGRA_GPIO(N, 7)
87 				GPIO_ACTIVE_HIGH>;
88 		};
89 	};
90 
91 	gpio@6000d000 {
92 		charging-enable-hog {
93 			gpio-hog;
94 			gpios = <TEGRA_GPIO(R, 6) GPIO_ACTIVE_HIGH>;
95 			output-low;
96 		};
97 	};
98 
99 	pinmux@70000014 {
100 		pinctrl-names = "default";
101 		pinctrl-0 = <&state_default>;
102 
103 		state_default: pinmux {
104 			ata {
105 				nvidia,pins = "ata";
106 				nvidia,function = "ide";
107 			};
108 
109 			atb {
110 				nvidia,pins = "atb", "gma", "gme";
111 				nvidia,function = "sdio4";
112 			};
113 
114 			atc {
115 				nvidia,pins = "atc";
116 				nvidia,function = "nand";
117 			};
118 
119 			atd {
120 				nvidia,pins = "atd", "ate", "gmb", "spia",
121 					"spib", "spic";
122 				nvidia,function = "gmi";
123 			};
124 
125 			cdev1 {
126 				nvidia,pins = "cdev1";
127 				nvidia,function = "plla_out";
128 			};
129 
130 			cdev2 {
131 				nvidia,pins = "cdev2";
132 				nvidia,function = "pllp_out4";
133 			};
134 
135 			crtp {
136 				nvidia,pins = "crtp";
137 				nvidia,function = "crt";
138 			};
139 
140 			lm1 {
141 				nvidia,pins = "lm1";
142 				nvidia,function = "rsvd3";
143 			};
144 
145 			csus {
146 				nvidia,pins = "csus";
147 				nvidia,function = "vi_sensor_clk";
148 			};
149 
150 			dap1 {
151 				nvidia,pins = "dap1";
152 				nvidia,function = "dap1";
153 			};
154 
155 			dap2 {
156 				nvidia,pins = "dap2";
157 				nvidia,function = "dap2";
158 			};
159 
160 			dap3 {
161 				nvidia,pins = "dap3";
162 				nvidia,function = "dap3";
163 			};
164 
165 			dap4 {
166 				nvidia,pins = "dap4";
167 				nvidia,function = "dap4";
168 			};
169 
170 			dta {
171 				nvidia,pins = "dta", "dtb", "dtc", "dtd", "dte";
172 				nvidia,function = "vi";
173 			};
174 
175 			dtf {
176 				nvidia,pins = "dtf";
177 				nvidia,function = "i2c3";
178 			};
179 
180 			gmc {
181 				nvidia,pins = "gmc";
182 				nvidia,function = "uartd";
183 			};
184 
185 			gmd {
186 				nvidia,pins = "gmd";
187 				nvidia,function = "sflash";
188 			};
189 
190 			gpu {
191 				nvidia,pins = "gpu";
192 				nvidia,function = "pwm";
193 			};
194 
195 			gpu7 {
196 				nvidia,pins = "gpu7";
197 				nvidia,function = "rtck";
198 			};
199 
200 			gpv {
201 				nvidia,pins = "gpv", "slxa";
202 				nvidia,function = "pcie";
203 			};
204 
205 			hdint {
206 				nvidia,pins = "hdint";
207 				nvidia,function = "hdmi";
208 			};
209 
210 			i2cp {
211 				nvidia,pins = "i2cp";
212 				nvidia,function = "i2cp";
213 			};
214 
215 			irrx {
216 				nvidia,pins = "irrx", "irtx";
217 				nvidia,function = "uartb";
218 			};
219 
220 			kbca {
221 				nvidia,pins = "kbca", "kbcb", "kbcc", "kbcd",
222 					"kbce", "kbcf";
223 				nvidia,function = "kbc";
224 			};
225 
226 			lcsn {
227 				nvidia,pins = "lcsn", "ldc", "lm0", "lpw1",
228 					"lsdi", "lvp0";
229 				nvidia,function = "rsvd4";
230 			};
231 
232 			ld0 {
233 				nvidia,pins = "ld0", "ld1", "ld2", "ld3", "ld4",
234 					"ld5", "ld6", "ld7", "ld8", "ld9",
235 					"ld10", "ld11", "ld12", "ld13", "ld14",
236 					"ld15", "ld16", "ld17", "ldi", "lhp0",
237 					"lhp1", "lhp2", "lhs", "lpp", "lpw0",
238 					"lpw2", "lsc0", "lsc1", "lsck", "lsda",
239 					"lspi", "lvp1", "lvs";
240 				nvidia,function = "displaya";
241 			};
242 
243 			owc {
244 				nvidia,pins = "owc", "spdi", "spdo", "uac";
245 				nvidia,function = "rsvd2";
246 			};
247 
248 			pmc {
249 				nvidia,pins = "pmc";
250 				nvidia,function = "pwr_on";
251 			};
252 
253 			rm {
254 				nvidia,pins = "rm";
255 				nvidia,function = "i2c1";
256 			};
257 
258 			sdb {
259 				nvidia,pins = "sdb", "sdc", "sdd", "slxc", "slxk";
260 				nvidia,function = "sdio3";
261 			};
262 
263 			sdio1 {
264 				nvidia,pins = "sdio1";
265 				nvidia,function = "sdio1";
266 			};
267 
268 			slxd {
269 				nvidia,pins = "slxd";
270 				nvidia,function = "spdif";
271 			};
272 
273 			spid {
274 				nvidia,pins = "spid", "spie", "spif";
275 				nvidia,function = "spi1";
276 			};
277 
278 			spig {
279 				nvidia,pins = "spig", "spih";
280 				nvidia,function = "spi2_alt";
281 			};
282 
283 			uaa {
284 				nvidia,pins = "uaa", "uab", "uda";
285 				nvidia,function = "ulpi";
286 			};
287 
288 			uad {
289 				nvidia,pins = "uad";
290 				nvidia,function = "irda";
291 			};
292 
293 			uca {
294 				nvidia,pins = "uca", "ucb";
295 				nvidia,function = "uartc";
296 			};
297 
298 			conf_ata {
299 				nvidia,pins = "ata", "atb", "atc", "atd",
300 					"cdev1", "cdev2", "dap1", "dap4",
301 					"dte", "ddc", "dtf", "gma", "gmc",
302 					"gme", "gpu", "gpu7", "gpv", "i2cp",
303 					"irrx", "irtx", "pta", "rm", "sdc",
304 					"sdd", "slxc", "slxd", "slxk", "spdi",
305 					"spdo", "uac", "uad",
306 					"uda", "csus";
307 				nvidia,pull = <TEGRA_PIN_PULL_NONE>;
308 				nvidia,tristate = <TEGRA_PIN_DISABLE>;
309 			};
310 
311 			conf_ate {
312 				nvidia,pins = "ate", "dap2", "dap3", "gmb", "gmd",
313 					"owc", "spia", "spib", "spic",
314 					"spid", "spie", "spig", "slxa";
315 				nvidia,pull = <TEGRA_PIN_PULL_NONE>;
316 				nvidia,tristate = <TEGRA_PIN_ENABLE>;
317 			};
318 
319 			conf_ck32 {
320 				nvidia,pins = "ck32", "ddrc", "pmca", "pmcb",
321 					"pmcc", "pmcd", "pmce", "xm2c", "xm2d";
322 				nvidia,pull = <TEGRA_PIN_PULL_NONE>;
323 			};
324 
325 			conf_crtp {
326 				nvidia,pins = "crtp", "spih";
327 				nvidia,pull = <TEGRA_PIN_PULL_UP>;
328 				nvidia,tristate = <TEGRA_PIN_ENABLE>;
329 			};
330 
331 			conf_dta {
332 				nvidia,pins = "dta", "dtb", "dtc", "dtd";
333 				nvidia,pull = <TEGRA_PIN_PULL_DOWN>;
334 				nvidia,tristate = <TEGRA_PIN_DISABLE>;
335 			};
336 
337 			conf_spif {
338 				nvidia,pins = "spif";
339 				nvidia,pull = <TEGRA_PIN_PULL_DOWN>;
340 				nvidia,tristate = <TEGRA_PIN_ENABLE>;
341 			};
342 
343 			conf_hdint {
344 				nvidia,pins = "hdint", "lcsn", "ldc", "lm1",
345 					"lpw1", "lsck", "lsda", "lsdi", "lvp0";
346 				nvidia,tristate = <TEGRA_PIN_ENABLE>;
347 			};
348 
349 			conf_kbca {
350 				nvidia,pins = "kbca", "kbcb", "kbcc", "kbcd",
351 					"kbce", "kbcf", "sdio1", "uaa", "uab",
352 					"uca", "ucb";
353 				nvidia,pull = <TEGRA_PIN_PULL_UP>;
354 				nvidia,tristate = <TEGRA_PIN_DISABLE>;
355 			};
356 
357 			conf_lc {
358 				nvidia,pins = "lc", "ls";
359 				nvidia,pull = <TEGRA_PIN_PULL_UP>;
360 			};
361 
362 			conf_ld0 {
363 				nvidia,pins = "ld0", "ld1", "ld2", "ld3", "ld4",
364 					"ld5", "ld6", "ld7", "ld8", "ld9",
365 					"ld10", "ld11", "ld12", "ld13", "ld14",
366 					"ld15", "ld16", "ld17", "ldi", "lhp0",
367 					"lhp1", "lhp2", "lhs", "lm0", "lpp",
368 					"lpw0", "lpw2", "lsc0", "lsc1", "lspi",
369 					"lvp1", "lvs", "pmc", "sdb";
370 				nvidia,tristate = <TEGRA_PIN_DISABLE>;
371 			};
372 
373 			conf_ld17_0 {
374 				nvidia,pins = "ld17_0", "ld19_18", "ld21_20",
375 					"ld23_22";
376 				nvidia,pull = <TEGRA_PIN_PULL_DOWN>;
377 			};
378 
379 			drive_sdio1 {
380 				nvidia,pins = "drive_sdio1", "drive_ddc", "drive_vi1";
381 				nvidia,high-speed-mode = <TEGRA_PIN_DISABLE>;
382 				nvidia,schmitt = <TEGRA_PIN_ENABLE>;
383 				nvidia,low-power-mode = <TEGRA_PIN_LP_DRIVE_DIV_1>;
384 				nvidia,pull-down-strength = <31>;
385 				nvidia,pull-up-strength = <31>;
386 				nvidia,slew-rate-rising = <TEGRA_PIN_SLEW_RATE_SLOWEST>;
387 				nvidia,slew-rate-falling = <TEGRA_PIN_SLEW_RATE_SLOWEST>;
388 			};
389 
390 			drive_csus {
391 				nvidia,pins = "drive_csus";
392 				nvidia,high-speed-mode = <TEGRA_PIN_DISABLE>;
393 				nvidia,schmitt = <TEGRA_PIN_DISABLE>;
394 				nvidia,low-power-mode = <TEGRA_PIN_LP_DRIVE_DIV_1>;
395 				nvidia,pull-down-strength = <31>;
396 				nvidia,pull-up-strength = <31>;
397 				nvidia,slew-rate-rising = <TEGRA_PIN_SLEW_RATE_SLOWEST>;
398 				nvidia,slew-rate-falling = <TEGRA_PIN_SLEW_RATE_SLOWEST>;
399 			};
400 		};
401 
402 		state_i2cmux_ddc: pinmux-i2cmux-ddc {
403 			ddc {
404 				nvidia,pins = "ddc";
405 				nvidia,function = "i2c2";
406 			};
407 
408 			pta {
409 				nvidia,pins = "pta";
410 				nvidia,function = "rsvd4";
411 			};
412 		};
413 
414 		state_i2cmux_idle: pinmux-i2cmux-idle {
415 			ddc {
416 				nvidia,pins = "ddc";
417 				nvidia,function = "rsvd4";
418 			};
419 
420 			pta {
421 				nvidia,pins = "pta";
422 				nvidia,function = "rsvd4";
423 			};
424 		};
425 
426 		state_i2cmux_pta: pinmux-i2cmux-pta {
427 			ddc {
428 				nvidia,pins = "ddc";
429 				nvidia,function = "rsvd4";
430 			};
431 
432 			pta {
433 				nvidia,pins = "pta";
434 				nvidia,function = "i2c2";
435 			};
436 		};
437 	};
438 
439 	spdif@70002400 {
440 		status = "okay";
441 
442 		nvidia,fixed-parent-rate;
443 	};
444 
445 	i2s@70002800 {
446 		status = "okay";
447 
448 		nvidia,fixed-parent-rate;
449 	};
450 
451 	serial@70006040 {
452 		compatible = "nvidia,tegra20-hsuart";
453 		reset-names = "serial";
454 		/delete-property/ reg-shift;
455 		/* GPS BCM4751 */
456 	};
457 
458 	serial@70006200 {
459 		compatible = "nvidia,tegra20-hsuart";
460 		reset-names = "serial";
461 		/delete-property/ reg-shift;
462 		status = "okay";
463 
464 		/* Azurewave AW-NH615 BCM4329B1 */
465 		bluetooth {
466 			compatible = "brcm,bcm4329-bt";
467 
468 			interrupt-parent = <&gpio>;
469 			interrupts = <TEGRA_GPIO(U, 6) IRQ_TYPE_EDGE_RISING>;
470 			interrupt-names = "host-wakeup";
471 
472 			/* PLLP 216MHz / 16 / 4 */
473 			max-speed = <3375000>;
474 
475 			clocks = <&tegra_pmc TEGRA_PMC_CLK_BLINK>;
476 			clock-names = "txco";
477 
478 			vbat-supply  = <&vdd_3v3_sys>;
479 			vddio-supply = <&vdd_1v8_sys>;
480 
481 			device-wakeup-gpios = <&gpio TEGRA_GPIO(U, 1) GPIO_ACTIVE_HIGH>;
482 			shutdown-gpios = <&gpio TEGRA_GPIO(U, 0) GPIO_ACTIVE_HIGH>;
483 		};
484 	};
485 
486 	serial@70006300 {
487 		/delete-property/ dmas;
488 		/delete-property/ dma-names;
489 		status = "okay";
490 	};
491 
492 	pwm@7000a000 {
493 		status = "okay";
494 	};
495 
496 	i2c@7000c000 {
497 		status = "okay";
498 		clock-frequency = <400000>;
499 
500 		/* Aichi AMI306 digital compass */
501 		magnetometer@e {
502 			compatible = "asahi-kasei,ak8974";
503 			reg = <0xe>;
504 
505 			avdd-supply = <&vdd_3v3_sys>;
506 			dvdd-supply = <&vdd_1v8_sys>;
507 
508 			mount-matrix = "-1",  "0",  "0",
509 					"0",  "1",  "0",
510 					"0",  "0", "-1";
511 		};
512 
513 		wm8903: audio-codec@1a {
514 			compatible = "wlf,wm8903";
515 			reg = <0x1a>;
516 
517 			interrupt-parent = <&gpio>;
518 			interrupts = <TEGRA_GPIO(X, 1) IRQ_TYPE_EDGE_BOTH>;
519 
520 			gpio-controller;
521 			#gpio-cells = <2>;
522 
523 			micdet-cfg = <0x83>;
524 			micdet-delay = <100>;
525 
526 			gpio-cfg = <
527 				0x00000600 /* DMIC_LR, output */
528 				0x00000680 /* DMIC_DAT, input */
529 				0x00000000 /* Speaker-enable GPIO, output, low */
530 				0xffffffff /* don't touch */
531 				0xffffffff /* don't touch */
532 			>;
533 
534 			AVDD-supply  = <&vdd_1v8_sys>;
535 			CPVDD-supply = <&vdd_1v8_sys>;
536 			DBVDD-supply = <&vdd_1v8_sys>;
537 			DCVDD-supply = <&vdd_1v8_sys>;
538 		};
539 
540 		/* Atmel MXT1386 Touchscreen */
541 		touchscreen@5b {
542 			compatible = "atmel,maxtouch";
543 			reg = <0x5b>;
544 
545 			interrupt-parent = <&gpio>;
546 			interrupts = <TEGRA_GPIO(V, 6) IRQ_TYPE_LEVEL_LOW>;
547 
548 			reset-gpios = <&gpio TEGRA_GPIO(Q, 7) GPIO_ACTIVE_LOW>;
549 
550 			vdda-supply = <&vdd_3v3_sys>;
551 			vdd-supply  = <&vdd_3v3_sys>;
552 
553 			atmel,wakeup-method = <ATMEL_MXT_WAKEUP_I2C_SCL>;
554 		};
555 
556 		gyroscope@68 {
557 			compatible = "invensense,mpu3050";
558 			reg = <0x68>;
559 
560 			interrupt-parent = <&gpio>;
561 			interrupts = <TEGRA_GPIO(Z, 4) IRQ_TYPE_EDGE_RISING>;
562 
563 			vdd-supply    = <&vdd_3v3_sys>;
564 			vlogic-supply = <&vdd_1v8_sys>;
565 
566 			mount-matrix =	 "0",  "1",  "0",
567 					"-1",  "0",  "0",
568 					 "0",  "0",  "1";
569 
570 			i2c-gate {
571 				#address-cells = <1>;
572 				#size-cells = <0>;
573 
574 				accelerometer@f {
575 					compatible = "kionix,kxtf9";
576 					reg = <0xf>;
577 
578 					interrupt-parent = <&gpio>;
579 					interrupts = <TEGRA_GPIO(N, 4) IRQ_TYPE_EDGE_RISING>;
580 
581 					vdd-supply = <&vdd_1v8_sys>;
582 					vddio-supply = <&vdd_1v8_sys>;
583 
584 					mount-matrix =	"-1",  "0",  "0",
585 							 "0", "-1",  "0",
586 							 "0",  "0", "-1";
587 				};
588 			};
589 		};
590 	};
591 
592 	i2c2: i2c@7000c400 {
593 		status = "okay";
594 		clock-frequency = <100000>;
595 	};
596 
597 	i2c@7000c500 {
598 		status = "okay";
599 		clock-frequency = <400000>;
600 	};
601 
602 	i2c@7000d000 {
603 		status = "okay";
604 		clock-frequency = <400000>;
605 
606 		pmic: pmic@34 {
607 			compatible = "ti,tps6586x";
608 			reg = <0x34>;
609 			interrupts = <GIC_SPI 86 IRQ_TYPE_LEVEL_HIGH>;
610 
611 			ti,system-power-controller;
612 
613 			#gpio-cells = <2>;
614 			gpio-controller;
615 
616 			sys-supply = <&vdd_5v0_sys>;
617 			vin-sm0-supply = <&sys_reg>;
618 			vin-sm1-supply = <&sys_reg>;
619 			vin-sm2-supply = <&sys_reg>;
620 			vinldo01-supply = <&sm2_reg>;
621 			vinldo23-supply = <&sm2_reg>;
622 			vinldo4-supply = <&sm2_reg>;
623 			vinldo678-supply = <&sm2_reg>;
624 			vinldo9-supply = <&sm2_reg>;
625 
626 			regulators {
627 				sys_reg: sys {
628 					regulator-name = "vdd_sys";
629 					regulator-always-on;
630 				};
631 
632 				vdd_core: sm0 {
633 					regulator-name = "vdd_sm0,vdd_core";
634 					regulator-min-microvolt = <950000>;
635 					regulator-max-microvolt = <1300000>;
636 					regulator-coupled-with = <&rtc_vdd &vdd_cpu>;
637 					regulator-coupled-max-spread = <170000 550000>;
638 					regulator-always-on;
639 					regulator-boot-on;
640 
641 					nvidia,tegra-core-regulator;
642 				};
643 
644 				vdd_cpu: sm1 {
645 					regulator-name = "vdd_sm1,vdd_cpu";
646 					regulator-min-microvolt = <750000>;
647 					regulator-max-microvolt = <1125000>;
648 					regulator-coupled-with = <&vdd_core &rtc_vdd>;
649 					regulator-coupled-max-spread = <550000 550000>;
650 					regulator-always-on;
651 					regulator-boot-on;
652 
653 					nvidia,tegra-cpu-regulator;
654 				};
655 
656 				sm2_reg: sm2 {
657 					regulator-name = "vdd_sm2,vin_ldo*";
658 					regulator-min-microvolt = <3700000>;
659 					regulator-max-microvolt = <3700000>;
660 					regulator-always-on;
661 				};
662 
663 				/* LDO0 is not connected to anything */
664 
665 				ldo1 {
666 					regulator-name = "vdd_ldo1,avdd_pll*";
667 					regulator-min-microvolt = <1100000>;
668 					regulator-max-microvolt = <1100000>;
669 					regulator-always-on;
670 				};
671 
672 				rtc_vdd: ldo2 {
673 					regulator-name = "vdd_ldo2,vdd_rtc";
674 					regulator-min-microvolt = <950000>;
675 					regulator-max-microvolt = <1300000>;
676 					regulator-coupled-with = <&vdd_core &vdd_cpu>;
677 					regulator-coupled-max-spread = <170000 550000>;
678 					regulator-always-on;
679 					regulator-boot-on;
680 
681 					nvidia,tegra-rtc-regulator;
682 				};
683 
684 				ldo3 {
685 					regulator-name = "vdd_ldo3,avdd_usb*";
686 					regulator-min-microvolt = <3300000>;
687 					regulator-max-microvolt = <3300000>;
688 					regulator-always-on;
689 				};
690 
691 				ldo4 {
692 					regulator-name = "vdd_ldo4,avdd_osc,vddio_sys";
693 					regulator-min-microvolt = <1800000>;
694 					regulator-max-microvolt = <1800000>;
695 					regulator-always-on;
696 				};
697 
698 				vcore_emmc: ldo5 {
699 					regulator-name = "vdd_ldo5,vcore_mmc";
700 					regulator-min-microvolt = <2850000>;
701 					regulator-max-microvolt = <2850000>;
702 					regulator-always-on;
703 				};
704 
705 				ldo6 {
706 					regulator-name = "vdd_ldo6,avdd_vdac";
707 					regulator-min-microvolt = <1800000>;
708 					regulator-max-microvolt = <1800000>;
709 				};
710 
711 				hdmi_vdd_reg: ldo7 {
712 					regulator-name = "vdd_ldo7,avdd_hdmi,vdd_fuse";
713 					regulator-min-microvolt = <3300000>;
714 					regulator-max-microvolt = <3300000>;
715 				};
716 
717 				hdmi_pll_reg: ldo8 {
718 					regulator-name = "vdd_ldo8,avdd_hdmi_pll";
719 					regulator-min-microvolt = <1800000>;
720 					regulator-max-microvolt = <1800000>;
721 				};
722 
723 				ldo9 {
724 					regulator-name = "vdd_ldo9,avdd_2v85,vdd_ddr_rx";
725 					regulator-min-microvolt = <2850000>;
726 					regulator-max-microvolt = <2850000>;
727 					regulator-always-on;
728 				};
729 
730 				ldo_rtc {
731 					regulator-name = "vdd_rtc_out,vdd_cell";
732 					regulator-min-microvolt = <3300000>;
733 					regulator-max-microvolt = <3300000>;
734 					regulator-always-on;
735 				};
736 			};
737 		};
738 
739 		nct1008: temperature-sensor@4c {
740 			compatible = "onnn,nct1008";
741 			reg = <0x4c>;
742 			vcc-supply = <&vdd_3v3_sys>;
743 
744 			interrupt-parent = <&gpio>;
745 			interrupts = <TEGRA_GPIO(N, 6) IRQ_TYPE_EDGE_FALLING>;
746 
747 			#thermal-sensor-cells = <1>;
748 		};
749 	};
750 
751 	pmc@7000e400 {
752 		nvidia,invert-interrupt;
753 		nvidia,suspend-mode = <1>;
754 		nvidia,cpu-pwr-good-time = <2000>;
755 		nvidia,cpu-pwr-off-time = <100>;
756 		nvidia,core-pwr-good-time = <3845 3845>;
757 		nvidia,core-pwr-off-time = <458>;
758 		nvidia,sys-clock-req-active-high;
759 		core-supply = <&vdd_core>;
760 	};
761 
762 	memory-controller@7000f400 {
763 		nvidia,use-ram-code;
764 
765 		emc-tables@3 {
766 			reg = <0x3>;
767 
768 			#address-cells = <1>;
769 			#size-cells = <0>;
770 
771 			emc-table@25000 {
772 				reg = <25000>;
773 				compatible = "nvidia,tegra20-emc-table";
774 				clock-frequency = <25000>;
775 				nvidia,emc-registers = <0x00000002 0x00000006
776 					0x00000003 0x00000003 0x00000006 0x00000004
777 					0x00000002 0x00000009 0x00000003 0x00000003
778 					0x00000002 0x00000002 0x00000002 0x00000004
779 					0x00000003 0x00000008 0x0000000b 0x0000004d
780 					0x00000000 0x00000003 0x00000003 0x00000003
781 					0x00000008 0x00000001 0x0000000a 0x00000004
782 					0x00000003 0x00000008 0x00000004 0x00000006
783 					0x00000002 0x00000068 0x00000000 0x00000003
784 					0x00000000 0x00000000 0x00000282 0xa0ae04ae
785 					0x00070000 0x00000000 0x00000000 0x00000003
786 					0x00000000 0x00000000 0x00000000 0x00000000>;
787 			};
788 
789 			emc-table@50000 {
790 				reg = <50000>;
791 				compatible = "nvidia,tegra20-emc-table";
792 				clock-frequency = <50000>;
793 				nvidia,emc-registers = <0x00000003 0x00000007
794 					0x00000003 0x00000003 0x00000006 0x00000004
795 					0x00000002 0x00000009 0x00000003 0x00000003
796 					0x00000002 0x00000002 0x00000002 0x00000005
797 					0x00000003 0x00000008 0x0000000b 0x0000009f
798 					0x00000000 0x00000003 0x00000003 0x00000003
799 					0x00000008 0x00000001 0x0000000a 0x00000007
800 					0x00000003 0x00000008 0x00000004 0x00000006
801 					0x00000002 0x000000d0 0x00000000 0x00000000
802 					0x00000000 0x00000000 0x00000282 0xa0ae04ae
803 					0x00070000 0x00000000 0x00000000 0x00000005
804 					0x00000000 0x00000000 0x00000000 0x00000000>;
805 			};
806 
807 			emc-table@75000 {
808 				reg = <75000>;
809 				compatible = "nvidia,tegra20-emc-table";
810 				clock-frequency = <75000>;
811 				nvidia,emc-registers = <0x00000005 0x0000000a
812 					0x00000004 0x00000003 0x00000006 0x00000004
813 					0x00000002 0x00000009 0x00000003 0x00000003
814 					0x00000002 0x00000002 0x00000002 0x00000005
815 					0x00000003 0x00000008 0x0000000b 0x000000ff
816 					0x00000000 0x00000003 0x00000003 0x00000003
817 					0x00000008 0x00000001 0x0000000a 0x0000000b
818 					0x00000003 0x00000008 0x00000004 0x00000006
819 					0x00000002 0x00000138 0x00000000 0x00000000
820 					0x00000000 0x00000000 0x00000282 0xa0ae04ae
821 					0x00070000 0x00000000 0x00000000 0x00000007
822 					0x00000000 0x00000000 0x00000000 0x00000000>;
823 			};
824 
825 			emc-table@150000 {
826 				reg = <150000>;
827 				compatible = "nvidia,tegra20-emc-table";
828 				clock-frequency = <150000>;
829 				nvidia,emc-registers = <0x00000009 0x00000014
830 					0x00000007 0x00000003 0x00000006 0x00000004
831 					0x00000002 0x00000009 0x00000003 0x00000003
832 					0x00000002 0x00000002 0x00000002 0x00000005
833 					0x00000003 0x00000008 0x0000000b 0x0000021f
834 					0x00000000 0x00000003 0x00000003 0x00000003
835 					0x00000008 0x00000001 0x0000000a 0x00000015
836 					0x00000003 0x00000008 0x00000004 0x00000006
837 					0x00000002 0x00000270 0x00000000 0x00000001
838 					0x00000000 0x00000000 0x00000282 0xa07c04ae
839 					0x007dc010 0x00000000 0x00000000 0x0000000e
840 					0x00000000 0x00000000 0x00000000 0x00000000>;
841 			};
842 
843 			emc-table@300000 {
844 				reg = <300000>;
845 				compatible = "nvidia,tegra20-emc-table";
846 				clock-frequency = <300000>;
847 				nvidia,emc-registers = <0x00000012 0x00000027
848 					0x0000000d 0x00000006 0x00000007 0x00000005
849 					0x00000003 0x00000009 0x00000006 0x00000006
850 					0x00000003 0x00000003 0x00000002 0x00000006
851 					0x00000003 0x00000009 0x0000000c 0x0000045f
852 					0x00000000 0x00000004 0x00000004 0x00000006
853 					0x00000008 0x00000001 0x0000000e 0x0000002a
854 					0x00000003 0x0000000f 0x00000007 0x00000005
855 					0x00000002 0x000004e0 0x00000005 0x00000002
856 					0x00000000 0x00000000 0x00000282 0xe059048b
857 					0x007e0010 0x00000000 0x00000000 0x0000001b
858 					0x00000000 0x00000000 0x00000000 0x00000000>;
859 			};
860 
861 			lpddr2 {
862 				compatible = "elpida,B8132B2PB-6D-F", "jedec,lpddr2-s4";
863 				revision-id = <1 0>;
864 				density = <2048>;
865 				io-width = <16>;
866 			};
867 		};
868 	};
869 
870 	/* Peripheral USB via ASUS connector */
871 	usb@c5000000 {
872 		compatible = "nvidia,tegra20-udc";
873 		status = "okay";
874 		dr_mode = "peripheral";
875 	};
876 
877 	usb-phy@c5000000 {
878 		status = "okay";
879 		dr_mode = "peripheral";
880 		nvidia,xcvr-setup-use-fuses;
881 		nvidia,xcvr-lsfslew = <2>;
882 		nvidia,xcvr-lsrslew = <2>;
883 		vbus-supply = <&vdd_5v0_sys>;
884 	};
885 
886 	/* Dock's USB port */
887 	usb@c5008000 {
888 		status = "okay";
889 	};
890 
891 	usb-phy@c5008000 {
892 		status = "okay";
893 		nvidia,xcvr-setup-use-fuses;
894 		vbus-supply = <&vdd_5v0_sys>;
895 	};
896 
897 	sdmmc1: mmc@c8000000 {
898 		status = "okay";
899 
900 		#address-cells = <1>;
901 		#size-cells = <0>;
902 
903 		assigned-clocks = <&tegra_car TEGRA20_CLK_SDMMC1>;
904 		assigned-clock-parents = <&tegra_car TEGRA20_CLK_PLL_C>;
905 		assigned-clock-rates = <40000000>;
906 
907 		max-frequency = <40000000>;
908 		keep-power-in-suspend;
909 		bus-width = <4>;
910 		non-removable;
911 
912 		mmc-pwrseq = <&brcm_wifi_pwrseq>;
913 		vmmc-supply = <&vdd_3v3_sys>;
914 		vqmmc-supply = <&vdd_3v3_sys>;
915 
916 		/* Azurewave AW-NH615 BCM4329B1 */
917 		wifi@1 {
918 			compatible = "brcm,bcm4329-fmac";
919 			reg = <1>;
920 
921 			interrupt-parent = <&gpio>;
922 			interrupts = <TEGRA_GPIO(S, 0) IRQ_TYPE_LEVEL_HIGH>;
923 			interrupt-names = "host-wake";
924 		};
925 	};
926 
927 	sdmmc3: mmc@c8000400 {
928 		status = "okay";
929 		bus-width = <4>;
930 		cd-gpios = <&gpio TEGRA_GPIO(I, 5) GPIO_ACTIVE_LOW>;
931 		wp-gpios = <&gpio TEGRA_GPIO(H, 1) GPIO_ACTIVE_HIGH>;
932 		power-gpios = <&gpio TEGRA_GPIO(I, 6) GPIO_ACTIVE_HIGH>;
933 		vmmc-supply = <&vdd_3v3_sys>;
934 		vqmmc-supply = <&vdd_3v3_sys>;
935 	};
936 
937 	sdmmc4: mmc@c8000600 {
938 		status = "okay";
939 		bus-width = <8>;
940 		vmmc-supply = <&vcore_emmc>;
941 		vqmmc-supply = <&vdd_3v3_sys>;
942 		non-removable;
943 	};
944 
945 	mains: ac-adapter-detect {
946 		compatible = "gpio-charger";
947 		charger-type = "mains";
948 		gpios = <&gpio TEGRA_GPIO(V, 3) GPIO_ACTIVE_LOW>;
949 	};
950 
951 	backlight: backlight {
952 		compatible = "pwm-backlight";
953 
954 		enable-gpios = <&gpio TEGRA_GPIO(D, 4) GPIO_ACTIVE_HIGH>;
955 		power-supply = <&vdd_3v3_sys>;
956 		pwms = <&pwm 2 4000000>;
957 
958 		brightness-levels = <7 255>;
959 		num-interpolated-steps = <248>;
960 		default-brightness-level = <20>;
961 	};
962 
963 	/* PMIC has a built-in 32KHz oscillator which is used by PMC */
964 	clk32k_in: clock-32k-in {
965 		compatible = "fixed-clock";
966 		clock-frequency = <32768>;
967 		#clock-cells = <0>;
968 	};
969 
970 	cpus {
971 		cpu0: cpu@0 {
972 			cpu-supply = <&vdd_cpu>;
973 			operating-points-v2 = <&cpu0_opp_table>;
974 			#cooling-cells = <2>;
975 		};
976 
977 		cpu1: cpu@1 {
978 			cpu-supply = <&vdd_cpu>;
979 			operating-points-v2 = <&cpu0_opp_table>;
980 			#cooling-cells = <2>;
981 		};
982 	};
983 
984 	display-panel {
985 		compatible = "auo,b101ew05", "panel-lvds";
986 
987 		/* AUO B101EW05 using custom timings */
988 
989 		backlight = <&backlight>;
990 		ddc-i2c-bus = <&lvds_ddc>;
991 		power-supply = <&vdd_pnl_reg>;
992 
993 		width-mm = <218>;
994 		height-mm = <135>;
995 
996 		data-mapping = "jeida-18";
997 
998 		panel-timing {
999 			clock-frequency = <71200000>;
1000 			hactive = <1280>;
1001 			vactive = <800>;
1002 			hfront-porch = <8>;
1003 			hback-porch = <18>;
1004 			hsync-len = <184>;
1005 			vsync-len = <3>;
1006 			vfront-porch = <4>;
1007 			vback-porch = <8>;
1008 		};
1009 
1010 		port {
1011 			panel_input: endpoint {
1012 				remote-endpoint = <&lvds_encoder_output>;
1013 			};
1014 		};
1015 	};
1016 
1017 	gpio-keys {
1018 		compatible = "gpio-keys";
1019 
1020 		key-power {
1021 			label = "Power";
1022 			gpios = <&gpio TEGRA_GPIO(V, 2) GPIO_ACTIVE_LOW>;
1023 			linux,code = <KEY_POWER>;
1024 			debounce-interval = <10>;
1025 			wakeup-event-action = <EV_ACT_ASSERTED>;
1026 			wakeup-source;
1027 		};
1028 
1029 		key-volume-down {
1030 			label = "Volume Down";
1031 			gpios = <&gpio TEGRA_GPIO(Q, 4) GPIO_ACTIVE_LOW>;
1032 			linux,code = <KEY_VOLUMEDOWN>;
1033 			debounce-interval = <10>;
1034 			wakeup-event-action = <EV_ACT_ASSERTED>;
1035 			wakeup-source;
1036 		};
1037 
1038 		key-volume-up {
1039 			label = "Volume Up";
1040 			gpios = <&gpio TEGRA_GPIO(Q, 5) GPIO_ACTIVE_LOW>;
1041 			linux,code = <KEY_VOLUMEUP>;
1042 			debounce-interval = <10>;
1043 			wakeup-event-action = <EV_ACT_ASSERTED>;
1044 			wakeup-source;
1045 		};
1046 
1047 		switch-dock-hall-sensor {
1048 			label = "Lid";
1049 			gpios = <&gpio TEGRA_GPIO(S, 4) GPIO_ACTIVE_LOW>;
1050 			linux,input-type = <EV_SW>;
1051 			linux,code = <SW_LID>;
1052 			debounce-interval = <500>;
1053 			wakeup-event-action = <EV_ACT_ASSERTED>;
1054 			wakeup-source;
1055 		};
1056 	};
1057 
1058 	i2cmux {
1059 		compatible = "i2c-mux-pinctrl";
1060 		#address-cells = <1>;
1061 		#size-cells = <0>;
1062 
1063 		i2c-parent = <&i2c2>;
1064 
1065 		pinctrl-names = "ddc", "pta", "idle";
1066 		pinctrl-0 = <&state_i2cmux_ddc>;
1067 		pinctrl-1 = <&state_i2cmux_pta>;
1068 		pinctrl-2 = <&state_i2cmux_idle>;
1069 
1070 		hdmi_ddc: i2c@0 {
1071 			reg = <0>;
1072 			#address-cells = <1>;
1073 			#size-cells = <0>;
1074 		};
1075 
1076 		lvds_ddc: i2c@1 {
1077 			reg = <1>;
1078 			#address-cells = <1>;
1079 			#size-cells = <0>;
1080 
1081 			smart-battery@b {
1082 				compatible = "ti,bq20z75", "sbs,sbs-battery";
1083 				reg = <0xb>;
1084 				sbs,i2c-retry-count = <2>;
1085 				sbs,poll-retry-count = <10>;
1086 				power-supplies = <&mains>;
1087 			};
1088 		};
1089 	};
1090 
1091 	lvds-encoder {
1092 		compatible = "ti,sn75lvds83", "lvds-encoder";
1093 
1094 		powerdown-gpios = <&gpio TEGRA_GPIO(B, 2) GPIO_ACTIVE_LOW>;
1095 		power-supply = <&vdd_3v3_sys>;
1096 
1097 		ports {
1098 			#address-cells = <1>;
1099 			#size-cells = <0>;
1100 
1101 			port@0 {
1102 				reg = <0>;
1103 
1104 				lvds_encoder_input: endpoint {
1105 					remote-endpoint = <&lcd_output>;
1106 				};
1107 			};
1108 
1109 			port@1 {
1110 				reg = <1>;
1111 
1112 				lvds_encoder_output: endpoint {
1113 					remote-endpoint = <&panel_input>;
1114 				};
1115 			};
1116 		};
1117 	};
1118 
1119 	opp-table-emc {
1120 		/delete-node/ opp-666000000;
1121 		/delete-node/ opp-760000000;
1122 	};
1123 
1124 	vdd_5v0_sys: regulator-5v0 {
1125 		compatible = "regulator-fixed";
1126 		regulator-name = "vdd_5v0";
1127 		regulator-min-microvolt = <5000000>;
1128 		regulator-max-microvolt = <5000000>;
1129 		regulator-always-on;
1130 	};
1131 
1132 	vdd_3v3_sys: regulator-3v3 {
1133 		compatible = "regulator-fixed";
1134 		regulator-name = "vdd_3v3_vs";
1135 		regulator-min-microvolt = <3300000>;
1136 		regulator-max-microvolt = <3300000>;
1137 		regulator-always-on;
1138 		vin-supply = <&vdd_5v0_sys>;
1139 	};
1140 
1141 	regulator-pcie {
1142 		compatible = "regulator-fixed";
1143 		regulator-name = "pcie_vdd";
1144 		regulator-min-microvolt = <1500000>;
1145 		regulator-max-microvolt = <1500000>;
1146 		gpio = <&pmic 0 GPIO_ACTIVE_HIGH>;
1147 		regulator-always-on;
1148 	};
1149 
1150 	vdd_pnl_reg: regulator-panel {
1151 		compatible = "regulator-fixed";
1152 		regulator-name = "vdd_pnl";
1153 		regulator-min-microvolt = <2800000>;
1154 		regulator-max-microvolt = <2800000>;
1155 		gpio = <&gpio TEGRA_GPIO(C, 6) GPIO_ACTIVE_HIGH>;
1156 		enable-active-high;
1157 	};
1158 
1159 	vdd_1v8_sys: regulator-1v8 {
1160 		compatible = "regulator-fixed";
1161 		regulator-name = "vdd_1v8_vs";
1162 		regulator-min-microvolt = <1800000>;
1163 		regulator-max-microvolt = <1800000>;
1164 		regulator-always-on;
1165 		vin-supply = <&vdd_5v0_sys>;
1166 	};
1167 
1168 	vdd_hdmi_en: regulator-hdmi {
1169 		compatible = "regulator-fixed";
1170 		regulator-name = "vdd_5v0_hdmi_en";
1171 		regulator-min-microvolt = <5000000>;
1172 		regulator-max-microvolt = <5000000>;
1173 		regulator-always-on;
1174 		vin-supply = <&vdd_5v0_sys>;
1175 		gpio = <&gpio TEGRA_GPIO(V, 5) GPIO_ACTIVE_HIGH>;
1176 		enable-active-high;
1177 	};
1178 
1179 	sound {
1180 		compatible = "asus,tegra-audio-wm8903-tf101",
1181 			     "nvidia,tegra-audio-wm8903";
1182 		nvidia,model = "Asus EeePad Transformer WM8903";
1183 
1184 		nvidia,audio-routing =
1185 			"Headphone Jack", "HPOUTR",
1186 			"Headphone Jack", "HPOUTL",
1187 			"Int Spk", "ROP",
1188 			"Int Spk", "RON",
1189 			"Int Spk", "LOP",
1190 			"Int Spk", "LON",
1191 			"IN2L", "Mic Jack",
1192 			"DMICDAT", "Int Mic";
1193 
1194 		nvidia,i2s-controller = <&tegra_i2s1>;
1195 		nvidia,audio-codec = <&wm8903>;
1196 
1197 		nvidia,spkr-en-gpios = <&wm8903 2 GPIO_ACTIVE_HIGH>;
1198 		nvidia,hp-det-gpios = <&gpio TEGRA_GPIO(W, 2) GPIO_ACTIVE_LOW>;
1199 		nvidia,mic-det-gpios = <&gpio TEGRA_GPIO(X, 1) GPIO_ACTIVE_LOW>;
1200 		nvidia,coupled-mic-hp-det;
1201 
1202 		clocks = <&tegra_car TEGRA20_CLK_PLL_A>,
1203 			 <&tegra_car TEGRA20_CLK_PLL_A_OUT0>,
1204 			 <&tegra_car TEGRA20_CLK_CDEV1>;
1205 		clock-names = "pll_a", "pll_a_out0", "mclk";
1206 	};
1207 
1208 	thermal-zones {
1209 		/*
1210 		 * NCT1008 has two sensors:
1211 		 *
1212 		 *	0: internal that monitors ambient/skin temperature
1213 		 *	1: external that is connected to the CPU's diode
1214 		 *
1215 		 * Ideally we should use userspace thermal governor,
1216 		 * but it's a much more complex solution.  The "skin"
1217 		 * zone is a simpler solution which prevents TF101 from
1218 		 * getting too hot from a user's tactile perspective.
1219 		 * The CPU zone is intended to protect silicon from damage.
1220 		 */
1221 
1222 		skin-thermal {
1223 			polling-delay-passive = <1000>; /* milliseconds */
1224 			polling-delay = <5000>; /* milliseconds */
1225 
1226 			thermal-sensors = <&nct1008 0>;
1227 
1228 			trips {
1229 				trip0: skin-alert {
1230 					/* start throttling at 60C */
1231 					temperature = <60000>;
1232 					hysteresis = <200>;
1233 					type = "passive";
1234 				};
1235 
1236 				trip1: skin-crit {
1237 					/* shut down at 70C */
1238 					temperature = <70000>;
1239 					hysteresis = <2000>;
1240 					type = "critical";
1241 				};
1242 			};
1243 
1244 			cooling-maps {
1245 				map0 {
1246 					trip = <&trip0>;
1247 					cooling-device = <&cpu0 THERMAL_NO_LIMIT THERMAL_NO_LIMIT>,
1248 							 <&cpu1 THERMAL_NO_LIMIT THERMAL_NO_LIMIT>;
1249 				};
1250 			};
1251 		};
1252 
1253 		cpu-thermal {
1254 			polling-delay-passive = <1000>; /* milliseconds */
1255 			polling-delay = <5000>; /* milliseconds */
1256 
1257 			thermal-sensors = <&nct1008 1>;
1258 
1259 			trips {
1260 				trip2: cpu-alert {
1261 					/* throttle at 85C until temperature drops to 84.8C */
1262 					temperature = <85000>;
1263 					hysteresis = <200>;
1264 					type = "passive";
1265 				};
1266 
1267 				trip3: cpu-crit {
1268 					/* shut down at 90C */
1269 					temperature = <90000>;
1270 					hysteresis = <2000>;
1271 					type = "critical";
1272 				};
1273 			};
1274 
1275 			cooling-maps {
1276 				map1 {
1277 					trip = <&trip2>;
1278 					cooling-device = <&cpu0 THERMAL_NO_LIMIT THERMAL_NO_LIMIT>,
1279 							 <&cpu1 THERMAL_NO_LIMIT THERMAL_NO_LIMIT>;
1280 				};
1281 			};
1282 		};
1283 	};
1284 
1285 	brcm_wifi_pwrseq: wifi-pwrseq {
1286 		compatible = "mmc-pwrseq-simple";
1287 
1288 		clocks = <&tegra_pmc TEGRA_PMC_CLK_BLINK>;
1289 		clock-names = "ext_clock";
1290 
1291 		reset-gpios = <&gpio TEGRA_GPIO(K, 6) GPIO_ACTIVE_LOW>;
1292 		post-power-on-delay-ms = <200>;
1293 		power-off-delay-us = <200>;
1294 	};
1295 };
1296