1 // SPDX-License-Identifier: GPL-2.0
2 /******************************************************************************
3 *
4 * Copyright(c) 2007 - 2011 Realtek Corporation. All rights reserved.
5 *
6 ******************************************************************************/
7
8 #include <linux/kernel.h>
9 #include <drv_types.h>
10 #include "hal_com_h2c.h"
11
12 #include "odm_precomp.h"
13
rtw_hal_data_init(struct adapter * padapter)14 u8 rtw_hal_data_init(struct adapter *padapter)
15 {
16 if (is_primary_adapter(padapter)) { /* if (padapter->isprimary) */
17 padapter->hal_data_sz = sizeof(struct hal_com_data);
18 padapter->HalData = vzalloc(padapter->hal_data_sz);
19 if (!padapter->HalData)
20 return _FAIL;
21 }
22 return _SUCCESS;
23 }
24
rtw_hal_data_deinit(struct adapter * padapter)25 void rtw_hal_data_deinit(struct adapter *padapter)
26 {
27 if (is_primary_adapter(padapter)) { /* if (padapter->isprimary) */
28 if (padapter->HalData) {
29 vfree(padapter->HalData);
30 padapter->HalData = NULL;
31 padapter->hal_data_sz = 0;
32 }
33 }
34 }
35
36
dump_chip_info(struct hal_version ChipVersion)37 void dump_chip_info(struct hal_version ChipVersion)
38 {
39 char buf[128];
40 size_t cnt = 0;
41
42 cnt += scnprintf(buf + cnt, sizeof(buf) - cnt, "Chip Version Info: CHIP_8723B_%s_",
43 IS_NORMAL_CHIP(ChipVersion) ? "Normal_Chip" : "Test_Chip");
44
45 if (IS_CHIP_VENDOR_TSMC(ChipVersion))
46 cnt += scnprintf(buf + cnt, sizeof(buf) - cnt, "TSMC_");
47 else if (IS_CHIP_VENDOR_UMC(ChipVersion))
48 cnt += scnprintf(buf + cnt, sizeof(buf) - cnt, "UMC_");
49 else if (IS_CHIP_VENDOR_SMIC(ChipVersion))
50 cnt += scnprintf(buf + cnt, sizeof(buf) - cnt, "SMIC_");
51
52 if (IS_A_CUT(ChipVersion))
53 cnt += scnprintf(buf + cnt, sizeof(buf) - cnt, "A_CUT_");
54 else if (IS_B_CUT(ChipVersion))
55 cnt += scnprintf(buf + cnt, sizeof(buf) - cnt, "B_CUT_");
56 else if (IS_C_CUT(ChipVersion))
57 cnt += scnprintf(buf + cnt, sizeof(buf) - cnt, "C_CUT_");
58 else if (IS_D_CUT(ChipVersion))
59 cnt += scnprintf(buf + cnt, sizeof(buf) - cnt, "D_CUT_");
60 else if (IS_E_CUT(ChipVersion))
61 cnt += scnprintf(buf + cnt, sizeof(buf) - cnt, "E_CUT_");
62 else if (IS_I_CUT(ChipVersion))
63 cnt += scnprintf(buf + cnt, sizeof(buf) - cnt, "I_CUT_");
64 else if (IS_J_CUT(ChipVersion))
65 cnt += scnprintf(buf + cnt, sizeof(buf) - cnt, "J_CUT_");
66 else if (IS_K_CUT(ChipVersion))
67 cnt += scnprintf(buf + cnt, sizeof(buf) - cnt, "K_CUT_");
68 else
69 cnt += scnprintf(buf + cnt, sizeof(buf) - cnt,
70 "UNKNOWN_CUT(%d)_", ChipVersion.CUTVersion);
71
72 cnt += scnprintf(buf + cnt, sizeof(buf) - cnt, "1T1R_");
73
74 cnt += scnprintf(buf + cnt, sizeof(buf) - cnt, "RomVer(%d)\n", ChipVersion.ROMVer);
75 }
76
77
78 #define EEPROM_CHANNEL_PLAN_BY_HW_MASK 0x80
79
80 /*
81 * Description:
82 *Use hardware(efuse), driver parameter(registry) and default channel plan
83 *to decide which one should be used.
84 *
85 * Parameters:
86 *padapter pointer of adapter
87 *hw_channel_plan channel plan from HW (efuse/eeprom)
88 * BIT[7] software configure mode; 0:Enable, 1:disable
89 * BIT[6:0] Channel Plan
90 *sw_channel_plan channel plan from SW (registry/module param)
91 *def_channel_plan channel plan used when HW/SW both invalid
92 *AutoLoadFail efuse autoload fail or not
93 *
94 * Return:
95 *Final channel plan decision
96 *
97 */
hal_com_config_channel_plan(struct adapter * padapter,u8 hw_channel_plan,u8 sw_channel_plan,u8 def_channel_plan,bool AutoLoadFail)98 u8 hal_com_config_channel_plan(
99 struct adapter *padapter,
100 u8 hw_channel_plan,
101 u8 sw_channel_plan,
102 u8 def_channel_plan,
103 bool AutoLoadFail
104 )
105 {
106 struct hal_com_data *pHalData;
107 u8 chnlPlan;
108
109 pHalData = GET_HAL_DATA(padapter);
110 pHalData->bDisableSWChannelPlan = false;
111 chnlPlan = def_channel_plan;
112
113 if (0xFF == hw_channel_plan)
114 AutoLoadFail = true;
115
116 if (!AutoLoadFail) {
117 u8 hw_chnlPlan;
118
119 hw_chnlPlan = hw_channel_plan & (~EEPROM_CHANNEL_PLAN_BY_HW_MASK);
120 if (rtw_is_channel_plan_valid(hw_chnlPlan)) {
121 if (hw_channel_plan & EEPROM_CHANNEL_PLAN_BY_HW_MASK)
122 pHalData->bDisableSWChannelPlan = true;
123
124 chnlPlan = hw_chnlPlan;
125 }
126 }
127
128 if (
129 (false == pHalData->bDisableSWChannelPlan) &&
130 rtw_is_channel_plan_valid(sw_channel_plan)
131 )
132 chnlPlan = sw_channel_plan;
133
134 return chnlPlan;
135 }
136
HAL_IsLegalChannel(struct adapter * adapter,u32 Channel)137 bool HAL_IsLegalChannel(struct adapter *adapter, u32 Channel)
138 {
139 bool bLegalChannel = true;
140
141 if ((Channel <= 14) && (Channel >= 1)) {
142 if (is_supported_24g(adapter->registrypriv.wireless_mode) == false)
143 bLegalChannel = false;
144 } else {
145 bLegalChannel = false;
146 }
147
148 return bLegalChannel;
149 }
150
MRateToHwRate(u8 rate)151 u8 MRateToHwRate(u8 rate)
152 {
153 u8 ret = DESC_RATE1M;
154
155 switch (rate) {
156 case MGN_1M:
157 ret = DESC_RATE1M;
158 break;
159 case MGN_2M:
160 ret = DESC_RATE2M;
161 break;
162 case MGN_5_5M:
163 ret = DESC_RATE5_5M;
164 break;
165 case MGN_11M:
166 ret = DESC_RATE11M;
167 break;
168 case MGN_6M:
169 ret = DESC_RATE6M;
170 break;
171 case MGN_9M:
172 ret = DESC_RATE9M;
173 break;
174 case MGN_12M:
175 ret = DESC_RATE12M;
176 break;
177 case MGN_18M:
178 ret = DESC_RATE18M;
179 break;
180 case MGN_24M:
181 ret = DESC_RATE24M;
182 break;
183 case MGN_36M:
184 ret = DESC_RATE36M;
185 break;
186 case MGN_48M:
187 ret = DESC_RATE48M;
188 break;
189 case MGN_54M:
190 ret = DESC_RATE54M;
191 break;
192 case MGN_MCS0:
193 ret = DESC_RATEMCS0;
194 break;
195 case MGN_MCS1:
196 ret = DESC_RATEMCS1;
197 break;
198 case MGN_MCS2:
199 ret = DESC_RATEMCS2;
200 break;
201 case MGN_MCS3:
202 ret = DESC_RATEMCS3;
203 break;
204 case MGN_MCS4:
205 ret = DESC_RATEMCS4;
206 break;
207 case MGN_MCS5:
208 ret = DESC_RATEMCS5;
209 break;
210 case MGN_MCS6:
211 ret = DESC_RATEMCS6;
212 break;
213 case MGN_MCS7:
214 ret = DESC_RATEMCS7;
215 break;
216 default:
217 break;
218 }
219
220 return ret;
221 }
222
HwRateToMRate(u8 rate)223 u8 HwRateToMRate(u8 rate)
224 {
225 u8 ret_rate = MGN_1M;
226
227 switch (rate) {
228 case DESC_RATE1M:
229 ret_rate = MGN_1M;
230 break;
231 case DESC_RATE2M:
232 ret_rate = MGN_2M;
233 break;
234 case DESC_RATE5_5M:
235 ret_rate = MGN_5_5M;
236 break;
237 case DESC_RATE11M:
238 ret_rate = MGN_11M;
239 break;
240 case DESC_RATE6M:
241 ret_rate = MGN_6M;
242 break;
243 case DESC_RATE9M:
244 ret_rate = MGN_9M;
245 break;
246 case DESC_RATE12M:
247 ret_rate = MGN_12M;
248 break;
249 case DESC_RATE18M:
250 ret_rate = MGN_18M;
251 break;
252 case DESC_RATE24M:
253 ret_rate = MGN_24M;
254 break;
255 case DESC_RATE36M:
256 ret_rate = MGN_36M;
257 break;
258 case DESC_RATE48M:
259 ret_rate = MGN_48M;
260 break;
261 case DESC_RATE54M:
262 ret_rate = MGN_54M;
263 break;
264 case DESC_RATEMCS0:
265 ret_rate = MGN_MCS0;
266 break;
267 case DESC_RATEMCS1:
268 ret_rate = MGN_MCS1;
269 break;
270 case DESC_RATEMCS2:
271 ret_rate = MGN_MCS2;
272 break;
273 case DESC_RATEMCS3:
274 ret_rate = MGN_MCS3;
275 break;
276 case DESC_RATEMCS4:
277 ret_rate = MGN_MCS4;
278 break;
279 case DESC_RATEMCS5:
280 ret_rate = MGN_MCS5;
281 break;
282 case DESC_RATEMCS6:
283 ret_rate = MGN_MCS6;
284 break;
285 case DESC_RATEMCS7:
286 ret_rate = MGN_MCS7;
287 break;
288 default:
289 break;
290 }
291
292 return ret_rate;
293 }
294
HalSetBrateCfg(struct adapter * Adapter,u8 * mBratesOS,u16 * pBrateCfg)295 void HalSetBrateCfg(struct adapter *Adapter, u8 *mBratesOS, u16 *pBrateCfg)
296 {
297 u8 i, is_brate, brate;
298
299 for (i = 0; i < NDIS_802_11_LENGTH_RATES_EX; i++) {
300
301 is_brate = mBratesOS[i] & IEEE80211_BASIC_RATE_MASK;
302 brate = mBratesOS[i] & 0x7f;
303
304 if (is_brate) {
305 switch (brate) {
306 case IEEE80211_CCK_RATE_1MB:
307 *pBrateCfg |= RATE_1M;
308 break;
309 case IEEE80211_CCK_RATE_2MB:
310 *pBrateCfg |= RATE_2M;
311 break;
312 case IEEE80211_CCK_RATE_5MB:
313 *pBrateCfg |= RATE_5_5M;
314 break;
315 case IEEE80211_CCK_RATE_11MB:
316 *pBrateCfg |= RATE_11M;
317 break;
318 case IEEE80211_OFDM_RATE_6MB:
319 *pBrateCfg |= RATE_6M;
320 break;
321 case IEEE80211_OFDM_RATE_9MB:
322 *pBrateCfg |= RATE_9M;
323 break;
324 case IEEE80211_OFDM_RATE_12MB:
325 *pBrateCfg |= RATE_12M;
326 break;
327 case IEEE80211_OFDM_RATE_18MB:
328 *pBrateCfg |= RATE_18M;
329 break;
330 case IEEE80211_OFDM_RATE_24MB:
331 *pBrateCfg |= RATE_24M;
332 break;
333 case IEEE80211_OFDM_RATE_36MB:
334 *pBrateCfg |= RATE_36M;
335 break;
336 case IEEE80211_OFDM_RATE_48MB:
337 *pBrateCfg |= RATE_48M;
338 break;
339 case IEEE80211_OFDM_RATE_54MB:
340 *pBrateCfg |= RATE_54M;
341 break;
342 }
343 }
344 }
345 }
346
_OneOutPipeMapping(struct adapter * padapter)347 static void _OneOutPipeMapping(struct adapter *padapter)
348 {
349 struct dvobj_priv *pdvobjpriv = adapter_to_dvobj(padapter);
350
351 pdvobjpriv->Queue2Pipe[0] = pdvobjpriv->RtOutPipe[0];/* VO */
352 pdvobjpriv->Queue2Pipe[1] = pdvobjpriv->RtOutPipe[0];/* VI */
353 pdvobjpriv->Queue2Pipe[2] = pdvobjpriv->RtOutPipe[0];/* BE */
354 pdvobjpriv->Queue2Pipe[3] = pdvobjpriv->RtOutPipe[0];/* BK */
355
356 pdvobjpriv->Queue2Pipe[4] = pdvobjpriv->RtOutPipe[0];/* BCN */
357 pdvobjpriv->Queue2Pipe[5] = pdvobjpriv->RtOutPipe[0];/* MGT */
358 pdvobjpriv->Queue2Pipe[6] = pdvobjpriv->RtOutPipe[0];/* HIGH */
359 pdvobjpriv->Queue2Pipe[7] = pdvobjpriv->RtOutPipe[0];/* TXCMD */
360 }
361
_TwoOutPipeMapping(struct adapter * padapter,bool bWIFICfg)362 static void _TwoOutPipeMapping(struct adapter *padapter, bool bWIFICfg)
363 {
364 struct dvobj_priv *pdvobjpriv = adapter_to_dvobj(padapter);
365
366 if (bWIFICfg) { /* WMM */
367
368 /* BK, BE, VI, VO, BCN, CMD, MGT, HIGH, HCCA */
369 /* 0, 1, 0, 1, 0, 0, 0, 0, 0 }; */
370 /* 0:ep_0 num, 1:ep_1 num */
371
372 pdvobjpriv->Queue2Pipe[0] = pdvobjpriv->RtOutPipe[1];/* VO */
373 pdvobjpriv->Queue2Pipe[1] = pdvobjpriv->RtOutPipe[0];/* VI */
374 pdvobjpriv->Queue2Pipe[2] = pdvobjpriv->RtOutPipe[1];/* BE */
375 pdvobjpriv->Queue2Pipe[3] = pdvobjpriv->RtOutPipe[0];/* BK */
376
377 pdvobjpriv->Queue2Pipe[4] = pdvobjpriv->RtOutPipe[0];/* BCN */
378 pdvobjpriv->Queue2Pipe[5] = pdvobjpriv->RtOutPipe[0];/* MGT */
379 pdvobjpriv->Queue2Pipe[6] = pdvobjpriv->RtOutPipe[0];/* HIGH */
380 pdvobjpriv->Queue2Pipe[7] = pdvobjpriv->RtOutPipe[0];/* TXCMD */
381
382 } else { /* typical setting */
383
384
385 /* BK, BE, VI, VO, BCN, CMD, MGT, HIGH, HCCA */
386 /* 1, 1, 0, 0, 0, 0, 0, 0, 0 }; */
387 /* 0:ep_0 num, 1:ep_1 num */
388
389 pdvobjpriv->Queue2Pipe[0] = pdvobjpriv->RtOutPipe[0];/* VO */
390 pdvobjpriv->Queue2Pipe[1] = pdvobjpriv->RtOutPipe[0];/* VI */
391 pdvobjpriv->Queue2Pipe[2] = pdvobjpriv->RtOutPipe[1];/* BE */
392 pdvobjpriv->Queue2Pipe[3] = pdvobjpriv->RtOutPipe[1];/* BK */
393
394 pdvobjpriv->Queue2Pipe[4] = pdvobjpriv->RtOutPipe[0];/* BCN */
395 pdvobjpriv->Queue2Pipe[5] = pdvobjpriv->RtOutPipe[0];/* MGT */
396 pdvobjpriv->Queue2Pipe[6] = pdvobjpriv->RtOutPipe[0];/* HIGH */
397 pdvobjpriv->Queue2Pipe[7] = pdvobjpriv->RtOutPipe[0];/* TXCMD */
398
399 }
400
401 }
402
_ThreeOutPipeMapping(struct adapter * padapter,bool bWIFICfg)403 static void _ThreeOutPipeMapping(struct adapter *padapter, bool bWIFICfg)
404 {
405 struct dvobj_priv *pdvobjpriv = adapter_to_dvobj(padapter);
406
407 if (bWIFICfg) { /* for WMM */
408
409 /* BK, BE, VI, VO, BCN, CMD, MGT, HIGH, HCCA */
410 /* 1, 2, 1, 0, 0, 0, 0, 0, 0 }; */
411 /* 0:H, 1:N, 2:L */
412
413 pdvobjpriv->Queue2Pipe[0] = pdvobjpriv->RtOutPipe[0];/* VO */
414 pdvobjpriv->Queue2Pipe[1] = pdvobjpriv->RtOutPipe[1];/* VI */
415 pdvobjpriv->Queue2Pipe[2] = pdvobjpriv->RtOutPipe[2];/* BE */
416 pdvobjpriv->Queue2Pipe[3] = pdvobjpriv->RtOutPipe[1];/* BK */
417
418 pdvobjpriv->Queue2Pipe[4] = pdvobjpriv->RtOutPipe[0];/* BCN */
419 pdvobjpriv->Queue2Pipe[5] = pdvobjpriv->RtOutPipe[0];/* MGT */
420 pdvobjpriv->Queue2Pipe[6] = pdvobjpriv->RtOutPipe[0];/* HIGH */
421 pdvobjpriv->Queue2Pipe[7] = pdvobjpriv->RtOutPipe[0];/* TXCMD */
422
423 } else { /* typical setting */
424
425
426 /* BK, BE, VI, VO, BCN, CMD, MGT, HIGH, HCCA */
427 /* 2, 2, 1, 0, 0, 0, 0, 0, 0 }; */
428 /* 0:H, 1:N, 2:L */
429
430 pdvobjpriv->Queue2Pipe[0] = pdvobjpriv->RtOutPipe[0];/* VO */
431 pdvobjpriv->Queue2Pipe[1] = pdvobjpriv->RtOutPipe[1];/* VI */
432 pdvobjpriv->Queue2Pipe[2] = pdvobjpriv->RtOutPipe[2];/* BE */
433 pdvobjpriv->Queue2Pipe[3] = pdvobjpriv->RtOutPipe[2];/* BK */
434
435 pdvobjpriv->Queue2Pipe[4] = pdvobjpriv->RtOutPipe[0];/* BCN */
436 pdvobjpriv->Queue2Pipe[5] = pdvobjpriv->RtOutPipe[0];/* MGT */
437 pdvobjpriv->Queue2Pipe[6] = pdvobjpriv->RtOutPipe[0];/* HIGH */
438 pdvobjpriv->Queue2Pipe[7] = pdvobjpriv->RtOutPipe[0];/* TXCMD */
439 }
440
441 }
442
Hal_MappingOutPipe(struct adapter * padapter,u8 NumOutPipe)443 bool Hal_MappingOutPipe(struct adapter *padapter, u8 NumOutPipe)
444 {
445 struct registry_priv *pregistrypriv = &padapter->registrypriv;
446
447 bool bWIFICfg = (pregistrypriv->wifi_spec) ? true : false;
448
449 bool result = true;
450
451 switch (NumOutPipe) {
452 case 2:
453 _TwoOutPipeMapping(padapter, bWIFICfg);
454 break;
455 case 3:
456 case 4:
457 _ThreeOutPipeMapping(padapter, bWIFICfg);
458 break;
459 case 1:
460 _OneOutPipeMapping(padapter);
461 break;
462 default:
463 result = false;
464 break;
465 }
466
467 return result;
468
469 }
470
hal_init_macaddr(struct adapter * adapter)471 void hal_init_macaddr(struct adapter *adapter)
472 {
473 rtw_hal_set_hwreg(adapter, HW_VAR_MAC_ADDR, adapter->eeprompriv.mac_addr);
474 }
475
rtw_init_hal_com_default_value(struct adapter * Adapter)476 void rtw_init_hal_com_default_value(struct adapter *Adapter)
477 {
478 struct hal_com_data *pHalData = GET_HAL_DATA(Adapter);
479
480 pHalData->AntDetection = 1;
481 }
482
483 /*
484 * C2H event format:
485 * Field TRIGGER CONTENT CMD_SEQ CMD_LEN CMD_ID
486 * BITS [127:120] [119:16] [15:8] [7:4] [3:0]
487 */
488
c2h_evt_clear(struct adapter * adapter)489 void c2h_evt_clear(struct adapter *adapter)
490 {
491 rtw_write8(adapter, REG_C2HEVT_CLEAR, C2H_EVT_HOST_CLOSE);
492 }
493
494 /*
495 * C2H event format:
496 * Field TRIGGER CMD_LEN CONTENT CMD_SEQ CMD_ID
497 * BITS [127:120] [119:112] [111:16] [15:8] [7:0]
498 */
c2h_evt_read_88xx(struct adapter * adapter,u8 * buf)499 s32 c2h_evt_read_88xx(struct adapter *adapter, u8 *buf)
500 {
501 s32 ret = _FAIL;
502 struct c2h_evt_hdr_88xx *c2h_evt;
503 int i;
504 u8 trigger;
505
506 if (!buf)
507 goto exit;
508
509 trigger = rtw_read8(adapter, REG_C2HEVT_CLEAR);
510
511 if (trigger == C2H_EVT_HOST_CLOSE)
512 goto exit; /* Not ready */
513 else if (trigger != C2H_EVT_FW_CLOSE)
514 goto clear_evt; /* Not a valid value */
515
516 c2h_evt = (struct c2h_evt_hdr_88xx *)buf;
517
518 memset(c2h_evt, 0, 16);
519
520 c2h_evt->id = rtw_read8(adapter, REG_C2HEVT_MSG_NORMAL);
521 c2h_evt->seq = rtw_read8(adapter, REG_C2HEVT_CMD_SEQ_88XX);
522 c2h_evt->plen = rtw_read8(adapter, REG_C2HEVT_CMD_LEN_88XX);
523
524 /* Read the content */
525 for (i = 0; i < c2h_evt->plen; i++)
526 c2h_evt->payload[i] = rtw_read8(adapter, REG_C2HEVT_MSG_NORMAL + 2 + i);
527
528 ret = _SUCCESS;
529
530 clear_evt:
531 /*
532 * Clear event to notify FW we have read the command.
533 * If this field isn't clear, the FW won't update the next command message.
534 */
535 c2h_evt_clear(adapter);
536 exit:
537 return ret;
538 }
539
rtw_get_mgntframe_raid(struct adapter * adapter,unsigned char network_type)540 u8 rtw_get_mgntframe_raid(struct adapter *adapter, unsigned char network_type)
541 {
542 return (network_type & WIRELESS_11B) ? RATEID_IDX_B : RATEID_IDX_G;
543 }
544
rtw_hal_update_sta_rate_mask(struct adapter * padapter,struct sta_info * psta)545 void rtw_hal_update_sta_rate_mask(struct adapter *padapter, struct sta_info *psta)
546 {
547 u8 i, limit;
548 u32 tx_ra_bitmap;
549
550 if (!psta)
551 return;
552
553 tx_ra_bitmap = 0;
554
555 /* b/g mode ra_bitmap */
556 for (i = 0; i < sizeof(psta->bssrateset); i++) {
557 if (psta->bssrateset[i])
558 tx_ra_bitmap |= rtw_get_bit_value_from_ieee_value(psta->bssrateset[i]&0x7f);
559 }
560
561 /* n mode ra_bitmap */
562 if (psta->htpriv.ht_option) {
563 limit = 8; /* 1R */
564
565 for (i = 0; i < limit; i++) {
566 if (psta->htpriv.ht_cap.mcs.rx_mask[i/8] & BIT(i%8))
567 tx_ra_bitmap |= BIT(i+12);
568 }
569 }
570
571 psta->ra_mask = tx_ra_bitmap;
572 psta->init_rate = get_highest_rate_idx(tx_ra_bitmap)&0x3f;
573 }
574
hw_var_port_switch(struct adapter * adapter)575 void hw_var_port_switch(struct adapter *adapter)
576 {
577 }
578
SetHwReg(struct adapter * adapter,u8 variable,u8 * val)579 void SetHwReg(struct adapter *adapter, u8 variable, u8 *val)
580 {
581 struct hal_com_data *hal_data = GET_HAL_DATA(adapter);
582 struct dm_odm_t *odm = &(hal_data->odmpriv);
583
584 switch (variable) {
585 case HW_VAR_PORT_SWITCH:
586 hw_var_port_switch(adapter);
587 break;
588 case HW_VAR_INIT_RTS_RATE:
589 rtw_warn_on(1);
590 break;
591 case HW_VAR_SEC_CFG:
592 {
593 u16 reg_scr;
594
595 reg_scr = rtw_read16(adapter, REG_SECCFG);
596 rtw_write16(adapter, REG_SECCFG, reg_scr|SCR_CHK_KEYID|SCR_RxDecEnable|SCR_TxEncEnable);
597 }
598 break;
599 case HW_VAR_SEC_DK_CFG:
600 {
601 struct security_priv *sec = &adapter->securitypriv;
602 u8 reg_scr = rtw_read8(adapter, REG_SECCFG);
603
604 if (val) { /* Enable default key related setting */
605 reg_scr |= SCR_TXBCUSEDK;
606 if (sec->dot11AuthAlgrthm != dot11AuthAlgrthm_8021X)
607 reg_scr |= (SCR_RxUseDK|SCR_TxUseDK);
608 } else /* Disable default key related setting */
609 reg_scr &= ~(SCR_RXBCUSEDK|SCR_TXBCUSEDK|SCR_RxUseDK|SCR_TxUseDK);
610
611 rtw_write8(adapter, REG_SECCFG, reg_scr);
612 }
613 break;
614 case HW_VAR_DM_FLAG:
615 odm->SupportAbility = *((u32 *)val);
616 break;
617 case HW_VAR_DM_FUNC_OP:
618 if (*((u8 *)val) == true) {
619 /* save dm flag */
620 odm->BK_SupportAbility = odm->SupportAbility;
621 } else {
622 /* restore dm flag */
623 odm->SupportAbility = odm->BK_SupportAbility;
624 }
625 break;
626 case HW_VAR_DM_FUNC_SET:
627 if (*((u32 *)val) == DYNAMIC_ALL_FUNC_ENABLE) {
628 struct dm_priv *dm = &hal_data->dmpriv;
629 dm->DMFlag = dm->InitDMFlag;
630 odm->SupportAbility = dm->InitODMFlag;
631 } else {
632 odm->SupportAbility |= *((u32 *)val);
633 }
634 break;
635 case HW_VAR_DM_FUNC_CLR:
636 /*
637 * input is already a mask to clear function
638 * don't invert it again! George, Lucas@20130513
639 */
640 odm->SupportAbility &= *((u32 *)val);
641 break;
642 case HW_VAR_AMPDU_MIN_SPACE:
643 /* TODO - Is something needed here? */
644 break;
645 case HW_VAR_WIRELESS_MODE:
646 /* TODO - Is something needed here? */
647 break;
648 default:
649 netdev_dbg(adapter->pnetdev,
650 FUNC_ADPT_FMT " variable(%d) not defined!\n",
651 FUNC_ADPT_ARG(adapter), variable);
652 break;
653 }
654 }
655
GetHwReg(struct adapter * adapter,u8 variable,u8 * val)656 void GetHwReg(struct adapter *adapter, u8 variable, u8 *val)
657 {
658 struct hal_com_data *hal_data = GET_HAL_DATA(adapter);
659 struct dm_odm_t *odm = &(hal_data->odmpriv);
660
661 switch (variable) {
662 case HW_VAR_BASIC_RATE:
663 *((u16 *)val) = hal_data->BasicRateSet;
664 break;
665 case HW_VAR_DM_FLAG:
666 *((u32 *)val) = odm->SupportAbility;
667 break;
668 default:
669 netdev_dbg(adapter->pnetdev,
670 FUNC_ADPT_FMT " variable(%d) not defined!\n",
671 FUNC_ADPT_ARG(adapter), variable);
672 break;
673 }
674 }
675
676
677
678
SetHalDefVar(struct adapter * adapter,enum hal_def_variable variable,void * value)679 u8 SetHalDefVar(
680 struct adapter *adapter, enum hal_def_variable variable, void *value
681 )
682 {
683 struct hal_com_data *hal_data = GET_HAL_DATA(adapter);
684 struct dm_odm_t *odm = &(hal_data->odmpriv);
685 u8 bResult = _SUCCESS;
686
687 switch (variable) {
688 case HAL_DEF_DBG_RX_INFO_DUMP:
689
690 if (odm->bLinked) {
691 #ifdef DBG_RX_SIGNAL_DISPLAY_RAW_DATA
692 rtw_dump_raw_rssi_info(adapter);
693 #endif
694 }
695 break;
696 case HW_DEF_ODM_DBG_FLAG:
697 ODM_CmnInfoUpdate(odm, ODM_CMNINFO_DBG_COMP, *((u64 *)value));
698 break;
699 case HW_DEF_ODM_DBG_LEVEL:
700 ODM_CmnInfoUpdate(odm, ODM_CMNINFO_DBG_LEVEL, *((u32 *)value));
701 break;
702 case HAL_DEF_DBG_DM_FUNC:
703 {
704 u8 dm_func = *((u8 *)value);
705 struct dm_priv *dm = &hal_data->dmpriv;
706
707 if (dm_func == 0) { /* disable all dynamic func */
708 odm->SupportAbility = DYNAMIC_FUNC_DISABLE;
709 } else if (dm_func == 1) {/* disable DIG */
710 odm->SupportAbility &= (~DYNAMIC_BB_DIG);
711 } else if (dm_func == 2) {/* disable High power */
712 odm->SupportAbility &= (~DYNAMIC_BB_DYNAMIC_TXPWR);
713 } else if (dm_func == 3) {/* disable tx power tracking */
714 odm->SupportAbility &= (~DYNAMIC_RF_CALIBRATION);
715 } else if (dm_func == 4) {/* disable BT coexistence */
716 dm->DMFlag &= (~DYNAMIC_FUNC_BT);
717 } else if (dm_func == 5) {/* disable antenna diversity */
718 odm->SupportAbility &= (~DYNAMIC_BB_ANT_DIV);
719 } else if (dm_func == 6) {/* turn on all dynamic func */
720 if (!(odm->SupportAbility & DYNAMIC_BB_DIG)) {
721 struct dig_t *pDigTable = &odm->DM_DigTable;
722 pDigTable->CurIGValue = rtw_read8(adapter, 0xc50);
723 }
724 dm->DMFlag |= DYNAMIC_FUNC_BT;
725 odm->SupportAbility = DYNAMIC_ALL_FUNC_ENABLE;
726 }
727 }
728 break;
729 case HAL_DEF_DBG_DUMP_RXPKT:
730 hal_data->bDumpRxPkt = *((u8 *)value);
731 break;
732 case HAL_DEF_DBG_DUMP_TXPKT:
733 hal_data->bDumpTxPkt = *((u8 *)value);
734 break;
735 case HAL_DEF_ANT_DETECT:
736 hal_data->AntDetection = *((u8 *)value);
737 break;
738 default:
739 netdev_dbg(adapter->pnetdev,
740 "%s: [WARNING] HAL_DEF_VARIABLE(%d) not defined!\n",
741 __func__, variable);
742 bResult = _FAIL;
743 break;
744 }
745
746 return bResult;
747 }
748
GetHalDefVar(struct adapter * adapter,enum hal_def_variable variable,void * value)749 u8 GetHalDefVar(
750 struct adapter *adapter, enum hal_def_variable variable, void *value
751 )
752 {
753 struct hal_com_data *hal_data = GET_HAL_DATA(adapter);
754 u8 bResult = _SUCCESS;
755
756 switch (variable) {
757 case HAL_DEF_UNDERCORATEDSMOOTHEDPWDB:
758 {
759 struct mlme_priv *pmlmepriv;
760 struct sta_priv *pstapriv;
761 struct sta_info *psta;
762
763 pmlmepriv = &adapter->mlmepriv;
764 pstapriv = &adapter->stapriv;
765 psta = rtw_get_stainfo(pstapriv, pmlmepriv->cur_network.network.mac_address);
766 if (psta)
767 *((int *)value) = psta->rssi_stat.UndecoratedSmoothedPWDB;
768 }
769 break;
770 case HAL_DEF_DBG_DM_FUNC:
771 *((u32 *)value) = hal_data->odmpriv.SupportAbility;
772 break;
773 case HAL_DEF_DBG_DUMP_RXPKT:
774 *((u8 *)value) = hal_data->bDumpRxPkt;
775 break;
776 case HAL_DEF_DBG_DUMP_TXPKT:
777 *((u8 *)value) = hal_data->bDumpTxPkt;
778 break;
779 case HAL_DEF_ANT_DETECT:
780 *((u8 *)value) = hal_data->AntDetection;
781 break;
782 case HAL_DEF_MACID_SLEEP:
783 *(u8 *)value = false;
784 break;
785 case HAL_DEF_TX_PAGE_SIZE:
786 *((u32 *)value) = PAGE_SIZE_128;
787 break;
788 default:
789 netdev_dbg(adapter->pnetdev,
790 "%s: [WARNING] HAL_DEF_VARIABLE(%d) not defined!\n",
791 __func__, variable);
792 bResult = _FAIL;
793 break;
794 }
795
796 return bResult;
797 }
798
GetHalODMVar(struct adapter * Adapter,enum hal_odm_variable eVariable,void * pValue1,void * pValue2)799 void GetHalODMVar(
800 struct adapter *Adapter,
801 enum hal_odm_variable eVariable,
802 void *pValue1,
803 void *pValue2
804 )
805 {
806 switch (eVariable) {
807 default:
808 break;
809 }
810 }
811
SetHalODMVar(struct adapter * Adapter,enum hal_odm_variable eVariable,void * pValue1,bool bSet)812 void SetHalODMVar(
813 struct adapter *Adapter,
814 enum hal_odm_variable eVariable,
815 void *pValue1,
816 bool bSet
817 )
818 {
819 struct hal_com_data *pHalData = GET_HAL_DATA(Adapter);
820 struct dm_odm_t *podmpriv = &pHalData->odmpriv;
821 /* _irqL irqL; */
822 switch (eVariable) {
823 case HAL_ODM_STA_INFO:
824 {
825 struct sta_info *psta = pValue1;
826 if (bSet) {
827 ODM_CmnInfoPtrArrayHook(podmpriv, ODM_CMNINFO_STA_STATUS, psta->mac_id, psta);
828 } else {
829 /* spin_lock_bh(&pHalData->odm_stainfo_lock); */
830 ODM_CmnInfoPtrArrayHook(podmpriv, ODM_CMNINFO_STA_STATUS, psta->mac_id, NULL);
831
832 /* spin_unlock_bh(&pHalData->odm_stainfo_lock); */
833 }
834 }
835 break;
836 case HAL_ODM_P2P_STATE:
837 ODM_CmnInfoUpdate(podmpriv, ODM_CMNINFO_WIFI_DIRECT, bSet);
838 break;
839 case HAL_ODM_WIFI_DISPLAY_STATE:
840 ODM_CmnInfoUpdate(podmpriv, ODM_CMNINFO_WIFI_DISPLAY, bSet);
841 break;
842
843 default:
844 break;
845 }
846 }
847
848
eqNByte(u8 * str1,u8 * str2,u32 num)849 bool eqNByte(u8 *str1, u8 *str2, u32 num)
850 {
851 if (num == 0)
852 return false;
853 while (num > 0) {
854 num--;
855 if (str1[num] != str2[num])
856 return false;
857 }
858 return true;
859 }
860
GetU1ByteIntegerFromStringInDecimal(char * Str,u8 * pInt)861 bool GetU1ByteIntegerFromStringInDecimal(char *Str, u8 *pInt)
862 {
863 u16 i = 0;
864 *pInt = 0;
865
866 while (Str[i] != '\0') {
867 if (Str[i] >= '0' && Str[i] <= '9') {
868 *pInt *= 10;
869 *pInt += (Str[i] - '0');
870 } else
871 return false;
872
873 ++i;
874 }
875
876 return true;
877 }
878
rtw_hal_check_rxfifo_full(struct adapter * adapter)879 void rtw_hal_check_rxfifo_full(struct adapter *adapter)
880 {
881 struct dvobj_priv *psdpriv = adapter->dvobj;
882 struct debug_priv *pdbgpriv = &psdpriv->drv_dbg;
883 int save_cnt = false;
884
885 /* switch counter to RX fifo */
886 /* printk("8723b or 8192e , MAC_667 set 0xf0\n"); */
887 rtw_write8(adapter, REG_RXERR_RPT+3, rtw_read8(adapter, REG_RXERR_RPT+3)|0xf0);
888 save_cnt = true;
889 /* todo: other chips */
890
891 if (save_cnt) {
892 /* rtw_write8(adapter, REG_RXERR_RPT+3, rtw_read8(adapter, REG_RXERR_RPT+3)|0xa0); */
893 pdbgpriv->dbg_rx_fifo_last_overflow = pdbgpriv->dbg_rx_fifo_curr_overflow;
894 pdbgpriv->dbg_rx_fifo_curr_overflow = rtw_read16(adapter, REG_RXERR_RPT);
895 pdbgpriv->dbg_rx_fifo_diff_overflow = pdbgpriv->dbg_rx_fifo_curr_overflow-pdbgpriv->dbg_rx_fifo_last_overflow;
896 }
897 }
898
899 #ifdef DBG_RX_SIGNAL_DISPLAY_RAW_DATA
rtw_dump_raw_rssi_info(struct adapter * padapter)900 void rtw_dump_raw_rssi_info(struct adapter *padapter)
901 {
902 u8 isCCKrate, rf_path;
903 struct hal_com_data *pHalData = GET_HAL_DATA(padapter);
904 struct rx_raw_rssi *psample_pkt_rssi = &padapter->recvpriv.raw_rssi_info;
905
906 isCCKrate = psample_pkt_rssi->data_rate <= DESC_RATE11M;
907
908 if (isCCKrate)
909 psample_pkt_rssi->mimo_signal_strength[0] = psample_pkt_rssi->pwdball;
910
911 for (rf_path = 0; rf_path < pHalData->NumTotalRFPath; rf_path++) {
912 if (!isCCKrate) {
913 printk(", rx_ofdm_pwr:%d(dBm), rx_ofdm_snr:%d(dB)\n",
914 psample_pkt_rssi->ofdm_pwr[rf_path], psample_pkt_rssi->ofdm_snr[rf_path]);
915 } else {
916 printk("\n");
917 }
918 }
919 }
920
rtw_store_phy_info(struct adapter * padapter,union recv_frame * prframe)921 void rtw_store_phy_info(struct adapter *padapter, union recv_frame *prframe)
922 {
923 u8 isCCKrate, rf_path;
924 struct hal_com_data *pHalData = GET_HAL_DATA(padapter);
925 struct rx_pkt_attrib *pattrib = &prframe->u.hdr.attrib;
926
927 struct odm_phy_info *pPhyInfo = (PODM_PHY_INFO_T)(&pattrib->phy_info);
928 struct rx_raw_rssi *psample_pkt_rssi = &padapter->recvpriv.raw_rssi_info;
929
930 psample_pkt_rssi->data_rate = pattrib->data_rate;
931 isCCKrate = pattrib->data_rate <= DESC_RATE11M;
932
933 psample_pkt_rssi->pwdball = pPhyInfo->rx_pwd_ba11;
934 psample_pkt_rssi->pwr_all = pPhyInfo->recv_signal_power;
935
936 for (rf_path = 0; rf_path < pHalData->NumTotalRFPath; rf_path++) {
937 psample_pkt_rssi->mimo_signal_strength[rf_path] = pPhyInfo->rx_mimo_signal_strength[rf_path];
938 psample_pkt_rssi->mimo_signal_quality[rf_path] = pPhyInfo->rx_mimo_signal_quality[rf_path];
939 if (!isCCKrate) {
940 psample_pkt_rssi->ofdm_pwr[rf_path] = pPhyInfo->RxPwr[rf_path];
941 psample_pkt_rssi->ofdm_snr[rf_path] = pPhyInfo->RxSNR[rf_path];
942 }
943 }
944 }
945 #endif
946
947 static u32 Array_kfreemap[] = {
948 0xf8, 0xe,
949 0xf6, 0xc,
950 0xf4, 0xa,
951 0xf2, 0x8,
952 0xf0, 0x6,
953 0xf3, 0x4,
954 0xf5, 0x2,
955 0xf7, 0x0,
956 0xf9, 0x0,
957 0xfc, 0x0,
958 };
959
rtw_bb_rf_gain_offset(struct adapter * padapter)960 void rtw_bb_rf_gain_offset(struct adapter *padapter)
961 {
962 u8 value = padapter->eeprompriv.EEPROMRFGainOffset;
963 u32 res, i = 0;
964 u32 *Array = Array_kfreemap;
965 u32 v1 = 0, v2 = 0, target = 0;
966
967 if (value & BIT4) {
968 if (padapter->eeprompriv.EEPROMRFGainVal != 0xff) {
969 res = rtw_hal_read_rfreg(padapter, RF_PATH_A, 0x7f, 0xffffffff);
970 res &= 0xfff87fff;
971 /* res &= 0xfff87fff; */
972 for (i = 0; i < ARRAY_SIZE(Array_kfreemap); i += 2) {
973 v1 = Array[i];
974 v2 = Array[i+1];
975 if (v1 == padapter->eeprompriv.EEPROMRFGainVal) {
976 target = v2;
977 break;
978 }
979 }
980 PHY_SetRFReg(padapter, RF_PATH_A, REG_RF_BB_GAIN_OFFSET, BIT18|BIT17|BIT16|BIT15, target);
981
982 /* res |= (padapter->eeprompriv.EEPROMRFGainVal & 0x0f)<< 15; */
983 /* rtw_hal_write_rfreg(padapter, RF_PATH_A, REG_RF_BB_GAIN_OFFSET, RF_GAIN_OFFSET_MASK, res); */
984 res = rtw_hal_read_rfreg(padapter, RF_PATH_A, 0x7f, 0xffffffff);
985 }
986 }
987 }
988