1 // SPDX-License-Identifier: GPL-2.0-only
2 /*
3  * Qualcomm ADSP/SLPI Peripheral Image Loader for MSM8974 and MSM8996
4  *
5  * Copyright (C) 2016 Linaro Ltd
6  * Copyright (C) 2014 Sony Mobile Communications AB
7  * Copyright (c) 2012-2013, The Linux Foundation. All rights reserved.
8  */
9 
10 #include <linux/clk.h>
11 #include <linux/delay.h>
12 #include <linux/firmware.h>
13 #include <linux/interrupt.h>
14 #include <linux/kernel.h>
15 #include <linux/module.h>
16 #include <linux/of.h>
17 #include <linux/of_address.h>
18 #include <linux/of_reserved_mem.h>
19 #include <linux/platform_device.h>
20 #include <linux/pm_domain.h>
21 #include <linux/pm_runtime.h>
22 #include <linux/firmware/qcom/qcom_scm.h>
23 #include <linux/regulator/consumer.h>
24 #include <linux/remoteproc.h>
25 #include <linux/soc/qcom/mdt_loader.h>
26 #include <linux/soc/qcom/smem.h>
27 #include <linux/soc/qcom/smem_state.h>
28 
29 #include "qcom_common.h"
30 #include "qcom_pil_info.h"
31 #include "qcom_q6v5.h"
32 #include "remoteproc_internal.h"
33 
34 #define ADSP_DECRYPT_SHUTDOWN_DELAY_MS	100
35 
36 #define MAX_ASSIGN_COUNT 3
37 
38 struct adsp_data {
39 	int crash_reason_smem;
40 	const char *firmware_name;
41 	const char *dtb_firmware_name;
42 	int pas_id;
43 	int dtb_pas_id;
44 	int lite_pas_id;
45 	unsigned int minidump_id;
46 	bool auto_boot;
47 	bool decrypt_shutdown;
48 
49 	char **proxy_pd_names;
50 
51 	const char *load_state;
52 	const char *ssr_name;
53 	const char *sysmon_name;
54 	int ssctl_id;
55 	unsigned int smem_host_id;
56 
57 	int region_assign_idx;
58 	int region_assign_count;
59 	bool region_assign_shared;
60 	int region_assign_vmid;
61 };
62 
63 struct qcom_adsp {
64 	struct device *dev;
65 	struct rproc *rproc;
66 
67 	struct qcom_q6v5 q6v5;
68 
69 	struct clk *xo;
70 	struct clk *aggre2_clk;
71 
72 	struct regulator *cx_supply;
73 	struct regulator *px_supply;
74 
75 	struct device *proxy_pds[3];
76 
77 	int proxy_pd_count;
78 
79 	const char *dtb_firmware_name;
80 	int pas_id;
81 	int dtb_pas_id;
82 	int lite_pas_id;
83 	unsigned int minidump_id;
84 	int crash_reason_smem;
85 	unsigned int smem_host_id;
86 	bool decrypt_shutdown;
87 	const char *info_name;
88 
89 	const struct firmware *firmware;
90 	const struct firmware *dtb_firmware;
91 
92 	struct completion start_done;
93 	struct completion stop_done;
94 
95 	phys_addr_t mem_phys;
96 	phys_addr_t dtb_mem_phys;
97 	phys_addr_t mem_reloc;
98 	phys_addr_t dtb_mem_reloc;
99 	phys_addr_t region_assign_phys[MAX_ASSIGN_COUNT];
100 	void *mem_region;
101 	void *dtb_mem_region;
102 	size_t mem_size;
103 	size_t dtb_mem_size;
104 	size_t region_assign_size[MAX_ASSIGN_COUNT];
105 
106 	int region_assign_idx;
107 	int region_assign_count;
108 	bool region_assign_shared;
109 	int region_assign_vmid;
110 	u64 region_assign_owners[MAX_ASSIGN_COUNT];
111 
112 	struct qcom_rproc_glink glink_subdev;
113 	struct qcom_rproc_subdev smd_subdev;
114 	struct qcom_rproc_pdm pdm_subdev;
115 	struct qcom_rproc_ssr ssr_subdev;
116 	struct qcom_sysmon *sysmon;
117 
118 	struct qcom_scm_pas_metadata pas_metadata;
119 	struct qcom_scm_pas_metadata dtb_pas_metadata;
120 };
121 
adsp_segment_dump(struct rproc * rproc,struct rproc_dump_segment * segment,void * dest,size_t offset,size_t size)122 static void adsp_segment_dump(struct rproc *rproc, struct rproc_dump_segment *segment,
123 		       void *dest, size_t offset, size_t size)
124 {
125 	struct qcom_adsp *adsp = rproc->priv;
126 	int total_offset;
127 
128 	total_offset = segment->da + segment->offset + offset - adsp->mem_phys;
129 	if (total_offset < 0 || total_offset + size > adsp->mem_size) {
130 		dev_err(adsp->dev,
131 			"invalid copy request for segment %pad with offset %zu and size %zu)\n",
132 			&segment->da, offset, size);
133 		memset(dest, 0xff, size);
134 		return;
135 	}
136 
137 	memcpy_fromio(dest, adsp->mem_region + total_offset, size);
138 }
139 
adsp_minidump(struct rproc * rproc)140 static void adsp_minidump(struct rproc *rproc)
141 {
142 	struct qcom_adsp *adsp = rproc->priv;
143 
144 	if (rproc->dump_conf == RPROC_COREDUMP_DISABLED)
145 		return;
146 
147 	qcom_minidump(rproc, adsp->minidump_id, adsp_segment_dump);
148 }
149 
adsp_pds_enable(struct qcom_adsp * adsp,struct device ** pds,size_t pd_count)150 static int adsp_pds_enable(struct qcom_adsp *adsp, struct device **pds,
151 			   size_t pd_count)
152 {
153 	int ret;
154 	int i;
155 
156 	for (i = 0; i < pd_count; i++) {
157 		dev_pm_genpd_set_performance_state(pds[i], INT_MAX);
158 		ret = pm_runtime_get_sync(pds[i]);
159 		if (ret < 0) {
160 			pm_runtime_put_noidle(pds[i]);
161 			dev_pm_genpd_set_performance_state(pds[i], 0);
162 			goto unroll_pd_votes;
163 		}
164 	}
165 
166 	return 0;
167 
168 unroll_pd_votes:
169 	for (i--; i >= 0; i--) {
170 		dev_pm_genpd_set_performance_state(pds[i], 0);
171 		pm_runtime_put(pds[i]);
172 	}
173 
174 	return ret;
175 };
176 
adsp_pds_disable(struct qcom_adsp * adsp,struct device ** pds,size_t pd_count)177 static void adsp_pds_disable(struct qcom_adsp *adsp, struct device **pds,
178 			     size_t pd_count)
179 {
180 	int i;
181 
182 	for (i = 0; i < pd_count; i++) {
183 		dev_pm_genpd_set_performance_state(pds[i], 0);
184 		pm_runtime_put(pds[i]);
185 	}
186 }
187 
adsp_shutdown_poll_decrypt(struct qcom_adsp * adsp)188 static int adsp_shutdown_poll_decrypt(struct qcom_adsp *adsp)
189 {
190 	unsigned int retry_num = 50;
191 	int ret;
192 
193 	do {
194 		msleep(ADSP_DECRYPT_SHUTDOWN_DELAY_MS);
195 		ret = qcom_scm_pas_shutdown(adsp->pas_id);
196 	} while (ret == -EINVAL && --retry_num);
197 
198 	return ret;
199 }
200 
adsp_unprepare(struct rproc * rproc)201 static int adsp_unprepare(struct rproc *rproc)
202 {
203 	struct qcom_adsp *adsp = rproc->priv;
204 
205 	/*
206 	 * adsp_load() did pass pas_metadata to the SCM driver for storing
207 	 * metadata context. It might have been released already if
208 	 * auth_and_reset() was successful, but in other cases clean it up
209 	 * here.
210 	 */
211 	qcom_scm_pas_metadata_release(&adsp->pas_metadata);
212 	if (adsp->dtb_pas_id)
213 		qcom_scm_pas_metadata_release(&adsp->dtb_pas_metadata);
214 
215 	return 0;
216 }
217 
adsp_load(struct rproc * rproc,const struct firmware * fw)218 static int adsp_load(struct rproc *rproc, const struct firmware *fw)
219 {
220 	struct qcom_adsp *adsp = rproc->priv;
221 	int ret;
222 
223 	/* Store firmware handle to be used in adsp_start() */
224 	adsp->firmware = fw;
225 
226 	if (adsp->lite_pas_id)
227 		ret = qcom_scm_pas_shutdown(adsp->lite_pas_id);
228 
229 	if (adsp->dtb_pas_id) {
230 		ret = request_firmware(&adsp->dtb_firmware, adsp->dtb_firmware_name, adsp->dev);
231 		if (ret) {
232 			dev_err(adsp->dev, "request_firmware failed for %s: %d\n",
233 				adsp->dtb_firmware_name, ret);
234 			return ret;
235 		}
236 
237 		ret = qcom_mdt_pas_init(adsp->dev, adsp->dtb_firmware, adsp->dtb_firmware_name,
238 					adsp->dtb_pas_id, adsp->dtb_mem_phys,
239 					&adsp->dtb_pas_metadata);
240 		if (ret)
241 			goto release_dtb_firmware;
242 
243 		ret = qcom_mdt_load_no_init(adsp->dev, adsp->dtb_firmware, adsp->dtb_firmware_name,
244 					    adsp->dtb_pas_id, adsp->dtb_mem_region,
245 					    adsp->dtb_mem_phys, adsp->dtb_mem_size,
246 					    &adsp->dtb_mem_reloc);
247 		if (ret)
248 			goto release_dtb_metadata;
249 	}
250 
251 	return 0;
252 
253 release_dtb_metadata:
254 	qcom_scm_pas_metadata_release(&adsp->dtb_pas_metadata);
255 
256 release_dtb_firmware:
257 	release_firmware(adsp->dtb_firmware);
258 
259 	return ret;
260 }
261 
adsp_start(struct rproc * rproc)262 static int adsp_start(struct rproc *rproc)
263 {
264 	struct qcom_adsp *adsp = rproc->priv;
265 	int ret;
266 
267 	ret = qcom_q6v5_prepare(&adsp->q6v5);
268 	if (ret)
269 		return ret;
270 
271 	ret = adsp_pds_enable(adsp, adsp->proxy_pds, adsp->proxy_pd_count);
272 	if (ret < 0)
273 		goto disable_irqs;
274 
275 	ret = clk_prepare_enable(adsp->xo);
276 	if (ret)
277 		goto disable_proxy_pds;
278 
279 	ret = clk_prepare_enable(adsp->aggre2_clk);
280 	if (ret)
281 		goto disable_xo_clk;
282 
283 	if (adsp->cx_supply) {
284 		ret = regulator_enable(adsp->cx_supply);
285 		if (ret)
286 			goto disable_aggre2_clk;
287 	}
288 
289 	if (adsp->px_supply) {
290 		ret = regulator_enable(adsp->px_supply);
291 		if (ret)
292 			goto disable_cx_supply;
293 	}
294 
295 	if (adsp->dtb_pas_id) {
296 		ret = qcom_scm_pas_auth_and_reset(adsp->dtb_pas_id);
297 		if (ret) {
298 			dev_err(adsp->dev,
299 				"failed to authenticate dtb image and release reset\n");
300 			goto disable_px_supply;
301 		}
302 	}
303 
304 	ret = qcom_mdt_pas_init(adsp->dev, adsp->firmware, rproc->firmware, adsp->pas_id,
305 				adsp->mem_phys, &adsp->pas_metadata);
306 	if (ret)
307 		goto disable_px_supply;
308 
309 	ret = qcom_mdt_load_no_init(adsp->dev, adsp->firmware, rproc->firmware, adsp->pas_id,
310 				    adsp->mem_region, adsp->mem_phys, adsp->mem_size,
311 				    &adsp->mem_reloc);
312 	if (ret)
313 		goto release_pas_metadata;
314 
315 	qcom_pil_info_store(adsp->info_name, adsp->mem_phys, adsp->mem_size);
316 
317 	ret = qcom_scm_pas_auth_and_reset(adsp->pas_id);
318 	if (ret) {
319 		dev_err(adsp->dev,
320 			"failed to authenticate image and release reset\n");
321 		goto release_pas_metadata;
322 	}
323 
324 	ret = qcom_q6v5_wait_for_start(&adsp->q6v5, msecs_to_jiffies(5000));
325 	if (ret == -ETIMEDOUT) {
326 		dev_err(adsp->dev, "start timed out\n");
327 		qcom_scm_pas_shutdown(adsp->pas_id);
328 		goto release_pas_metadata;
329 	}
330 
331 	qcom_scm_pas_metadata_release(&adsp->pas_metadata);
332 	if (adsp->dtb_pas_id)
333 		qcom_scm_pas_metadata_release(&adsp->dtb_pas_metadata);
334 
335 	/* Remove pointer to the loaded firmware, only valid in adsp_load() & adsp_start() */
336 	adsp->firmware = NULL;
337 
338 	return 0;
339 
340 release_pas_metadata:
341 	qcom_scm_pas_metadata_release(&adsp->pas_metadata);
342 	if (adsp->dtb_pas_id)
343 		qcom_scm_pas_metadata_release(&adsp->dtb_pas_metadata);
344 disable_px_supply:
345 	if (adsp->px_supply)
346 		regulator_disable(adsp->px_supply);
347 disable_cx_supply:
348 	if (adsp->cx_supply)
349 		regulator_disable(adsp->cx_supply);
350 disable_aggre2_clk:
351 	clk_disable_unprepare(adsp->aggre2_clk);
352 disable_xo_clk:
353 	clk_disable_unprepare(adsp->xo);
354 disable_proxy_pds:
355 	adsp_pds_disable(adsp, adsp->proxy_pds, adsp->proxy_pd_count);
356 disable_irqs:
357 	qcom_q6v5_unprepare(&adsp->q6v5);
358 
359 	/* Remove pointer to the loaded firmware, only valid in adsp_load() & adsp_start() */
360 	adsp->firmware = NULL;
361 
362 	return ret;
363 }
364 
qcom_pas_handover(struct qcom_q6v5 * q6v5)365 static void qcom_pas_handover(struct qcom_q6v5 *q6v5)
366 {
367 	struct qcom_adsp *adsp = container_of(q6v5, struct qcom_adsp, q6v5);
368 
369 	if (adsp->px_supply)
370 		regulator_disable(adsp->px_supply);
371 	if (adsp->cx_supply)
372 		regulator_disable(adsp->cx_supply);
373 	clk_disable_unprepare(adsp->aggre2_clk);
374 	clk_disable_unprepare(adsp->xo);
375 	adsp_pds_disable(adsp, adsp->proxy_pds, adsp->proxy_pd_count);
376 }
377 
adsp_stop(struct rproc * rproc)378 static int adsp_stop(struct rproc *rproc)
379 {
380 	struct qcom_adsp *adsp = rproc->priv;
381 	int handover;
382 	int ret;
383 
384 	ret = qcom_q6v5_request_stop(&adsp->q6v5, adsp->sysmon);
385 	if (ret == -ETIMEDOUT)
386 		dev_err(adsp->dev, "timed out on wait\n");
387 
388 	ret = qcom_scm_pas_shutdown(adsp->pas_id);
389 	if (ret && adsp->decrypt_shutdown)
390 		ret = adsp_shutdown_poll_decrypt(adsp);
391 
392 	if (ret)
393 		dev_err(adsp->dev, "failed to shutdown: %d\n", ret);
394 
395 	if (adsp->dtb_pas_id) {
396 		ret = qcom_scm_pas_shutdown(adsp->dtb_pas_id);
397 		if (ret)
398 			dev_err(adsp->dev, "failed to shutdown dtb: %d\n", ret);
399 	}
400 
401 	handover = qcom_q6v5_unprepare(&adsp->q6v5);
402 	if (handover)
403 		qcom_pas_handover(&adsp->q6v5);
404 
405 	if (adsp->smem_host_id)
406 		ret = qcom_smem_bust_hwspin_lock_by_host(adsp->smem_host_id);
407 
408 	return ret;
409 }
410 
adsp_da_to_va(struct rproc * rproc,u64 da,size_t len,bool * is_iomem)411 static void *adsp_da_to_va(struct rproc *rproc, u64 da, size_t len, bool *is_iomem)
412 {
413 	struct qcom_adsp *adsp = rproc->priv;
414 	int offset;
415 
416 	offset = da - adsp->mem_reloc;
417 	if (offset < 0 || offset + len > adsp->mem_size)
418 		return NULL;
419 
420 	if (is_iomem)
421 		*is_iomem = true;
422 
423 	return adsp->mem_region + offset;
424 }
425 
adsp_panic(struct rproc * rproc)426 static unsigned long adsp_panic(struct rproc *rproc)
427 {
428 	struct qcom_adsp *adsp = rproc->priv;
429 
430 	return qcom_q6v5_panic(&adsp->q6v5);
431 }
432 
433 static const struct rproc_ops adsp_ops = {
434 	.unprepare = adsp_unprepare,
435 	.start = adsp_start,
436 	.stop = adsp_stop,
437 	.da_to_va = adsp_da_to_va,
438 	.parse_fw = qcom_register_dump_segments,
439 	.load = adsp_load,
440 	.panic = adsp_panic,
441 };
442 
443 static const struct rproc_ops adsp_minidump_ops = {
444 	.unprepare = adsp_unprepare,
445 	.start = adsp_start,
446 	.stop = adsp_stop,
447 	.da_to_va = adsp_da_to_va,
448 	.parse_fw = qcom_register_dump_segments,
449 	.load = adsp_load,
450 	.panic = adsp_panic,
451 	.coredump = adsp_minidump,
452 };
453 
adsp_init_clock(struct qcom_adsp * adsp)454 static int adsp_init_clock(struct qcom_adsp *adsp)
455 {
456 	int ret;
457 
458 	adsp->xo = devm_clk_get(adsp->dev, "xo");
459 	if (IS_ERR(adsp->xo)) {
460 		ret = PTR_ERR(adsp->xo);
461 		if (ret != -EPROBE_DEFER)
462 			dev_err(adsp->dev, "failed to get xo clock");
463 		return ret;
464 	}
465 
466 	adsp->aggre2_clk = devm_clk_get_optional(adsp->dev, "aggre2");
467 	if (IS_ERR(adsp->aggre2_clk)) {
468 		ret = PTR_ERR(adsp->aggre2_clk);
469 		if (ret != -EPROBE_DEFER)
470 			dev_err(adsp->dev,
471 				"failed to get aggre2 clock");
472 		return ret;
473 	}
474 
475 	return 0;
476 }
477 
adsp_init_regulator(struct qcom_adsp * adsp)478 static int adsp_init_regulator(struct qcom_adsp *adsp)
479 {
480 	adsp->cx_supply = devm_regulator_get_optional(adsp->dev, "cx");
481 	if (IS_ERR(adsp->cx_supply)) {
482 		if (PTR_ERR(adsp->cx_supply) == -ENODEV)
483 			adsp->cx_supply = NULL;
484 		else
485 			return PTR_ERR(adsp->cx_supply);
486 	}
487 
488 	if (adsp->cx_supply)
489 		regulator_set_load(adsp->cx_supply, 100000);
490 
491 	adsp->px_supply = devm_regulator_get_optional(adsp->dev, "px");
492 	if (IS_ERR(adsp->px_supply)) {
493 		if (PTR_ERR(adsp->px_supply) == -ENODEV)
494 			adsp->px_supply = NULL;
495 		else
496 			return PTR_ERR(adsp->px_supply);
497 	}
498 
499 	return 0;
500 }
501 
adsp_pds_attach(struct device * dev,struct device ** devs,char ** pd_names)502 static int adsp_pds_attach(struct device *dev, struct device **devs,
503 			   char **pd_names)
504 {
505 	size_t num_pds = 0;
506 	int ret;
507 	int i;
508 
509 	if (!pd_names)
510 		return 0;
511 
512 	/* Handle single power domain */
513 	if (dev->pm_domain) {
514 		devs[0] = dev;
515 		pm_runtime_enable(dev);
516 		return 1;
517 	}
518 
519 	while (pd_names[num_pds])
520 		num_pds++;
521 
522 	for (i = 0; i < num_pds; i++) {
523 		devs[i] = dev_pm_domain_attach_by_name(dev, pd_names[i]);
524 		if (IS_ERR_OR_NULL(devs[i])) {
525 			ret = PTR_ERR(devs[i]) ? : -ENODATA;
526 			goto unroll_attach;
527 		}
528 	}
529 
530 	return num_pds;
531 
532 unroll_attach:
533 	for (i--; i >= 0; i--)
534 		dev_pm_domain_detach(devs[i], false);
535 
536 	return ret;
537 };
538 
adsp_pds_detach(struct qcom_adsp * adsp,struct device ** pds,size_t pd_count)539 static void adsp_pds_detach(struct qcom_adsp *adsp, struct device **pds,
540 			    size_t pd_count)
541 {
542 	struct device *dev = adsp->dev;
543 	int i;
544 
545 	/* Handle single power domain */
546 	if (dev->pm_domain && pd_count) {
547 		pm_runtime_disable(dev);
548 		return;
549 	}
550 
551 	for (i = 0; i < pd_count; i++)
552 		dev_pm_domain_detach(pds[i], false);
553 }
554 
adsp_alloc_memory_region(struct qcom_adsp * adsp)555 static int adsp_alloc_memory_region(struct qcom_adsp *adsp)
556 {
557 	struct reserved_mem *rmem;
558 	struct device_node *node;
559 
560 	node = of_parse_phandle(adsp->dev->of_node, "memory-region", 0);
561 	if (!node) {
562 		dev_err(adsp->dev, "no memory-region specified\n");
563 		return -EINVAL;
564 	}
565 
566 	rmem = of_reserved_mem_lookup(node);
567 	of_node_put(node);
568 	if (!rmem) {
569 		dev_err(adsp->dev, "unable to resolve memory-region\n");
570 		return -EINVAL;
571 	}
572 
573 	adsp->mem_phys = adsp->mem_reloc = rmem->base;
574 	adsp->mem_size = rmem->size;
575 	adsp->mem_region = devm_ioremap_wc(adsp->dev, adsp->mem_phys, adsp->mem_size);
576 	if (!adsp->mem_region) {
577 		dev_err(adsp->dev, "unable to map memory region: %pa+%zx\n",
578 			&rmem->base, adsp->mem_size);
579 		return -EBUSY;
580 	}
581 
582 	if (!adsp->dtb_pas_id)
583 		return 0;
584 
585 	node = of_parse_phandle(adsp->dev->of_node, "memory-region", 1);
586 	if (!node) {
587 		dev_err(adsp->dev, "no dtb memory-region specified\n");
588 		return -EINVAL;
589 	}
590 
591 	rmem = of_reserved_mem_lookup(node);
592 	of_node_put(node);
593 	if (!rmem) {
594 		dev_err(adsp->dev, "unable to resolve dtb memory-region\n");
595 		return -EINVAL;
596 	}
597 
598 	adsp->dtb_mem_phys = adsp->dtb_mem_reloc = rmem->base;
599 	adsp->dtb_mem_size = rmem->size;
600 	adsp->dtb_mem_region = devm_ioremap_wc(adsp->dev, adsp->dtb_mem_phys, adsp->dtb_mem_size);
601 	if (!adsp->dtb_mem_region) {
602 		dev_err(adsp->dev, "unable to map dtb memory region: %pa+%zx\n",
603 			&rmem->base, adsp->dtb_mem_size);
604 		return -EBUSY;
605 	}
606 
607 	return 0;
608 }
609 
adsp_assign_memory_region(struct qcom_adsp * adsp)610 static int adsp_assign_memory_region(struct qcom_adsp *adsp)
611 {
612 	struct qcom_scm_vmperm perm[MAX_ASSIGN_COUNT];
613 	struct device_node *node;
614 	unsigned int perm_size;
615 	int offset;
616 	int ret;
617 
618 	if (!adsp->region_assign_idx)
619 		return 0;
620 
621 	for (offset = 0; offset < adsp->region_assign_count; ++offset) {
622 		struct reserved_mem *rmem = NULL;
623 
624 		node = of_parse_phandle(adsp->dev->of_node, "memory-region",
625 					adsp->region_assign_idx + offset);
626 		if (node)
627 			rmem = of_reserved_mem_lookup(node);
628 		of_node_put(node);
629 		if (!rmem) {
630 			dev_err(adsp->dev, "unable to resolve shareable memory-region index %d\n",
631 				offset);
632 			return -EINVAL;
633 		}
634 
635 		if (adsp->region_assign_shared)  {
636 			perm[0].vmid = QCOM_SCM_VMID_HLOS;
637 			perm[0].perm = QCOM_SCM_PERM_RW;
638 			perm[1].vmid = adsp->region_assign_vmid;
639 			perm[1].perm = QCOM_SCM_PERM_RW;
640 			perm_size = 2;
641 		} else {
642 			perm[0].vmid = adsp->region_assign_vmid;
643 			perm[0].perm = QCOM_SCM_PERM_RW;
644 			perm_size = 1;
645 		}
646 
647 		adsp->region_assign_phys[offset] = rmem->base;
648 		adsp->region_assign_size[offset] = rmem->size;
649 		adsp->region_assign_owners[offset] = BIT(QCOM_SCM_VMID_HLOS);
650 
651 		ret = qcom_scm_assign_mem(adsp->region_assign_phys[offset],
652 					  adsp->region_assign_size[offset],
653 					  &adsp->region_assign_owners[offset],
654 					  perm, perm_size);
655 		if (ret < 0) {
656 			dev_err(adsp->dev, "assign memory %d failed\n", offset);
657 			return ret;
658 		}
659 	}
660 
661 	return 0;
662 }
663 
adsp_unassign_memory_region(struct qcom_adsp * adsp)664 static void adsp_unassign_memory_region(struct qcom_adsp *adsp)
665 {
666 	struct qcom_scm_vmperm perm;
667 	int offset;
668 	int ret;
669 
670 	if (!adsp->region_assign_idx || adsp->region_assign_shared)
671 		return;
672 
673 	for (offset = 0; offset < adsp->region_assign_count; ++offset) {
674 		perm.vmid = QCOM_SCM_VMID_HLOS;
675 		perm.perm = QCOM_SCM_PERM_RW;
676 
677 		ret = qcom_scm_assign_mem(adsp->region_assign_phys[offset],
678 					  adsp->region_assign_size[offset],
679 					  &adsp->region_assign_owners[offset],
680 					  &perm, 1);
681 		if (ret < 0)
682 			dev_err(adsp->dev, "unassign memory %d failed\n", offset);
683 	}
684 }
685 
adsp_probe(struct platform_device * pdev)686 static int adsp_probe(struct platform_device *pdev)
687 {
688 	const struct adsp_data *desc;
689 	struct qcom_adsp *adsp;
690 	struct rproc *rproc;
691 	const char *fw_name, *dtb_fw_name = NULL;
692 	const struct rproc_ops *ops = &adsp_ops;
693 	int ret;
694 
695 	desc = of_device_get_match_data(&pdev->dev);
696 	if (!desc)
697 		return -EINVAL;
698 
699 	if (!qcom_scm_is_available())
700 		return -EPROBE_DEFER;
701 
702 	fw_name = desc->firmware_name;
703 	ret = of_property_read_string(pdev->dev.of_node, "firmware-name",
704 				      &fw_name);
705 	if (ret < 0 && ret != -EINVAL)
706 		return ret;
707 
708 	if (desc->dtb_firmware_name) {
709 		dtb_fw_name = desc->dtb_firmware_name;
710 		ret = of_property_read_string_index(pdev->dev.of_node, "firmware-name", 1,
711 						    &dtb_fw_name);
712 		if (ret < 0 && ret != -EINVAL)
713 			return ret;
714 	}
715 
716 	if (desc->minidump_id)
717 		ops = &adsp_minidump_ops;
718 
719 	rproc = devm_rproc_alloc(&pdev->dev, pdev->name, ops, fw_name, sizeof(*adsp));
720 
721 	if (!rproc) {
722 		dev_err(&pdev->dev, "unable to allocate remoteproc\n");
723 		return -ENOMEM;
724 	}
725 
726 	rproc->auto_boot = desc->auto_boot;
727 	rproc_coredump_set_elf_info(rproc, ELFCLASS32, EM_NONE);
728 
729 	adsp = rproc->priv;
730 	adsp->dev = &pdev->dev;
731 	adsp->rproc = rproc;
732 	adsp->minidump_id = desc->minidump_id;
733 	adsp->pas_id = desc->pas_id;
734 	adsp->lite_pas_id = desc->lite_pas_id;
735 	adsp->info_name = desc->sysmon_name;
736 	adsp->smem_host_id = desc->smem_host_id;
737 	adsp->decrypt_shutdown = desc->decrypt_shutdown;
738 	adsp->region_assign_idx = desc->region_assign_idx;
739 	adsp->region_assign_count = min_t(int, MAX_ASSIGN_COUNT, desc->region_assign_count);
740 	adsp->region_assign_vmid = desc->region_assign_vmid;
741 	adsp->region_assign_shared = desc->region_assign_shared;
742 	if (dtb_fw_name) {
743 		adsp->dtb_firmware_name = dtb_fw_name;
744 		adsp->dtb_pas_id = desc->dtb_pas_id;
745 	}
746 	platform_set_drvdata(pdev, adsp);
747 
748 	ret = device_init_wakeup(adsp->dev, true);
749 	if (ret)
750 		goto free_rproc;
751 
752 	ret = adsp_alloc_memory_region(adsp);
753 	if (ret)
754 		goto free_rproc;
755 
756 	ret = adsp_assign_memory_region(adsp);
757 	if (ret)
758 		goto free_rproc;
759 
760 	ret = adsp_init_clock(adsp);
761 	if (ret)
762 		goto free_rproc;
763 
764 	ret = adsp_init_regulator(adsp);
765 	if (ret)
766 		goto free_rproc;
767 
768 	ret = adsp_pds_attach(&pdev->dev, adsp->proxy_pds,
769 			      desc->proxy_pd_names);
770 	if (ret < 0)
771 		goto free_rproc;
772 	adsp->proxy_pd_count = ret;
773 
774 	ret = qcom_q6v5_init(&adsp->q6v5, pdev, rproc, desc->crash_reason_smem, desc->load_state,
775 			     qcom_pas_handover);
776 	if (ret)
777 		goto detach_proxy_pds;
778 
779 	qcom_add_glink_subdev(rproc, &adsp->glink_subdev, desc->ssr_name);
780 	qcom_add_smd_subdev(rproc, &adsp->smd_subdev);
781 	qcom_add_pdm_subdev(rproc, &adsp->pdm_subdev);
782 	adsp->sysmon = qcom_add_sysmon_subdev(rproc,
783 					      desc->sysmon_name,
784 					      desc->ssctl_id);
785 	if (IS_ERR(adsp->sysmon)) {
786 		ret = PTR_ERR(adsp->sysmon);
787 		goto detach_proxy_pds;
788 	}
789 
790 	qcom_add_ssr_subdev(rproc, &adsp->ssr_subdev, desc->ssr_name);
791 	ret = rproc_add(rproc);
792 	if (ret)
793 		goto detach_proxy_pds;
794 
795 	return 0;
796 
797 detach_proxy_pds:
798 	adsp_pds_detach(adsp, adsp->proxy_pds, adsp->proxy_pd_count);
799 free_rproc:
800 	device_init_wakeup(adsp->dev, false);
801 
802 	return ret;
803 }
804 
adsp_remove(struct platform_device * pdev)805 static void adsp_remove(struct platform_device *pdev)
806 {
807 	struct qcom_adsp *adsp = platform_get_drvdata(pdev);
808 
809 	rproc_del(adsp->rproc);
810 
811 	qcom_q6v5_deinit(&adsp->q6v5);
812 	adsp_unassign_memory_region(adsp);
813 	qcom_remove_glink_subdev(adsp->rproc, &adsp->glink_subdev);
814 	qcom_remove_sysmon_subdev(adsp->sysmon);
815 	qcom_remove_smd_subdev(adsp->rproc, &adsp->smd_subdev);
816 	qcom_remove_pdm_subdev(adsp->rproc, &adsp->pdm_subdev);
817 	qcom_remove_ssr_subdev(adsp->rproc, &adsp->ssr_subdev);
818 	adsp_pds_detach(adsp, adsp->proxy_pds, adsp->proxy_pd_count);
819 	device_init_wakeup(adsp->dev, false);
820 }
821 
822 static const struct adsp_data adsp_resource_init = {
823 	.crash_reason_smem = 423,
824 	.firmware_name = "adsp.mdt",
825 	.pas_id = 1,
826 	.auto_boot = true,
827 	.ssr_name = "lpass",
828 	.sysmon_name = "adsp",
829 	.ssctl_id = 0x14,
830 };
831 
832 static const struct adsp_data sa8775p_adsp_resource = {
833 	.crash_reason_smem = 423,
834 	.firmware_name = "adsp.mbn",
835 	.pas_id = 1,
836 	.minidump_id = 5,
837 	.auto_boot = true,
838 	.proxy_pd_names = (char*[]){
839 		"lcx",
840 		"lmx",
841 		NULL
842 	},
843 	.load_state = "adsp",
844 	.ssr_name = "lpass",
845 	.sysmon_name = "adsp",
846 	.ssctl_id = 0x14,
847 };
848 
849 static const struct adsp_data sdm845_adsp_resource_init = {
850 	.crash_reason_smem = 423,
851 	.firmware_name = "adsp.mdt",
852 	.pas_id = 1,
853 	.auto_boot = true,
854 	.load_state = "adsp",
855 	.ssr_name = "lpass",
856 	.sysmon_name = "adsp",
857 	.ssctl_id = 0x14,
858 };
859 
860 static const struct adsp_data sm6350_adsp_resource = {
861 	.crash_reason_smem = 423,
862 	.firmware_name = "adsp.mdt",
863 	.pas_id = 1,
864 	.auto_boot = true,
865 	.proxy_pd_names = (char*[]){
866 		"lcx",
867 		"lmx",
868 		NULL
869 	},
870 	.load_state = "adsp",
871 	.ssr_name = "lpass",
872 	.sysmon_name = "adsp",
873 	.ssctl_id = 0x14,
874 };
875 
876 static const struct adsp_data sm6375_mpss_resource = {
877 	.crash_reason_smem = 421,
878 	.firmware_name = "modem.mdt",
879 	.pas_id = 4,
880 	.minidump_id = 3,
881 	.auto_boot = false,
882 	.proxy_pd_names = (char*[]){
883 		"cx",
884 		NULL
885 	},
886 	.ssr_name = "mpss",
887 	.sysmon_name = "modem",
888 	.ssctl_id = 0x12,
889 };
890 
891 static const struct adsp_data sm8150_adsp_resource = {
892 	.crash_reason_smem = 423,
893 	.firmware_name = "adsp.mdt",
894 	.pas_id = 1,
895 	.auto_boot = true,
896 	.proxy_pd_names = (char*[]){
897 		"cx",
898 		NULL
899 	},
900 	.load_state = "adsp",
901 	.ssr_name = "lpass",
902 	.sysmon_name = "adsp",
903 	.ssctl_id = 0x14,
904 };
905 
906 static const struct adsp_data sm8250_adsp_resource = {
907 	.crash_reason_smem = 423,
908 	.firmware_name = "adsp.mdt",
909 	.pas_id = 1,
910 	.auto_boot = true,
911 	.proxy_pd_names = (char*[]){
912 		"lcx",
913 		"lmx",
914 		NULL
915 	},
916 	.load_state = "adsp",
917 	.ssr_name = "lpass",
918 	.sysmon_name = "adsp",
919 	.ssctl_id = 0x14,
920 };
921 
922 static const struct adsp_data sm8350_adsp_resource = {
923 	.crash_reason_smem = 423,
924 	.firmware_name = "adsp.mdt",
925 	.pas_id = 1,
926 	.auto_boot = true,
927 	.proxy_pd_names = (char*[]){
928 		"lcx",
929 		"lmx",
930 		NULL
931 	},
932 	.load_state = "adsp",
933 	.ssr_name = "lpass",
934 	.sysmon_name = "adsp",
935 	.ssctl_id = 0x14,
936 };
937 
938 static const struct adsp_data msm8996_adsp_resource = {
939 	.crash_reason_smem = 423,
940 	.firmware_name = "adsp.mdt",
941 	.pas_id = 1,
942 	.auto_boot = true,
943 	.proxy_pd_names = (char*[]){
944 		"cx",
945 		NULL
946 	},
947 	.ssr_name = "lpass",
948 	.sysmon_name = "adsp",
949 	.ssctl_id = 0x14,
950 };
951 
952 static const struct adsp_data cdsp_resource_init = {
953 	.crash_reason_smem = 601,
954 	.firmware_name = "cdsp.mdt",
955 	.pas_id = 18,
956 	.auto_boot = true,
957 	.ssr_name = "cdsp",
958 	.sysmon_name = "cdsp",
959 	.ssctl_id = 0x17,
960 };
961 
962 static const struct adsp_data sa8775p_cdsp0_resource = {
963 	.crash_reason_smem = 601,
964 	.firmware_name = "cdsp0.mbn",
965 	.pas_id = 18,
966 	.minidump_id = 7,
967 	.auto_boot = true,
968 	.proxy_pd_names = (char*[]){
969 		"cx",
970 		"mxc",
971 		"nsp",
972 		NULL
973 	},
974 	.load_state = "cdsp",
975 	.ssr_name = "cdsp",
976 	.sysmon_name = "cdsp",
977 	.ssctl_id = 0x17,
978 };
979 
980 static const struct adsp_data sa8775p_cdsp1_resource = {
981 	.crash_reason_smem = 633,
982 	.firmware_name = "cdsp1.mbn",
983 	.pas_id = 30,
984 	.minidump_id = 20,
985 	.auto_boot = true,
986 	.proxy_pd_names = (char*[]){
987 		"cx",
988 		"mxc",
989 		"nsp",
990 		NULL
991 	},
992 	.load_state = "nsp",
993 	.ssr_name = "cdsp1",
994 	.sysmon_name = "cdsp1",
995 	.ssctl_id = 0x20,
996 };
997 
998 static const struct adsp_data sdm845_cdsp_resource_init = {
999 	.crash_reason_smem = 601,
1000 	.firmware_name = "cdsp.mdt",
1001 	.pas_id = 18,
1002 	.auto_boot = true,
1003 	.load_state = "cdsp",
1004 	.ssr_name = "cdsp",
1005 	.sysmon_name = "cdsp",
1006 	.ssctl_id = 0x17,
1007 };
1008 
1009 static const struct adsp_data sm6350_cdsp_resource = {
1010 	.crash_reason_smem = 601,
1011 	.firmware_name = "cdsp.mdt",
1012 	.pas_id = 18,
1013 	.auto_boot = true,
1014 	.proxy_pd_names = (char*[]){
1015 		"cx",
1016 		"mx",
1017 		NULL
1018 	},
1019 	.load_state = "cdsp",
1020 	.ssr_name = "cdsp",
1021 	.sysmon_name = "cdsp",
1022 	.ssctl_id = 0x17,
1023 };
1024 
1025 static const struct adsp_data sm8150_cdsp_resource = {
1026 	.crash_reason_smem = 601,
1027 	.firmware_name = "cdsp.mdt",
1028 	.pas_id = 18,
1029 	.auto_boot = true,
1030 	.proxy_pd_names = (char*[]){
1031 		"cx",
1032 		NULL
1033 	},
1034 	.load_state = "cdsp",
1035 	.ssr_name = "cdsp",
1036 	.sysmon_name = "cdsp",
1037 	.ssctl_id = 0x17,
1038 };
1039 
1040 static const struct adsp_data sm8250_cdsp_resource = {
1041 	.crash_reason_smem = 601,
1042 	.firmware_name = "cdsp.mdt",
1043 	.pas_id = 18,
1044 	.auto_boot = true,
1045 	.proxy_pd_names = (char*[]){
1046 		"cx",
1047 		NULL
1048 	},
1049 	.load_state = "cdsp",
1050 	.ssr_name = "cdsp",
1051 	.sysmon_name = "cdsp",
1052 	.ssctl_id = 0x17,
1053 };
1054 
1055 static const struct adsp_data sc8280xp_nsp0_resource = {
1056 	.crash_reason_smem = 601,
1057 	.firmware_name = "cdsp.mdt",
1058 	.pas_id = 18,
1059 	.auto_boot = true,
1060 	.proxy_pd_names = (char*[]){
1061 		"nsp",
1062 		NULL
1063 	},
1064 	.ssr_name = "cdsp0",
1065 	.sysmon_name = "cdsp",
1066 	.ssctl_id = 0x17,
1067 };
1068 
1069 static const struct adsp_data sc8280xp_nsp1_resource = {
1070 	.crash_reason_smem = 633,
1071 	.firmware_name = "cdsp.mdt",
1072 	.pas_id = 30,
1073 	.auto_boot = true,
1074 	.proxy_pd_names = (char*[]){
1075 		"nsp",
1076 		NULL
1077 	},
1078 	.ssr_name = "cdsp1",
1079 	.sysmon_name = "cdsp1",
1080 	.ssctl_id = 0x20,
1081 };
1082 
1083 static const struct adsp_data x1e80100_adsp_resource = {
1084 	.crash_reason_smem = 423,
1085 	.firmware_name = "adsp.mdt",
1086 	.dtb_firmware_name = "adsp_dtb.mdt",
1087 	.pas_id = 1,
1088 	.dtb_pas_id = 0x24,
1089 	.lite_pas_id = 0x1f,
1090 	.minidump_id = 5,
1091 	.auto_boot = true,
1092 	.proxy_pd_names = (char*[]){
1093 		"lcx",
1094 		"lmx",
1095 		NULL
1096 	},
1097 	.load_state = "adsp",
1098 	.ssr_name = "lpass",
1099 	.sysmon_name = "adsp",
1100 	.ssctl_id = 0x14,
1101 };
1102 
1103 static const struct adsp_data x1e80100_cdsp_resource = {
1104 	.crash_reason_smem = 601,
1105 	.firmware_name = "cdsp.mdt",
1106 	.dtb_firmware_name = "cdsp_dtb.mdt",
1107 	.pas_id = 18,
1108 	.dtb_pas_id = 0x25,
1109 	.minidump_id = 7,
1110 	.auto_boot = true,
1111 	.proxy_pd_names = (char*[]){
1112 		"cx",
1113 		"mxc",
1114 		"nsp",
1115 		NULL
1116 	},
1117 	.load_state = "cdsp",
1118 	.ssr_name = "cdsp",
1119 	.sysmon_name = "cdsp",
1120 	.ssctl_id = 0x17,
1121 };
1122 
1123 static const struct adsp_data sm8350_cdsp_resource = {
1124 	.crash_reason_smem = 601,
1125 	.firmware_name = "cdsp.mdt",
1126 	.pas_id = 18,
1127 	.auto_boot = true,
1128 	.proxy_pd_names = (char*[]){
1129 		"cx",
1130 		"mxc",
1131 		NULL
1132 	},
1133 	.load_state = "cdsp",
1134 	.ssr_name = "cdsp",
1135 	.sysmon_name = "cdsp",
1136 	.ssctl_id = 0x17,
1137 };
1138 
1139 static const struct adsp_data sa8775p_gpdsp0_resource = {
1140 	.crash_reason_smem = 640,
1141 	.firmware_name = "gpdsp0.mbn",
1142 	.pas_id = 39,
1143 	.minidump_id = 21,
1144 	.auto_boot = true,
1145 	.proxy_pd_names = (char*[]){
1146 		"cx",
1147 		"mxc",
1148 		NULL
1149 	},
1150 	.load_state = "gpdsp0",
1151 	.ssr_name = "gpdsp0",
1152 	.sysmon_name = "gpdsp0",
1153 	.ssctl_id = 0x21,
1154 };
1155 
1156 static const struct adsp_data sa8775p_gpdsp1_resource = {
1157 	.crash_reason_smem = 641,
1158 	.firmware_name = "gpdsp1.mbn",
1159 	.pas_id = 40,
1160 	.minidump_id = 22,
1161 	.auto_boot = true,
1162 	.proxy_pd_names = (char*[]){
1163 		"cx",
1164 		"mxc",
1165 		NULL
1166 	},
1167 	.load_state = "gpdsp1",
1168 	.ssr_name = "gpdsp1",
1169 	.sysmon_name = "gpdsp1",
1170 	.ssctl_id = 0x22,
1171 };
1172 
1173 static const struct adsp_data mpss_resource_init = {
1174 	.crash_reason_smem = 421,
1175 	.firmware_name = "modem.mdt",
1176 	.pas_id = 4,
1177 	.minidump_id = 3,
1178 	.auto_boot = false,
1179 	.proxy_pd_names = (char*[]){
1180 		"cx",
1181 		"mss",
1182 		NULL
1183 	},
1184 	.load_state = "modem",
1185 	.ssr_name = "mpss",
1186 	.sysmon_name = "modem",
1187 	.ssctl_id = 0x12,
1188 };
1189 
1190 static const struct adsp_data sc8180x_mpss_resource = {
1191 	.crash_reason_smem = 421,
1192 	.firmware_name = "modem.mdt",
1193 	.pas_id = 4,
1194 	.auto_boot = false,
1195 	.proxy_pd_names = (char*[]){
1196 		"cx",
1197 		NULL
1198 	},
1199 	.load_state = "modem",
1200 	.ssr_name = "mpss",
1201 	.sysmon_name = "modem",
1202 	.ssctl_id = 0x12,
1203 };
1204 
1205 static const struct adsp_data msm8996_slpi_resource_init = {
1206 	.crash_reason_smem = 424,
1207 	.firmware_name = "slpi.mdt",
1208 	.pas_id = 12,
1209 	.auto_boot = true,
1210 	.proxy_pd_names = (char*[]){
1211 		"ssc_cx",
1212 		NULL
1213 	},
1214 	.ssr_name = "dsps",
1215 	.sysmon_name = "slpi",
1216 	.ssctl_id = 0x16,
1217 };
1218 
1219 static const struct adsp_data sdm845_slpi_resource_init = {
1220 	.crash_reason_smem = 424,
1221 	.firmware_name = "slpi.mdt",
1222 	.pas_id = 12,
1223 	.auto_boot = true,
1224 	.proxy_pd_names = (char*[]){
1225 		"lcx",
1226 		"lmx",
1227 		NULL
1228 	},
1229 	.load_state = "slpi",
1230 	.ssr_name = "dsps",
1231 	.sysmon_name = "slpi",
1232 	.ssctl_id = 0x16,
1233 };
1234 
1235 static const struct adsp_data wcss_resource_init = {
1236 	.crash_reason_smem = 421,
1237 	.firmware_name = "wcnss.mdt",
1238 	.pas_id = 6,
1239 	.auto_boot = true,
1240 	.ssr_name = "mpss",
1241 	.sysmon_name = "wcnss",
1242 	.ssctl_id = 0x12,
1243 };
1244 
1245 static const struct adsp_data sdx55_mpss_resource = {
1246 	.crash_reason_smem = 421,
1247 	.firmware_name = "modem.mdt",
1248 	.pas_id = 4,
1249 	.auto_boot = true,
1250 	.proxy_pd_names = (char*[]){
1251 		"cx",
1252 		"mss",
1253 		NULL
1254 	},
1255 	.ssr_name = "mpss",
1256 	.sysmon_name = "modem",
1257 	.ssctl_id = 0x22,
1258 };
1259 
1260 static const struct adsp_data sm8450_mpss_resource = {
1261 	.crash_reason_smem = 421,
1262 	.firmware_name = "modem.mdt",
1263 	.pas_id = 4,
1264 	.minidump_id = 3,
1265 	.auto_boot = false,
1266 	.decrypt_shutdown = true,
1267 	.proxy_pd_names = (char*[]){
1268 		"cx",
1269 		"mss",
1270 		NULL
1271 	},
1272 	.load_state = "modem",
1273 	.ssr_name = "mpss",
1274 	.sysmon_name = "modem",
1275 	.ssctl_id = 0x12,
1276 };
1277 
1278 static const struct adsp_data sm8550_adsp_resource = {
1279 	.crash_reason_smem = 423,
1280 	.firmware_name = "adsp.mdt",
1281 	.dtb_firmware_name = "adsp_dtb.mdt",
1282 	.pas_id = 1,
1283 	.dtb_pas_id = 0x24,
1284 	.minidump_id = 5,
1285 	.auto_boot = true,
1286 	.proxy_pd_names = (char*[]){
1287 		"lcx",
1288 		"lmx",
1289 		NULL
1290 	},
1291 	.load_state = "adsp",
1292 	.ssr_name = "lpass",
1293 	.sysmon_name = "adsp",
1294 	.ssctl_id = 0x14,
1295 	.smem_host_id = 2,
1296 };
1297 
1298 static const struct adsp_data sm8550_cdsp_resource = {
1299 	.crash_reason_smem = 601,
1300 	.firmware_name = "cdsp.mdt",
1301 	.dtb_firmware_name = "cdsp_dtb.mdt",
1302 	.pas_id = 18,
1303 	.dtb_pas_id = 0x25,
1304 	.minidump_id = 7,
1305 	.auto_boot = true,
1306 	.proxy_pd_names = (char*[]){
1307 		"cx",
1308 		"mxc",
1309 		"nsp",
1310 		NULL
1311 	},
1312 	.load_state = "cdsp",
1313 	.ssr_name = "cdsp",
1314 	.sysmon_name = "cdsp",
1315 	.ssctl_id = 0x17,
1316 	.smem_host_id = 5,
1317 };
1318 
1319 static const struct adsp_data sm8550_mpss_resource = {
1320 	.crash_reason_smem = 421,
1321 	.firmware_name = "modem.mdt",
1322 	.dtb_firmware_name = "modem_dtb.mdt",
1323 	.pas_id = 4,
1324 	.dtb_pas_id = 0x26,
1325 	.minidump_id = 3,
1326 	.auto_boot = false,
1327 	.decrypt_shutdown = true,
1328 	.proxy_pd_names = (char*[]){
1329 		"cx",
1330 		"mss",
1331 		NULL
1332 	},
1333 	.load_state = "modem",
1334 	.ssr_name = "mpss",
1335 	.sysmon_name = "modem",
1336 	.ssctl_id = 0x12,
1337 	.smem_host_id = 1,
1338 	.region_assign_idx = 2,
1339 	.region_assign_count = 1,
1340 	.region_assign_vmid = QCOM_SCM_VMID_MSS_MSA,
1341 };
1342 
1343 static const struct adsp_data sc7280_wpss_resource = {
1344 	.crash_reason_smem = 626,
1345 	.firmware_name = "wpss.mdt",
1346 	.pas_id = 6,
1347 	.auto_boot = true,
1348 	.proxy_pd_names = (char*[]){
1349 		"cx",
1350 		"mx",
1351 		NULL
1352 	},
1353 	.load_state = "wpss",
1354 	.ssr_name = "wpss",
1355 	.sysmon_name = "wpss",
1356 	.ssctl_id = 0x19,
1357 };
1358 
1359 static const struct adsp_data sm8650_cdsp_resource = {
1360 	.crash_reason_smem = 601,
1361 	.firmware_name = "cdsp.mdt",
1362 	.dtb_firmware_name = "cdsp_dtb.mdt",
1363 	.pas_id = 18,
1364 	.dtb_pas_id = 0x25,
1365 	.minidump_id = 7,
1366 	.auto_boot = true,
1367 	.proxy_pd_names = (char*[]){
1368 		"cx",
1369 		"mxc",
1370 		"nsp",
1371 		NULL
1372 	},
1373 	.load_state = "cdsp",
1374 	.ssr_name = "cdsp",
1375 	.sysmon_name = "cdsp",
1376 	.ssctl_id = 0x17,
1377 	.smem_host_id = 5,
1378 	.region_assign_idx = 2,
1379 	.region_assign_count = 1,
1380 	.region_assign_shared = true,
1381 	.region_assign_vmid = QCOM_SCM_VMID_CDSP,
1382 };
1383 
1384 static const struct adsp_data sm8650_mpss_resource = {
1385 	.crash_reason_smem = 421,
1386 	.firmware_name = "modem.mdt",
1387 	.dtb_firmware_name = "modem_dtb.mdt",
1388 	.pas_id = 4,
1389 	.dtb_pas_id = 0x26,
1390 	.minidump_id = 3,
1391 	.auto_boot = false,
1392 	.decrypt_shutdown = true,
1393 	.proxy_pd_names = (char*[]){
1394 		"cx",
1395 		"mss",
1396 		NULL
1397 	},
1398 	.load_state = "modem",
1399 	.ssr_name = "mpss",
1400 	.sysmon_name = "modem",
1401 	.ssctl_id = 0x12,
1402 	.smem_host_id = 1,
1403 	.region_assign_idx = 2,
1404 	.region_assign_count = 3,
1405 	.region_assign_vmid = QCOM_SCM_VMID_MSS_MSA,
1406 };
1407 
1408 static const struct of_device_id adsp_of_match[] = {
1409 	{ .compatible = "qcom,msm8226-adsp-pil", .data = &adsp_resource_init},
1410 	{ .compatible = "qcom,msm8953-adsp-pil", .data = &msm8996_adsp_resource},
1411 	{ .compatible = "qcom,msm8974-adsp-pil", .data = &adsp_resource_init},
1412 	{ .compatible = "qcom,msm8996-adsp-pil", .data = &msm8996_adsp_resource},
1413 	{ .compatible = "qcom,msm8996-slpi-pil", .data = &msm8996_slpi_resource_init},
1414 	{ .compatible = "qcom,msm8998-adsp-pas", .data = &msm8996_adsp_resource},
1415 	{ .compatible = "qcom,msm8998-slpi-pas", .data = &msm8996_slpi_resource_init},
1416 	{ .compatible = "qcom,qcs404-adsp-pas", .data = &adsp_resource_init },
1417 	{ .compatible = "qcom,qcs404-cdsp-pas", .data = &cdsp_resource_init },
1418 	{ .compatible = "qcom,qcs404-wcss-pas", .data = &wcss_resource_init },
1419 	{ .compatible = "qcom,sa8775p-adsp-pas", .data = &sa8775p_adsp_resource},
1420 	{ .compatible = "qcom,sa8775p-cdsp0-pas", .data = &sa8775p_cdsp0_resource},
1421 	{ .compatible = "qcom,sa8775p-cdsp1-pas", .data = &sa8775p_cdsp1_resource},
1422 	{ .compatible = "qcom,sa8775p-gpdsp0-pas", .data = &sa8775p_gpdsp0_resource},
1423 	{ .compatible = "qcom,sa8775p-gpdsp1-pas", .data = &sa8775p_gpdsp1_resource},
1424 	{ .compatible = "qcom,sc7180-adsp-pas", .data = &sm8250_adsp_resource},
1425 	{ .compatible = "qcom,sc7180-mpss-pas", .data = &mpss_resource_init},
1426 	{ .compatible = "qcom,sc7280-adsp-pas", .data = &sm8350_adsp_resource},
1427 	{ .compatible = "qcom,sc7280-cdsp-pas", .data = &sm6350_cdsp_resource},
1428 	{ .compatible = "qcom,sc7280-mpss-pas", .data = &mpss_resource_init},
1429 	{ .compatible = "qcom,sc7280-wpss-pas", .data = &sc7280_wpss_resource},
1430 	{ .compatible = "qcom,sc8180x-adsp-pas", .data = &sm8150_adsp_resource},
1431 	{ .compatible = "qcom,sc8180x-cdsp-pas", .data = &sm8150_cdsp_resource},
1432 	{ .compatible = "qcom,sc8180x-mpss-pas", .data = &sc8180x_mpss_resource},
1433 	{ .compatible = "qcom,sc8280xp-adsp-pas", .data = &sm8250_adsp_resource},
1434 	{ .compatible = "qcom,sc8280xp-nsp0-pas", .data = &sc8280xp_nsp0_resource},
1435 	{ .compatible = "qcom,sc8280xp-nsp1-pas", .data = &sc8280xp_nsp1_resource},
1436 	{ .compatible = "qcom,sdm660-adsp-pas", .data = &adsp_resource_init},
1437 	{ .compatible = "qcom,sdm845-adsp-pas", .data = &sdm845_adsp_resource_init},
1438 	{ .compatible = "qcom,sdm845-cdsp-pas", .data = &sdm845_cdsp_resource_init},
1439 	{ .compatible = "qcom,sdm845-slpi-pas", .data = &sdm845_slpi_resource_init},
1440 	{ .compatible = "qcom,sdx55-mpss-pas", .data = &sdx55_mpss_resource},
1441 	{ .compatible = "qcom,sdx75-mpss-pas", .data = &sm8650_mpss_resource},
1442 	{ .compatible = "qcom,sm6115-adsp-pas", .data = &adsp_resource_init},
1443 	{ .compatible = "qcom,sm6115-cdsp-pas", .data = &cdsp_resource_init},
1444 	{ .compatible = "qcom,sm6115-mpss-pas", .data = &sc8180x_mpss_resource},
1445 	{ .compatible = "qcom,sm6350-adsp-pas", .data = &sm6350_adsp_resource},
1446 	{ .compatible = "qcom,sm6350-cdsp-pas", .data = &sm6350_cdsp_resource},
1447 	{ .compatible = "qcom,sm6350-mpss-pas", .data = &mpss_resource_init},
1448 	{ .compatible = "qcom,sm6375-adsp-pas", .data = &sm6350_adsp_resource},
1449 	{ .compatible = "qcom,sm6375-cdsp-pas", .data = &sm8150_cdsp_resource},
1450 	{ .compatible = "qcom,sm6375-mpss-pas", .data = &sm6375_mpss_resource},
1451 	{ .compatible = "qcom,sm8150-adsp-pas", .data = &sm8150_adsp_resource},
1452 	{ .compatible = "qcom,sm8150-cdsp-pas", .data = &sm8150_cdsp_resource},
1453 	{ .compatible = "qcom,sm8150-mpss-pas", .data = &mpss_resource_init},
1454 	{ .compatible = "qcom,sm8150-slpi-pas", .data = &sdm845_slpi_resource_init},
1455 	{ .compatible = "qcom,sm8250-adsp-pas", .data = &sm8250_adsp_resource},
1456 	{ .compatible = "qcom,sm8250-cdsp-pas", .data = &sm8250_cdsp_resource},
1457 	{ .compatible = "qcom,sm8250-slpi-pas", .data = &sdm845_slpi_resource_init},
1458 	{ .compatible = "qcom,sm8350-adsp-pas", .data = &sm8350_adsp_resource},
1459 	{ .compatible = "qcom,sm8350-cdsp-pas", .data = &sm8350_cdsp_resource},
1460 	{ .compatible = "qcom,sm8350-slpi-pas", .data = &sdm845_slpi_resource_init},
1461 	{ .compatible = "qcom,sm8350-mpss-pas", .data = &mpss_resource_init},
1462 	{ .compatible = "qcom,sm8450-adsp-pas", .data = &sm8350_adsp_resource},
1463 	{ .compatible = "qcom,sm8450-cdsp-pas", .data = &sm8350_cdsp_resource},
1464 	{ .compatible = "qcom,sm8450-slpi-pas", .data = &sdm845_slpi_resource_init},
1465 	{ .compatible = "qcom,sm8450-mpss-pas", .data = &sm8450_mpss_resource},
1466 	{ .compatible = "qcom,sm8550-adsp-pas", .data = &sm8550_adsp_resource},
1467 	{ .compatible = "qcom,sm8550-cdsp-pas", .data = &sm8550_cdsp_resource},
1468 	{ .compatible = "qcom,sm8550-mpss-pas", .data = &sm8550_mpss_resource},
1469 	{ .compatible = "qcom,sm8650-adsp-pas", .data = &sm8550_adsp_resource},
1470 	{ .compatible = "qcom,sm8650-cdsp-pas", .data = &sm8650_cdsp_resource},
1471 	{ .compatible = "qcom,sm8650-mpss-pas", .data = &sm8650_mpss_resource},
1472 	{ .compatible = "qcom,x1e80100-adsp-pas", .data = &x1e80100_adsp_resource},
1473 	{ .compatible = "qcom,x1e80100-cdsp-pas", .data = &x1e80100_cdsp_resource},
1474 	{ },
1475 };
1476 MODULE_DEVICE_TABLE(of, adsp_of_match);
1477 
1478 static struct platform_driver adsp_driver = {
1479 	.probe = adsp_probe,
1480 	.remove_new = adsp_remove,
1481 	.driver = {
1482 		.name = "qcom_q6v5_pas",
1483 		.of_match_table = adsp_of_match,
1484 	},
1485 };
1486 
1487 module_platform_driver(adsp_driver);
1488 MODULE_DESCRIPTION("Qualcomm Hexagon v5 Peripheral Authentication Service driver");
1489 MODULE_LICENSE("GPL v2");
1490