1 // SPDX-License-Identifier: GPL-2.0
2 /*
3 * Implement the default iomap interfaces
4 *
5 * (C) Copyright 2004 Linus Torvalds
6 */
7 #include <linux/pci.h>
8 #include <linux/io.h>
9
10 #include <linux/export.h>
11
12 /**
13 * pci_iomap_range - create a virtual mapping cookie for a PCI BAR
14 * @dev: PCI device that owns the BAR
15 * @bar: BAR number
16 * @offset: map memory at the given offset in BAR
17 * @maxlen: max length of the memory to map
18 *
19 * Using this function you will get a __iomem address to your device BAR.
20 * You can access it using ioread*() and iowrite*(). These functions hide
21 * the details if this is a MMIO or PIO address space and will just do what
22 * you expect from them in the correct way.
23 *
24 * @maxlen specifies the maximum length to map. If you want to get access to
25 * the complete BAR from offset to the end, pass %0 here.
26 *
27 * NOTE:
28 * This function is never managed, even if you initialized with
29 * pcim_enable_device().
30 * */
pci_iomap_range(struct pci_dev * dev,int bar,unsigned long offset,unsigned long maxlen)31 void __iomem *pci_iomap_range(struct pci_dev *dev,
32 int bar,
33 unsigned long offset,
34 unsigned long maxlen)
35 {
36 resource_size_t start = pci_resource_start(dev, bar);
37 resource_size_t len = pci_resource_len(dev, bar);
38 unsigned long flags = pci_resource_flags(dev, bar);
39
40 if (len <= offset || !start)
41 return NULL;
42 len -= offset;
43 start += offset;
44 if (maxlen && len > maxlen)
45 len = maxlen;
46 if (flags & IORESOURCE_IO)
47 return __pci_ioport_map(dev, start, len);
48 if (flags & IORESOURCE_MEM)
49 return ioremap(start, len);
50 /* What? */
51 return NULL;
52 }
53 EXPORT_SYMBOL(pci_iomap_range);
54
55 /**
56 * pci_iomap_wc_range - create a virtual WC mapping cookie for a PCI BAR
57 * @dev: PCI device that owns the BAR
58 * @bar: BAR number
59 * @offset: map memory at the given offset in BAR
60 * @maxlen: max length of the memory to map
61 *
62 * Using this function you will get a __iomem address to your device BAR.
63 * You can access it using ioread*() and iowrite*(). These functions hide
64 * the details if this is a MMIO or PIO address space and will just do what
65 * you expect from them in the correct way. When possible write combining
66 * is used.
67 *
68 * @maxlen specifies the maximum length to map. If you want to get access to
69 * the complete BAR from offset to the end, pass %0 here.
70 *
71 * NOTE:
72 * This function is never managed, even if you initialized with
73 * pcim_enable_device().
74 * */
pci_iomap_wc_range(struct pci_dev * dev,int bar,unsigned long offset,unsigned long maxlen)75 void __iomem *pci_iomap_wc_range(struct pci_dev *dev,
76 int bar,
77 unsigned long offset,
78 unsigned long maxlen)
79 {
80 resource_size_t start = pci_resource_start(dev, bar);
81 resource_size_t len = pci_resource_len(dev, bar);
82 unsigned long flags = pci_resource_flags(dev, bar);
83
84
85 if (flags & IORESOURCE_IO)
86 return NULL;
87
88 if (len <= offset || !start)
89 return NULL;
90
91 len -= offset;
92 start += offset;
93 if (maxlen && len > maxlen)
94 len = maxlen;
95
96 if (flags & IORESOURCE_MEM)
97 return ioremap_wc(start, len);
98
99 /* What? */
100 return NULL;
101 }
102 EXPORT_SYMBOL_GPL(pci_iomap_wc_range);
103
104 /**
105 * pci_iomap - create a virtual mapping cookie for a PCI BAR
106 * @dev: PCI device that owns the BAR
107 * @bar: BAR number
108 * @maxlen: length of the memory to map
109 *
110 * Using this function you will get a __iomem address to your device BAR.
111 * You can access it using ioread*() and iowrite*(). These functions hide
112 * the details if this is a MMIO or PIO address space and will just do what
113 * you expect from them in the correct way.
114 *
115 * @maxlen specifies the maximum length to map. If you want to get access to
116 * the complete BAR without checking for its length first, pass %0 here.
117 *
118 * NOTE:
119 * This function is never managed, even if you initialized with
120 * pcim_enable_device(). If you need automatic cleanup, use pcim_iomap().
121 * */
pci_iomap(struct pci_dev * dev,int bar,unsigned long maxlen)122 void __iomem *pci_iomap(struct pci_dev *dev, int bar, unsigned long maxlen)
123 {
124 return pci_iomap_range(dev, bar, 0, maxlen);
125 }
126 EXPORT_SYMBOL(pci_iomap);
127
128 /**
129 * pci_iomap_wc - create a virtual WC mapping cookie for a PCI BAR
130 * @dev: PCI device that owns the BAR
131 * @bar: BAR number
132 * @maxlen: length of the memory to map
133 *
134 * Using this function you will get a __iomem address to your device BAR.
135 * You can access it using ioread*() and iowrite*(). These functions hide
136 * the details if this is a MMIO or PIO address space and will just do what
137 * you expect from them in the correct way. When possible write combining
138 * is used.
139 *
140 * @maxlen specifies the maximum length to map. If you want to get access to
141 * the complete BAR without checking for its length first, pass %0 here.
142 *
143 * NOTE:
144 * This function is never managed, even if you initialized with
145 * pcim_enable_device().
146 * */
pci_iomap_wc(struct pci_dev * dev,int bar,unsigned long maxlen)147 void __iomem *pci_iomap_wc(struct pci_dev *dev, int bar, unsigned long maxlen)
148 {
149 return pci_iomap_wc_range(dev, bar, 0, maxlen);
150 }
151 EXPORT_SYMBOL_GPL(pci_iomap_wc);
152
153 /*
154 * pci_iounmap() somewhat illogically comes from lib/iomap.c for the
155 * CONFIG_GENERIC_IOMAP case, because that's the code that knows about
156 * the different IOMAP ranges.
157 *
158 * But if the architecture does not use the generic iomap code, and if
159 * it has _not_ defined its own private pci_iounmap function, we define
160 * it here.
161 *
162 * NOTE! This default implementation assumes that if the architecture
163 * support ioport mapping (HAS_IOPORT_MAP), the ioport mapping will
164 * be fixed to the range [ PCI_IOBASE, PCI_IOBASE+IO_SPACE_LIMIT [,
165 * and does not need unmapping with 'ioport_unmap()'.
166 *
167 * If you have different rules for your architecture, you need to
168 * implement your own pci_iounmap() that knows the rules for where
169 * and how IO vs MEM get mapped.
170 *
171 * This code is odd, and the ARCH_HAS/ARCH_WANTS #define logic comes
172 * from legacy <asm-generic/io.h> header file behavior. In particular,
173 * it would seem to make sense to do the iounmap(p) for the non-IO-space
174 * case here regardless, but that's not what the old header file code
175 * did. Probably incorrectly, but this is meant to be bug-for-bug
176 * compatible.
177 */
178 #if defined(ARCH_WANTS_GENERIC_PCI_IOUNMAP)
179
pci_iounmap(struct pci_dev * dev,void __iomem * p)180 void pci_iounmap(struct pci_dev *dev, void __iomem *p)
181 {
182 #ifdef ARCH_HAS_GENERIC_IOPORT_MAP
183 uintptr_t start = (uintptr_t) PCI_IOBASE;
184 uintptr_t addr = (uintptr_t) p;
185
186 if (addr >= start && addr < start + IO_SPACE_LIMIT)
187 return;
188 #endif
189 iounmap(p);
190 }
191 EXPORT_SYMBOL(pci_iounmap);
192
193 #endif /* ARCH_WANTS_GENERIC_PCI_IOUNMAP */
194