1 /* SPDX-License-Identifier: GPL-2.0 */
2 /* Copyright(c) 2024  Realtek Corporation.*/
3 
4 #ifndef __RTL92DU_TABLE_H__
5 #define __RTL92DU_TABLE_H__
6 
7 #define PHY_REG_2T_ARRAYLENGTH 372
8 #define PHY_REG_ARRAY_PG_LENGTH 624
9 #define RADIOA_2T_ARRAYLENGTH 378
10 #define RADIOB_2T_ARRAYLENGTH 384
11 #define RADIOA_2T_INT_PA_ARRAYLENGTH 378
12 #define RADIOB_2T_INT_PA_ARRAYLENGTH 384
13 #define MAC_2T_ARRAYLENGTH 192
14 #define AGCTAB_ARRAYLENGTH 386
15 #define AGCTAB_5G_ARRAYLENGTH 194
16 #define AGCTAB_2G_ARRAYLENGTH 194
17 
18 extern const u32 rtl8192du_phy_reg_2tarray[PHY_REG_2T_ARRAYLENGTH];
19 extern const u32 rtl8192du_phy_reg_array_pg[PHY_REG_ARRAY_PG_LENGTH];
20 extern const u32 rtl8192du_radioa_2tarray[RADIOA_2T_ARRAYLENGTH];
21 extern const u32 rtl8192du_radiob_2tarray[RADIOB_2T_ARRAYLENGTH];
22 extern const u32 rtl8192du_radioa_2t_int_paarray[RADIOA_2T_INT_PA_ARRAYLENGTH];
23 extern const u32 rtl8192du_radiob_2t_int_paarray[RADIOB_2T_INT_PA_ARRAYLENGTH];
24 extern const u32 rtl8192du_mac_2tarray[MAC_2T_ARRAYLENGTH];
25 extern const u32 rtl8192du_agctab_array[AGCTAB_ARRAYLENGTH];
26 extern const u32 rtl8192du_agctab_5garray[AGCTAB_5G_ARRAYLENGTH];
27 extern const u32 rtl8192du_agctab_2garray[AGCTAB_2G_ARRAYLENGTH];
28 
29 #endif
30