1 // SPDX-License-Identifier: GPL-2.0
2 /*
3 * Copyright (C) 2005, Intec Automation Inc.
4 * Copyright (C) 2014, Freescale Semiconductor, Inc.
5 */
6
7 #include <linux/mtd/spi-nor.h>
8
9 #include "core.h"
10
11 static const struct flash_info everspin_nor_parts[] = {
12 {
13 .name = "mr25h128",
14 .size = SZ_16K,
15 .sector_size = SZ_16K,
16 .addr_nbytes = 2,
17 .flags = SPI_NOR_NO_ERASE,
18 }, {
19 .name = "mr25h256",
20 .size = SZ_32K,
21 .sector_size = SZ_32K,
22 .addr_nbytes = 2,
23 .flags = SPI_NOR_NO_ERASE,
24 }, {
25 .name = "mr25h10",
26 .size = SZ_128K,
27 .sector_size = SZ_128K,
28 .flags = SPI_NOR_NO_ERASE,
29 }, {
30 .name = "mr25h40",
31 .size = SZ_512K,
32 .sector_size = SZ_512K,
33 .flags = SPI_NOR_NO_ERASE,
34 }
35 };
36
everspin_nor_default_init(struct spi_nor * nor)37 static void everspin_nor_default_init(struct spi_nor *nor)
38 {
39 /* Everspin FRAMs don't support the fast read opcode. */
40 nor->params->hwcaps.mask &= ~SNOR_HWCAPS_READ_FAST;
41 }
42
43 static const struct spi_nor_fixups everspin_nor_fixups = {
44 .default_init = everspin_nor_default_init,
45 };
46
47 const struct spi_nor_manufacturer spi_nor_everspin = {
48 .name = "everspin",
49 .parts = everspin_nor_parts,
50 .nparts = ARRAY_SIZE(everspin_nor_parts),
51 .fixups = &everspin_nor_fixups,
52 };
53