1 // SPDX-License-Identifier: GPL-2.0-only
2 /*
3 * MFD core driver for the X-Powers' Power Management ICs
4 *
5 * AXP20x typically comprises an adaptive USB-Compatible PWM charger, BUCK DC-DC
6 * converters, LDOs, multiple 12-bit ADCs of voltage, current and temperature
7 * as well as configurable GPIOs.
8 *
9 * This file contains the interface independent core functions.
10 *
11 * Copyright (C) 2014 Carlo Caione
12 *
13 * Author: Carlo Caione <carlo@caione.org>
14 */
15
16 #include <linux/acpi.h>
17 #include <linux/bitops.h>
18 #include <linux/delay.h>
19 #include <linux/err.h>
20 #include <linux/interrupt.h>
21 #include <linux/kernel.h>
22 #include <linux/mfd/axp20x.h>
23 #include <linux/mfd/core.h>
24 #include <linux/module.h>
25 #include <linux/of.h>
26 #include <linux/property.h>
27 #include <linux/reboot.h>
28 #include <linux/regmap.h>
29 #include <linux/regulator/consumer.h>
30
31 #define AXP20X_OFF BIT(7)
32
33 #define AXP806_REG_ADDR_EXT_ADDR_MASTER_MODE 0
34 #define AXP806_REG_ADDR_EXT_ADDR_SLAVE_MODE BIT(4)
35
36 static const char * const axp20x_model_names[] = {
37 "AXP152",
38 "AXP192",
39 "AXP202",
40 "AXP209",
41 "AXP221",
42 "AXP223",
43 "AXP288",
44 "AXP313a",
45 "AXP717",
46 "AXP803",
47 "AXP806",
48 "AXP809",
49 "AXP813",
50 "AXP15060",
51 };
52
53 static const struct regmap_range axp152_writeable_ranges[] = {
54 regmap_reg_range(AXP152_LDO3456_DC1234_CTRL, AXP152_IRQ3_STATE),
55 regmap_reg_range(AXP152_DCDC_MODE, AXP152_PWM1_DUTY_CYCLE),
56 };
57
58 static const struct regmap_range axp152_volatile_ranges[] = {
59 regmap_reg_range(AXP152_PWR_OP_MODE, AXP152_PWR_OP_MODE),
60 regmap_reg_range(AXP152_IRQ1_EN, AXP152_IRQ3_STATE),
61 regmap_reg_range(AXP152_GPIO_INPUT, AXP152_GPIO_INPUT),
62 };
63
64 static const struct regmap_access_table axp152_writeable_table = {
65 .yes_ranges = axp152_writeable_ranges,
66 .n_yes_ranges = ARRAY_SIZE(axp152_writeable_ranges),
67 };
68
69 static const struct regmap_access_table axp152_volatile_table = {
70 .yes_ranges = axp152_volatile_ranges,
71 .n_yes_ranges = ARRAY_SIZE(axp152_volatile_ranges),
72 };
73
74 static const struct regmap_range axp20x_writeable_ranges[] = {
75 regmap_reg_range(AXP20X_DATACACHE(0), AXP20X_IRQ5_STATE),
76 regmap_reg_range(AXP20X_CHRG_CTRL1, AXP20X_CHRG_CTRL2),
77 regmap_reg_range(AXP20X_DCDC_MODE, AXP20X_FG_RES),
78 regmap_reg_range(AXP20X_RDC_H, AXP20X_OCV(AXP20X_OCV_MAX)),
79 };
80
81 static const struct regmap_range axp20x_volatile_ranges[] = {
82 regmap_reg_range(AXP20X_PWR_INPUT_STATUS, AXP20X_USB_OTG_STATUS),
83 regmap_reg_range(AXP20X_CHRG_CTRL1, AXP20X_CHRG_CTRL2),
84 regmap_reg_range(AXP20X_IRQ1_EN, AXP20X_IRQ5_STATE),
85 regmap_reg_range(AXP20X_ACIN_V_ADC_H, AXP20X_IPSOUT_V_HIGH_L),
86 regmap_reg_range(AXP20X_GPIO20_SS, AXP20X_GPIO3_CTRL),
87 regmap_reg_range(AXP20X_FG_RES, AXP20X_RDC_L),
88 };
89
90 static const struct regmap_access_table axp20x_writeable_table = {
91 .yes_ranges = axp20x_writeable_ranges,
92 .n_yes_ranges = ARRAY_SIZE(axp20x_writeable_ranges),
93 };
94
95 static const struct regmap_access_table axp20x_volatile_table = {
96 .yes_ranges = axp20x_volatile_ranges,
97 .n_yes_ranges = ARRAY_SIZE(axp20x_volatile_ranges),
98 };
99
100 static const struct regmap_range axp192_writeable_ranges[] = {
101 regmap_reg_range(AXP192_DATACACHE(0), AXP192_DATACACHE(5)),
102 regmap_reg_range(AXP192_PWR_OUT_CTRL, AXP192_IRQ5_STATE),
103 regmap_reg_range(AXP20X_DCDC_MODE, AXP192_N_RSTO_CTRL),
104 regmap_reg_range(AXP20X_CC_CTRL, AXP20X_CC_CTRL),
105 };
106
107 static const struct regmap_range axp192_volatile_ranges[] = {
108 regmap_reg_range(AXP20X_PWR_INPUT_STATUS, AXP192_USB_OTG_STATUS),
109 regmap_reg_range(AXP192_IRQ1_STATE, AXP192_IRQ4_STATE),
110 regmap_reg_range(AXP192_IRQ5_STATE, AXP192_IRQ5_STATE),
111 regmap_reg_range(AXP20X_ACIN_V_ADC_H, AXP20X_IPSOUT_V_HIGH_L),
112 regmap_reg_range(AXP20X_TIMER_CTRL, AXP20X_TIMER_CTRL),
113 regmap_reg_range(AXP192_GPIO2_0_STATE, AXP192_GPIO2_0_STATE),
114 regmap_reg_range(AXP192_GPIO4_3_STATE, AXP192_GPIO4_3_STATE),
115 regmap_reg_range(AXP192_N_RSTO_CTRL, AXP192_N_RSTO_CTRL),
116 regmap_reg_range(AXP20X_CHRG_CC_31_24, AXP20X_CC_CTRL),
117 };
118
119 static const struct regmap_access_table axp192_writeable_table = {
120 .yes_ranges = axp192_writeable_ranges,
121 .n_yes_ranges = ARRAY_SIZE(axp192_writeable_ranges),
122 };
123
124 static const struct regmap_access_table axp192_volatile_table = {
125 .yes_ranges = axp192_volatile_ranges,
126 .n_yes_ranges = ARRAY_SIZE(axp192_volatile_ranges),
127 };
128
129 /* AXP22x ranges are shared with the AXP809, as they cover the same range */
130 static const struct regmap_range axp22x_writeable_ranges[] = {
131 regmap_reg_range(AXP20X_DATACACHE(0), AXP20X_IRQ5_STATE),
132 regmap_reg_range(AXP20X_CHRG_CTRL1, AXP22X_CHRG_CTRL3),
133 regmap_reg_range(AXP20X_DCDC_MODE, AXP22X_BATLOW_THRES1),
134 };
135
136 static const struct regmap_range axp22x_volatile_ranges[] = {
137 regmap_reg_range(AXP20X_PWR_INPUT_STATUS, AXP20X_PWR_OP_MODE),
138 regmap_reg_range(AXP20X_IRQ1_EN, AXP20X_IRQ5_STATE),
139 regmap_reg_range(AXP22X_GPIO_STATE, AXP22X_GPIO_STATE),
140 regmap_reg_range(AXP22X_PMIC_TEMP_H, AXP20X_IPSOUT_V_HIGH_L),
141 regmap_reg_range(AXP20X_FG_RES, AXP20X_FG_RES),
142 };
143
144 static const struct regmap_access_table axp22x_writeable_table = {
145 .yes_ranges = axp22x_writeable_ranges,
146 .n_yes_ranges = ARRAY_SIZE(axp22x_writeable_ranges),
147 };
148
149 static const struct regmap_access_table axp22x_volatile_table = {
150 .yes_ranges = axp22x_volatile_ranges,
151 .n_yes_ranges = ARRAY_SIZE(axp22x_volatile_ranges),
152 };
153
154 /* AXP288 ranges are shared with the AXP803, as they cover the same range */
155 static const struct regmap_range axp288_writeable_ranges[] = {
156 regmap_reg_range(AXP288_POWER_REASON, AXP288_POWER_REASON),
157 regmap_reg_range(AXP20X_DATACACHE(0), AXP20X_IRQ6_STATE),
158 regmap_reg_range(AXP20X_DCDC_MODE, AXP288_FG_TUNE5),
159 };
160
161 static const struct regmap_range axp288_volatile_ranges[] = {
162 regmap_reg_range(AXP20X_PWR_INPUT_STATUS, AXP288_POWER_REASON),
163 regmap_reg_range(AXP22X_PWR_OUT_CTRL1, AXP22X_ALDO3_V_OUT),
164 regmap_reg_range(AXP288_BC_GLOBAL, AXP288_BC_GLOBAL),
165 regmap_reg_range(AXP288_BC_DET_STAT, AXP20X_VBUS_IPSOUT_MGMT),
166 regmap_reg_range(AXP20X_CHRG_BAK_CTRL, AXP20X_CHRG_BAK_CTRL),
167 regmap_reg_range(AXP20X_IRQ1_EN, AXP20X_IPSOUT_V_HIGH_L),
168 regmap_reg_range(AXP20X_TIMER_CTRL, AXP20X_TIMER_CTRL),
169 regmap_reg_range(AXP20X_GPIO1_CTRL, AXP22X_GPIO_STATE),
170 regmap_reg_range(AXP288_RT_BATT_V_H, AXP288_RT_BATT_V_L),
171 regmap_reg_range(AXP20X_FG_RES, AXP288_FG_CC_CAP_REG),
172 };
173
174 static const struct regmap_access_table axp288_writeable_table = {
175 .yes_ranges = axp288_writeable_ranges,
176 .n_yes_ranges = ARRAY_SIZE(axp288_writeable_ranges),
177 };
178
179 static const struct regmap_access_table axp288_volatile_table = {
180 .yes_ranges = axp288_volatile_ranges,
181 .n_yes_ranges = ARRAY_SIZE(axp288_volatile_ranges),
182 };
183
184 static const struct regmap_range axp806_writeable_ranges[] = {
185 regmap_reg_range(AXP20X_DATACACHE(0), AXP20X_DATACACHE(3)),
186 regmap_reg_range(AXP806_PWR_OUT_CTRL1, AXP806_CLDO3_V_CTRL),
187 regmap_reg_range(AXP20X_IRQ1_EN, AXP20X_IRQ2_EN),
188 regmap_reg_range(AXP20X_IRQ1_STATE, AXP20X_IRQ2_STATE),
189 regmap_reg_range(AXP806_REG_ADDR_EXT, AXP806_REG_ADDR_EXT),
190 };
191
192 static const struct regmap_range axp313a_writeable_ranges[] = {
193 regmap_reg_range(AXP313A_ON_INDICATE, AXP313A_IRQ_STATE),
194 };
195
196 static const struct regmap_range axp313a_volatile_ranges[] = {
197 regmap_reg_range(AXP313A_SHUTDOWN_CTRL, AXP313A_SHUTDOWN_CTRL),
198 regmap_reg_range(AXP313A_IRQ_STATE, AXP313A_IRQ_STATE),
199 };
200
201 static const struct regmap_access_table axp313a_writeable_table = {
202 .yes_ranges = axp313a_writeable_ranges,
203 .n_yes_ranges = ARRAY_SIZE(axp313a_writeable_ranges),
204 };
205
206 static const struct regmap_access_table axp313a_volatile_table = {
207 .yes_ranges = axp313a_volatile_ranges,
208 .n_yes_ranges = ARRAY_SIZE(axp313a_volatile_ranges),
209 };
210
211 static const struct regmap_range axp717_writeable_ranges[] = {
212 regmap_reg_range(AXP717_PMU_FAULT, AXP717_MODULE_EN_CONTROL_1),
213 regmap_reg_range(AXP717_MIN_SYS_V_CONTROL, AXP717_BOOST_CONTROL),
214 regmap_reg_range(AXP717_VSYS_V_POWEROFF, AXP717_VSYS_V_POWEROFF),
215 regmap_reg_range(AXP717_IRQ0_EN, AXP717_IRQ4_EN),
216 regmap_reg_range(AXP717_IRQ0_STATE, AXP717_IRQ4_STATE),
217 regmap_reg_range(AXP717_ICC_CHG_SET, AXP717_CV_CHG_SET),
218 regmap_reg_range(AXP717_DCDC_OUTPUT_CONTROL, AXP717_CPUSLDO_CONTROL),
219 regmap_reg_range(AXP717_ADC_CH_EN_CONTROL, AXP717_ADC_CH_EN_CONTROL),
220 regmap_reg_range(AXP717_ADC_DATA_SEL, AXP717_ADC_DATA_SEL),
221 };
222
223 static const struct regmap_range axp717_volatile_ranges[] = {
224 regmap_reg_range(AXP717_ON_INDICATE, AXP717_PMU_FAULT),
225 regmap_reg_range(AXP717_IRQ0_STATE, AXP717_IRQ4_STATE),
226 regmap_reg_range(AXP717_BATT_PERCENT_DATA, AXP717_BATT_PERCENT_DATA),
227 regmap_reg_range(AXP717_BATT_V_H, AXP717_BATT_CHRG_I_L),
228 regmap_reg_range(AXP717_ADC_DATA_H, AXP717_ADC_DATA_L),
229 };
230
231 static const struct regmap_access_table axp717_writeable_table = {
232 .yes_ranges = axp717_writeable_ranges,
233 .n_yes_ranges = ARRAY_SIZE(axp717_writeable_ranges),
234 };
235
236 static const struct regmap_access_table axp717_volatile_table = {
237 .yes_ranges = axp717_volatile_ranges,
238 .n_yes_ranges = ARRAY_SIZE(axp717_volatile_ranges),
239 };
240
241 static const struct regmap_range axp806_volatile_ranges[] = {
242 regmap_reg_range(AXP20X_IRQ1_STATE, AXP20X_IRQ2_STATE),
243 };
244
245 static const struct regmap_access_table axp806_writeable_table = {
246 .yes_ranges = axp806_writeable_ranges,
247 .n_yes_ranges = ARRAY_SIZE(axp806_writeable_ranges),
248 };
249
250 static const struct regmap_access_table axp806_volatile_table = {
251 .yes_ranges = axp806_volatile_ranges,
252 .n_yes_ranges = ARRAY_SIZE(axp806_volatile_ranges),
253 };
254
255 static const struct regmap_range axp15060_writeable_ranges[] = {
256 regmap_reg_range(AXP15060_PWR_OUT_CTRL1, AXP15060_DCDC_MODE_CTRL2),
257 regmap_reg_range(AXP15060_OUTPUT_MONITOR_DISCHARGE, AXP15060_CPUSLDO_V_CTRL),
258 regmap_reg_range(AXP15060_PWR_WAKEUP_CTRL, AXP15060_PWR_DISABLE_DOWN_SEQ),
259 regmap_reg_range(AXP15060_PEK_KEY, AXP15060_PEK_KEY),
260 regmap_reg_range(AXP15060_IRQ1_EN, AXP15060_IRQ2_EN),
261 regmap_reg_range(AXP15060_IRQ1_STATE, AXP15060_IRQ2_STATE),
262 };
263
264 static const struct regmap_range axp15060_volatile_ranges[] = {
265 regmap_reg_range(AXP15060_STARTUP_SRC, AXP15060_STARTUP_SRC),
266 regmap_reg_range(AXP15060_PWR_WAKEUP_CTRL, AXP15060_PWR_DISABLE_DOWN_SEQ),
267 regmap_reg_range(AXP15060_IRQ1_STATE, AXP15060_IRQ2_STATE),
268 };
269
270 static const struct regmap_access_table axp15060_writeable_table = {
271 .yes_ranges = axp15060_writeable_ranges,
272 .n_yes_ranges = ARRAY_SIZE(axp15060_writeable_ranges),
273 };
274
275 static const struct regmap_access_table axp15060_volatile_table = {
276 .yes_ranges = axp15060_volatile_ranges,
277 .n_yes_ranges = ARRAY_SIZE(axp15060_volatile_ranges),
278 };
279
280 static const struct resource axp152_pek_resources[] = {
281 DEFINE_RES_IRQ_NAMED(AXP152_IRQ_PEK_RIS_EDGE, "PEK_DBR"),
282 DEFINE_RES_IRQ_NAMED(AXP152_IRQ_PEK_FAL_EDGE, "PEK_DBF"),
283 };
284
285 static const struct resource axp192_ac_power_supply_resources[] = {
286 DEFINE_RES_IRQ_NAMED(AXP192_IRQ_ACIN_PLUGIN, "ACIN_PLUGIN"),
287 DEFINE_RES_IRQ_NAMED(AXP192_IRQ_ACIN_REMOVAL, "ACIN_REMOVAL"),
288 DEFINE_RES_IRQ_NAMED(AXP192_IRQ_ACIN_OVER_V, "ACIN_OVER_V"),
289 };
290
291 static const struct resource axp192_usb_power_supply_resources[] = {
292 DEFINE_RES_IRQ_NAMED(AXP192_IRQ_VBUS_PLUGIN, "VBUS_PLUGIN"),
293 DEFINE_RES_IRQ_NAMED(AXP192_IRQ_VBUS_REMOVAL, "VBUS_REMOVAL"),
294 DEFINE_RES_IRQ_NAMED(AXP192_IRQ_VBUS_VALID, "VBUS_VALID"),
295 DEFINE_RES_IRQ_NAMED(AXP192_IRQ_VBUS_NOT_VALID, "VBUS_NOT_VALID"),
296 };
297
298 static const struct resource axp20x_ac_power_supply_resources[] = {
299 DEFINE_RES_IRQ_NAMED(AXP20X_IRQ_ACIN_PLUGIN, "ACIN_PLUGIN"),
300 DEFINE_RES_IRQ_NAMED(AXP20X_IRQ_ACIN_REMOVAL, "ACIN_REMOVAL"),
301 DEFINE_RES_IRQ_NAMED(AXP20X_IRQ_ACIN_OVER_V, "ACIN_OVER_V"),
302 };
303
304 static const struct resource axp20x_pek_resources[] = {
305 DEFINE_RES_IRQ_NAMED(AXP20X_IRQ_PEK_RIS_EDGE, "PEK_DBR"),
306 DEFINE_RES_IRQ_NAMED(AXP20X_IRQ_PEK_FAL_EDGE, "PEK_DBF"),
307 };
308
309 static const struct resource axp20x_usb_power_supply_resources[] = {
310 DEFINE_RES_IRQ_NAMED(AXP20X_IRQ_VBUS_PLUGIN, "VBUS_PLUGIN"),
311 DEFINE_RES_IRQ_NAMED(AXP20X_IRQ_VBUS_REMOVAL, "VBUS_REMOVAL"),
312 DEFINE_RES_IRQ_NAMED(AXP20X_IRQ_VBUS_VALID, "VBUS_VALID"),
313 DEFINE_RES_IRQ_NAMED(AXP20X_IRQ_VBUS_NOT_VALID, "VBUS_NOT_VALID"),
314 };
315
316 static const struct resource axp22x_usb_power_supply_resources[] = {
317 DEFINE_RES_IRQ_NAMED(AXP22X_IRQ_VBUS_PLUGIN, "VBUS_PLUGIN"),
318 DEFINE_RES_IRQ_NAMED(AXP22X_IRQ_VBUS_REMOVAL, "VBUS_REMOVAL"),
319 };
320
321 static const struct resource axp717_usb_power_supply_resources[] = {
322 DEFINE_RES_IRQ_NAMED(AXP717_IRQ_VBUS_OVER_V, "VBUS_OVER_V"),
323 DEFINE_RES_IRQ_NAMED(AXP717_IRQ_VBUS_PLUGIN, "VBUS_PLUGIN"),
324 DEFINE_RES_IRQ_NAMED(AXP717_IRQ_VBUS_REMOVAL, "VBUS_REMOVAL"),
325 };
326
327 /* AXP803 and AXP813/AXP818 share the same interrupts */
328 static const struct resource axp803_usb_power_supply_resources[] = {
329 DEFINE_RES_IRQ_NAMED(AXP803_IRQ_VBUS_PLUGIN, "VBUS_PLUGIN"),
330 DEFINE_RES_IRQ_NAMED(AXP803_IRQ_VBUS_REMOVAL, "VBUS_REMOVAL"),
331 };
332
333 static const struct resource axp22x_pek_resources[] = {
334 DEFINE_RES_IRQ_NAMED(AXP22X_IRQ_PEK_RIS_EDGE, "PEK_DBR"),
335 DEFINE_RES_IRQ_NAMED(AXP22X_IRQ_PEK_FAL_EDGE, "PEK_DBF"),
336 };
337
338 static const struct resource axp288_power_button_resources[] = {
339 DEFINE_RES_IRQ_NAMED(AXP288_IRQ_POKP, "PEK_DBR"),
340 DEFINE_RES_IRQ_NAMED(AXP288_IRQ_POKN, "PEK_DBF"),
341 };
342
343 static const struct resource axp288_fuel_gauge_resources[] = {
344 DEFINE_RES_IRQ(AXP288_IRQ_QWBTU),
345 DEFINE_RES_IRQ(AXP288_IRQ_WBTU),
346 DEFINE_RES_IRQ(AXP288_IRQ_QWBTO),
347 DEFINE_RES_IRQ(AXP288_IRQ_WBTO),
348 DEFINE_RES_IRQ(AXP288_IRQ_WL2),
349 DEFINE_RES_IRQ(AXP288_IRQ_WL1),
350 };
351
352 static const struct resource axp313a_pek_resources[] = {
353 DEFINE_RES_IRQ_NAMED(AXP313A_IRQ_PEK_RIS_EDGE, "PEK_DBR"),
354 DEFINE_RES_IRQ_NAMED(AXP313A_IRQ_PEK_FAL_EDGE, "PEK_DBF"),
355 };
356
357 static const struct resource axp717_pek_resources[] = {
358 DEFINE_RES_IRQ_NAMED(AXP717_IRQ_PEK_RIS_EDGE, "PEK_DBR"),
359 DEFINE_RES_IRQ_NAMED(AXP717_IRQ_PEK_FAL_EDGE, "PEK_DBF"),
360 };
361
362 static const struct resource axp803_pek_resources[] = {
363 DEFINE_RES_IRQ_NAMED(AXP803_IRQ_PEK_RIS_EDGE, "PEK_DBR"),
364 DEFINE_RES_IRQ_NAMED(AXP803_IRQ_PEK_FAL_EDGE, "PEK_DBF"),
365 };
366
367 static const struct resource axp806_pek_resources[] = {
368 DEFINE_RES_IRQ_NAMED(AXP806_IRQ_POK_RISE, "PEK_DBR"),
369 DEFINE_RES_IRQ_NAMED(AXP806_IRQ_POK_FALL, "PEK_DBF"),
370 };
371
372 static const struct resource axp809_pek_resources[] = {
373 DEFINE_RES_IRQ_NAMED(AXP809_IRQ_PEK_RIS_EDGE, "PEK_DBR"),
374 DEFINE_RES_IRQ_NAMED(AXP809_IRQ_PEK_FAL_EDGE, "PEK_DBF"),
375 };
376
377 static const struct resource axp15060_pek_resources[] = {
378 DEFINE_RES_IRQ_NAMED(AXP15060_IRQ_PEK_RIS_EDGE, "PEK_DBR"),
379 DEFINE_RES_IRQ_NAMED(AXP15060_IRQ_PEK_FAL_EDGE, "PEK_DBF"),
380 };
381
382 static const struct regmap_config axp152_regmap_config = {
383 .reg_bits = 8,
384 .val_bits = 8,
385 .wr_table = &axp152_writeable_table,
386 .volatile_table = &axp152_volatile_table,
387 .max_register = AXP152_PWM1_DUTY_CYCLE,
388 .cache_type = REGCACHE_MAPLE,
389 };
390
391 static const struct regmap_config axp192_regmap_config = {
392 .reg_bits = 8,
393 .val_bits = 8,
394 .wr_table = &axp192_writeable_table,
395 .volatile_table = &axp192_volatile_table,
396 .max_register = AXP20X_CC_CTRL,
397 .cache_type = REGCACHE_MAPLE,
398 };
399
400 static const struct regmap_config axp20x_regmap_config = {
401 .reg_bits = 8,
402 .val_bits = 8,
403 .wr_table = &axp20x_writeable_table,
404 .volatile_table = &axp20x_volatile_table,
405 .max_register = AXP20X_OCV(AXP20X_OCV_MAX),
406 .cache_type = REGCACHE_MAPLE,
407 };
408
409 static const struct regmap_config axp22x_regmap_config = {
410 .reg_bits = 8,
411 .val_bits = 8,
412 .wr_table = &axp22x_writeable_table,
413 .volatile_table = &axp22x_volatile_table,
414 .max_register = AXP22X_BATLOW_THRES1,
415 .cache_type = REGCACHE_MAPLE,
416 };
417
418 static const struct regmap_config axp288_regmap_config = {
419 .reg_bits = 8,
420 .val_bits = 8,
421 .wr_table = &axp288_writeable_table,
422 .volatile_table = &axp288_volatile_table,
423 .max_register = AXP288_FG_TUNE5,
424 .cache_type = REGCACHE_MAPLE,
425 };
426
427 static const struct regmap_config axp313a_regmap_config = {
428 .reg_bits = 8,
429 .val_bits = 8,
430 .wr_table = &axp313a_writeable_table,
431 .volatile_table = &axp313a_volatile_table,
432 .max_register = AXP313A_IRQ_STATE,
433 .cache_type = REGCACHE_MAPLE,
434 };
435
436 static const struct regmap_config axp717_regmap_config = {
437 .reg_bits = 8,
438 .val_bits = 8,
439 .wr_table = &axp717_writeable_table,
440 .volatile_table = &axp717_volatile_table,
441 .max_register = AXP717_ADC_DATA_L,
442 .cache_type = REGCACHE_MAPLE,
443 };
444
445 static const struct regmap_config axp806_regmap_config = {
446 .reg_bits = 8,
447 .val_bits = 8,
448 .wr_table = &axp806_writeable_table,
449 .volatile_table = &axp806_volatile_table,
450 .max_register = AXP806_REG_ADDR_EXT,
451 .cache_type = REGCACHE_MAPLE,
452 };
453
454 static const struct regmap_config axp15060_regmap_config = {
455 .reg_bits = 8,
456 .val_bits = 8,
457 .wr_table = &axp15060_writeable_table,
458 .volatile_table = &axp15060_volatile_table,
459 .max_register = AXP15060_IRQ2_STATE,
460 .cache_type = REGCACHE_MAPLE,
461 };
462
463 #define INIT_REGMAP_IRQ(_variant, _irq, _off, _mask) \
464 [_variant##_IRQ_##_irq] = { .reg_offset = (_off), .mask = BIT(_mask) }
465
466 static const struct regmap_irq axp152_regmap_irqs[] = {
467 INIT_REGMAP_IRQ(AXP152, LDO0IN_CONNECT, 0, 6),
468 INIT_REGMAP_IRQ(AXP152, LDO0IN_REMOVAL, 0, 5),
469 INIT_REGMAP_IRQ(AXP152, ALDO0IN_CONNECT, 0, 3),
470 INIT_REGMAP_IRQ(AXP152, ALDO0IN_REMOVAL, 0, 2),
471 INIT_REGMAP_IRQ(AXP152, DCDC1_V_LOW, 1, 5),
472 INIT_REGMAP_IRQ(AXP152, DCDC2_V_LOW, 1, 4),
473 INIT_REGMAP_IRQ(AXP152, DCDC3_V_LOW, 1, 3),
474 INIT_REGMAP_IRQ(AXP152, DCDC4_V_LOW, 1, 2),
475 INIT_REGMAP_IRQ(AXP152, PEK_SHORT, 1, 1),
476 INIT_REGMAP_IRQ(AXP152, PEK_LONG, 1, 0),
477 INIT_REGMAP_IRQ(AXP152, TIMER, 2, 7),
478 INIT_REGMAP_IRQ(AXP152, PEK_RIS_EDGE, 2, 6),
479 INIT_REGMAP_IRQ(AXP152, PEK_FAL_EDGE, 2, 5),
480 INIT_REGMAP_IRQ(AXP152, GPIO3_INPUT, 2, 3),
481 INIT_REGMAP_IRQ(AXP152, GPIO2_INPUT, 2, 2),
482 INIT_REGMAP_IRQ(AXP152, GPIO1_INPUT, 2, 1),
483 INIT_REGMAP_IRQ(AXP152, GPIO0_INPUT, 2, 0),
484 };
485
486 static const struct regmap_irq axp192_regmap_irqs[] = {
487 INIT_REGMAP_IRQ(AXP192, ACIN_OVER_V, 0, 7),
488 INIT_REGMAP_IRQ(AXP192, ACIN_PLUGIN, 0, 6),
489 INIT_REGMAP_IRQ(AXP192, ACIN_REMOVAL, 0, 5),
490 INIT_REGMAP_IRQ(AXP192, VBUS_OVER_V, 0, 4),
491 INIT_REGMAP_IRQ(AXP192, VBUS_PLUGIN, 0, 3),
492 INIT_REGMAP_IRQ(AXP192, VBUS_REMOVAL, 0, 2),
493 INIT_REGMAP_IRQ(AXP192, VBUS_V_LOW, 0, 1),
494 INIT_REGMAP_IRQ(AXP192, BATT_PLUGIN, 1, 7),
495 INIT_REGMAP_IRQ(AXP192, BATT_REMOVAL, 1, 6),
496 INIT_REGMAP_IRQ(AXP192, BATT_ENT_ACT_MODE, 1, 5),
497 INIT_REGMAP_IRQ(AXP192, BATT_EXIT_ACT_MODE, 1, 4),
498 INIT_REGMAP_IRQ(AXP192, CHARG, 1, 3),
499 INIT_REGMAP_IRQ(AXP192, CHARG_DONE, 1, 2),
500 INIT_REGMAP_IRQ(AXP192, BATT_TEMP_HIGH, 1, 1),
501 INIT_REGMAP_IRQ(AXP192, BATT_TEMP_LOW, 1, 0),
502 INIT_REGMAP_IRQ(AXP192, DIE_TEMP_HIGH, 2, 7),
503 INIT_REGMAP_IRQ(AXP192, CHARG_I_LOW, 2, 6),
504 INIT_REGMAP_IRQ(AXP192, DCDC1_V_LONG, 2, 5),
505 INIT_REGMAP_IRQ(AXP192, DCDC2_V_LONG, 2, 4),
506 INIT_REGMAP_IRQ(AXP192, DCDC3_V_LONG, 2, 3),
507 INIT_REGMAP_IRQ(AXP192, PEK_SHORT, 2, 1),
508 INIT_REGMAP_IRQ(AXP192, PEK_LONG, 2, 0),
509 INIT_REGMAP_IRQ(AXP192, N_OE_PWR_ON, 3, 7),
510 INIT_REGMAP_IRQ(AXP192, N_OE_PWR_OFF, 3, 6),
511 INIT_REGMAP_IRQ(AXP192, VBUS_VALID, 3, 5),
512 INIT_REGMAP_IRQ(AXP192, VBUS_NOT_VALID, 3, 4),
513 INIT_REGMAP_IRQ(AXP192, VBUS_SESS_VALID, 3, 3),
514 INIT_REGMAP_IRQ(AXP192, VBUS_SESS_END, 3, 2),
515 INIT_REGMAP_IRQ(AXP192, LOW_PWR_LVL, 3, 0),
516 INIT_REGMAP_IRQ(AXP192, TIMER, 4, 7),
517 INIT_REGMAP_IRQ(AXP192, GPIO2_INPUT, 4, 2),
518 INIT_REGMAP_IRQ(AXP192, GPIO1_INPUT, 4, 1),
519 INIT_REGMAP_IRQ(AXP192, GPIO0_INPUT, 4, 0),
520 };
521
522 static const struct regmap_irq axp20x_regmap_irqs[] = {
523 INIT_REGMAP_IRQ(AXP20X, ACIN_OVER_V, 0, 7),
524 INIT_REGMAP_IRQ(AXP20X, ACIN_PLUGIN, 0, 6),
525 INIT_REGMAP_IRQ(AXP20X, ACIN_REMOVAL, 0, 5),
526 INIT_REGMAP_IRQ(AXP20X, VBUS_OVER_V, 0, 4),
527 INIT_REGMAP_IRQ(AXP20X, VBUS_PLUGIN, 0, 3),
528 INIT_REGMAP_IRQ(AXP20X, VBUS_REMOVAL, 0, 2),
529 INIT_REGMAP_IRQ(AXP20X, VBUS_V_LOW, 0, 1),
530 INIT_REGMAP_IRQ(AXP20X, BATT_PLUGIN, 1, 7),
531 INIT_REGMAP_IRQ(AXP20X, BATT_REMOVAL, 1, 6),
532 INIT_REGMAP_IRQ(AXP20X, BATT_ENT_ACT_MODE, 1, 5),
533 INIT_REGMAP_IRQ(AXP20X, BATT_EXIT_ACT_MODE, 1, 4),
534 INIT_REGMAP_IRQ(AXP20X, CHARG, 1, 3),
535 INIT_REGMAP_IRQ(AXP20X, CHARG_DONE, 1, 2),
536 INIT_REGMAP_IRQ(AXP20X, BATT_TEMP_HIGH, 1, 1),
537 INIT_REGMAP_IRQ(AXP20X, BATT_TEMP_LOW, 1, 0),
538 INIT_REGMAP_IRQ(AXP20X, DIE_TEMP_HIGH, 2, 7),
539 INIT_REGMAP_IRQ(AXP20X, CHARG_I_LOW, 2, 6),
540 INIT_REGMAP_IRQ(AXP20X, DCDC1_V_LONG, 2, 5),
541 INIT_REGMAP_IRQ(AXP20X, DCDC2_V_LONG, 2, 4),
542 INIT_REGMAP_IRQ(AXP20X, DCDC3_V_LONG, 2, 3),
543 INIT_REGMAP_IRQ(AXP20X, PEK_SHORT, 2, 1),
544 INIT_REGMAP_IRQ(AXP20X, PEK_LONG, 2, 0),
545 INIT_REGMAP_IRQ(AXP20X, N_OE_PWR_ON, 3, 7),
546 INIT_REGMAP_IRQ(AXP20X, N_OE_PWR_OFF, 3, 6),
547 INIT_REGMAP_IRQ(AXP20X, VBUS_VALID, 3, 5),
548 INIT_REGMAP_IRQ(AXP20X, VBUS_NOT_VALID, 3, 4),
549 INIT_REGMAP_IRQ(AXP20X, VBUS_SESS_VALID, 3, 3),
550 INIT_REGMAP_IRQ(AXP20X, VBUS_SESS_END, 3, 2),
551 INIT_REGMAP_IRQ(AXP20X, LOW_PWR_LVL1, 3, 1),
552 INIT_REGMAP_IRQ(AXP20X, LOW_PWR_LVL2, 3, 0),
553 INIT_REGMAP_IRQ(AXP20X, TIMER, 4, 7),
554 INIT_REGMAP_IRQ(AXP20X, PEK_RIS_EDGE, 4, 6),
555 INIT_REGMAP_IRQ(AXP20X, PEK_FAL_EDGE, 4, 5),
556 INIT_REGMAP_IRQ(AXP20X, GPIO3_INPUT, 4, 3),
557 INIT_REGMAP_IRQ(AXP20X, GPIO2_INPUT, 4, 2),
558 INIT_REGMAP_IRQ(AXP20X, GPIO1_INPUT, 4, 1),
559 INIT_REGMAP_IRQ(AXP20X, GPIO0_INPUT, 4, 0),
560 };
561
562 static const struct regmap_irq axp22x_regmap_irqs[] = {
563 INIT_REGMAP_IRQ(AXP22X, ACIN_OVER_V, 0, 7),
564 INIT_REGMAP_IRQ(AXP22X, ACIN_PLUGIN, 0, 6),
565 INIT_REGMAP_IRQ(AXP22X, ACIN_REMOVAL, 0, 5),
566 INIT_REGMAP_IRQ(AXP22X, VBUS_OVER_V, 0, 4),
567 INIT_REGMAP_IRQ(AXP22X, VBUS_PLUGIN, 0, 3),
568 INIT_REGMAP_IRQ(AXP22X, VBUS_REMOVAL, 0, 2),
569 INIT_REGMAP_IRQ(AXP22X, VBUS_V_LOW, 0, 1),
570 INIT_REGMAP_IRQ(AXP22X, BATT_PLUGIN, 1, 7),
571 INIT_REGMAP_IRQ(AXP22X, BATT_REMOVAL, 1, 6),
572 INIT_REGMAP_IRQ(AXP22X, BATT_ENT_ACT_MODE, 1, 5),
573 INIT_REGMAP_IRQ(AXP22X, BATT_EXIT_ACT_MODE, 1, 4),
574 INIT_REGMAP_IRQ(AXP22X, CHARG, 1, 3),
575 INIT_REGMAP_IRQ(AXP22X, CHARG_DONE, 1, 2),
576 INIT_REGMAP_IRQ(AXP22X, BATT_TEMP_HIGH, 1, 1),
577 INIT_REGMAP_IRQ(AXP22X, BATT_TEMP_LOW, 1, 0),
578 INIT_REGMAP_IRQ(AXP22X, DIE_TEMP_HIGH, 2, 7),
579 INIT_REGMAP_IRQ(AXP22X, PEK_SHORT, 2, 1),
580 INIT_REGMAP_IRQ(AXP22X, PEK_LONG, 2, 0),
581 INIT_REGMAP_IRQ(AXP22X, LOW_PWR_LVL1, 3, 1),
582 INIT_REGMAP_IRQ(AXP22X, LOW_PWR_LVL2, 3, 0),
583 INIT_REGMAP_IRQ(AXP22X, TIMER, 4, 7),
584 INIT_REGMAP_IRQ(AXP22X, PEK_RIS_EDGE, 4, 6),
585 INIT_REGMAP_IRQ(AXP22X, PEK_FAL_EDGE, 4, 5),
586 INIT_REGMAP_IRQ(AXP22X, GPIO1_INPUT, 4, 1),
587 INIT_REGMAP_IRQ(AXP22X, GPIO0_INPUT, 4, 0),
588 };
589
590 /* some IRQs are compatible with axp20x models */
591 static const struct regmap_irq axp288_regmap_irqs[] = {
592 INIT_REGMAP_IRQ(AXP288, VBUS_FALL, 0, 2),
593 INIT_REGMAP_IRQ(AXP288, VBUS_RISE, 0, 3),
594 INIT_REGMAP_IRQ(AXP288, OV, 0, 4),
595 INIT_REGMAP_IRQ(AXP288, FALLING_ALT, 0, 5),
596 INIT_REGMAP_IRQ(AXP288, RISING_ALT, 0, 6),
597 INIT_REGMAP_IRQ(AXP288, OV_ALT, 0, 7),
598
599 INIT_REGMAP_IRQ(AXP288, DONE, 1, 2),
600 INIT_REGMAP_IRQ(AXP288, CHARGING, 1, 3),
601 INIT_REGMAP_IRQ(AXP288, SAFE_QUIT, 1, 4),
602 INIT_REGMAP_IRQ(AXP288, SAFE_ENTER, 1, 5),
603 INIT_REGMAP_IRQ(AXP288, ABSENT, 1, 6),
604 INIT_REGMAP_IRQ(AXP288, APPEND, 1, 7),
605
606 INIT_REGMAP_IRQ(AXP288, QWBTU, 2, 0),
607 INIT_REGMAP_IRQ(AXP288, WBTU, 2, 1),
608 INIT_REGMAP_IRQ(AXP288, QWBTO, 2, 2),
609 INIT_REGMAP_IRQ(AXP288, WBTO, 2, 3),
610 INIT_REGMAP_IRQ(AXP288, QCBTU, 2, 4),
611 INIT_REGMAP_IRQ(AXP288, CBTU, 2, 5),
612 INIT_REGMAP_IRQ(AXP288, QCBTO, 2, 6),
613 INIT_REGMAP_IRQ(AXP288, CBTO, 2, 7),
614
615 INIT_REGMAP_IRQ(AXP288, WL2, 3, 0),
616 INIT_REGMAP_IRQ(AXP288, WL1, 3, 1),
617 INIT_REGMAP_IRQ(AXP288, GPADC, 3, 2),
618 INIT_REGMAP_IRQ(AXP288, OT, 3, 7),
619
620 INIT_REGMAP_IRQ(AXP288, GPIO0, 4, 0),
621 INIT_REGMAP_IRQ(AXP288, GPIO1, 4, 1),
622 INIT_REGMAP_IRQ(AXP288, POKO, 4, 2),
623 INIT_REGMAP_IRQ(AXP288, POKL, 4, 3),
624 INIT_REGMAP_IRQ(AXP288, POKS, 4, 4),
625 INIT_REGMAP_IRQ(AXP288, POKN, 4, 5),
626 INIT_REGMAP_IRQ(AXP288, POKP, 4, 6),
627 INIT_REGMAP_IRQ(AXP288, TIMER, 4, 7),
628
629 INIT_REGMAP_IRQ(AXP288, MV_CHNG, 5, 0),
630 INIT_REGMAP_IRQ(AXP288, BC_USB_CHNG, 5, 1),
631 };
632
633 static const struct regmap_irq axp313a_regmap_irqs[] = {
634 INIT_REGMAP_IRQ(AXP313A, PEK_RIS_EDGE, 0, 7),
635 INIT_REGMAP_IRQ(AXP313A, PEK_FAL_EDGE, 0, 6),
636 INIT_REGMAP_IRQ(AXP313A, PEK_SHORT, 0, 5),
637 INIT_REGMAP_IRQ(AXP313A, PEK_LONG, 0, 4),
638 INIT_REGMAP_IRQ(AXP313A, DCDC3_V_LOW, 0, 3),
639 INIT_REGMAP_IRQ(AXP313A, DCDC2_V_LOW, 0, 2),
640 INIT_REGMAP_IRQ(AXP313A, DIE_TEMP_HIGH, 0, 0),
641 };
642
643 static const struct regmap_irq axp717_regmap_irqs[] = {
644 INIT_REGMAP_IRQ(AXP717, SOC_DROP_LVL2, 0, 7),
645 INIT_REGMAP_IRQ(AXP717, SOC_DROP_LVL1, 0, 6),
646 INIT_REGMAP_IRQ(AXP717, GAUGE_NEW_SOC, 0, 4),
647 INIT_REGMAP_IRQ(AXP717, BOOST_OVER_V, 0, 2),
648 INIT_REGMAP_IRQ(AXP717, VBUS_OVER_V, 0, 1),
649 INIT_REGMAP_IRQ(AXP717, VBUS_FAULT, 0, 0),
650 INIT_REGMAP_IRQ(AXP717, VBUS_PLUGIN, 1, 7),
651 INIT_REGMAP_IRQ(AXP717, VBUS_REMOVAL, 1, 6),
652 INIT_REGMAP_IRQ(AXP717, BATT_PLUGIN, 1, 5),
653 INIT_REGMAP_IRQ(AXP717, BATT_REMOVAL, 1, 4),
654 INIT_REGMAP_IRQ(AXP717, PEK_SHORT, 1, 3),
655 INIT_REGMAP_IRQ(AXP717, PEK_LONG, 1, 2),
656 INIT_REGMAP_IRQ(AXP717, PEK_FAL_EDGE, 1, 1),
657 INIT_REGMAP_IRQ(AXP717, PEK_RIS_EDGE, 1, 0),
658 INIT_REGMAP_IRQ(AXP717, WDOG_EXPIRE, 2, 7),
659 INIT_REGMAP_IRQ(AXP717, LDO_OVER_CURR, 2, 6),
660 INIT_REGMAP_IRQ(AXP717, BATT_OVER_CURR, 2, 5),
661 INIT_REGMAP_IRQ(AXP717, CHARG_DONE, 2, 4),
662 INIT_REGMAP_IRQ(AXP717, CHARG, 2, 3),
663 INIT_REGMAP_IRQ(AXP717, DIE_TEMP_HIGH, 2, 2),
664 INIT_REGMAP_IRQ(AXP717, CHARG_TIMER, 2, 1),
665 INIT_REGMAP_IRQ(AXP717, BATT_OVER_V, 2, 0),
666 INIT_REGMAP_IRQ(AXP717, BC_USB_DONE, 3, 7),
667 INIT_REGMAP_IRQ(AXP717, BC_USB_CHNG, 3, 6),
668 INIT_REGMAP_IRQ(AXP717, BATT_QUIT_TEMP_HIGH, 3, 4),
669 INIT_REGMAP_IRQ(AXP717, BATT_CHG_TEMP_HIGH, 3, 3),
670 INIT_REGMAP_IRQ(AXP717, BATT_CHG_TEMP_LOW, 3, 2),
671 INIT_REGMAP_IRQ(AXP717, BATT_ACT_TEMP_HIGH, 3, 1),
672 INIT_REGMAP_IRQ(AXP717, BATT_ACT_TEMP_LOW, 3, 0),
673 INIT_REGMAP_IRQ(AXP717, TYPEC_REMOVE, 4, 6),
674 INIT_REGMAP_IRQ(AXP717, TYPEC_PLUGIN, 4, 5),
675 };
676
677 static const struct regmap_irq axp803_regmap_irqs[] = {
678 INIT_REGMAP_IRQ(AXP803, ACIN_OVER_V, 0, 7),
679 INIT_REGMAP_IRQ(AXP803, ACIN_PLUGIN, 0, 6),
680 INIT_REGMAP_IRQ(AXP803, ACIN_REMOVAL, 0, 5),
681 INIT_REGMAP_IRQ(AXP803, VBUS_OVER_V, 0, 4),
682 INIT_REGMAP_IRQ(AXP803, VBUS_PLUGIN, 0, 3),
683 INIT_REGMAP_IRQ(AXP803, VBUS_REMOVAL, 0, 2),
684 INIT_REGMAP_IRQ(AXP803, BATT_PLUGIN, 1, 7),
685 INIT_REGMAP_IRQ(AXP803, BATT_REMOVAL, 1, 6),
686 INIT_REGMAP_IRQ(AXP803, BATT_ENT_ACT_MODE, 1, 5),
687 INIT_REGMAP_IRQ(AXP803, BATT_EXIT_ACT_MODE, 1, 4),
688 INIT_REGMAP_IRQ(AXP803, CHARG, 1, 3),
689 INIT_REGMAP_IRQ(AXP803, CHARG_DONE, 1, 2),
690 INIT_REGMAP_IRQ(AXP803, BATT_CHG_TEMP_HIGH, 2, 7),
691 INIT_REGMAP_IRQ(AXP803, BATT_CHG_TEMP_HIGH_END, 2, 6),
692 INIT_REGMAP_IRQ(AXP803, BATT_CHG_TEMP_LOW, 2, 5),
693 INIT_REGMAP_IRQ(AXP803, BATT_CHG_TEMP_LOW_END, 2, 4),
694 INIT_REGMAP_IRQ(AXP803, BATT_ACT_TEMP_HIGH, 2, 3),
695 INIT_REGMAP_IRQ(AXP803, BATT_ACT_TEMP_HIGH_END, 2, 2),
696 INIT_REGMAP_IRQ(AXP803, BATT_ACT_TEMP_LOW, 2, 1),
697 INIT_REGMAP_IRQ(AXP803, BATT_ACT_TEMP_LOW_END, 2, 0),
698 INIT_REGMAP_IRQ(AXP803, DIE_TEMP_HIGH, 3, 7),
699 INIT_REGMAP_IRQ(AXP803, GPADC, 3, 2),
700 INIT_REGMAP_IRQ(AXP803, LOW_PWR_LVL1, 3, 1),
701 INIT_REGMAP_IRQ(AXP803, LOW_PWR_LVL2, 3, 0),
702 INIT_REGMAP_IRQ(AXP803, TIMER, 4, 7),
703 INIT_REGMAP_IRQ(AXP803, PEK_RIS_EDGE, 4, 6),
704 INIT_REGMAP_IRQ(AXP803, PEK_FAL_EDGE, 4, 5),
705 INIT_REGMAP_IRQ(AXP803, PEK_SHORT, 4, 4),
706 INIT_REGMAP_IRQ(AXP803, PEK_LONG, 4, 3),
707 INIT_REGMAP_IRQ(AXP803, PEK_OVER_OFF, 4, 2),
708 INIT_REGMAP_IRQ(AXP803, GPIO1_INPUT, 4, 1),
709 INIT_REGMAP_IRQ(AXP803, GPIO0_INPUT, 4, 0),
710 INIT_REGMAP_IRQ(AXP803, BC_USB_CHNG, 5, 1),
711 INIT_REGMAP_IRQ(AXP803, MV_CHNG, 5, 0),
712 };
713
714 static const struct regmap_irq axp806_regmap_irqs[] = {
715 INIT_REGMAP_IRQ(AXP806, DIE_TEMP_HIGH_LV1, 0, 0),
716 INIT_REGMAP_IRQ(AXP806, DIE_TEMP_HIGH_LV2, 0, 1),
717 INIT_REGMAP_IRQ(AXP806, DCDCA_V_LOW, 0, 3),
718 INIT_REGMAP_IRQ(AXP806, DCDCB_V_LOW, 0, 4),
719 INIT_REGMAP_IRQ(AXP806, DCDCC_V_LOW, 0, 5),
720 INIT_REGMAP_IRQ(AXP806, DCDCD_V_LOW, 0, 6),
721 INIT_REGMAP_IRQ(AXP806, DCDCE_V_LOW, 0, 7),
722 INIT_REGMAP_IRQ(AXP806, POK_LONG, 1, 0),
723 INIT_REGMAP_IRQ(AXP806, POK_SHORT, 1, 1),
724 INIT_REGMAP_IRQ(AXP806, WAKEUP, 1, 4),
725 INIT_REGMAP_IRQ(AXP806, POK_FALL, 1, 5),
726 INIT_REGMAP_IRQ(AXP806, POK_RISE, 1, 6),
727 };
728
729 static const struct regmap_irq axp809_regmap_irqs[] = {
730 INIT_REGMAP_IRQ(AXP809, ACIN_OVER_V, 0, 7),
731 INIT_REGMAP_IRQ(AXP809, ACIN_PLUGIN, 0, 6),
732 INIT_REGMAP_IRQ(AXP809, ACIN_REMOVAL, 0, 5),
733 INIT_REGMAP_IRQ(AXP809, VBUS_OVER_V, 0, 4),
734 INIT_REGMAP_IRQ(AXP809, VBUS_PLUGIN, 0, 3),
735 INIT_REGMAP_IRQ(AXP809, VBUS_REMOVAL, 0, 2),
736 INIT_REGMAP_IRQ(AXP809, VBUS_V_LOW, 0, 1),
737 INIT_REGMAP_IRQ(AXP809, BATT_PLUGIN, 1, 7),
738 INIT_REGMAP_IRQ(AXP809, BATT_REMOVAL, 1, 6),
739 INIT_REGMAP_IRQ(AXP809, BATT_ENT_ACT_MODE, 1, 5),
740 INIT_REGMAP_IRQ(AXP809, BATT_EXIT_ACT_MODE, 1, 4),
741 INIT_REGMAP_IRQ(AXP809, CHARG, 1, 3),
742 INIT_REGMAP_IRQ(AXP809, CHARG_DONE, 1, 2),
743 INIT_REGMAP_IRQ(AXP809, BATT_CHG_TEMP_HIGH, 2, 7),
744 INIT_REGMAP_IRQ(AXP809, BATT_CHG_TEMP_HIGH_END, 2, 6),
745 INIT_REGMAP_IRQ(AXP809, BATT_CHG_TEMP_LOW, 2, 5),
746 INIT_REGMAP_IRQ(AXP809, BATT_CHG_TEMP_LOW_END, 2, 4),
747 INIT_REGMAP_IRQ(AXP809, BATT_ACT_TEMP_HIGH, 2, 3),
748 INIT_REGMAP_IRQ(AXP809, BATT_ACT_TEMP_HIGH_END, 2, 2),
749 INIT_REGMAP_IRQ(AXP809, BATT_ACT_TEMP_LOW, 2, 1),
750 INIT_REGMAP_IRQ(AXP809, BATT_ACT_TEMP_LOW_END, 2, 0),
751 INIT_REGMAP_IRQ(AXP809, DIE_TEMP_HIGH, 3, 7),
752 INIT_REGMAP_IRQ(AXP809, LOW_PWR_LVL1, 3, 1),
753 INIT_REGMAP_IRQ(AXP809, LOW_PWR_LVL2, 3, 0),
754 INIT_REGMAP_IRQ(AXP809, TIMER, 4, 7),
755 INIT_REGMAP_IRQ(AXP809, PEK_RIS_EDGE, 4, 6),
756 INIT_REGMAP_IRQ(AXP809, PEK_FAL_EDGE, 4, 5),
757 INIT_REGMAP_IRQ(AXP809, PEK_SHORT, 4, 4),
758 INIT_REGMAP_IRQ(AXP809, PEK_LONG, 4, 3),
759 INIT_REGMAP_IRQ(AXP809, PEK_OVER_OFF, 4, 2),
760 INIT_REGMAP_IRQ(AXP809, GPIO1_INPUT, 4, 1),
761 INIT_REGMAP_IRQ(AXP809, GPIO0_INPUT, 4, 0),
762 };
763
764 static const struct regmap_irq axp15060_regmap_irqs[] = {
765 INIT_REGMAP_IRQ(AXP15060, DIE_TEMP_HIGH_LV1, 0, 0),
766 INIT_REGMAP_IRQ(AXP15060, DIE_TEMP_HIGH_LV2, 0, 1),
767 INIT_REGMAP_IRQ(AXP15060, DCDC1_V_LOW, 0, 2),
768 INIT_REGMAP_IRQ(AXP15060, DCDC2_V_LOW, 0, 3),
769 INIT_REGMAP_IRQ(AXP15060, DCDC3_V_LOW, 0, 4),
770 INIT_REGMAP_IRQ(AXP15060, DCDC4_V_LOW, 0, 5),
771 INIT_REGMAP_IRQ(AXP15060, DCDC5_V_LOW, 0, 6),
772 INIT_REGMAP_IRQ(AXP15060, DCDC6_V_LOW, 0, 7),
773 INIT_REGMAP_IRQ(AXP15060, PEK_LONG, 1, 0),
774 INIT_REGMAP_IRQ(AXP15060, PEK_SHORT, 1, 1),
775 INIT_REGMAP_IRQ(AXP15060, GPIO1_INPUT, 1, 2),
776 INIT_REGMAP_IRQ(AXP15060, PEK_FAL_EDGE, 1, 3),
777 INIT_REGMAP_IRQ(AXP15060, PEK_RIS_EDGE, 1, 4),
778 INIT_REGMAP_IRQ(AXP15060, GPIO2_INPUT, 1, 5),
779 };
780
781 static const struct regmap_irq_chip axp152_regmap_irq_chip = {
782 .name = "axp152_irq_chip",
783 .status_base = AXP152_IRQ1_STATE,
784 .ack_base = AXP152_IRQ1_STATE,
785 .unmask_base = AXP152_IRQ1_EN,
786 .init_ack_masked = true,
787 .irqs = axp152_regmap_irqs,
788 .num_irqs = ARRAY_SIZE(axp152_regmap_irqs),
789 .num_regs = 3,
790 };
791
axp192_get_irq_reg(struct regmap_irq_chip_data * data,unsigned int base,int index)792 static unsigned int axp192_get_irq_reg(struct regmap_irq_chip_data *data,
793 unsigned int base, int index)
794 {
795 /* linear mapping for IRQ1 to IRQ4 */
796 if (index < 4)
797 return base + index;
798
799 /* handle IRQ5 separately */
800 if (base == AXP192_IRQ1_EN)
801 return AXP192_IRQ5_EN;
802
803 return AXP192_IRQ5_STATE;
804 }
805
806 static const struct regmap_irq_chip axp192_regmap_irq_chip = {
807 .name = "axp192_irq_chip",
808 .status_base = AXP192_IRQ1_STATE,
809 .ack_base = AXP192_IRQ1_STATE,
810 .unmask_base = AXP192_IRQ1_EN,
811 .init_ack_masked = true,
812 .irqs = axp192_regmap_irqs,
813 .num_irqs = ARRAY_SIZE(axp192_regmap_irqs),
814 .num_regs = 5,
815 .get_irq_reg = axp192_get_irq_reg,
816 };
817
818 static const struct regmap_irq_chip axp20x_regmap_irq_chip = {
819 .name = "axp20x_irq_chip",
820 .status_base = AXP20X_IRQ1_STATE,
821 .ack_base = AXP20X_IRQ1_STATE,
822 .unmask_base = AXP20X_IRQ1_EN,
823 .init_ack_masked = true,
824 .irqs = axp20x_regmap_irqs,
825 .num_irqs = ARRAY_SIZE(axp20x_regmap_irqs),
826 .num_regs = 5,
827
828 };
829
830 static const struct regmap_irq_chip axp22x_regmap_irq_chip = {
831 .name = "axp22x_irq_chip",
832 .status_base = AXP20X_IRQ1_STATE,
833 .ack_base = AXP20X_IRQ1_STATE,
834 .unmask_base = AXP20X_IRQ1_EN,
835 .init_ack_masked = true,
836 .irqs = axp22x_regmap_irqs,
837 .num_irqs = ARRAY_SIZE(axp22x_regmap_irqs),
838 .num_regs = 5,
839 };
840
841 static const struct regmap_irq_chip axp288_regmap_irq_chip = {
842 .name = "axp288_irq_chip",
843 .status_base = AXP20X_IRQ1_STATE,
844 .ack_base = AXP20X_IRQ1_STATE,
845 .unmask_base = AXP20X_IRQ1_EN,
846 .init_ack_masked = true,
847 .irqs = axp288_regmap_irqs,
848 .num_irqs = ARRAY_SIZE(axp288_regmap_irqs),
849 .num_regs = 6,
850
851 };
852
853 static const struct regmap_irq_chip axp313a_regmap_irq_chip = {
854 .name = "axp313a_irq_chip",
855 .status_base = AXP313A_IRQ_STATE,
856 .ack_base = AXP313A_IRQ_STATE,
857 .unmask_base = AXP313A_IRQ_EN,
858 .init_ack_masked = true,
859 .irqs = axp313a_regmap_irqs,
860 .num_irqs = ARRAY_SIZE(axp313a_regmap_irqs),
861 .num_regs = 1,
862 };
863
864 static const struct regmap_irq_chip axp717_regmap_irq_chip = {
865 .name = "axp717_irq_chip",
866 .status_base = AXP717_IRQ0_STATE,
867 .ack_base = AXP717_IRQ0_STATE,
868 .unmask_base = AXP717_IRQ0_EN,
869 .init_ack_masked = true,
870 .irqs = axp717_regmap_irqs,
871 .num_irqs = ARRAY_SIZE(axp717_regmap_irqs),
872 .num_regs = 5,
873 };
874
875 static const struct regmap_irq_chip axp803_regmap_irq_chip = {
876 .name = "axp803",
877 .status_base = AXP20X_IRQ1_STATE,
878 .ack_base = AXP20X_IRQ1_STATE,
879 .unmask_base = AXP20X_IRQ1_EN,
880 .init_ack_masked = true,
881 .irqs = axp803_regmap_irqs,
882 .num_irqs = ARRAY_SIZE(axp803_regmap_irqs),
883 .num_regs = 6,
884 };
885
886 static const struct regmap_irq_chip axp806_regmap_irq_chip = {
887 .name = "axp806",
888 .status_base = AXP20X_IRQ1_STATE,
889 .ack_base = AXP20X_IRQ1_STATE,
890 .unmask_base = AXP20X_IRQ1_EN,
891 .init_ack_masked = true,
892 .irqs = axp806_regmap_irqs,
893 .num_irqs = ARRAY_SIZE(axp806_regmap_irqs),
894 .num_regs = 2,
895 };
896
897 static const struct regmap_irq_chip axp809_regmap_irq_chip = {
898 .name = "axp809",
899 .status_base = AXP20X_IRQ1_STATE,
900 .ack_base = AXP20X_IRQ1_STATE,
901 .unmask_base = AXP20X_IRQ1_EN,
902 .init_ack_masked = true,
903 .irqs = axp809_regmap_irqs,
904 .num_irqs = ARRAY_SIZE(axp809_regmap_irqs),
905 .num_regs = 5,
906 };
907
908 static const struct regmap_irq_chip axp15060_regmap_irq_chip = {
909 .name = "axp15060",
910 .status_base = AXP15060_IRQ1_STATE,
911 .ack_base = AXP15060_IRQ1_STATE,
912 .unmask_base = AXP15060_IRQ1_EN,
913 .init_ack_masked = true,
914 .irqs = axp15060_regmap_irqs,
915 .num_irqs = ARRAY_SIZE(axp15060_regmap_irqs),
916 .num_regs = 2,
917 };
918
919 static const struct mfd_cell axp192_cells[] = {
920 {
921 .name = "axp192-adc",
922 .of_compatible = "x-powers,axp192-adc",
923 }, {
924 .name = "axp20x-battery-power-supply",
925 .of_compatible = "x-powers,axp192-battery-power-supply",
926 }, {
927 .name = "axp20x-ac-power-supply",
928 .of_compatible = "x-powers,axp202-ac-power-supply",
929 .num_resources = ARRAY_SIZE(axp192_ac_power_supply_resources),
930 .resources = axp192_ac_power_supply_resources,
931 }, {
932 .name = "axp20x-usb-power-supply",
933 .of_compatible = "x-powers,axp192-usb-power-supply",
934 .num_resources = ARRAY_SIZE(axp192_usb_power_supply_resources),
935 .resources = axp192_usb_power_supply_resources,
936 },
937 { .name = "axp20x-regulator" },
938 };
939
940 static const struct mfd_cell axp20x_cells[] = {
941 {
942 .name = "axp20x-gpio",
943 .of_compatible = "x-powers,axp209-gpio",
944 }, {
945 .name = "axp20x-pek",
946 .num_resources = ARRAY_SIZE(axp20x_pek_resources),
947 .resources = axp20x_pek_resources,
948 }, {
949 .name = "axp20x-regulator",
950 }, {
951 .name = "axp20x-adc",
952 .of_compatible = "x-powers,axp209-adc",
953 }, {
954 .name = "axp20x-battery-power-supply",
955 .of_compatible = "x-powers,axp209-battery-power-supply",
956 }, {
957 .name = "axp20x-ac-power-supply",
958 .of_compatible = "x-powers,axp202-ac-power-supply",
959 .num_resources = ARRAY_SIZE(axp20x_ac_power_supply_resources),
960 .resources = axp20x_ac_power_supply_resources,
961 }, {
962 .name = "axp20x-usb-power-supply",
963 .of_compatible = "x-powers,axp202-usb-power-supply",
964 .num_resources = ARRAY_SIZE(axp20x_usb_power_supply_resources),
965 .resources = axp20x_usb_power_supply_resources,
966 },
967 };
968
969 static const struct mfd_cell axp221_cells[] = {
970 {
971 .name = "axp20x-gpio",
972 .of_compatible = "x-powers,axp221-gpio",
973 }, {
974 .name = "axp221-pek",
975 .num_resources = ARRAY_SIZE(axp22x_pek_resources),
976 .resources = axp22x_pek_resources,
977 }, {
978 .name = "axp20x-regulator",
979 }, {
980 .name = "axp22x-adc",
981 .of_compatible = "x-powers,axp221-adc",
982 }, {
983 .name = "axp20x-ac-power-supply",
984 .of_compatible = "x-powers,axp221-ac-power-supply",
985 .num_resources = ARRAY_SIZE(axp20x_ac_power_supply_resources),
986 .resources = axp20x_ac_power_supply_resources,
987 }, {
988 .name = "axp20x-battery-power-supply",
989 .of_compatible = "x-powers,axp221-battery-power-supply",
990 }, {
991 .name = "axp20x-usb-power-supply",
992 .of_compatible = "x-powers,axp221-usb-power-supply",
993 .num_resources = ARRAY_SIZE(axp22x_usb_power_supply_resources),
994 .resources = axp22x_usb_power_supply_resources,
995 },
996 };
997
998 static const struct mfd_cell axp223_cells[] = {
999 {
1000 .name = "axp20x-gpio",
1001 .of_compatible = "x-powers,axp221-gpio",
1002 }, {
1003 .name = "axp221-pek",
1004 .num_resources = ARRAY_SIZE(axp22x_pek_resources),
1005 .resources = axp22x_pek_resources,
1006 }, {
1007 .name = "axp22x-adc",
1008 .of_compatible = "x-powers,axp221-adc",
1009 }, {
1010 .name = "axp20x-battery-power-supply",
1011 .of_compatible = "x-powers,axp221-battery-power-supply",
1012 }, {
1013 .name = "axp20x-regulator",
1014 }, {
1015 .name = "axp20x-ac-power-supply",
1016 .of_compatible = "x-powers,axp221-ac-power-supply",
1017 .num_resources = ARRAY_SIZE(axp20x_ac_power_supply_resources),
1018 .resources = axp20x_ac_power_supply_resources,
1019 }, {
1020 .name = "axp20x-usb-power-supply",
1021 .of_compatible = "x-powers,axp223-usb-power-supply",
1022 .num_resources = ARRAY_SIZE(axp22x_usb_power_supply_resources),
1023 .resources = axp22x_usb_power_supply_resources,
1024 },
1025 };
1026
1027 static const struct mfd_cell axp152_cells[] = {
1028 {
1029 .name = "axp20x-pek",
1030 .num_resources = ARRAY_SIZE(axp152_pek_resources),
1031 .resources = axp152_pek_resources,
1032 },
1033 };
1034
1035 static struct mfd_cell axp313a_cells[] = {
1036 MFD_CELL_NAME("axp20x-regulator"),
1037 MFD_CELL_RES("axp313a-pek", axp313a_pek_resources),
1038 };
1039
1040 static struct mfd_cell axp717_cells[] = {
1041 MFD_CELL_NAME("axp20x-regulator"),
1042 MFD_CELL_RES("axp20x-pek", axp717_pek_resources),
1043 MFD_CELL_OF("axp717-adc",
1044 NULL, NULL, 0, 0, "x-powers,axp717-adc"),
1045 MFD_CELL_OF("axp20x-usb-power-supply",
1046 axp717_usb_power_supply_resources, NULL, 0, 0,
1047 "x-powers,axp717-usb-power-supply"),
1048 MFD_CELL_OF("axp20x-battery-power-supply",
1049 NULL, NULL, 0, 0, "x-powers,axp717-battery-power-supply"),
1050 };
1051
1052 static const struct resource axp288_adc_resources[] = {
1053 DEFINE_RES_IRQ_NAMED(AXP288_IRQ_GPADC, "GPADC"),
1054 };
1055
1056 static const struct resource axp288_extcon_resources[] = {
1057 DEFINE_RES_IRQ(AXP288_IRQ_VBUS_FALL),
1058 DEFINE_RES_IRQ(AXP288_IRQ_VBUS_RISE),
1059 DEFINE_RES_IRQ(AXP288_IRQ_MV_CHNG),
1060 DEFINE_RES_IRQ(AXP288_IRQ_BC_USB_CHNG),
1061 };
1062
1063 static const struct resource axp288_charger_resources[] = {
1064 DEFINE_RES_IRQ(AXP288_IRQ_OV),
1065 DEFINE_RES_IRQ(AXP288_IRQ_DONE),
1066 DEFINE_RES_IRQ(AXP288_IRQ_CHARGING),
1067 DEFINE_RES_IRQ(AXP288_IRQ_SAFE_QUIT),
1068 DEFINE_RES_IRQ(AXP288_IRQ_SAFE_ENTER),
1069 DEFINE_RES_IRQ(AXP288_IRQ_QCBTU),
1070 DEFINE_RES_IRQ(AXP288_IRQ_CBTU),
1071 DEFINE_RES_IRQ(AXP288_IRQ_QCBTO),
1072 DEFINE_RES_IRQ(AXP288_IRQ_CBTO),
1073 };
1074
1075 static const char * const axp288_fuel_gauge_suppliers[] = { "axp288_charger" };
1076
1077 static const struct property_entry axp288_fuel_gauge_properties[] = {
1078 PROPERTY_ENTRY_STRING_ARRAY("supplied-from", axp288_fuel_gauge_suppliers),
1079 { }
1080 };
1081
1082 static const struct software_node axp288_fuel_gauge_sw_node = {
1083 .name = "axp288_fuel_gauge",
1084 .properties = axp288_fuel_gauge_properties,
1085 };
1086
1087 static const struct mfd_cell axp288_cells[] = {
1088 {
1089 .name = "axp288_adc",
1090 .num_resources = ARRAY_SIZE(axp288_adc_resources),
1091 .resources = axp288_adc_resources,
1092 }, {
1093 .name = "axp288_extcon",
1094 .num_resources = ARRAY_SIZE(axp288_extcon_resources),
1095 .resources = axp288_extcon_resources,
1096 }, {
1097 .name = "axp288_charger",
1098 .num_resources = ARRAY_SIZE(axp288_charger_resources),
1099 .resources = axp288_charger_resources,
1100 }, {
1101 .name = "axp288_fuel_gauge",
1102 .num_resources = ARRAY_SIZE(axp288_fuel_gauge_resources),
1103 .resources = axp288_fuel_gauge_resources,
1104 .swnode = &axp288_fuel_gauge_sw_node,
1105 }, {
1106 .name = "axp221-pek",
1107 .num_resources = ARRAY_SIZE(axp288_power_button_resources),
1108 .resources = axp288_power_button_resources,
1109 }, {
1110 .name = "axp288_pmic_acpi",
1111 },
1112 };
1113
1114 static const struct mfd_cell axp803_cells[] = {
1115 {
1116 .name = "axp221-pek",
1117 .num_resources = ARRAY_SIZE(axp803_pek_resources),
1118 .resources = axp803_pek_resources,
1119 }, {
1120 .name = "axp20x-gpio",
1121 .of_compatible = "x-powers,axp813-gpio",
1122 }, {
1123 .name = "axp813-adc",
1124 .of_compatible = "x-powers,axp813-adc",
1125 }, {
1126 .name = "axp20x-battery-power-supply",
1127 .of_compatible = "x-powers,axp813-battery-power-supply",
1128 }, {
1129 .name = "axp20x-ac-power-supply",
1130 .of_compatible = "x-powers,axp813-ac-power-supply",
1131 .num_resources = ARRAY_SIZE(axp20x_ac_power_supply_resources),
1132 .resources = axp20x_ac_power_supply_resources,
1133 }, {
1134 .name = "axp20x-usb-power-supply",
1135 .num_resources = ARRAY_SIZE(axp803_usb_power_supply_resources),
1136 .resources = axp803_usb_power_supply_resources,
1137 .of_compatible = "x-powers,axp813-usb-power-supply",
1138 },
1139 { .name = "axp20x-regulator" },
1140 };
1141
1142 static const struct mfd_cell axp806_self_working_cells[] = {
1143 {
1144 .name = "axp221-pek",
1145 .num_resources = ARRAY_SIZE(axp806_pek_resources),
1146 .resources = axp806_pek_resources,
1147 },
1148 { .name = "axp20x-regulator" },
1149 };
1150
1151 static const struct mfd_cell axp806_cells[] = {
1152 {
1153 .id = 2,
1154 .name = "axp20x-regulator",
1155 },
1156 };
1157
1158 static const struct mfd_cell axp809_cells[] = {
1159 {
1160 .name = "axp20x-gpio",
1161 .of_compatible = "x-powers,axp221-gpio",
1162 }, {
1163 .name = "axp221-pek",
1164 .num_resources = ARRAY_SIZE(axp809_pek_resources),
1165 .resources = axp809_pek_resources,
1166 }, {
1167 .id = 1,
1168 .name = "axp20x-regulator",
1169 },
1170 };
1171
1172 static const struct mfd_cell axp813_cells[] = {
1173 {
1174 .name = "axp221-pek",
1175 .num_resources = ARRAY_SIZE(axp803_pek_resources),
1176 .resources = axp803_pek_resources,
1177 }, {
1178 .name = "axp20x-regulator",
1179 }, {
1180 .name = "axp20x-gpio",
1181 .of_compatible = "x-powers,axp813-gpio",
1182 }, {
1183 .name = "axp813-adc",
1184 .of_compatible = "x-powers,axp813-adc",
1185 }, {
1186 .name = "axp20x-battery-power-supply",
1187 .of_compatible = "x-powers,axp813-battery-power-supply",
1188 }, {
1189 .name = "axp20x-ac-power-supply",
1190 .of_compatible = "x-powers,axp813-ac-power-supply",
1191 .num_resources = ARRAY_SIZE(axp20x_ac_power_supply_resources),
1192 .resources = axp20x_ac_power_supply_resources,
1193 }, {
1194 .name = "axp20x-usb-power-supply",
1195 .num_resources = ARRAY_SIZE(axp803_usb_power_supply_resources),
1196 .resources = axp803_usb_power_supply_resources,
1197 .of_compatible = "x-powers,axp813-usb-power-supply",
1198 },
1199 };
1200
1201 static const struct mfd_cell axp15060_cells[] = {
1202 {
1203 .name = "axp221-pek",
1204 .num_resources = ARRAY_SIZE(axp15060_pek_resources),
1205 .resources = axp15060_pek_resources,
1206 }, {
1207 .name = "axp20x-regulator",
1208 },
1209 };
1210
1211 /* For boards that don't have IRQ line connected to SOC. */
1212 static const struct mfd_cell axp_regulator_only_cells[] = {
1213 {
1214 .name = "axp20x-regulator",
1215 },
1216 };
1217
axp20x_power_off(struct sys_off_data * data)1218 static int axp20x_power_off(struct sys_off_data *data)
1219 {
1220 struct axp20x_dev *axp20x = data->cb_data;
1221 unsigned int shutdown_reg;
1222
1223 switch (axp20x->variant) {
1224 case AXP313A_ID:
1225 shutdown_reg = AXP313A_SHUTDOWN_CTRL;
1226 break;
1227 default:
1228 shutdown_reg = AXP20X_OFF_CTRL;
1229 break;
1230 }
1231
1232 regmap_write(axp20x->regmap, shutdown_reg, AXP20X_OFF);
1233
1234 /* Give capacitors etc. time to drain to avoid kernel panic msg. */
1235 mdelay(500);
1236
1237 return NOTIFY_DONE;
1238 }
1239
axp20x_match_device(struct axp20x_dev * axp20x)1240 int axp20x_match_device(struct axp20x_dev *axp20x)
1241 {
1242 struct device *dev = axp20x->dev;
1243 const struct mfd_cell *cells_no_irq = NULL;
1244 int nr_cells_no_irq = 0;
1245
1246 axp20x->variant = (long)device_get_match_data(dev);
1247 switch (axp20x->variant) {
1248 case AXP152_ID:
1249 axp20x->nr_cells = ARRAY_SIZE(axp152_cells);
1250 axp20x->cells = axp152_cells;
1251 axp20x->regmap_cfg = &axp152_regmap_config;
1252 axp20x->regmap_irq_chip = &axp152_regmap_irq_chip;
1253 break;
1254 case AXP192_ID:
1255 axp20x->nr_cells = ARRAY_SIZE(axp192_cells);
1256 axp20x->cells = axp192_cells;
1257 axp20x->regmap_cfg = &axp192_regmap_config;
1258 axp20x->regmap_irq_chip = &axp192_regmap_irq_chip;
1259 break;
1260 case AXP202_ID:
1261 case AXP209_ID:
1262 axp20x->nr_cells = ARRAY_SIZE(axp20x_cells);
1263 axp20x->cells = axp20x_cells;
1264 axp20x->regmap_cfg = &axp20x_regmap_config;
1265 axp20x->regmap_irq_chip = &axp20x_regmap_irq_chip;
1266 break;
1267 case AXP221_ID:
1268 axp20x->nr_cells = ARRAY_SIZE(axp221_cells);
1269 axp20x->cells = axp221_cells;
1270 axp20x->regmap_cfg = &axp22x_regmap_config;
1271 axp20x->regmap_irq_chip = &axp22x_regmap_irq_chip;
1272 break;
1273 case AXP223_ID:
1274 axp20x->nr_cells = ARRAY_SIZE(axp223_cells);
1275 axp20x->cells = axp223_cells;
1276 axp20x->regmap_cfg = &axp22x_regmap_config;
1277 axp20x->regmap_irq_chip = &axp22x_regmap_irq_chip;
1278 break;
1279 case AXP288_ID:
1280 axp20x->cells = axp288_cells;
1281 axp20x->nr_cells = ARRAY_SIZE(axp288_cells);
1282 axp20x->regmap_cfg = &axp288_regmap_config;
1283 axp20x->regmap_irq_chip = &axp288_regmap_irq_chip;
1284 axp20x->irq_flags = IRQF_TRIGGER_LOW;
1285 break;
1286 case AXP313A_ID:
1287 axp20x->nr_cells = ARRAY_SIZE(axp313a_cells);
1288 axp20x->cells = axp313a_cells;
1289 axp20x->regmap_cfg = &axp313a_regmap_config;
1290 axp20x->regmap_irq_chip = &axp313a_regmap_irq_chip;
1291 break;
1292 case AXP717_ID:
1293 axp20x->nr_cells = ARRAY_SIZE(axp717_cells);
1294 axp20x->cells = axp717_cells;
1295 axp20x->regmap_cfg = &axp717_regmap_config;
1296 axp20x->regmap_irq_chip = &axp717_regmap_irq_chip;
1297 break;
1298 case AXP803_ID:
1299 axp20x->nr_cells = ARRAY_SIZE(axp803_cells);
1300 axp20x->cells = axp803_cells;
1301 axp20x->regmap_cfg = &axp288_regmap_config;
1302 axp20x->regmap_irq_chip = &axp803_regmap_irq_chip;
1303 break;
1304 case AXP806_ID:
1305 /*
1306 * Don't register the power key part if in slave mode or
1307 * if there is no interrupt line.
1308 */
1309 if (of_property_read_bool(axp20x->dev->of_node,
1310 "x-powers,self-working-mode")) {
1311 axp20x->nr_cells = ARRAY_SIZE(axp806_self_working_cells);
1312 axp20x->cells = axp806_self_working_cells;
1313 } else {
1314 axp20x->nr_cells = ARRAY_SIZE(axp806_cells);
1315 axp20x->cells = axp806_cells;
1316 }
1317 nr_cells_no_irq = ARRAY_SIZE(axp806_cells);
1318 cells_no_irq = axp806_cells;
1319 axp20x->regmap_cfg = &axp806_regmap_config;
1320 axp20x->regmap_irq_chip = &axp806_regmap_irq_chip;
1321 break;
1322 case AXP809_ID:
1323 axp20x->nr_cells = ARRAY_SIZE(axp809_cells);
1324 axp20x->cells = axp809_cells;
1325 axp20x->regmap_cfg = &axp22x_regmap_config;
1326 axp20x->regmap_irq_chip = &axp809_regmap_irq_chip;
1327 break;
1328 case AXP813_ID:
1329 axp20x->nr_cells = ARRAY_SIZE(axp813_cells);
1330 axp20x->cells = axp813_cells;
1331 axp20x->regmap_cfg = &axp288_regmap_config;
1332 /*
1333 * The IRQ table given in the datasheet is incorrect.
1334 * In IRQ enable/status registers 1, there are separate
1335 * IRQs for ACIN and VBUS, instead of bits [7:5] being
1336 * the same as bits [4:2]. So it shares the same IRQs
1337 * as the AXP803, rather than the AXP288.
1338 */
1339 axp20x->regmap_irq_chip = &axp803_regmap_irq_chip;
1340 break;
1341 case AXP15060_ID:
1342 axp20x->nr_cells = ARRAY_SIZE(axp15060_cells);
1343 axp20x->cells = axp15060_cells;
1344 axp20x->regmap_cfg = &axp15060_regmap_config;
1345 axp20x->regmap_irq_chip = &axp15060_regmap_irq_chip;
1346 break;
1347 default:
1348 dev_err(dev, "unsupported AXP20X ID %lu\n", axp20x->variant);
1349 return -EINVAL;
1350 }
1351
1352 /*
1353 * Use an alternative cell array when no interrupt line is connected,
1354 * since IRQs are required by some drivers.
1355 * The default is the safe "regulator-only", as this works fine without
1356 * an interrupt specified.
1357 */
1358 if (axp20x->irq <= 0) {
1359 if (cells_no_irq) {
1360 axp20x->nr_cells = nr_cells_no_irq;
1361 axp20x->cells = cells_no_irq;
1362 } else {
1363 axp20x->nr_cells = ARRAY_SIZE(axp_regulator_only_cells);
1364 axp20x->cells = axp_regulator_only_cells;
1365 }
1366 }
1367
1368 dev_info(dev, "AXP20x variant %s found\n",
1369 axp20x_model_names[axp20x->variant]);
1370
1371 return 0;
1372 }
1373 EXPORT_SYMBOL(axp20x_match_device);
1374
axp20x_device_probe(struct axp20x_dev * axp20x)1375 int axp20x_device_probe(struct axp20x_dev *axp20x)
1376 {
1377 int ret;
1378
1379 /*
1380 * The AXP806 supports either master/standalone or slave mode.
1381 * Slave mode allows sharing the serial bus, even with multiple
1382 * AXP806 which all have the same hardware address.
1383 *
1384 * This is done with extra "serial interface address extension",
1385 * or AXP806_BUS_ADDR_EXT, and "register address extension", or
1386 * AXP806_REG_ADDR_EXT, registers. The former is read-only, with
1387 * 1 bit customizable at the factory, and 1 bit depending on the
1388 * state of an external pin. The latter is writable. The device
1389 * will only respond to operations to its other registers when
1390 * the these device addressing bits (in the upper 4 bits of the
1391 * registers) match.
1392 *
1393 * By default we support an AXP806 chained to an AXP809 in slave
1394 * mode. Boards which use an AXP806 in master mode can set the
1395 * property "x-powers,master-mode" to override the default.
1396 */
1397 if (axp20x->variant == AXP806_ID) {
1398 if (of_property_read_bool(axp20x->dev->of_node,
1399 "x-powers,master-mode") ||
1400 of_property_read_bool(axp20x->dev->of_node,
1401 "x-powers,self-working-mode"))
1402 regmap_write(axp20x->regmap, AXP806_REG_ADDR_EXT,
1403 AXP806_REG_ADDR_EXT_ADDR_MASTER_MODE);
1404 else
1405 regmap_write(axp20x->regmap, AXP806_REG_ADDR_EXT,
1406 AXP806_REG_ADDR_EXT_ADDR_SLAVE_MODE);
1407 }
1408
1409 /* Only if there is an interrupt line connected towards the CPU. */
1410 if (axp20x->irq > 0) {
1411 ret = regmap_add_irq_chip(axp20x->regmap, axp20x->irq,
1412 IRQF_ONESHOT | IRQF_SHARED | axp20x->irq_flags,
1413 -1, axp20x->regmap_irq_chip,
1414 &axp20x->regmap_irqc);
1415 if (ret) {
1416 dev_err(axp20x->dev, "failed to add irq chip: %d\n",
1417 ret);
1418 return ret;
1419 }
1420 }
1421
1422 ret = mfd_add_devices(axp20x->dev, -1, axp20x->cells,
1423 axp20x->nr_cells, NULL, 0, NULL);
1424
1425 if (ret) {
1426 dev_err(axp20x->dev, "failed to add MFD devices: %d\n", ret);
1427 regmap_del_irq_chip(axp20x->irq, axp20x->regmap_irqc);
1428 return ret;
1429 }
1430
1431 if (axp20x->variant != AXP288_ID)
1432 devm_register_sys_off_handler(axp20x->dev,
1433 SYS_OFF_MODE_POWER_OFF,
1434 SYS_OFF_PRIO_DEFAULT,
1435 axp20x_power_off, axp20x);
1436
1437 dev_info(axp20x->dev, "AXP20X driver loaded\n");
1438
1439 return 0;
1440 }
1441 EXPORT_SYMBOL(axp20x_device_probe);
1442
axp20x_device_remove(struct axp20x_dev * axp20x)1443 void axp20x_device_remove(struct axp20x_dev *axp20x)
1444 {
1445 mfd_remove_devices(axp20x->dev);
1446 regmap_del_irq_chip(axp20x->irq, axp20x->regmap_irqc);
1447 }
1448 EXPORT_SYMBOL(axp20x_device_remove);
1449
1450 MODULE_DESCRIPTION("PMIC MFD core driver for AXP20X");
1451 MODULE_AUTHOR("Carlo Caione <carlo@caione.org>");
1452 MODULE_LICENSE("GPL");
1453