1 /* SPDX-License-Identifier: GPL-2.0-only */
2 /*
3  * Copyright (C) 2009-2010 Advanced Micro Devices, Inc.
4  * Author: Joerg Roedel <jroedel@suse.de>
5  */
6 
7 #ifndef AMD_IOMMU_H
8 #define AMD_IOMMU_H
9 
10 #include <linux/iommu.h>
11 
12 #include "amd_iommu_types.h"
13 
14 irqreturn_t amd_iommu_int_thread(int irq, void *data);
15 irqreturn_t amd_iommu_int_thread_evtlog(int irq, void *data);
16 irqreturn_t amd_iommu_int_thread_pprlog(int irq, void *data);
17 irqreturn_t amd_iommu_int_thread_galog(int irq, void *data);
18 irqreturn_t amd_iommu_int_handler(int irq, void *data);
19 void amd_iommu_apply_erratum_63(struct amd_iommu *iommu, u16 devid);
20 void amd_iommu_restart_log(struct amd_iommu *iommu, const char *evt_type,
21 			   u8 cntrl_intr, u8 cntrl_log,
22 			   u32 status_run_mask, u32 status_overflow_mask);
23 void amd_iommu_restart_event_logging(struct amd_iommu *iommu);
24 void amd_iommu_restart_ga_log(struct amd_iommu *iommu);
25 void amd_iommu_restart_ppr_log(struct amd_iommu *iommu);
26 void amd_iommu_set_rlookup_table(struct amd_iommu *iommu, u16 devid);
27 void iommu_feature_enable(struct amd_iommu *iommu, u8 bit);
28 void *__init iommu_alloc_4k_pages(struct amd_iommu *iommu,
29 				  gfp_t gfp, size_t size);
30 
31 #ifdef CONFIG_AMD_IOMMU_DEBUGFS
32 void amd_iommu_debugfs_setup(struct amd_iommu *iommu);
33 #else
amd_iommu_debugfs_setup(struct amd_iommu * iommu)34 static inline void amd_iommu_debugfs_setup(struct amd_iommu *iommu) {}
35 #endif
36 
37 /* Needed for interrupt remapping */
38 int amd_iommu_prepare(void);
39 int amd_iommu_enable(void);
40 void amd_iommu_disable(void);
41 int amd_iommu_reenable(int mode);
42 int amd_iommu_enable_faulting(unsigned int cpu);
43 extern int amd_iommu_guest_ir;
44 extern enum io_pgtable_fmt amd_iommu_pgtable;
45 extern int amd_iommu_gpt_level;
46 extern unsigned long amd_iommu_pgsize_bitmap;
47 
48 /* Protection domain ops */
49 struct protection_domain *protection_domain_alloc(unsigned int type, int nid);
50 void protection_domain_free(struct protection_domain *domain);
51 struct iommu_domain *amd_iommu_domain_alloc_sva(struct device *dev,
52 						struct mm_struct *mm);
53 void amd_iommu_domain_free(struct iommu_domain *dom);
54 int iommu_sva_set_dev_pasid(struct iommu_domain *domain,
55 			    struct device *dev, ioasid_t pasid);
56 void amd_iommu_remove_dev_pasid(struct device *dev, ioasid_t pasid,
57 				struct iommu_domain *domain);
58 
59 /* SVA/PASID */
60 bool amd_iommu_pasid_supported(void);
61 
62 /* IOPF */
63 int amd_iommu_iopf_init(struct amd_iommu *iommu);
64 void amd_iommu_iopf_uninit(struct amd_iommu *iommu);
65 void amd_iommu_page_response(struct device *dev, struct iopf_fault *evt,
66 			     struct iommu_page_response *resp);
67 int amd_iommu_iopf_add_device(struct amd_iommu *iommu,
68 			      struct iommu_dev_data *dev_data);
69 void amd_iommu_iopf_remove_device(struct amd_iommu *iommu,
70 				  struct iommu_dev_data *dev_data);
71 
72 /* GCR3 setup */
73 int amd_iommu_set_gcr3(struct iommu_dev_data *dev_data,
74 		       ioasid_t pasid, unsigned long gcr3);
75 int amd_iommu_clear_gcr3(struct iommu_dev_data *dev_data, ioasid_t pasid);
76 
77 /* PPR */
78 int __init amd_iommu_alloc_ppr_log(struct amd_iommu *iommu);
79 void __init amd_iommu_free_ppr_log(struct amd_iommu *iommu);
80 void amd_iommu_enable_ppr_log(struct amd_iommu *iommu);
81 void amd_iommu_poll_ppr_log(struct amd_iommu *iommu);
82 int amd_iommu_complete_ppr(struct device *dev, u32 pasid, int status, int tag);
83 
84 /*
85  * This function flushes all internal caches of
86  * the IOMMU used by this driver.
87  */
88 void amd_iommu_flush_all_caches(struct amd_iommu *iommu);
89 void amd_iommu_update_and_flush_device_table(struct protection_domain *domain);
90 void amd_iommu_domain_update(struct protection_domain *domain);
91 void amd_iommu_domain_flush_pages(struct protection_domain *domain,
92 				  u64 address, size_t size);
93 void amd_iommu_dev_flush_pasid_pages(struct iommu_dev_data *dev_data,
94 				     ioasid_t pasid, u64 address, size_t size);
95 
96 #ifdef CONFIG_IRQ_REMAP
97 int amd_iommu_create_irq_domain(struct amd_iommu *iommu);
98 #else
amd_iommu_create_irq_domain(struct amd_iommu * iommu)99 static inline int amd_iommu_create_irq_domain(struct amd_iommu *iommu)
100 {
101 	return 0;
102 }
103 #endif
104 
is_rd890_iommu(struct pci_dev * pdev)105 static inline bool is_rd890_iommu(struct pci_dev *pdev)
106 {
107 	return (pdev->vendor == PCI_VENDOR_ID_ATI) &&
108 	       (pdev->device == PCI_DEVICE_ID_RD890_IOMMU);
109 }
110 
check_feature(u64 mask)111 static inline bool check_feature(u64 mask)
112 {
113 	return (amd_iommu_efr & mask);
114 }
115 
check_feature2(u64 mask)116 static inline bool check_feature2(u64 mask)
117 {
118 	return (amd_iommu_efr2 & mask);
119 }
120 
amd_iommu_gt_ppr_supported(void)121 static inline bool amd_iommu_gt_ppr_supported(void)
122 {
123 	return (check_feature(FEATURE_GT) &&
124 		check_feature(FEATURE_PPR) &&
125 		check_feature(FEATURE_EPHSUP));
126 }
127 
iommu_virt_to_phys(void * vaddr)128 static inline u64 iommu_virt_to_phys(void *vaddr)
129 {
130 	return (u64)__sme_set(virt_to_phys(vaddr));
131 }
132 
iommu_phys_to_virt(unsigned long paddr)133 static inline void *iommu_phys_to_virt(unsigned long paddr)
134 {
135 	return phys_to_virt(__sme_clr(paddr));
136 }
137 
get_pci_sbdf_id(struct pci_dev * pdev)138 static inline int get_pci_sbdf_id(struct pci_dev *pdev)
139 {
140 	int seg = pci_domain_nr(pdev->bus);
141 	u16 devid = pci_dev_id(pdev);
142 
143 	return PCI_SEG_DEVID_TO_SBDF(seg, devid);
144 }
145 
146 /*
147  * This must be called after device probe completes. During probe
148  * use rlookup_amd_iommu() get the iommu.
149  */
get_amd_iommu_from_dev(struct device * dev)150 static inline struct amd_iommu *get_amd_iommu_from_dev(struct device *dev)
151 {
152 	return iommu_get_iommu_dev(dev, struct amd_iommu, iommu);
153 }
154 
155 /* This must be called after device probe completes. */
get_amd_iommu_from_dev_data(struct iommu_dev_data * dev_data)156 static inline struct amd_iommu *get_amd_iommu_from_dev_data(struct iommu_dev_data *dev_data)
157 {
158 	return iommu_get_iommu_dev(dev_data->dev, struct amd_iommu, iommu);
159 }
160 
to_pdomain(struct iommu_domain * dom)161 static inline struct protection_domain *to_pdomain(struct iommu_domain *dom)
162 {
163 	return container_of(dom, struct protection_domain, domain);
164 }
165 
166 bool translation_pre_enabled(struct amd_iommu *iommu);
167 int __init add_special_device(u8 type, u8 id, u32 *devid, bool cmd_line);
168 
169 #ifdef CONFIG_DMI
170 void amd_iommu_apply_ivrs_quirks(void);
171 #else
amd_iommu_apply_ivrs_quirks(void)172 static inline void amd_iommu_apply_ivrs_quirks(void) { }
173 #endif
174 
175 void amd_iommu_domain_set_pgtable(struct protection_domain *domain,
176 				  u64 *root, int mode);
177 struct dev_table_entry *get_dev_table(struct amd_iommu *iommu);
178 
179 #endif
180