1 // SPDX-License-Identifier: MIT
2 /*
3 * Copyright © 2020 Intel Corporation
4 */
5
6 #include <linux/string_helpers.h>
7
8 #include <drm/drm_debugfs.h>
9 #include <drm/drm_edid.h>
10 #include <drm/drm_fourcc.h>
11
12 #include "hsw_ips.h"
13 #include "i915_debugfs.h"
14 #include "i915_irq.h"
15 #include "i915_reg.h"
16 #include "intel_alpm.h"
17 #include "intel_crtc.h"
18 #include "intel_de.h"
19 #include "intel_crtc_state_dump.h"
20 #include "intel_display_debugfs.h"
21 #include "intel_display_debugfs_params.h"
22 #include "intel_display_power.h"
23 #include "intel_display_power_well.h"
24 #include "intel_display_types.h"
25 #include "intel_dmc.h"
26 #include "intel_dp.h"
27 #include "intel_dp_link_training.h"
28 #include "intel_dp_mst.h"
29 #include "intel_drrs.h"
30 #include "intel_fbc.h"
31 #include "intel_fbdev.h"
32 #include "intel_hdcp.h"
33 #include "intel_hdmi.h"
34 #include "intel_hotplug.h"
35 #include "intel_panel.h"
36 #include "intel_pps.h"
37 #include "intel_psr.h"
38 #include "intel_psr_regs.h"
39 #include "intel_vdsc.h"
40 #include "intel_wm.h"
41
node_to_i915(struct drm_info_node * node)42 static inline struct drm_i915_private *node_to_i915(struct drm_info_node *node)
43 {
44 return to_i915(node->minor->dev);
45 }
46
i915_frontbuffer_tracking(struct seq_file * m,void * unused)47 static int i915_frontbuffer_tracking(struct seq_file *m, void *unused)
48 {
49 struct drm_i915_private *dev_priv = node_to_i915(m->private);
50
51 spin_lock(&dev_priv->display.fb_tracking.lock);
52
53 seq_printf(m, "FB tracking busy bits: 0x%08x\n",
54 dev_priv->display.fb_tracking.busy_bits);
55
56 seq_printf(m, "FB tracking flip bits: 0x%08x\n",
57 dev_priv->display.fb_tracking.flip_bits);
58
59 spin_unlock(&dev_priv->display.fb_tracking.lock);
60
61 return 0;
62 }
63
i915_sr_status(struct seq_file * m,void * unused)64 static int i915_sr_status(struct seq_file *m, void *unused)
65 {
66 struct drm_i915_private *dev_priv = node_to_i915(m->private);
67 intel_wakeref_t wakeref;
68 bool sr_enabled = false;
69
70 wakeref = intel_display_power_get(dev_priv, POWER_DOMAIN_INIT);
71
72 if (DISPLAY_VER(dev_priv) >= 9)
73 /* no global SR status; inspect per-plane WM */;
74 else if (HAS_PCH_SPLIT(dev_priv))
75 sr_enabled = intel_de_read(dev_priv, WM1_LP_ILK) & WM_LP_ENABLE;
76 else if (IS_I965GM(dev_priv) || IS_G4X(dev_priv) ||
77 IS_I945G(dev_priv) || IS_I945GM(dev_priv))
78 sr_enabled = intel_de_read(dev_priv, FW_BLC_SELF) & FW_BLC_SELF_EN;
79 else if (IS_I915GM(dev_priv))
80 sr_enabled = intel_de_read(dev_priv, INSTPM) & INSTPM_SELF_EN;
81 else if (IS_PINEVIEW(dev_priv))
82 sr_enabled = intel_de_read(dev_priv, DSPFW3(dev_priv)) & PINEVIEW_SELF_REFRESH_EN;
83 else if (IS_VALLEYVIEW(dev_priv) || IS_CHERRYVIEW(dev_priv))
84 sr_enabled = intel_de_read(dev_priv, FW_BLC_SELF_VLV) & FW_CSPWRDWNEN;
85
86 intel_display_power_put(dev_priv, POWER_DOMAIN_INIT, wakeref);
87
88 seq_printf(m, "self-refresh: %s\n", str_enabled_disabled(sr_enabled));
89
90 return 0;
91 }
92
i915_gem_framebuffer_info(struct seq_file * m,void * data)93 static int i915_gem_framebuffer_info(struct seq_file *m, void *data)
94 {
95 struct drm_i915_private *dev_priv = node_to_i915(m->private);
96 struct intel_framebuffer *fbdev_fb = NULL;
97 struct drm_framebuffer *drm_fb;
98
99 #ifdef CONFIG_DRM_FBDEV_EMULATION
100 fbdev_fb = intel_fbdev_framebuffer(dev_priv->display.fbdev.fbdev);
101 if (fbdev_fb) {
102 seq_printf(m, "fbcon size: %d x %d, depth %d, %d bpp, modifier 0x%llx, refcount %d, obj ",
103 fbdev_fb->base.width,
104 fbdev_fb->base.height,
105 fbdev_fb->base.format->depth,
106 fbdev_fb->base.format->cpp[0] * 8,
107 fbdev_fb->base.modifier,
108 drm_framebuffer_read_refcount(&fbdev_fb->base));
109 i915_debugfs_describe_obj(m, intel_fb_obj(&fbdev_fb->base));
110 seq_putc(m, '\n');
111 }
112 #endif
113
114 mutex_lock(&dev_priv->drm.mode_config.fb_lock);
115 drm_for_each_fb(drm_fb, &dev_priv->drm) {
116 struct intel_framebuffer *fb = to_intel_framebuffer(drm_fb);
117 if (fb == fbdev_fb)
118 continue;
119
120 seq_printf(m, "user size: %d x %d, depth %d, %d bpp, modifier 0x%llx, refcount %d, obj ",
121 fb->base.width,
122 fb->base.height,
123 fb->base.format->depth,
124 fb->base.format->cpp[0] * 8,
125 fb->base.modifier,
126 drm_framebuffer_read_refcount(&fb->base));
127 i915_debugfs_describe_obj(m, intel_fb_obj(&fb->base));
128 seq_putc(m, '\n');
129 }
130 mutex_unlock(&dev_priv->drm.mode_config.fb_lock);
131
132 return 0;
133 }
134
i915_power_domain_info(struct seq_file * m,void * unused)135 static int i915_power_domain_info(struct seq_file *m, void *unused)
136 {
137 struct drm_i915_private *i915 = node_to_i915(m->private);
138
139 intel_display_power_debug(i915, m);
140
141 return 0;
142 }
143
intel_seq_print_mode(struct seq_file * m,int tabs,const struct drm_display_mode * mode)144 static void intel_seq_print_mode(struct seq_file *m, int tabs,
145 const struct drm_display_mode *mode)
146 {
147 int i;
148
149 for (i = 0; i < tabs; i++)
150 seq_putc(m, '\t');
151
152 seq_printf(m, DRM_MODE_FMT "\n", DRM_MODE_ARG(mode));
153 }
154
intel_encoder_info(struct seq_file * m,struct intel_crtc * crtc,struct intel_encoder * encoder)155 static void intel_encoder_info(struct seq_file *m,
156 struct intel_crtc *crtc,
157 struct intel_encoder *encoder)
158 {
159 struct drm_i915_private *dev_priv = node_to_i915(m->private);
160 struct drm_connector_list_iter conn_iter;
161 struct drm_connector *connector;
162
163 seq_printf(m, "\t[ENCODER:%d:%s]: connectors:\n",
164 encoder->base.base.id, encoder->base.name);
165
166 drm_connector_list_iter_begin(&dev_priv->drm, &conn_iter);
167 drm_for_each_connector_iter(connector, &conn_iter) {
168 const struct drm_connector_state *conn_state =
169 connector->state;
170
171 if (conn_state->best_encoder != &encoder->base)
172 continue;
173
174 seq_printf(m, "\t\t[CONNECTOR:%d:%s]\n",
175 connector->base.id, connector->name);
176 }
177 drm_connector_list_iter_end(&conn_iter);
178 }
179
intel_panel_info(struct seq_file * m,struct intel_connector * connector)180 static void intel_panel_info(struct seq_file *m,
181 struct intel_connector *connector)
182 {
183 const struct drm_display_mode *fixed_mode;
184
185 if (list_empty(&connector->panel.fixed_modes))
186 return;
187
188 seq_puts(m, "\tfixed modes:\n");
189
190 list_for_each_entry(fixed_mode, &connector->panel.fixed_modes, head)
191 intel_seq_print_mode(m, 2, fixed_mode);
192 }
193
intel_hdcp_info(struct seq_file * m,struct intel_connector * intel_connector,bool remote_req)194 static void intel_hdcp_info(struct seq_file *m,
195 struct intel_connector *intel_connector,
196 bool remote_req)
197 {
198 bool hdcp_cap = false, hdcp2_cap = false;
199
200 if (!intel_connector->hdcp.shim) {
201 seq_puts(m, "No Connector Support");
202 goto out;
203 }
204
205 if (remote_req) {
206 intel_hdcp_get_remote_capability(intel_connector,
207 &hdcp_cap,
208 &hdcp2_cap);
209 } else {
210 hdcp_cap = intel_hdcp_get_capability(intel_connector);
211 hdcp2_cap = intel_hdcp2_get_capability(intel_connector);
212 }
213
214 if (hdcp_cap)
215 seq_puts(m, "HDCP1.4 ");
216 if (hdcp2_cap)
217 seq_puts(m, "HDCP2.2 ");
218
219 if (!hdcp_cap && !hdcp2_cap)
220 seq_puts(m, "None");
221
222 out:
223 seq_puts(m, "\n");
224 }
225
intel_dp_info(struct seq_file * m,struct intel_connector * connector)226 static void intel_dp_info(struct seq_file *m, struct intel_connector *connector)
227 {
228 struct intel_encoder *intel_encoder = intel_attached_encoder(connector);
229 struct intel_dp *intel_dp = enc_to_intel_dp(intel_encoder);
230
231 seq_printf(m, "\tDPCD rev: %x\n", intel_dp->dpcd[DP_DPCD_REV]);
232 seq_printf(m, "\taudio support: %s\n",
233 str_yes_no(connector->base.display_info.has_audio));
234
235 drm_dp_downstream_debug(m, intel_dp->dpcd, intel_dp->downstream_ports,
236 connector->detect_edid, &intel_dp->aux);
237 }
238
intel_dp_mst_info(struct seq_file * m,struct intel_connector * connector)239 static void intel_dp_mst_info(struct seq_file *m,
240 struct intel_connector *connector)
241 {
242 bool has_audio = connector->base.display_info.has_audio;
243
244 seq_printf(m, "\taudio support: %s\n", str_yes_no(has_audio));
245 }
246
intel_hdmi_info(struct seq_file * m,struct intel_connector * connector)247 static void intel_hdmi_info(struct seq_file *m,
248 struct intel_connector *connector)
249 {
250 bool has_audio = connector->base.display_info.has_audio;
251
252 seq_printf(m, "\taudio support: %s\n", str_yes_no(has_audio));
253 }
254
intel_connector_info(struct seq_file * m,struct drm_connector * connector)255 static void intel_connector_info(struct seq_file *m,
256 struct drm_connector *connector)
257 {
258 struct intel_connector *intel_connector = to_intel_connector(connector);
259 const struct drm_display_mode *mode;
260
261 seq_printf(m, "[CONNECTOR:%d:%s]: status: %s\n",
262 connector->base.id, connector->name,
263 drm_get_connector_status_name(connector->status));
264
265 if (connector->status == connector_status_disconnected)
266 return;
267
268 seq_printf(m, "\tphysical dimensions: %dx%dmm\n",
269 connector->display_info.width_mm,
270 connector->display_info.height_mm);
271 seq_printf(m, "\tsubpixel order: %s\n",
272 drm_get_subpixel_order_name(connector->display_info.subpixel_order));
273 seq_printf(m, "\tCEA rev: %d\n", connector->display_info.cea_rev);
274
275 switch (connector->connector_type) {
276 case DRM_MODE_CONNECTOR_DisplayPort:
277 case DRM_MODE_CONNECTOR_eDP:
278 if (intel_connector->mst_port)
279 intel_dp_mst_info(m, intel_connector);
280 else
281 intel_dp_info(m, intel_connector);
282 break;
283 case DRM_MODE_CONNECTOR_HDMIA:
284 intel_hdmi_info(m, intel_connector);
285 break;
286 default:
287 break;
288 }
289
290 seq_puts(m, "\tHDCP version: ");
291 if (intel_connector->mst_port) {
292 intel_hdcp_info(m, intel_connector, true);
293 seq_puts(m, "\tMST Hub HDCP version: ");
294 }
295 intel_hdcp_info(m, intel_connector, false);
296
297 seq_printf(m, "\tmax bpc: %u\n", connector->display_info.bpc);
298
299 intel_panel_info(m, intel_connector);
300
301 seq_printf(m, "\tmodes:\n");
302 list_for_each_entry(mode, &connector->modes, head)
303 intel_seq_print_mode(m, 2, mode);
304 }
305
plane_type(enum drm_plane_type type)306 static const char *plane_type(enum drm_plane_type type)
307 {
308 switch (type) {
309 case DRM_PLANE_TYPE_OVERLAY:
310 return "OVL";
311 case DRM_PLANE_TYPE_PRIMARY:
312 return "PRI";
313 case DRM_PLANE_TYPE_CURSOR:
314 return "CUR";
315 /*
316 * Deliberately omitting default: to generate compiler warnings
317 * when a new drm_plane_type gets added.
318 */
319 }
320
321 return "unknown";
322 }
323
plane_rotation(char * buf,size_t bufsize,unsigned int rotation)324 static void plane_rotation(char *buf, size_t bufsize, unsigned int rotation)
325 {
326 /*
327 * According to doc only one DRM_MODE_ROTATE_ is allowed but this
328 * will print them all to visualize if the values are misused
329 */
330 snprintf(buf, bufsize,
331 "%s%s%s%s%s%s(0x%08x)",
332 (rotation & DRM_MODE_ROTATE_0) ? "0 " : "",
333 (rotation & DRM_MODE_ROTATE_90) ? "90 " : "",
334 (rotation & DRM_MODE_ROTATE_180) ? "180 " : "",
335 (rotation & DRM_MODE_ROTATE_270) ? "270 " : "",
336 (rotation & DRM_MODE_REFLECT_X) ? "FLIPX " : "",
337 (rotation & DRM_MODE_REFLECT_Y) ? "FLIPY " : "",
338 rotation);
339 }
340
plane_visibility(const struct intel_plane_state * plane_state)341 static const char *plane_visibility(const struct intel_plane_state *plane_state)
342 {
343 if (plane_state->uapi.visible)
344 return "visible";
345
346 if (plane_state->planar_slave)
347 return "planar-slave";
348
349 return "hidden";
350 }
351
intel_plane_uapi_info(struct seq_file * m,struct intel_plane * plane)352 static void intel_plane_uapi_info(struct seq_file *m, struct intel_plane *plane)
353 {
354 const struct intel_plane_state *plane_state =
355 to_intel_plane_state(plane->base.state);
356 const struct drm_framebuffer *fb = plane_state->uapi.fb;
357 struct drm_rect src, dst;
358 char rot_str[48];
359
360 src = drm_plane_state_src(&plane_state->uapi);
361 dst = drm_plane_state_dest(&plane_state->uapi);
362
363 plane_rotation(rot_str, sizeof(rot_str),
364 plane_state->uapi.rotation);
365
366 seq_puts(m, "\t\tuapi: [FB:");
367 if (fb)
368 seq_printf(m, "%d] %p4cc,0x%llx,%dx%d", fb->base.id,
369 &fb->format->format, fb->modifier, fb->width,
370 fb->height);
371 else
372 seq_puts(m, "0] n/a,0x0,0x0,");
373 seq_printf(m, ", visible=%s, src=" DRM_RECT_FP_FMT ", dst=" DRM_RECT_FMT
374 ", rotation=%s\n", plane_visibility(plane_state),
375 DRM_RECT_FP_ARG(&src), DRM_RECT_ARG(&dst), rot_str);
376
377 if (plane_state->planar_linked_plane)
378 seq_printf(m, "\t\tplanar: Linked to [PLANE:%d:%s] as a %s\n",
379 plane_state->planar_linked_plane->base.base.id, plane_state->planar_linked_plane->base.name,
380 plane_state->planar_slave ? "slave" : "master");
381 }
382
intel_plane_hw_info(struct seq_file * m,struct intel_plane * plane)383 static void intel_plane_hw_info(struct seq_file *m, struct intel_plane *plane)
384 {
385 const struct intel_plane_state *plane_state =
386 to_intel_plane_state(plane->base.state);
387 const struct drm_framebuffer *fb = plane_state->hw.fb;
388 char rot_str[48];
389
390 if (!fb)
391 return;
392
393 plane_rotation(rot_str, sizeof(rot_str),
394 plane_state->hw.rotation);
395
396 seq_printf(m, "\t\thw: [FB:%d] %p4cc,0x%llx,%dx%d, visible=%s, src="
397 DRM_RECT_FP_FMT ", dst=" DRM_RECT_FMT ", rotation=%s\n",
398 fb->base.id, &fb->format->format,
399 fb->modifier, fb->width, fb->height,
400 str_yes_no(plane_state->uapi.visible),
401 DRM_RECT_FP_ARG(&plane_state->uapi.src),
402 DRM_RECT_ARG(&plane_state->uapi.dst),
403 rot_str);
404 }
405
intel_plane_info(struct seq_file * m,struct intel_crtc * crtc)406 static void intel_plane_info(struct seq_file *m, struct intel_crtc *crtc)
407 {
408 struct drm_i915_private *dev_priv = node_to_i915(m->private);
409 struct intel_plane *plane;
410
411 for_each_intel_plane_on_crtc(&dev_priv->drm, crtc, plane) {
412 seq_printf(m, "\t[PLANE:%d:%s]: type=%s\n",
413 plane->base.base.id, plane->base.name,
414 plane_type(plane->base.type));
415 intel_plane_uapi_info(m, plane);
416 intel_plane_hw_info(m, plane);
417 }
418 }
419
intel_scaler_info(struct seq_file * m,struct intel_crtc * crtc)420 static void intel_scaler_info(struct seq_file *m, struct intel_crtc *crtc)
421 {
422 const struct intel_crtc_state *crtc_state =
423 to_intel_crtc_state(crtc->base.state);
424 int num_scalers = crtc->num_scalers;
425 int i;
426
427 /* Not all platformas have a scaler */
428 if (num_scalers) {
429 seq_printf(m, "\tnum_scalers=%d, scaler_users=%x scaler_id=%d scaling_filter=%d",
430 num_scalers,
431 crtc_state->scaler_state.scaler_users,
432 crtc_state->scaler_state.scaler_id,
433 crtc_state->hw.scaling_filter);
434
435 for (i = 0; i < num_scalers; i++) {
436 const struct intel_scaler *sc =
437 &crtc_state->scaler_state.scalers[i];
438
439 seq_printf(m, ", scalers[%d]: use=%s, mode=%x",
440 i, str_yes_no(sc->in_use), sc->mode);
441 }
442 seq_puts(m, "\n");
443 } else {
444 seq_puts(m, "\tNo scalers available on this platform\n");
445 }
446 }
447
448 #if IS_ENABLED(CONFIG_DRM_I915_DEBUG_VBLANK_EVADE)
crtc_updates_info(struct seq_file * m,struct intel_crtc * crtc,const char * hdr)449 static void crtc_updates_info(struct seq_file *m,
450 struct intel_crtc *crtc,
451 const char *hdr)
452 {
453 u64 count;
454 int row;
455
456 count = 0;
457 for (row = 0; row < ARRAY_SIZE(crtc->debug.vbl.times); row++)
458 count += crtc->debug.vbl.times[row];
459 seq_printf(m, "%sUpdates: %llu\n", hdr, count);
460 if (!count)
461 return;
462
463 for (row = 0; row < ARRAY_SIZE(crtc->debug.vbl.times); row++) {
464 char columns[80] = " |";
465 unsigned int x;
466
467 if (row & 1) {
468 const char *units;
469
470 if (row > 10) {
471 x = 1000000;
472 units = "ms";
473 } else {
474 x = 1000;
475 units = "us";
476 }
477
478 snprintf(columns, sizeof(columns), "%4ld%s |",
479 DIV_ROUND_CLOSEST(BIT(row + 9), x), units);
480 }
481
482 if (crtc->debug.vbl.times[row]) {
483 x = ilog2(crtc->debug.vbl.times[row]);
484 memset(columns + 8, '*', x);
485 columns[8 + x] = '\0';
486 }
487
488 seq_printf(m, "%s%s\n", hdr, columns);
489 }
490
491 seq_printf(m, "%sMin update: %lluns\n",
492 hdr, crtc->debug.vbl.min);
493 seq_printf(m, "%sMax update: %lluns\n",
494 hdr, crtc->debug.vbl.max);
495 seq_printf(m, "%sAverage update: %lluns\n",
496 hdr, div64_u64(crtc->debug.vbl.sum, count));
497 seq_printf(m, "%sOverruns > %uus: %u\n",
498 hdr, VBLANK_EVASION_TIME_US, crtc->debug.vbl.over);
499 }
500
crtc_updates_show(struct seq_file * m,void * data)501 static int crtc_updates_show(struct seq_file *m, void *data)
502 {
503 crtc_updates_info(m, m->private, "");
504 return 0;
505 }
506
crtc_updates_open(struct inode * inode,struct file * file)507 static int crtc_updates_open(struct inode *inode, struct file *file)
508 {
509 return single_open(file, crtc_updates_show, inode->i_private);
510 }
511
crtc_updates_write(struct file * file,const char __user * ubuf,size_t len,loff_t * offp)512 static ssize_t crtc_updates_write(struct file *file,
513 const char __user *ubuf,
514 size_t len, loff_t *offp)
515 {
516 struct seq_file *m = file->private_data;
517 struct intel_crtc *crtc = m->private;
518
519 /* May race with an update. Meh. */
520 memset(&crtc->debug.vbl, 0, sizeof(crtc->debug.vbl));
521
522 return len;
523 }
524
525 static const struct file_operations crtc_updates_fops = {
526 .owner = THIS_MODULE,
527 .open = crtc_updates_open,
528 .read = seq_read,
529 .llseek = seq_lseek,
530 .release = single_release,
531 .write = crtc_updates_write
532 };
533
crtc_updates_add(struct intel_crtc * crtc)534 static void crtc_updates_add(struct intel_crtc *crtc)
535 {
536 debugfs_create_file("i915_update_info", 0644, crtc->base.debugfs_entry,
537 crtc, &crtc_updates_fops);
538 }
539
540 #else
crtc_updates_info(struct seq_file * m,struct intel_crtc * crtc,const char * hdr)541 static void crtc_updates_info(struct seq_file *m,
542 struct intel_crtc *crtc,
543 const char *hdr)
544 {
545 }
546
crtc_updates_add(struct intel_crtc * crtc)547 static void crtc_updates_add(struct intel_crtc *crtc)
548 {
549 }
550 #endif
551
intel_crtc_info(struct seq_file * m,struct intel_crtc * crtc)552 static void intel_crtc_info(struct seq_file *m, struct intel_crtc *crtc)
553 {
554 struct drm_i915_private *dev_priv = node_to_i915(m->private);
555 struct drm_printer p = drm_seq_file_printer(m);
556 const struct intel_crtc_state *crtc_state =
557 to_intel_crtc_state(crtc->base.state);
558 struct intel_encoder *encoder;
559
560 seq_printf(m, "[CRTC:%d:%s]:\n",
561 crtc->base.base.id, crtc->base.name);
562
563 seq_printf(m, "\tuapi: enable=%s, active=%s, mode=" DRM_MODE_FMT "\n",
564 str_yes_no(crtc_state->uapi.enable),
565 str_yes_no(crtc_state->uapi.active),
566 DRM_MODE_ARG(&crtc_state->uapi.mode));
567
568 seq_printf(m, "\thw: enable=%s, active=%s\n",
569 str_yes_no(crtc_state->hw.enable), str_yes_no(crtc_state->hw.active));
570 seq_printf(m, "\tadjusted_mode=" DRM_MODE_FMT "\n",
571 DRM_MODE_ARG(&crtc_state->hw.adjusted_mode));
572 seq_printf(m, "\tpipe__mode=" DRM_MODE_FMT "\n",
573 DRM_MODE_ARG(&crtc_state->hw.pipe_mode));
574
575 seq_printf(m, "\tpipe src=" DRM_RECT_FMT ", dither=%s, bpp=%d\n",
576 DRM_RECT_ARG(&crtc_state->pipe_src),
577 str_yes_no(crtc_state->dither), crtc_state->pipe_bpp);
578
579 intel_scaler_info(m, crtc);
580
581 if (crtc_state->joiner_pipes)
582 seq_printf(m, "\tLinked to 0x%x pipes as a %s\n",
583 crtc_state->joiner_pipes,
584 intel_crtc_is_joiner_secondary(crtc_state) ? "slave" : "master");
585
586 intel_vdsc_state_dump(&p, 1, crtc_state);
587
588 for_each_intel_encoder_mask(&dev_priv->drm, encoder,
589 crtc_state->uapi.encoder_mask)
590 intel_encoder_info(m, crtc, encoder);
591
592 intel_plane_info(m, crtc);
593
594 seq_printf(m, "\tunderrun reporting: cpu=%s pch=%s\n",
595 str_yes_no(!crtc->cpu_fifo_underrun_disabled),
596 str_yes_no(!crtc->pch_fifo_underrun_disabled));
597
598 crtc_updates_info(m, crtc, "\t");
599 }
600
i915_display_info(struct seq_file * m,void * unused)601 static int i915_display_info(struct seq_file *m, void *unused)
602 {
603 struct drm_i915_private *dev_priv = node_to_i915(m->private);
604 struct intel_crtc *crtc;
605 struct drm_connector *connector;
606 struct drm_connector_list_iter conn_iter;
607 intel_wakeref_t wakeref;
608
609 wakeref = intel_runtime_pm_get(&dev_priv->runtime_pm);
610
611 drm_modeset_lock_all(&dev_priv->drm);
612
613 seq_printf(m, "CRTC info\n");
614 seq_printf(m, "---------\n");
615 for_each_intel_crtc(&dev_priv->drm, crtc)
616 intel_crtc_info(m, crtc);
617
618 seq_printf(m, "\n");
619 seq_printf(m, "Connector info\n");
620 seq_printf(m, "--------------\n");
621 drm_connector_list_iter_begin(&dev_priv->drm, &conn_iter);
622 drm_for_each_connector_iter(connector, &conn_iter)
623 intel_connector_info(m, connector);
624 drm_connector_list_iter_end(&conn_iter);
625
626 drm_modeset_unlock_all(&dev_priv->drm);
627
628 intel_runtime_pm_put(&dev_priv->runtime_pm, wakeref);
629
630 return 0;
631 }
632
i915_display_capabilities(struct seq_file * m,void * unused)633 static int i915_display_capabilities(struct seq_file *m, void *unused)
634 {
635 struct drm_i915_private *i915 = node_to_i915(m->private);
636 struct drm_printer p = drm_seq_file_printer(m);
637
638 intel_display_device_info_print(DISPLAY_INFO(i915),
639 DISPLAY_RUNTIME_INFO(i915), &p);
640
641 return 0;
642 }
643
i915_shared_dplls_info(struct seq_file * m,void * unused)644 static int i915_shared_dplls_info(struct seq_file *m, void *unused)
645 {
646 struct drm_i915_private *dev_priv = node_to_i915(m->private);
647 struct drm_printer p = drm_seq_file_printer(m);
648 struct intel_shared_dpll *pll;
649 int i;
650
651 drm_modeset_lock_all(&dev_priv->drm);
652
653 drm_printf(&p, "PLL refclks: non-SSC: %d kHz, SSC: %d kHz\n",
654 dev_priv->display.dpll.ref_clks.nssc,
655 dev_priv->display.dpll.ref_clks.ssc);
656
657 for_each_shared_dpll(dev_priv, pll, i) {
658 drm_printf(&p, "DPLL%i: %s, id: %i\n", pll->index,
659 pll->info->name, pll->info->id);
660 drm_printf(&p, " pipe_mask: 0x%x, active: 0x%x, on: %s\n",
661 pll->state.pipe_mask, pll->active_mask,
662 str_yes_no(pll->on));
663 drm_printf(&p, " tracked hardware state:\n");
664 intel_dpll_dump_hw_state(dev_priv, &p, &pll->state.hw_state);
665 }
666 drm_modeset_unlock_all(&dev_priv->drm);
667
668 return 0;
669 }
670
i915_ddb_info(struct seq_file * m,void * unused)671 static int i915_ddb_info(struct seq_file *m, void *unused)
672 {
673 struct drm_i915_private *dev_priv = node_to_i915(m->private);
674 struct skl_ddb_entry *entry;
675 struct intel_crtc *crtc;
676
677 if (DISPLAY_VER(dev_priv) < 9)
678 return -ENODEV;
679
680 drm_modeset_lock_all(&dev_priv->drm);
681
682 seq_printf(m, "%-15s%8s%8s%8s\n", "", "Start", "End", "Size");
683
684 for_each_intel_crtc(&dev_priv->drm, crtc) {
685 struct intel_crtc_state *crtc_state =
686 to_intel_crtc_state(crtc->base.state);
687 enum pipe pipe = crtc->pipe;
688 enum plane_id plane_id;
689
690 seq_printf(m, "Pipe %c\n", pipe_name(pipe));
691
692 for_each_plane_id_on_crtc(crtc, plane_id) {
693 entry = &crtc_state->wm.skl.plane_ddb[plane_id];
694 seq_printf(m, " Plane%-8d%8u%8u%8u\n", plane_id + 1,
695 entry->start, entry->end,
696 skl_ddb_entry_size(entry));
697 }
698
699 entry = &crtc_state->wm.skl.plane_ddb[PLANE_CURSOR];
700 seq_printf(m, " %-13s%8u%8u%8u\n", "Cursor", entry->start,
701 entry->end, skl_ddb_entry_size(entry));
702 }
703
704 drm_modeset_unlock_all(&dev_priv->drm);
705
706 return 0;
707 }
708
709 static bool
intel_lpsp_power_well_enabled(struct drm_i915_private * i915,enum i915_power_well_id power_well_id)710 intel_lpsp_power_well_enabled(struct drm_i915_private *i915,
711 enum i915_power_well_id power_well_id)
712 {
713 intel_wakeref_t wakeref;
714 bool is_enabled;
715
716 wakeref = intel_runtime_pm_get(&i915->runtime_pm);
717 is_enabled = intel_display_power_well_is_enabled(i915,
718 power_well_id);
719 intel_runtime_pm_put(&i915->runtime_pm, wakeref);
720
721 return is_enabled;
722 }
723
i915_lpsp_status(struct seq_file * m,void * unused)724 static int i915_lpsp_status(struct seq_file *m, void *unused)
725 {
726 struct drm_i915_private *i915 = node_to_i915(m->private);
727 bool lpsp_enabled = false;
728
729 if (DISPLAY_VER(i915) >= 13 || IS_DISPLAY_VER(i915, 9, 10)) {
730 lpsp_enabled = !intel_lpsp_power_well_enabled(i915, SKL_DISP_PW_2);
731 } else if (IS_DISPLAY_VER(i915, 11, 12)) {
732 lpsp_enabled = !intel_lpsp_power_well_enabled(i915, ICL_DISP_PW_3);
733 } else if (IS_HASWELL(i915) || IS_BROADWELL(i915)) {
734 lpsp_enabled = !intel_lpsp_power_well_enabled(i915, HSW_DISP_PW_GLOBAL);
735 } else {
736 seq_puts(m, "LPSP: not supported\n");
737 return 0;
738 }
739
740 seq_printf(m, "LPSP: %s\n", str_enabled_disabled(lpsp_enabled));
741
742 return 0;
743 }
744
i915_dp_mst_info(struct seq_file * m,void * unused)745 static int i915_dp_mst_info(struct seq_file *m, void *unused)
746 {
747 struct drm_i915_private *dev_priv = node_to_i915(m->private);
748 struct intel_encoder *intel_encoder;
749 struct intel_digital_port *dig_port;
750 struct drm_connector *connector;
751 struct drm_connector_list_iter conn_iter;
752
753 drm_connector_list_iter_begin(&dev_priv->drm, &conn_iter);
754 drm_for_each_connector_iter(connector, &conn_iter) {
755 if (connector->connector_type != DRM_MODE_CONNECTOR_DisplayPort)
756 continue;
757
758 intel_encoder = intel_attached_encoder(to_intel_connector(connector));
759 if (!intel_encoder || intel_encoder->type == INTEL_OUTPUT_DP_MST)
760 continue;
761
762 dig_port = enc_to_dig_port(intel_encoder);
763 if (!intel_dp_mst_source_support(&dig_port->dp))
764 continue;
765
766 seq_printf(m, "MST Source Port [ENCODER:%d:%s]\n",
767 dig_port->base.base.base.id,
768 dig_port->base.base.name);
769 drm_dp_mst_dump_topology(m, &dig_port->dp.mst_mgr);
770 }
771 drm_connector_list_iter_end(&conn_iter);
772
773 return 0;
774 }
775
i915_displayport_test_active_write(struct file * file,const char __user * ubuf,size_t len,loff_t * offp)776 static ssize_t i915_displayport_test_active_write(struct file *file,
777 const char __user *ubuf,
778 size_t len, loff_t *offp)
779 {
780 char *input_buffer;
781 int status = 0;
782 struct drm_device *dev;
783 struct drm_connector *connector;
784 struct drm_connector_list_iter conn_iter;
785 struct intel_dp *intel_dp;
786 int val = 0;
787
788 dev = ((struct seq_file *)file->private_data)->private;
789
790 if (len == 0)
791 return 0;
792
793 input_buffer = memdup_user_nul(ubuf, len);
794 if (IS_ERR(input_buffer))
795 return PTR_ERR(input_buffer);
796
797 drm_dbg(dev, "Copied %d bytes from user\n", (unsigned int)len);
798
799 drm_connector_list_iter_begin(dev, &conn_iter);
800 drm_for_each_connector_iter(connector, &conn_iter) {
801 struct intel_encoder *encoder;
802
803 if (connector->connector_type !=
804 DRM_MODE_CONNECTOR_DisplayPort)
805 continue;
806
807 encoder = to_intel_encoder(connector->encoder);
808 if (encoder && encoder->type == INTEL_OUTPUT_DP_MST)
809 continue;
810
811 if (encoder && connector->status == connector_status_connected) {
812 intel_dp = enc_to_intel_dp(encoder);
813 status = kstrtoint(input_buffer, 10, &val);
814 if (status < 0)
815 break;
816 drm_dbg(dev, "Got %d for test active\n", val);
817 /* To prevent erroneous activation of the compliance
818 * testing code, only accept an actual value of 1 here
819 */
820 if (val == 1)
821 intel_dp->compliance.test_active = true;
822 else
823 intel_dp->compliance.test_active = false;
824 }
825 }
826 drm_connector_list_iter_end(&conn_iter);
827 kfree(input_buffer);
828 if (status < 0)
829 return status;
830
831 *offp += len;
832 return len;
833 }
834
i915_displayport_test_active_show(struct seq_file * m,void * data)835 static int i915_displayport_test_active_show(struct seq_file *m, void *data)
836 {
837 struct drm_i915_private *dev_priv = m->private;
838 struct drm_connector *connector;
839 struct drm_connector_list_iter conn_iter;
840 struct intel_dp *intel_dp;
841
842 drm_connector_list_iter_begin(&dev_priv->drm, &conn_iter);
843 drm_for_each_connector_iter(connector, &conn_iter) {
844 struct intel_encoder *encoder;
845
846 if (connector->connector_type !=
847 DRM_MODE_CONNECTOR_DisplayPort)
848 continue;
849
850 encoder = to_intel_encoder(connector->encoder);
851 if (encoder && encoder->type == INTEL_OUTPUT_DP_MST)
852 continue;
853
854 if (encoder && connector->status == connector_status_connected) {
855 intel_dp = enc_to_intel_dp(encoder);
856 if (intel_dp->compliance.test_active)
857 seq_puts(m, "1");
858 else
859 seq_puts(m, "0");
860 } else
861 seq_puts(m, "0");
862 }
863 drm_connector_list_iter_end(&conn_iter);
864
865 return 0;
866 }
867
i915_displayport_test_active_open(struct inode * inode,struct file * file)868 static int i915_displayport_test_active_open(struct inode *inode,
869 struct file *file)
870 {
871 return single_open(file, i915_displayport_test_active_show,
872 inode->i_private);
873 }
874
875 static const struct file_operations i915_displayport_test_active_fops = {
876 .owner = THIS_MODULE,
877 .open = i915_displayport_test_active_open,
878 .read = seq_read,
879 .llseek = seq_lseek,
880 .release = single_release,
881 .write = i915_displayport_test_active_write
882 };
883
i915_displayport_test_data_show(struct seq_file * m,void * data)884 static int i915_displayport_test_data_show(struct seq_file *m, void *data)
885 {
886 struct drm_i915_private *dev_priv = m->private;
887 struct drm_connector *connector;
888 struct drm_connector_list_iter conn_iter;
889 struct intel_dp *intel_dp;
890
891 drm_connector_list_iter_begin(&dev_priv->drm, &conn_iter);
892 drm_for_each_connector_iter(connector, &conn_iter) {
893 struct intel_encoder *encoder;
894
895 if (connector->connector_type !=
896 DRM_MODE_CONNECTOR_DisplayPort)
897 continue;
898
899 encoder = to_intel_encoder(connector->encoder);
900 if (encoder && encoder->type == INTEL_OUTPUT_DP_MST)
901 continue;
902
903 if (encoder && connector->status == connector_status_connected) {
904 intel_dp = enc_to_intel_dp(encoder);
905 if (intel_dp->compliance.test_type ==
906 DP_TEST_LINK_EDID_READ)
907 seq_printf(m, "%lx",
908 intel_dp->compliance.test_data.edid);
909 else if (intel_dp->compliance.test_type ==
910 DP_TEST_LINK_VIDEO_PATTERN) {
911 seq_printf(m, "hdisplay: %d\n",
912 intel_dp->compliance.test_data.hdisplay);
913 seq_printf(m, "vdisplay: %d\n",
914 intel_dp->compliance.test_data.vdisplay);
915 seq_printf(m, "bpc: %u\n",
916 intel_dp->compliance.test_data.bpc);
917 } else if (intel_dp->compliance.test_type ==
918 DP_TEST_LINK_PHY_TEST_PATTERN) {
919 seq_printf(m, "pattern: %d\n",
920 intel_dp->compliance.test_data.phytest.phy_pattern);
921 seq_printf(m, "Number of lanes: %d\n",
922 intel_dp->compliance.test_data.phytest.num_lanes);
923 seq_printf(m, "Link Rate: %d\n",
924 intel_dp->compliance.test_data.phytest.link_rate);
925 seq_printf(m, "level: %02x\n",
926 intel_dp->train_set[0]);
927 }
928 } else
929 seq_puts(m, "0");
930 }
931 drm_connector_list_iter_end(&conn_iter);
932
933 return 0;
934 }
935 DEFINE_SHOW_ATTRIBUTE(i915_displayport_test_data);
936
i915_displayport_test_type_show(struct seq_file * m,void * data)937 static int i915_displayport_test_type_show(struct seq_file *m, void *data)
938 {
939 struct drm_i915_private *dev_priv = m->private;
940 struct drm_connector *connector;
941 struct drm_connector_list_iter conn_iter;
942 struct intel_dp *intel_dp;
943
944 drm_connector_list_iter_begin(&dev_priv->drm, &conn_iter);
945 drm_for_each_connector_iter(connector, &conn_iter) {
946 struct intel_encoder *encoder;
947
948 if (connector->connector_type !=
949 DRM_MODE_CONNECTOR_DisplayPort)
950 continue;
951
952 encoder = to_intel_encoder(connector->encoder);
953 if (encoder && encoder->type == INTEL_OUTPUT_DP_MST)
954 continue;
955
956 if (encoder && connector->status == connector_status_connected) {
957 intel_dp = enc_to_intel_dp(encoder);
958 seq_printf(m, "%02lx\n", intel_dp->compliance.test_type);
959 } else
960 seq_puts(m, "0");
961 }
962 drm_connector_list_iter_end(&conn_iter);
963
964 return 0;
965 }
966 DEFINE_SHOW_ATTRIBUTE(i915_displayport_test_type);
967
968 static ssize_t
i915_fifo_underrun_reset_write(struct file * filp,const char __user * ubuf,size_t cnt,loff_t * ppos)969 i915_fifo_underrun_reset_write(struct file *filp,
970 const char __user *ubuf,
971 size_t cnt, loff_t *ppos)
972 {
973 struct drm_i915_private *dev_priv = filp->private_data;
974 struct intel_crtc *crtc;
975 int ret;
976 bool reset;
977
978 ret = kstrtobool_from_user(ubuf, cnt, &reset);
979 if (ret)
980 return ret;
981
982 if (!reset)
983 return cnt;
984
985 for_each_intel_crtc(&dev_priv->drm, crtc) {
986 struct drm_crtc_commit *commit;
987 struct intel_crtc_state *crtc_state;
988
989 ret = drm_modeset_lock_single_interruptible(&crtc->base.mutex);
990 if (ret)
991 return ret;
992
993 crtc_state = to_intel_crtc_state(crtc->base.state);
994 commit = crtc_state->uapi.commit;
995 if (commit) {
996 ret = wait_for_completion_interruptible(&commit->hw_done);
997 if (!ret)
998 ret = wait_for_completion_interruptible(&commit->flip_done);
999 }
1000
1001 if (!ret && crtc_state->hw.active) {
1002 drm_dbg_kms(&dev_priv->drm,
1003 "Re-arming FIFO underruns on pipe %c\n",
1004 pipe_name(crtc->pipe));
1005
1006 intel_crtc_arm_fifo_underrun(crtc, crtc_state);
1007 }
1008
1009 drm_modeset_unlock(&crtc->base.mutex);
1010
1011 if (ret)
1012 return ret;
1013 }
1014
1015 intel_fbc_reset_underrun(&dev_priv->display);
1016
1017 return cnt;
1018 }
1019
1020 static const struct file_operations i915_fifo_underrun_reset_ops = {
1021 .owner = THIS_MODULE,
1022 .open = simple_open,
1023 .write = i915_fifo_underrun_reset_write,
1024 .llseek = default_llseek,
1025 };
1026
1027 static const struct drm_info_list intel_display_debugfs_list[] = {
1028 {"i915_frontbuffer_tracking", i915_frontbuffer_tracking, 0},
1029 {"i915_sr_status", i915_sr_status, 0},
1030 {"i915_gem_framebuffer", i915_gem_framebuffer_info, 0},
1031 {"i915_power_domain_info", i915_power_domain_info, 0},
1032 {"i915_display_info", i915_display_info, 0},
1033 {"i915_display_capabilities", i915_display_capabilities, 0},
1034 {"i915_shared_dplls_info", i915_shared_dplls_info, 0},
1035 {"i915_dp_mst_info", i915_dp_mst_info, 0},
1036 {"i915_ddb_info", i915_ddb_info, 0},
1037 {"i915_lpsp_status", i915_lpsp_status, 0},
1038 };
1039
1040 static const struct {
1041 const char *name;
1042 const struct file_operations *fops;
1043 } intel_display_debugfs_files[] = {
1044 {"i915_fifo_underrun_reset", &i915_fifo_underrun_reset_ops},
1045 {"i915_dp_test_data", &i915_displayport_test_data_fops},
1046 {"i915_dp_test_type", &i915_displayport_test_type_fops},
1047 {"i915_dp_test_active", &i915_displayport_test_active_fops},
1048 };
1049
intel_display_debugfs_register(struct drm_i915_private * i915)1050 void intel_display_debugfs_register(struct drm_i915_private *i915)
1051 {
1052 struct intel_display *display = &i915->display;
1053 struct drm_minor *minor = i915->drm.primary;
1054 int i;
1055
1056 for (i = 0; i < ARRAY_SIZE(intel_display_debugfs_files); i++) {
1057 debugfs_create_file(intel_display_debugfs_files[i].name,
1058 0644,
1059 minor->debugfs_root,
1060 to_i915(minor->dev),
1061 intel_display_debugfs_files[i].fops);
1062 }
1063
1064 drm_debugfs_create_files(intel_display_debugfs_list,
1065 ARRAY_SIZE(intel_display_debugfs_list),
1066 minor->debugfs_root, minor);
1067
1068 intel_bios_debugfs_register(display);
1069 intel_cdclk_debugfs_register(i915);
1070 intel_dmc_debugfs_register(i915);
1071 intel_fbc_debugfs_register(display);
1072 intel_hpd_debugfs_register(i915);
1073 intel_opregion_debugfs_register(display);
1074 intel_psr_debugfs_register(display);
1075 intel_wm_debugfs_register(i915);
1076 intel_display_debugfs_params(display);
1077 }
1078
i915_hdcp_sink_capability_show(struct seq_file * m,void * data)1079 static int i915_hdcp_sink_capability_show(struct seq_file *m, void *data)
1080 {
1081 struct intel_connector *connector = m->private;
1082 struct drm_i915_private *i915 = to_i915(connector->base.dev);
1083 int ret;
1084
1085 ret = drm_modeset_lock_single_interruptible(&i915->drm.mode_config.connection_mutex);
1086 if (ret)
1087 return ret;
1088
1089 if (!connector->base.encoder ||
1090 connector->base.status != connector_status_connected) {
1091 ret = -ENODEV;
1092 goto out;
1093 }
1094
1095 seq_printf(m, "%s:%d HDCP version: ", connector->base.name,
1096 connector->base.base.id);
1097 intel_hdcp_info(m, connector, false);
1098
1099 out:
1100 drm_modeset_unlock(&i915->drm.mode_config.connection_mutex);
1101
1102 return ret;
1103 }
1104 DEFINE_SHOW_ATTRIBUTE(i915_hdcp_sink_capability);
1105
i915_lpsp_capability_show(struct seq_file * m,void * data)1106 static int i915_lpsp_capability_show(struct seq_file *m, void *data)
1107 {
1108 struct intel_connector *connector = m->private;
1109 struct drm_i915_private *i915 = to_i915(connector->base.dev);
1110 struct intel_encoder *encoder = intel_attached_encoder(connector);
1111 int connector_type = connector->base.connector_type;
1112 bool lpsp_capable = false;
1113
1114 if (!encoder)
1115 return -ENODEV;
1116
1117 if (connector->base.status != connector_status_connected)
1118 return -ENODEV;
1119
1120 if (DISPLAY_VER(i915) >= 13)
1121 lpsp_capable = encoder->port <= PORT_B;
1122 else if (DISPLAY_VER(i915) >= 12)
1123 /*
1124 * Actually TGL can drive LPSP on port till DDI_C
1125 * but there is no physical connected DDI_C on TGL sku's,
1126 * even driver is not initilizing DDI_C port for gen12.
1127 */
1128 lpsp_capable = encoder->port <= PORT_B;
1129 else if (DISPLAY_VER(i915) == 11)
1130 lpsp_capable = (connector_type == DRM_MODE_CONNECTOR_DSI ||
1131 connector_type == DRM_MODE_CONNECTOR_eDP);
1132 else if (IS_DISPLAY_VER(i915, 9, 10))
1133 lpsp_capable = (encoder->port == PORT_A &&
1134 (connector_type == DRM_MODE_CONNECTOR_DSI ||
1135 connector_type == DRM_MODE_CONNECTOR_eDP ||
1136 connector_type == DRM_MODE_CONNECTOR_DisplayPort));
1137 else if (IS_HASWELL(i915) || IS_BROADWELL(i915))
1138 lpsp_capable = connector_type == DRM_MODE_CONNECTOR_eDP;
1139
1140 seq_printf(m, "LPSP: %s\n", lpsp_capable ? "capable" : "incapable");
1141
1142 return 0;
1143 }
1144 DEFINE_SHOW_ATTRIBUTE(i915_lpsp_capability);
1145
i915_dsc_fec_support_show(struct seq_file * m,void * data)1146 static int i915_dsc_fec_support_show(struct seq_file *m, void *data)
1147 {
1148 struct intel_connector *connector = m->private;
1149 struct drm_i915_private *i915 = to_i915(connector->base.dev);
1150 struct drm_crtc *crtc;
1151 struct intel_dp *intel_dp;
1152 struct drm_modeset_acquire_ctx ctx;
1153 struct intel_crtc_state *crtc_state = NULL;
1154 int ret = 0;
1155 bool try_again = false;
1156
1157 drm_modeset_acquire_init(&ctx, DRM_MODESET_ACQUIRE_INTERRUPTIBLE);
1158
1159 do {
1160 try_again = false;
1161 ret = drm_modeset_lock(&i915->drm.mode_config.connection_mutex,
1162 &ctx);
1163 if (ret) {
1164 if (ret == -EDEADLK && !drm_modeset_backoff(&ctx)) {
1165 try_again = true;
1166 continue;
1167 }
1168 break;
1169 }
1170 crtc = connector->base.state->crtc;
1171 if (connector->base.status != connector_status_connected || !crtc) {
1172 ret = -ENODEV;
1173 break;
1174 }
1175 ret = drm_modeset_lock(&crtc->mutex, &ctx);
1176 if (ret == -EDEADLK) {
1177 ret = drm_modeset_backoff(&ctx);
1178 if (!ret) {
1179 try_again = true;
1180 continue;
1181 }
1182 break;
1183 } else if (ret) {
1184 break;
1185 }
1186 intel_dp = intel_attached_dp(connector);
1187 crtc_state = to_intel_crtc_state(crtc->state);
1188 seq_printf(m, "DSC_Enabled: %s\n",
1189 str_yes_no(crtc_state->dsc.compression_enable));
1190 seq_printf(m, "DSC_Sink_Support: %s\n",
1191 str_yes_no(drm_dp_sink_supports_dsc(connector->dp.dsc_dpcd)));
1192 seq_printf(m, "DSC_Output_Format_Sink_Support: RGB: %s YCBCR420: %s YCBCR444: %s\n",
1193 str_yes_no(drm_dp_dsc_sink_supports_format(connector->dp.dsc_dpcd,
1194 DP_DSC_RGB)),
1195 str_yes_no(drm_dp_dsc_sink_supports_format(connector->dp.dsc_dpcd,
1196 DP_DSC_YCbCr420_Native)),
1197 str_yes_no(drm_dp_dsc_sink_supports_format(connector->dp.dsc_dpcd,
1198 DP_DSC_YCbCr444)));
1199 seq_printf(m, "DSC_Sink_BPP_Precision: %d\n",
1200 drm_dp_dsc_sink_bpp_incr(connector->dp.dsc_dpcd));
1201 seq_printf(m, "Force_DSC_Enable: %s\n",
1202 str_yes_no(intel_dp->force_dsc_en));
1203 if (!intel_dp_is_edp(intel_dp))
1204 seq_printf(m, "FEC_Sink_Support: %s\n",
1205 str_yes_no(drm_dp_sink_supports_fec(connector->dp.fec_capability)));
1206 } while (try_again);
1207
1208 drm_modeset_drop_locks(&ctx);
1209 drm_modeset_acquire_fini(&ctx);
1210
1211 return ret;
1212 }
1213
i915_dsc_fec_support_write(struct file * file,const char __user * ubuf,size_t len,loff_t * offp)1214 static ssize_t i915_dsc_fec_support_write(struct file *file,
1215 const char __user *ubuf,
1216 size_t len, loff_t *offp)
1217 {
1218 struct seq_file *m = file->private_data;
1219 struct intel_connector *connector = m->private;
1220 struct drm_i915_private *i915 = to_i915(connector->base.dev);
1221 struct intel_encoder *encoder = intel_attached_encoder(connector);
1222 struct intel_dp *intel_dp = enc_to_intel_dp(encoder);
1223 bool dsc_enable = false;
1224 int ret;
1225
1226 if (len == 0)
1227 return 0;
1228
1229 drm_dbg(&i915->drm,
1230 "Copied %zu bytes from user to force DSC\n", len);
1231
1232 ret = kstrtobool_from_user(ubuf, len, &dsc_enable);
1233 if (ret < 0)
1234 return ret;
1235
1236 drm_dbg(&i915->drm, "Got %s for DSC Enable\n",
1237 (dsc_enable) ? "true" : "false");
1238 intel_dp->force_dsc_en = dsc_enable;
1239
1240 *offp += len;
1241 return len;
1242 }
1243
i915_dsc_fec_support_open(struct inode * inode,struct file * file)1244 static int i915_dsc_fec_support_open(struct inode *inode,
1245 struct file *file)
1246 {
1247 return single_open(file, i915_dsc_fec_support_show,
1248 inode->i_private);
1249 }
1250
1251 static const struct file_operations i915_dsc_fec_support_fops = {
1252 .owner = THIS_MODULE,
1253 .open = i915_dsc_fec_support_open,
1254 .read = seq_read,
1255 .llseek = seq_lseek,
1256 .release = single_release,
1257 .write = i915_dsc_fec_support_write
1258 };
1259
i915_dsc_bpc_show(struct seq_file * m,void * data)1260 static int i915_dsc_bpc_show(struct seq_file *m, void *data)
1261 {
1262 struct intel_connector *connector = m->private;
1263 struct drm_i915_private *i915 = to_i915(connector->base.dev);
1264 struct intel_encoder *encoder = intel_attached_encoder(connector);
1265 struct drm_crtc *crtc;
1266 struct intel_crtc_state *crtc_state;
1267 int ret;
1268
1269 if (!encoder)
1270 return -ENODEV;
1271
1272 ret = drm_modeset_lock_single_interruptible(&i915->drm.mode_config.connection_mutex);
1273 if (ret)
1274 return ret;
1275
1276 crtc = connector->base.state->crtc;
1277 if (connector->base.status != connector_status_connected || !crtc) {
1278 ret = -ENODEV;
1279 goto out;
1280 }
1281
1282 crtc_state = to_intel_crtc_state(crtc->state);
1283 seq_printf(m, "Input_BPC: %d\n", crtc_state->dsc.config.bits_per_component);
1284
1285 out: drm_modeset_unlock(&i915->drm.mode_config.connection_mutex);
1286
1287 return ret;
1288 }
1289
i915_dsc_bpc_write(struct file * file,const char __user * ubuf,size_t len,loff_t * offp)1290 static ssize_t i915_dsc_bpc_write(struct file *file,
1291 const char __user *ubuf,
1292 size_t len, loff_t *offp)
1293 {
1294 struct seq_file *m = file->private_data;
1295 struct intel_connector *connector = m->private;
1296 struct intel_encoder *encoder = intel_attached_encoder(connector);
1297 struct intel_dp *intel_dp = enc_to_intel_dp(encoder);
1298 int dsc_bpc = 0;
1299 int ret;
1300
1301 ret = kstrtoint_from_user(ubuf, len, 0, &dsc_bpc);
1302 if (ret < 0)
1303 return ret;
1304
1305 intel_dp->force_dsc_bpc = dsc_bpc;
1306 *offp += len;
1307
1308 return len;
1309 }
1310
i915_dsc_bpc_open(struct inode * inode,struct file * file)1311 static int i915_dsc_bpc_open(struct inode *inode,
1312 struct file *file)
1313 {
1314 return single_open(file, i915_dsc_bpc_show, inode->i_private);
1315 }
1316
1317 static const struct file_operations i915_dsc_bpc_fops = {
1318 .owner = THIS_MODULE,
1319 .open = i915_dsc_bpc_open,
1320 .read = seq_read,
1321 .llseek = seq_lseek,
1322 .release = single_release,
1323 .write = i915_dsc_bpc_write
1324 };
1325
i915_dsc_output_format_show(struct seq_file * m,void * data)1326 static int i915_dsc_output_format_show(struct seq_file *m, void *data)
1327 {
1328 struct intel_connector *connector = m->private;
1329 struct drm_i915_private *i915 = to_i915(connector->base.dev);
1330 struct intel_encoder *encoder = intel_attached_encoder(connector);
1331 struct drm_crtc *crtc;
1332 struct intel_crtc_state *crtc_state;
1333 int ret;
1334
1335 if (!encoder)
1336 return -ENODEV;
1337
1338 ret = drm_modeset_lock_single_interruptible(&i915->drm.mode_config.connection_mutex);
1339 if (ret)
1340 return ret;
1341
1342 crtc = connector->base.state->crtc;
1343 if (connector->base.status != connector_status_connected || !crtc) {
1344 ret = -ENODEV;
1345 goto out;
1346 }
1347
1348 crtc_state = to_intel_crtc_state(crtc->state);
1349 seq_printf(m, "DSC_Output_Format: %s\n",
1350 intel_output_format_name(crtc_state->output_format));
1351
1352 out: drm_modeset_unlock(&i915->drm.mode_config.connection_mutex);
1353
1354 return ret;
1355 }
1356
i915_dsc_output_format_write(struct file * file,const char __user * ubuf,size_t len,loff_t * offp)1357 static ssize_t i915_dsc_output_format_write(struct file *file,
1358 const char __user *ubuf,
1359 size_t len, loff_t *offp)
1360 {
1361 struct seq_file *m = file->private_data;
1362 struct intel_connector *connector = m->private;
1363 struct intel_encoder *encoder = intel_attached_encoder(connector);
1364 struct intel_dp *intel_dp = enc_to_intel_dp(encoder);
1365 int dsc_output_format = 0;
1366 int ret;
1367
1368 ret = kstrtoint_from_user(ubuf, len, 0, &dsc_output_format);
1369 if (ret < 0)
1370 return ret;
1371
1372 intel_dp->force_dsc_output_format = dsc_output_format;
1373 *offp += len;
1374
1375 return len;
1376 }
1377
i915_dsc_output_format_open(struct inode * inode,struct file * file)1378 static int i915_dsc_output_format_open(struct inode *inode,
1379 struct file *file)
1380 {
1381 return single_open(file, i915_dsc_output_format_show, inode->i_private);
1382 }
1383
1384 static const struct file_operations i915_dsc_output_format_fops = {
1385 .owner = THIS_MODULE,
1386 .open = i915_dsc_output_format_open,
1387 .read = seq_read,
1388 .llseek = seq_lseek,
1389 .release = single_release,
1390 .write = i915_dsc_output_format_write
1391 };
1392
i915_dsc_fractional_bpp_show(struct seq_file * m,void * data)1393 static int i915_dsc_fractional_bpp_show(struct seq_file *m, void *data)
1394 {
1395 struct intel_connector *connector = m->private;
1396 struct drm_i915_private *i915 = to_i915(connector->base.dev);
1397 struct intel_encoder *encoder = intel_attached_encoder(connector);
1398 struct drm_crtc *crtc;
1399 struct intel_dp *intel_dp;
1400 int ret;
1401
1402 if (!encoder)
1403 return -ENODEV;
1404
1405 ret = drm_modeset_lock_single_interruptible(&i915->drm.mode_config.connection_mutex);
1406 if (ret)
1407 return ret;
1408
1409 crtc = connector->base.state->crtc;
1410 if (connector->base.status != connector_status_connected || !crtc) {
1411 ret = -ENODEV;
1412 goto out;
1413 }
1414
1415 intel_dp = intel_attached_dp(connector);
1416 seq_printf(m, "Force_DSC_Fractional_BPP_Enable: %s\n",
1417 str_yes_no(intel_dp->force_dsc_fractional_bpp_en));
1418
1419 out:
1420 drm_modeset_unlock(&i915->drm.mode_config.connection_mutex);
1421
1422 return ret;
1423 }
1424
i915_dsc_fractional_bpp_write(struct file * file,const char __user * ubuf,size_t len,loff_t * offp)1425 static ssize_t i915_dsc_fractional_bpp_write(struct file *file,
1426 const char __user *ubuf,
1427 size_t len, loff_t *offp)
1428 {
1429 struct seq_file *m = file->private_data;
1430 struct intel_connector *connector = m->private;
1431 struct intel_encoder *encoder = intel_attached_encoder(connector);
1432 struct drm_i915_private *i915 = to_i915(connector->base.dev);
1433 struct intel_dp *intel_dp = enc_to_intel_dp(encoder);
1434 bool dsc_fractional_bpp_enable = false;
1435 int ret;
1436
1437 if (len == 0)
1438 return 0;
1439
1440 drm_dbg(&i915->drm,
1441 "Copied %zu bytes from user to force fractional bpp for DSC\n", len);
1442
1443 ret = kstrtobool_from_user(ubuf, len, &dsc_fractional_bpp_enable);
1444 if (ret < 0)
1445 return ret;
1446
1447 drm_dbg(&i915->drm, "Got %s for DSC Fractional BPP Enable\n",
1448 (dsc_fractional_bpp_enable) ? "true" : "false");
1449 intel_dp->force_dsc_fractional_bpp_en = dsc_fractional_bpp_enable;
1450
1451 *offp += len;
1452
1453 return len;
1454 }
1455
i915_dsc_fractional_bpp_open(struct inode * inode,struct file * file)1456 static int i915_dsc_fractional_bpp_open(struct inode *inode,
1457 struct file *file)
1458 {
1459 return single_open(file, i915_dsc_fractional_bpp_show, inode->i_private);
1460 }
1461
1462 static const struct file_operations i915_dsc_fractional_bpp_fops = {
1463 .owner = THIS_MODULE,
1464 .open = i915_dsc_fractional_bpp_open,
1465 .read = seq_read,
1466 .llseek = seq_lseek,
1467 .release = single_release,
1468 .write = i915_dsc_fractional_bpp_write
1469 };
1470
1471 /*
1472 * Returns the Current CRTC's bpc.
1473 * Example usage: cat /sys/kernel/debug/dri/0/crtc-0/i915_current_bpc
1474 */
i915_current_bpc_show(struct seq_file * m,void * data)1475 static int i915_current_bpc_show(struct seq_file *m, void *data)
1476 {
1477 struct intel_crtc *crtc = m->private;
1478 struct intel_crtc_state *crtc_state;
1479 int ret;
1480
1481 ret = drm_modeset_lock_single_interruptible(&crtc->base.mutex);
1482 if (ret)
1483 return ret;
1484
1485 crtc_state = to_intel_crtc_state(crtc->base.state);
1486 seq_printf(m, "Current: %u\n", crtc_state->pipe_bpp / 3);
1487
1488 drm_modeset_unlock(&crtc->base.mutex);
1489
1490 return ret;
1491 }
1492 DEFINE_SHOW_ATTRIBUTE(i915_current_bpc);
1493
1494 /* Pipe may differ from crtc index if pipes are fused off */
intel_crtc_pipe_show(struct seq_file * m,void * unused)1495 static int intel_crtc_pipe_show(struct seq_file *m, void *unused)
1496 {
1497 struct intel_crtc *crtc = m->private;
1498
1499 seq_printf(m, "%c\n", pipe_name(crtc->pipe));
1500
1501 return 0;
1502 }
1503 DEFINE_SHOW_ATTRIBUTE(intel_crtc_pipe);
1504
1505 /**
1506 * intel_connector_debugfs_add - add i915 specific connector debugfs files
1507 * @connector: pointer to a registered intel_connector
1508 *
1509 * Cleanup will be done by drm_connector_unregister() through a call to
1510 * drm_debugfs_connector_remove().
1511 */
intel_connector_debugfs_add(struct intel_connector * connector)1512 void intel_connector_debugfs_add(struct intel_connector *connector)
1513 {
1514 struct drm_i915_private *i915 = to_i915(connector->base.dev);
1515 struct dentry *root = connector->base.debugfs_entry;
1516 int connector_type = connector->base.connector_type;
1517
1518 /* The connector must have been registered beforehands. */
1519 if (!root)
1520 return;
1521
1522 intel_drrs_connector_debugfs_add(connector);
1523 intel_pps_connector_debugfs_add(connector);
1524 intel_psr_connector_debugfs_add(connector);
1525 intel_alpm_lobf_debugfs_add(connector);
1526 intel_dp_link_training_debugfs_add(connector);
1527
1528 if (connector_type == DRM_MODE_CONNECTOR_DisplayPort ||
1529 connector_type == DRM_MODE_CONNECTOR_HDMIA ||
1530 connector_type == DRM_MODE_CONNECTOR_HDMIB) {
1531 debugfs_create_file("i915_hdcp_sink_capability", 0444, root,
1532 connector, &i915_hdcp_sink_capability_fops);
1533 }
1534
1535 if (DISPLAY_VER(i915) >= 11 &&
1536 ((connector_type == DRM_MODE_CONNECTOR_DisplayPort && !connector->mst_port) ||
1537 connector_type == DRM_MODE_CONNECTOR_eDP)) {
1538 debugfs_create_file("i915_dsc_fec_support", 0644, root,
1539 connector, &i915_dsc_fec_support_fops);
1540
1541 debugfs_create_file("i915_dsc_bpc", 0644, root,
1542 connector, &i915_dsc_bpc_fops);
1543
1544 debugfs_create_file("i915_dsc_output_format", 0644, root,
1545 connector, &i915_dsc_output_format_fops);
1546
1547 debugfs_create_file("i915_dsc_fractional_bpp", 0644, root,
1548 connector, &i915_dsc_fractional_bpp_fops);
1549 }
1550
1551 if (DISPLAY_VER(i915) >= 11 &&
1552 (connector_type == DRM_MODE_CONNECTOR_DisplayPort ||
1553 connector_type == DRM_MODE_CONNECTOR_eDP)) {
1554 debugfs_create_bool("i915_bigjoiner_force_enable", 0644, root,
1555 &connector->force_bigjoiner_enable);
1556 }
1557
1558 if (connector_type == DRM_MODE_CONNECTOR_DSI ||
1559 connector_type == DRM_MODE_CONNECTOR_eDP ||
1560 connector_type == DRM_MODE_CONNECTOR_DisplayPort ||
1561 connector_type == DRM_MODE_CONNECTOR_HDMIA ||
1562 connector_type == DRM_MODE_CONNECTOR_HDMIB)
1563 debugfs_create_file("i915_lpsp_capability", 0444, root,
1564 connector, &i915_lpsp_capability_fops);
1565 }
1566
1567 /**
1568 * intel_crtc_debugfs_add - add i915 specific crtc debugfs files
1569 * @crtc: pointer to a drm_crtc
1570 *
1571 * Failure to add debugfs entries should generally be ignored.
1572 */
intel_crtc_debugfs_add(struct intel_crtc * crtc)1573 void intel_crtc_debugfs_add(struct intel_crtc *crtc)
1574 {
1575 struct dentry *root = crtc->base.debugfs_entry;
1576
1577 if (!root)
1578 return;
1579
1580 crtc_updates_add(crtc);
1581 intel_drrs_crtc_debugfs_add(crtc);
1582 intel_fbc_crtc_debugfs_add(crtc);
1583 hsw_ips_crtc_debugfs_add(crtc);
1584
1585 debugfs_create_file("i915_current_bpc", 0444, root, crtc,
1586 &i915_current_bpc_fops);
1587 debugfs_create_file("i915_pipe", 0444, root, crtc,
1588 &intel_crtc_pipe_fops);
1589 }
1590